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Innovating Beyond Moore’s La · Make do with less – buy time from Moore . 1. Use compute cycles...
Transcript of Innovating Beyond Moore’s La · Make do with less – buy time from Moore . 1. Use compute cycles...
Innovating Beyond Moore’s Law
Craig Stephen Vice President, R&D, Oracle Labs
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The following is intended to outline our general product direction. It is intended
for information purposes only, and may not be incorporated into any contract.
It is not a commitment to deliver any material, code, or functionality, and should
not be relied upon in making purchasing decisions. The development, release,
and timing of any features or functionality described for Oracle’s products
remains at the sole discretion of Oracle.
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The following is intended to outline our general product direction. It is intended
for information purposes only, and may not be incorporated into any contract.
It is not a commitment to deliver any material, code, or functionality, and should
not be relied upon in making purchasing decisions. The development, release,
and timing of any features or functionality described for Oracle’s products
remains at the sole discretion of Oracle.
No Kidding !
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Agenda
Research and Innovation at Oracle
The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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Agenda
Research and Innovation at Oracle The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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On Innovation
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Practical Focused on customer value Needs predictable timeframes
Continuous, sustaining innovation baked into process
Innovation Engines
Oracle Engineering Culture
On Innovation at Oracle
Nicolás Pérez
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Innovation at Oracle
Database development requires strict cycle times
If a development project late…
– the release train won’t wait…
– but another train will come soon
If a feature is still a little experimental…
– It can be a runtime option for beta
(so long as it doesn’t break anything)
Fail fast, fail cheap, and iterate, but never stop the train
An Innovation Engine Example
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Oracle Labs Another path to innovation
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Oracle Labs Another path to innovation
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Oracle Labs Another path to innovation
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Edward Screven Chief Corporate Architect
“The mission of the Labs at Oracle is straightforward –to identify, explore, and transfer new technologies that have the potential to substantially advance Oracle’s business.”
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Oracle Labs
“ Identify, explore, and transfer new technologies
that have the potential to substantially advance Oracle’s business ”
Clear connection to Oracle’s business
Plausible technology transfer path
Real risk of failure
Time horizons may not be compatible with Product Development
Opportunity may be out of scope for existing product organizations
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Connected to business
Path to tech transfer
Not addressable by Engineering
Labs Project Criteria
Oracle Labs Provides Innovation Options
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Agenda
Research and Innovation at Oracle
The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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Mark Twain by popular attribution
“ Everybody talks about the weather, but no one ever does anything about it.”
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Mark Twain by popular attribution
“ The coldest winter I ever spent was a summer in San Francisco.”
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What Does Moore’s Law Mean, Exactly?
wgsimon, wikipedia
2x transistors / unit area …every two years
We’re still on track
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Neils Bohr
“ Prediction is very difficult, especially if it’s about the future.”
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How Long Do We Have? We can set some limits on information density
1010
1
1020
1030
1040
1050
1060
1070
Bits
1 10 100 104 105 106 107 108 0.1 0.01 10-4 10-3
Music CD Human chromosome Library of Congress
4Gb DRAM Diameter
in cm
So
urc
e –
Ka
ma
jian
& G
race
Increasing information density
1025
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How Long Do We Have? We have room to improve by 1,000,000,000,000,000,000,000,000 x !
1010
1
1020
1030
1040
1050
1060
1070
Bits
1 10 100 104 105 106 107 108 0.1 0.01 10-4 10-3
4Gb DRAM Diameter
in cm
So
urc
e –
Ka
ma
jian
& G
race
1025
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How Long Do We Have?
Semiconductor physics &
process engineering
We can set some more practical limits
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High Perf
Low Op Pow
Low SB Pow
Source – International Technology Roadmap for Semiconductors
Intel Fab 42 $5.2 B, 2011
TSMC Fab 15 $9.3 B, 2010
GlobalFoundries Fab 8 $4.6 B, 2009
Economics
5.5nm
20x density
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Some runway left…
Increasingly expensive…
The challenges transcend Moore’s Law
Wrong question?
Is it the End of Moore’s Law?
Nicolás PérezNicolás Pérez
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Agenda
Research and Innovation at Oracle
The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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Some Challenges Transcend Moore’s Law
35% CAGR in computer performance – that’s impressive!
Ho et al
IEEE Design
and Test, 2010
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Where Did Performance Growth Come From? Faster transistors… and more of them
Danowitz et al. ACM QUEUE
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Performance, defined
Performance = instructions/cycle * cycles/second
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Performance, defined
Performance = instructions/cycle * frequency
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Performance, defined
Performance = instructions/cycle * frequency
But growth here is stalled
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Frequency Scaling Has Tailed Off….
Danowitz et al. ACM QUEUE, 2012
Frequency Scaling Has Tailed Off….
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Frequency Scaling Has Tailed Off….
Danowitz et al. ACM QUEUE 2012
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Performance, defined
Performance = instructions/cycle * frequency
If growth here is stalled…
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Performance, defined
Performance = instructions/cycle * frequency
We need to look here!
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Performance, defined
Performance = parallelism * frequency
We need to look here!
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Industry’s solution - add more cores
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Processor performance scaling
Interconnect
Programming
Daunting Challenges Remain
Regardless of Moore’s Law
Nicolás PérezNicolás PérezFor (i = 1 to n) {…}
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Agenda
Research and Innovation at Oracle
The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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Four Courses of Action
Make do with less – buy time from Moore
1. Use compute cycles wisely
2. Make every transistor count
Build more – exploit parallelism, with or without Moore
3. Build massive scaleout compute
4. Harness massive scaleout compute
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Use Cycles Wisely
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Performance, Thanks to Moore, Again…
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Performance, Thanks to Moore, Again…
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Performance Comparison What’s going on here?
0
100
200
300
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500
600
700
800
96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 11 12
Java CPU1996 - Present
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10x Improvement Beyond Moore Genius application developers not required!
Von Neumann Turing Gödel
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10x Improvement Beyond Moore Superluminary neutrinos not required…
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10x Improvement Beyond Moore
A few smart people can massively improve the state-of-the-art in program execution.
Everyone benefits from just a few genius developers
1 0x
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Performance Improvements Beyond Moore There is an opportunity here to recover those CPU cycles…
/ APL
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Performance Improvements Beyond Moore 10-100x… 10x is seven years of Moore’s Law
/ APL
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10x Java Runtime Improvement
Similar opportunities with other languages
Huge potential gains in aggregate
Programming Language Development
Improve Compute Cycle Efficiency
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Make Every Transistor Count
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Specialization Making every transistor count
Performance
Generality Efficiency mobile devices
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“GPGPU” trend – general computation using GPU shader pipeline
Optimized for computationally-intense workloads
Enterprise workloads – RDBMS – can be memory-bandwidth intense
So we prefer… a screwdriver
Specialization Making every transistor count
Driver: [email protected]
Screw: haragayato
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Engineered Systems Making every transistor count
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Hardware / Software co-design
Oracle uniquely positioned
Hardware Specialization
Making every transistor count for the Enterprise
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Build Massive Scaleout Compute
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Build Massive Scaleout Compute
Performance = parallelism * frequency
Recall…
We need to look here!
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3GHz
Eight Cores
Eight threads / core
Out-of-order execution
Single-pipeline, dual-issue
SPARC T4
Build Massive Scaleout Compute
Nicolás Pérez
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Build Massive Scaleout Compute
Recall… there are die-size limits
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Cable latencies
Signaling power
Management
This is probably not the way to do it
Image from Al Davis, Utah
How Do We Continue to Advance Integration?
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Build Massive Scale Compute
Data centers are power limited – Much of that power goes to I/O – At least 10 mW per Gb/s of data comms – 1 b/s of external traffic spawns 0.1
Gb/s (1 mW) of internal traffic – So 10 XB/month is 80 PW!
Costs are real – 2 MW costs $1M in OpEx – Need dedicated substations
Communication costs are significant
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Build Massive Scale Compute
Build upwards (“3-D”)
Build outwards
Requires low-energy, high-bandwidth interchip I/O
Towards extreme integration through chip aggregation
I/O
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Build Massive Scale Compute Low-energy, high-bandwidth interchip I/O
Electrical connectivity
increasingly challenged
Optics reigns where
distance * BW
exceeds 100 Gb*m
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Build Massive Scale Compute Optical inter-chip communication via silicon photonics
O/E and E/O “bridge” chip
Fine-pitch solder (25 mm pads demonstrated)
O/E and E/O
CMOS chip (no optics)
Higher reliability, low power, better integration than current optical technology
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You will deploy massive-scale compute…
A server-in-a-package based on CMOS and optics
More than 5 Tbps IO BW per chip
…Based on silicon-photonic-enabled massive-scale integration
Optical bridges
Stack of DRAM (e.g., using TSVs)
CPUs
Passive Si lattice with waveguides
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Chip integration
High bandwidth I/O
Optical inter-chip communication – Si Photonics
Next Generation Integration
Massive scale computing
Nicolás PérezNicolás Pérez
Optical bridges
Stack of DRAM (e.g., using TSVs)
CPUs
Passive Si lattice with waveguides
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Harness Massive Scaleout Compute
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Harnessing Massive Scaleout Compute
Programmers have a hard time handling the concurrency implicit in
massive parallelism
– Exception - “Embarrasingly parallel” problems – web servers
Tools are largely inadequate to the task
Programming massive numbers of cores – and specialized hardware
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Harnessing Massive Scaleout Compute Programming massive numbers of cores – and specialized hardware
Performance
Generality Productivity
Ruby, Python, etc
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Harnessing Massive Scaleout Compute
Why would you specialize a programming language?
To capture abstractions at a high level
Domain Specific Languages
Claudio Rocchini
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Harnessing Massive Scaleout Compute Domain Specific Languages
Claudio Rocchini Brandes 2011, Hong et al 2012
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Harnessing Massive-Scale Compute
Isn’t it wasteful to create new languages for every problem ?
We’re creating a DSL framework for new domain-specific languages
– And you can create your own
– So you’re not hiring high-end SQL or map/reduce programmers
What are some interesting domains other than graphs?
Statistics… Finance…. You name it.
Domain-Specific Languages
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You Will Harness Massive-Scale Compute
In fact, you already do!
The world’s most popular domain-specific language is
– Capable of expressing problems succinctly and clearly
– Highly optimized for execution on heterogenous hardware
– Scalable to massive numbers of nodes
And it’s called...
..through Domain-Specific Languages
SQL
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Highly performant andproductive languages
Targeting specific domains
Specialized Software
Exploiting Massive Scale Computers
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Agenda
Research and Innovation at Oracle
The End of Moore’s Law?
Challenges Beyond Moore’s Law
Opportunities Beyond Moore’s Law
Your Future Computing Infrastructure
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Your Future Computing Infrastructure
Optical bridges
Stack of DRAM (e.g., using TSVs)
CPUs
Passive Si lattice with waveguides
SQL
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