INF4420 RepetitionTuesday 26th of May, 2009, 9:15uesday 6t o ay, 009, 9 5

Snorre Aunet, sa@ifi.uio.noNanoelectronics Group, Dept. of Informatics

Office 3432

Subjects from the book by Johns & Martin

• Chapter 2 Processing and Layout Chapter 8 Sample and Holds Voltage References• Chapter 8 Sample and Holds, Voltage References, and Translinear CircuitsCh t 9 Di t Ti Si l• Chapter 9 Discrete-Time Signals

• Chapter 10 Switched-Capacitor Circuits• Chapter 11 Data Converter Fundamentals• Chapter 12 Nyquist-Rate D/A Converters• Chapter 13 Nyquist-Rate A/D Converters• Chapter 14 Oversampling Convertersp p g• Chapter 16 Phase-Locked Loops

Subjects from the book by Johns & Martin that have been treated in the lectures, or are relevant even though they were , g y

not treated in detail• Chapter 2 Processing and Layout • Chapter 8 Sample and Holds, Voltage References, and Translinear Circuits; 8.1 performance, 8.2 MOS S/H

basics 8 5 Bandgap voltage reference basics 8 6 Circuits for bandgap referencesbasics, 8.5 Bandgap voltage reference basics, 8.6 Circuits for bandgap references • Chapter 9 Discrete-Time Signals; 9.1 Overview of some signal spectra, 9.2 Laplace transforms of discrete-time

signals, 9.3 Z-transform, 9.4 Downsampling and upsampling, 9.5 Discrete-time filters, 9.6 Sample-and-Hold response

• Chapter 10 Switched-Capacitor Circuits; 10 1 Basic Building Blocks 10 2 Basic operation and analysis 10 3• Chapter 10 Switched-Capacitor Circuits; 10.1 Basic Building Blocks, 10.2 Basic operation and analysis, 10.3 First-order filters, 10.4 Biquad filters, 10.5 charge injection, 10.7 correlated double-sampling techniques

• Chapter 11 Data Converter Fundamentals; 11.1 Ideal D/A converter, 11.2 Ideal A/D converter, 11.3 Quantization noise, 11.4 Signed codes, 11.5 Performance limitations

• Chapter 12 Nyquist Rate D/A Converters; 12 1 Decoder based converters 12 2 Binary scaled converters 12 3• Chapter 12 Nyquist-Rate D/A Converters; 12.1 Decoder-based converters, 12.2 Binary-scaled converters, 12.3 Thermometer-code converters, 12.4 Hybrid converters,

• Chapter 13 Nyquist-Rate A/D Converters; 13.1 Integrating converters, 13.2 Successive-approximation converters, 13.3 Algorithmic (or cyclic) A/D converter, 13.4 Flash (or paralell) converters, 13.5 Two-step converters, 13.6 Interpolating A/D converters 13 7 Folding A/D converters 13 8 Pipelined converters 13 9 Time-Interleaved A/DInterpolating A/D converters, 13.7 Folding A/D converters, 13.8 Pipelined converters, 13.9 Time Interleaved A/D converters

• Chapter 14 Oversampling Converters; 14.1 Oversampling without noise shaping, 14.2 Oversampling with noise shaping14.3 System architectures, 14.4 Digital decimation filters, 14.5 Higher-order modulators, 14.7 Practical considerations, 14.8 Multi-bit Oversampling Converters (example, IEEE paper)considerations, 14.8 Multi bit Oversampling Converters (example, IEEE paper)

• Chapter 16 Phase-Locked Loops; 16.1 Basic Loop Architecture, 16.2 PLLs with charge-pump phase comparators, 16.3 Voltage-controlled oscillators, (16.4 Computer Simulations of PLLs)

Chapter 8 Sample-and-Holds, Voltage References, Translinear Circuits

S l l i l d• Samples an analog signal andstores it for some time

Often limiting the performance V V

φclk

Q1 V′• Often limiting the performancefor Analog-to-Digital Converters

• Performance limitations: hold step

Vin Vout1

Chld• Performance limitations: hold step,

feedthrough, bandwidth (sample mode) and slew rate, droop rate, aperture jitterdroop rate, aperture jitter

• Charge injection• We have seen different topologies, having different input p g , g p

impedance, operational speed, susceptibility to clock feedthrough, slewing properties, signal dependent charge i j ti tinjection etc.

Bandgap reference - Basic principle

IB

VBE

V ref VBE K VBEΔ+=

Th l V i CTAT

PTAT Generator K

VBEΔ

• The voltage VBE is CTAT• The voltage is PTATVBEΔ

• is scaled by K to get the same slope as VBE• By adding VBE and K , the output VrefVBEΔ

VBEΔ

y g BE refbecomes independent of temperature

Theory• Collector current

IC IseV

BEkT( ) q⁄( )⁄=

• Solved with respect to VBE:T⎛ ⎞ T kT T⎛ ⎞ kT JC⎛ ⎞

- The collector current density is related to the current:

VBE VG0 1 TT0------–

⎝ ⎠⎛ ⎞ VBE0

TT0------ mkT

q------------ ln

T0T------⎝ ⎠⎛ ⎞ kT

q------- ln

JC

JC0--------⎝ ⎠⎜ ⎟⎛ ⎞

+ + +=

- The difference between two junctions biased at different densities:

IC AEJC=C E C

V V V kT lJ2⎜ ⎟⎛ ⎞VBEΔ V2 V1– kT

q------- ln 2

J1----⎝ ⎠⎜ ⎟⎛ ⎞= =

Theory• Assuming that:

JiJ------ T

T------=

• Vref can then be written as:Ji0 T0

Vref VBE2 K VBEΔ+=

VG0TT0------ VBE0-2 VG0–( ) m 1–( )

kTq

------- lnT0T------⎝ ⎠⎛ ⎞ KkT

q------- ln

J2J1----⎝ ⎠⎜ ⎟⎛ ⎞

+ + +=

• For a given temperature this equation may be i d d t f h i th t t if

T0 q T⎝ ⎠ q J1⎝ ⎠

independent of changes in the temperature if a proper vaule of K is assigned

Theory• The change in Vref with respect to the temperature is:

Vref∂T∂

------------ 1T0------ VBE0-2 VG0–( ) Kk

q--- ln

J2J1----⎝ ⎠⎛ ⎞ m 1–( )

kq--- ln

T0T------ 1–⎝ ⎠⎜ ⎟⎛ ⎞+ +=

• For zero temperature dependence at the following applies:

T∂ T0 q J1⎝ ⎠ q T⎝ ⎠

T T0=following applies:

VBE0-2 KkT0

q--------- ln

J2J1----⎝ ⎠⎜ ⎟⎛ ⎞+ VG0 m 1–( )

kT0q

---------+=

• Solving with respect to K gives:

kT

KVG 0 m 1–( )

kT0

q--------- VB E0-2–+

kT 0q

--------- lnJ2J1----⎝ ⎠⎜ ⎟⎛ ⎞

--------------------------------------------------------------------1,24 VB E0-2–

0,0258 lnJ2J1----⎝ ⎠⎜ ⎟⎛ ⎞

---------------------------------= =

⎝ ⎠ ⎝ ⎠

Chapter 9 Discrete-Time Signals

• Understanding theory and methods concerning Discrete-Time Signals are important in IC-design:

• The design of Switch-Capacitor filters and their analysis are based on discrete-time signal processingprocessing

• Discrete-time signal processing are necessary during analysis and design of oversampled dataduring analysis and design of oversampled data converters (Delta-Sigma) used in for example audio and instrumentation

• Digital filter design is also related to concepts from this chapter

Overview of signal spectra – conceptual and physical realizationsg p p p y

convert to convert to analogxc t( )

s t( )

xs t( )

x n( ) xc nT( )= y n( ) ys t( ) ysh t( )

yc t( )

discrete-timesequence

DSP impulsetrain

hold low-passfilter

DSPA/D

sample analoglow-passand

D/Aconverter

xc t( )

xsh t( ) x n( ) xc nT( )= y n( )ysh t( )

yc t( )

• An anti-aliasing filter (not shown) is assumed to

DSPconverterow p ss

filterd

hold with hold

band limit the continous time signal, xc(t).• DSP (”discrete-time signal processing”) may be ( g g ) y

accomplished using fully digital processing or discrete-time analog circuits (ex.: SC-circ.)

Signals in time, and frequency spectra• S(t): periodic impulse• S(t): periodic impulse

train with period T (T=1/fs)

• xs(t) has the same f tfrequency spectrum as xc(t), but the baseband spectrum repeats every fs (assuming no aliasing)

• x(n) has the same frequency spectrum asfrequency spectrum as xc(t), but the sampling frequency is normalized to 1to 1

• The frequency spectrum of xsh(t) is equal to that f (t) lti li d b thof xs(t) multiplied by the

sin(x)/x response of the S/H.

Aliasing and potential degrading of signal / noise

• Figure from W. Kester et. Al.: ”Mixed-Signal Seminar”, Analog Devices, 1991., in S. Aunet: ”BiCMOS sample-and-hold for satellitt-kommunikasjon”, Cand. Scient. Thesis, University of Oslo, 1993.

Chapter 10 Switched-Capacitor Circuits p p

10.1 Basic building blocks10.2 Basic operation and analysis10 3 First-order filters10.3 First order filters10.4 Biquad filters10.5 Charge injection10 6 SC i i it10.6 SC gain circuits10.7 Correlated double sampling techniques10.8 Other SC circ.

SC Resistor Equivalentφφ φ2φ1

C1

V1 V2V1 V2

Req

The current through an equivalent resistor is given by:

Req

TC

1------=

ΔQ C1

V1

V2–( ) every clock period=

IeqV1 V2–

Req-------------------=

eq

Combining the previous equation with Iavg:

R T------ 1----------= =Req C1------

C1fs----------= =

Transfer function for simple discrete time integrator in chapter 10.2

•

Chapter 11 Data Converter Fundamentals

•

A/D D/A

B V1Vin

+VQ

– +Quantization

noise

VVin

V1

VQ12---VLSB

t

(Time)

12---VLSB–

Tt

(Time)t

Main data converter types:yp

• Nyquist-rate converters:E h l h d i h i l• Each value has a one-to-one correspondencewith a single input

• The sample-rate must be at least equal to twice the signal p q gfrequency (Typically somewhat higher)

• Oversampled converters:• The sample rate is much higher than the signal frequency• The sample-rate is much higher than the signal frequency,

typically 20 – 512 times.• The extra samples are used to increase the SNR

11.5 performance limitations• Resolution• Offset and gain error• Accuracy• Accuracy• Integral nonlinearity (INL) error• Differential nonlinearity (DNL) errory ( )• Monotonicity• Missing codes

A/D i ti d li t• A/D conversion time and sampling rate• D/A settling time and sampling rate• Sampling time uncertaintySampling time uncertainty• Dynamic range• NB!! Different meanings and definitions of performance parameters

sometimes exist. Be sure what’s meant in a particular specification or scientific paper.. There are also more than those mentioned here.

Chapter 12 Nyquist Rate D/A Converters p yq

Vout

1

outVref-------------

2-bit DAC

1/2

3/4

V

/

1/4

VLSBVref

---------------- 14--- 1 LSB= =

0100 10 110

(100) Bin

VLSBVref

2N----------≡ 1 LSB 12N------=

Nyquist Rate D/A Converters• 12 1 Decoder based converters• 12.1 Decoder-based converters

resistor string conv.folded resistor string conv.

lti l R t i tmultiple R-string converters• 12.2 Binary-Scaled converters

binary-weighted resistor convertersreduced resistance-ratio laddersR-2R-based converterscharge-redistribution switched-capacitor conv.current-mode conv.

• 12.3 Thermometer-code convertersthermometer-code current-mode D/A converterssingle-supply positive-output convertersdynamically matched current sources

• 12 4 Hybrid converters12.4 Hybrid convertersresistor-capacitor hybrid converterssegmented converters

Chapter 13 Nyquist A/D convertersp yq

Energy, conversion and ENOB (Carsten Wulff, NTNU, 2008)

• By Carsten Wulff, NTNU, 2008

Integrating Converters (13.1)S2

b1

S2

S1Vi–

S1S2⎝ ⎠⎛ ⎞

R

C1Comparator

Control

logicCounter

b1b2b3

1Vin

Vref

R1 Vx

Comparator

(Vin is held constant during conversion.) bN

Clock

• Vx(t) = Vin t / RC (Vx ramp derivative depending on Vin )

fclk1

Tclk-----------=

Bout

Vx(t) Vin t / RC (Vx ramp derivative depending on Vin )• High linearity and low offset/gain error• Small amount of circuitry• Low conversion speed

• 2N+1 * 1/Tclk (Worst case)

Resistor-Capacitor Hybrid• First all capacitors are charged toFirst all capacitors are charged to

Vin before the comparator is being reset.

• Next a succ. approx. Conversion is performed to find the two adjacent

i t d h i ltresistor nodes having voltages larger and smaller than Vin

• One bus will be connected to• One bus will be connected to one node while the other is connected to the other node

• Then a successive approximationusing the capacitor-array network is done, starting with the largest capacitor…

Speed estimate for charge-redistribution converters• Often major limitation• Individual time constant due to

th 2C (R R R )2Cthe 2C cap.: (Rs1+R+Rs2)2C • (R ; bit line)• Tau =(R +R+R )2NC for the• Taueq=(Rs1+R+Rs2)2NC, for the

circuit in fig. 13.12• For better tha 0 5 LSB accuracy:For better tha 0.5 LSB accuracy:

e-T/Taueq < 1/2N+1, T = charging time

• T > Taueq (N+1) ln2 = 0.69(N+1)Taueq

• 30 % higher than from Spice simulations (”J & M”)

Time-Interleaved – best compromise between complexity and sampling rate – may be used for different architectures [Elbjornsson ’05]

Chapter 14 Oversampling converters

14.2 Oversampling with noise shaping

Second-order noise shaping

OSR, modulator order and Dynamic Range• 2 X increase• 2 X increase

in M (6L+3)dB or(6L 3)dB or (L+0.5) bit increase in DR.

• L: sigma-delta order

• Oversampling and noise shaping

Phase-locked loops (chapter 16) Gain

Low-passfilter

Phasedetector

Outputvoltage

Average voltage proportional to phase difference

VinVpd

Klp

Gainfilter

Hlp s( )Vlp

Vcntl

Average voltage proportional to phase difference

• Clock multiplication:

VCOVosc

(voltage controlled oscillator)

Clock multiplication:• The input signal is reference oscillator with fixed frequency• The PLL output is a signal with frequency N times the input frequency where N is an integer

• Data recovery and clock resynchronization:• The input signal is a digital signal containing data• The output is digital data at a certain clock rate• The system clock is recovered from the digital input signal

• Frequency synthesis (ex: to select channels in television or wireless communication systems):• The input signal is reference oscillator with fixed frequency• The PLL output is a signal with frequency N times the input frequency where N may be a fractional• The PLL output is a signal with frequency N times the input frequency where N may be a fractional

number• FM demodulation:

• The input is a FM signal (IF)• The output is the demodulated baseband signal

Subjects from the book by Johns & Martin that have been treated in the lectures or are relevant even though they were not treated in detaillectures, or are relevant even though they were not treated in detail

• Chapter 2 Processing and Layout • Chapter 8 Sample and Holds, Voltage References, and Translinear Circuits; 8.1 performance, 8.2 MOS

S/H basics, 8.5 Bandgap voltage reference basics, 8.6 Circuits for bandgap references • Chapter 9 Discrete-Time Signals; 9.1 Overview of some signal spectra, 9.2 Laplace transforms of

discrete-time signals, 9.3 Z-transform, 9.4 Downsampling and upsampling, 9.5 Discrete-time filters, 9.6 Sample-and-Hold response

• Chapter 10 Switched-Capacitor Circuits; 10.1 Basic Building Blocks, 10.2 Basic operation and analysis,Chapter 10 Switched Capacitor Circuits; 10.1 Basic Building Blocks, 10.2 Basic operation and analysis, 10.3 First-order filters, 10.4 Biquad filters, 10.5 charge injection, 10.7 correlated double-sampling techniques

• Chapter 11 Data Converter Fundamentals; 11.1 Ideal D/A converter, 11.2 Ideal A/D converter, 11.3 Quantization noise 11 4 Signed codes 11 5 Performance limitationsQuantization noise, 11.4 Signed codes, 11.5 Performance limitations

• Chapter 12 Nyquist-Rate D/A Converters; 12.1 Decoder-based converters, 12.2 Binary-scaled converters, 12.3 Thermometer-code converters, 12.4 Hybrid converters,

• Chapter 13 Nyquist-Rate A/D Converters; 13.1 Integrating converters, 13.2 Successive-approximation t 13 3 Al ith i ( li ) A/D t 13 4 Fl h ( l ll) t 13 5 T tconverters, 13.3 Algorithmic (or cyclic) A/D converter, 13.4 Flash (or paralell) converters, 13.5 Two-step

converters, 13.6 Interpolating A/D converters, 13.7 Folding A/D converters, 13.8 Pipelined converters, 13.9 Time-Interleaved A/D converters

• Chapter 14 Oversampling Converters; 14.1 Oversampling without noise shaping, 14.2 Oversampling with noise shaping14.3 System architectures, 14.4 Digital decimation filters, 14.5 Higher-order modulators, 14.7 Practical considerations, 14.8 Multi-bit Oversampling Converters (example, IEEE paper)

• Chapter 16 Phase-Locked Loops; 16.1 Basic Loop Architecture, 16.2 PLLs with charge-pump phase comparators, 16.3 Voltage-controlled oscillators, (16.4 Computer Simulations of PLLs)p g ( p )

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Exam 2008, page 3-4

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Exam 2008, page 5

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Exam, Thursday 4th of June, y• Individual written exam, counts 60 % (proj.:40 %)• 3 hours. 14:30 at “Store fysiske lesesal”, Physics Building• Questions based on material from the book, and from lectures, including

written material.• You may bring any written material like for example books, papers and y g y p , p p

lecture notes.• Consider writing at least something reasonable even if you feel that you

don’t know much about a given problem as no answer means 0 points Adon t know much about a given problem, as no answer means 0 points. A blank answer may have a bad impact on the average score.

• Read through all problems in the beginning. Your subconscious mind k th bl hil d ’t timay work on the problems while you don’t notice…

• Parts of what I thought was important in the lectures, I probably think is important for the exam..p

• Snorre will visit after about 1 hour

• Thanks for now, and good luck!