Index IEEE Transactions on Computers C-28 · Breuer, Melvin A., see Abramovici, Miron; ......

1979 IndexIEEE Transactions on Computers

Vol. C-28

This index covers all items-papers, correspondence, reviews, etc.-that appeared in this periodical dunng 1979, and items from prior yearsthat were commented upon or corrected in 1979. The index is dividedinto an Author Index and a Subject Index, both arranged alphabetically.

The Author Index contains the primary entry for each item; thisentry is listed under the name of the first author and includes coauthornames, title, location of the item, and notice of corrections and commentsif any. Cross-references are given from each coauthor name to the nameof the corresponding first author. The location of the item is specified bythe journal name (abbreviated), year, month, inclusive pages, and micro-fiche code. [The microfiche code, given in parentheses following the in-clusive pages, consists of four characters to be interpreted as follows: thefirst character identifies the microfiche number within the set of fiches forthe issue; the second character identifies the row in which the first frameof the particular item is located; and the last two characters designate theposition of that frame within the row.]

The Sub]ect Index contains several entries for each item, each con-sistin, of a subject heading, modifying phrase(s), first author's name, andlocation of the item. For mformation on coauthors, title, comments andcorrections if any, etc., it is necessary to refer to the Author Index. Somegeneric subject headings are used in this index in addition to the usualtechnical headings, e.g., Books, (books reviewed in this periodical), Bibli-ographies (both papers that are bibliographies and any other papers whichcontain more than 50 references), Conferences (technical meetings a sub-stantial number of whose abstracts or papers have appeared in this pe-riodical), and Special Issues (issues of this periodical devoted primarily toa specific subject). The Subject Index includes subject cross-references asrequired by the subject matter.

AUTHOR INDEX

A

Abramovci, Mfron and Melvin A. Breuer; On redundancy and faultdetection in sequential circuits (Corresp.); T-C v28 nil Nov 79864-865 (IE04)

Agarwal, Vinod K. and Gerald M. Masson; A functional form approachto test set coverage in tree networks (Corresp.); T-C v28 nl Jan 7950-52 (IDIO)

Agarwal, Vinod K. and Gerald M. Masson; Recursive coverage projectionof test sets (Coffesp.); T-C v28 nll Nov 79 865-870 (IEO5)

Agrawal, Dharma P.; High-speed arithmetic arrays; T-C v28 n3 Mar 79215-224 (IC13)

Agrawal, Prathima and Melvin A. Breuer; Experiments with a densityrouter for PC cards (Corresp.); T-C v28 n3 Mar 79 262-267 (IG04)

Agrawal, Vishwani D.; Comments on 'An approach to highly integratedcomputer-maintained cellular arrays'; T-C v28 n9 Sep 79 691-693(2A10)

Agrawal, Vishwanl D.; When to use random testing (Corresp.); T-C v27nll Nov 78 1054-1055 (IFIO)

Comments, T-C v28 n8 Aug 79 580-581 (lCIO)Al-Najjar, Atef, see Kobylarz, Thaddeus; T-C v28 n8 Aug 79 586-590

(1D02)Arvillias Alexis C. and Dimitris G. Maritsas; Toggle-registers generating

in parallel k kth decimations of rm-sequences Xp+xk + I designtables; T-C v28 n2 Feb 79 89-101 (1A03)

Atkins, D. E. and S. C. Ong; Time-component complexity of twoapproaches to multioperand binary addition; T-C v28 n12 Dec 79918-926 (IC14)

Ayache, J. M, see Diaz, M.; T-C v28 n3 Mar 79 276-281 (2A10)Azema, P., see Dian, M.; T-C v28 n3 Mar 79 276-281 (2A10)

B

Baer, Jean-Loup and Barbara Koyama; On the minimization of the widthof the control memory of microprogrammed processors (Corresp.);T-C v28 n4 Apr 79 310-316 (IB14)

Baker, Paul W.; The solution of differential equations on

short-word-length computing devices; T-C v28 n3 Mar 79 205-214(1C03)

Banerjee, Jayanta, David K. Hsiao and Krishnamurthi Kannan; DBC-A database computer for very large databases; T-C v28 n6 Jun 79414-429 (IC08)

Banerjee, Utpal, Shyh-Ching Chen, David J. Kuck and Ross A. Towle;Time and paraIlel processor bounds for Fortran-like loops; T-C v28n9 Se 79 660-670 (IE14)

Ben Ari, Mord cc; On transposing large 2nx 2n matrices (Corresp.);T-C v28 nl Jan 79 72-75 (1F04)

Benftley, Jon L. and Thomas A. Ottmann; Algorithms for reporting andcounting geometric intersections; T-C v28 n9 Sep 79 643-647 ([D 1)

Biswas, Nripendra N., see Sarje, Anil K.; T-C v28 niO Oct 79 798-801(2A07)

Black, Colin J., see Walker, William K. S.; T-C v28 n7 Jul 79 493-500(1C07)

Blankenbaker, John V.; Comments on 'Inner product computers'; T-Cv28 nl2 Dec 79 944 (I E12)

Booth, T. L.; Editor's notice; T-C v28 n8 Aug 79 545 (IA03)Booth, Taylor L., see Maryanski, Fred J.; T-C v26 n6 Jun 77 521-536

(lAl l)Booth, Taylor L., Ed.; Editor's notice; T-C v28 ni Jan 79 1 (IA03)Booth, Taylor L., Ed.; Editor's notice; T-C v28 n3 Mar 79 177 (IA03)Booth, Taylor L., Ed.; Editor's notice; T-C v28 n4 Apr 79 285 (IA03)Booth, Taylor L., Ed; List of referees; T-C v28 n12 Dec 79 945-947 (1E13)Bose, Bella; Comments on 'Multiple fault detection in combinational

networks'; T-C v28 niO Oct 79 804 (2A13)Braun, Robert D. and Donald D. Givone; An improved algorithm for

deriving checking experiments (Corresp.); T-C v28 n2 Feb 79 153-156(IEI 1)

Breitbart, Y. and K. Vairavan; The computational complexity of a classof minimization algorithms for switching functions (Corresp.); T-Cv28 ni2 Dec 79 941-943 (1E09)

Breuer, Melvin A., see Abramovici, Miron; T-C v28 nil Nov 79 864-865(I E04)

Breuer, Melvin A., see Agrawal, Prathima; T-C v28 n3 Mar 79 262-267(1G04)

Brzozowski, Janusz A. and Michael Yoeli; On a ternary model of gatenetworks; T-C v28 n3 Mar 79 178-184 (1A04)

Butz, Arthur R.; FFT length in digital filtering (Corresp.); T-C v28 n8Aug79 577-580 (1C07)

C

Cerny, Eduard, Daniel Mange and Eduardo Sanchez; Synthesis ofminimal binary decision trees; T-C v28 n7 Jul 79 472-482 (IA14)

Chandra, Ashok K. and C. K. Wong; The movement and permutation ofcolumns in magnetic bubble lattice files; T-C v28 ni Jan 79 8-15(IAIO)

Chaney, Tbomas J.; Comments on 'A note on synchronizer or interlockmaloperation'; T-C v28 niO Oct 79 802-804 (2AI 1)

Chang, D. M. Y. and T. H. Mott Jr.; Computing irrendundant normalforms from abbreviated presence functions; T-C vi4 n3 Jun 65335-342

Comments, T-C v28 nil Nov 79 874-875 (IE14)Chang, Hsu, see Lee, Share-Young; T-C v28 n9 Sep 79 627-636 (IC09)Chen, I-Ngo and Robert Willoner; An O(n) parallel multiplher with

bit-sequential input and output; T-C v28 ni?) Oct 79 721-727 (lBI 1)Chen, I-Ngo, Paul Y. Chen and Tse-Yun Feng; Associative processing of

network flow problems; T-C v28 n3 Mar 79 184-190 (IAIO)Chen, Paul Y., see Chen, I-Ngo; T-C v28 n3 Mar 79 184-190 (IAIO)Chen, Shyh-Ching, see Banerjee, Utpal; T-C v28 n9 Sep 79 660-670 (IE14)Cheng, David K. and James J. Liu; A generalized orthogonal

-transformation matrix (Cofesp.); T-C v28 n2 Feb 79 147-150 (tE05)Chow, Yuan-Chieh and Walter 7. Kohler; Models for dynamic load

balancing in a heterogeneous multiple processor system; T-C v28 nSMay 79 354-361 (IBlO)

Chu, Yaohan; Architecture of a hardware data interpreter; T-C v28 n2Feb 79 101-109 (IBO0)

IEEE T-C 1979 INDEX - 2

Chung, Kin-Man and C. K. Wong; Asymptotically optimalinteronnection networks from two-state cells; T-C v28 n7 Jul 79500-505 (lC14)

Clompi P. and L. Simoncini; Analysis and optimal design ofself-diagnosable systems with repair (Corresp.); T-C v28 n5 May 79362-365 (IC04)

Corsln, Paolo and Graziano Frosini; -Properties of the multidimensionalgeneralized discrete Fourier transform; T-C v28 nil Nov 79 819-830(lBOI)

Coy, Wolfgang; On the design of easily testable iterative systems ofcombinational cells (Cofesp.); T-C v28 nS May 79 367-371 (IC09)

Culliney, J. N., M. H. Young, T. Nakagawa and S. Muroga; Results ofthe synthesis of optimal networks of AND and OR gates forfour-variable switching functions (Corresp.); T-C v28 ni Jan 7976-85 (1F08)

Current, K. Wayne and Douglas A. Mow; Implementing parallel counterswith four-valued threshold logic; T-C -v28 n3 Mar 79 200-204 (lB 12)

Curis, H. Alien; Short-cut method of deriving nearly optimal arrays ofNAND trees (Corresp.); T-C v28 n7 Jul 79 521-528 (IE07)

Cutler, Robert B. and Saburo Muroga; Comments on 'Computingirredundant normal forms from a breviated presence functions';T-C v28 nll Nov 79 874-875 (IE14)

Cutler, Robert B. and Saburo Muropa; Comments on 'Generalization ofconsensus theory and application to the minimization of Booleanfunctions'; T-C v28 n7 Jul 79 542-543 (lF 14)

D

Danielsson, Per E., see Plavsic, Vojin M.; T-C v28 nl2 Dec 79 879-887(1A03)

David, R. and R. Tellez-Giron; Comments on 'The error latency of a faultin a sequential digital circuit'; T-C v28 nl Jan 79 85-86 (1G03)

Davida, George I., see Kam, John B.; T-C v28 nlO Oct 79 747-753 (ID09)Davidson, Edward S., see Lee, Hsiao-Peng Sherman; T-C v23 nlO Oct 74

1029-1047 (lCI1)Deo, Narsingh, see Sethi, A. S.; T-C v28 n2 Feb 79 157-163 (lFOI)Despain, Alvin M.; Very fast Fourier transform algorithms hardware for

implementation; T-C v28 n5 May 79 333-341 (lA03)Devries, Ronald C.; Comments on 'A readily implemented

single-error-correcting unit-distance counting code'; T-C v28 n3 Mar79 253-255 (1F09)

DeWitt, David J.; DIRECT-A multiprocessor organization forsupporting relational database management systems; T-C v28 n6 Jun79 395-6 (IB03)

Diaz, M., P. Azema and J. M. Ayache; Unified design of self-checkingand fail-safe combinational circuits and sequential machines(Corresp.); T-C v28 n3 Mar 79 276-281 (2A10)

Dortok, Osman, see Fleischhammer, Werner; T-C v28 n3 Mar 79 273-276(2A07)

Dube, R. Peter; Preliminary specification of spline curves; T-C v28 n4Apr 79 286-290 (1A04)

Dunworth, A. and H. V. Hartog; An efficient state minimizationalgorithm for some special classes of incompletely specifiedsequential machines (Corresp.); T-C v28 n7 Jul 79 531-535 (1F03)

E

Easton, Malcolm C. and Peter A. Franaszek; Use bit scanning inreplacement decisions; T-C v28 n2 Feb 79 133-141 (lD05)

Edgar, Albert D., see Lee, Samuel C.; T-C v26 nll Nov 77 1167-1170(2A14)

Emnam, Ahmed, see Su, Stanley Y. W.; T-C v28 n6 Jun 79 430-445 (IDIO)En, John; A new random-error-correction code (Corresp.); T-C v26 ni

Jan 77 86-88 (2B05)Comments, T-C v28 n3 Mar 79 255-258 (lFl 1)

Enomoto, H, see Hikita, T.; T-C v28 n5 May 79 371-374 (IC13)

F

Farag, Raouf F. H.; Word-level recognition of cursive script (Corresp.);T-C v28 n2 Feb 79 172-175 (1G02)

Feldman, Michael B.; An application-oriented programming language forsequential machine studies (Corresp.); T-C v28 n8 Aug 79 582-586(IC12)

Feng, Tse-Yun, see Chen, I-Ngo; T-C. v28 n3 Mar 79 184-190 (lAIO)Flelsch nmer, Werner and Osman Dortok; The anomalous behavior of

flip-flops in synchronizer circuits; T-C v28 n3 Mar 79 273-276 (2A07)Fleisber, Harold, Guest ed.; Introduction to special section on

progammable logic arrays; T-C v28 n9 Se 79 93 (IA03)Fran azek, Peter A., see Easton, Malcolm C.; T-C v28 n2 Feb 79 133-141

(IDOS)Freeman, Herbert; Algorithm for generating a digital straight line on a

triangular grid (Corresp.); T-C v28 n2 Feb 79 150-152 (IE08)Freeman, Mart; Aspects of the upper bounds of finite input-memory

and finite output-memory sequential machines (Corresp.); T-C v28n3 Mar 79 249-253 (I F0S)

Friedman, Arthur D., see Karunanithi, S.; T-C v28 n2 Feb 79 121-133(IC07)

Frosini, Graziano and Francesco M. Viterbo; An algorithm for evaluatingthe frequency of a rotating vector; T-C v28 n8Aug 79 560-566 (IB04)

Frosini, G iano, see Corsini, Paolo; T-C v28 nll Nov 79 819-830 (IBO1)Fung, Kwok-Tung and H. C. Torng; On the analysis of memory conflicts

and bus contentions in a multiple-microprocessor system; T-C v28ni Jan 79 28-37 (IC02)

G

Gaines, B. R.; Maryanski's grammatical inferencer (Corresp.); T-C v28 niJan 79 62-64 (lE08)

Gaitanis, Nicholas, see Halatsis, Constantinos; T-C v28 n2 Feb 79 167-172(IFII)

Gault, James W., John P. Robinson and Sudhakar M. Reddy; Multiplefault detection in combinational networks; T-C v21 nl Jan 72 31-36(lDIO)

Comments, T-C v28 nlO Oct 79 804 (2A13)Gelenbe, Erol and Ken Sevcik; Analysis of update synchronization for

multiple copy data bases; T-C v28 nlO Oct 79 737-747 (IC13)Gilbert, Barry K., see Swartzlander, Earl E., Jr.; T-C v27 ni Jan 78 21-31

(IB0o)Givone, Donald D., see Braun, Robert D.; T-C v28 n2 Feb 79 153-156

(lEII)Givone, Donald D., see Tront, Joseph G.; T-C v28 nil Nov 79 854-862

(ID08)Gonzalez, Teofilo; A note on open shop preemptive schedules; T-C v28

nlO Oct 79 782-786 (IG02)Gray, F. Gail, Lionel C. C. Shih and Richard A. Thompson; Diagnosis of

faults in modular trees; T-C v28 n5 May 79 342-353 (IA12)Gupta, Udaiprakash I., D. T. Lee and Joseph Y.-T. Leung; An optimal

solution for the channel-assignment problem; T-C v28 nll Nov 79807-810 (lA03)

H

Halatsis, Constantinos and Nicholas Gaitanis; Positive fail-saferealization of synchronous sequential machines; T-C v28 n2 Feb 79167-172 (lFll)

Hammer, P. L., Uri N. Peled and M. A. Pollatschek; An algorithm todualize a regular switching function (Corresp.); T-C v28 n3 Mar 79238-243 (lE08)

Hartimo, Iiro and Leo Ojala; Comments on 'A stable,two-multiplies-per-cycle algorithm for digital generation of sinusoidsin real time' (Corresp.); T-C v28 n4 Apr 79 300 (lB04)

Hartmann, Carlos R. P., see Knaizuk, John, Jr.; T-C v26 nil Nov 771141-1144 (IF13)

Hartog, H. V., see Dunworth, A.; T-C v28 n7 Jul 79 531-535 (1F03)Heath, Douglas J., see Swartzlander, Earl E., Jr.; T-C v28 n8 Aug 79

567-572 (lBll)Heines, Thomas S.; Buffer behavior in computer communication

systems; T-C v28 n8 Aug 79 573-576 (IC03)Heuft, R., see Little, W. D.; T-C v28 n7 Jul 79 528-531 (lE14)Hikita, T. and H. Enomoto; On the number of multivalued switching

functions realizable by cascades (Corresp.); T-C v28 nS May 79371-374 (1C13)

Hill, J. S.; Revision of the buffer length derivation for a modifiedEk/DIl systems by Maritsas and Hartley (Corresp.); T-C v28 n3 Mar79 269-273 (2A03)

Hollaar, Lee A.; A design for a list merging network; T-C v28 n6 Jun 79406413 (IB14)

Hong, Se June, see Ostapko, Daniel L.; T-C v28 n9 Sep 79 617-627 (1B13)Hopper, Andrew and David J. Wheeler; Binary routing networks; T-C v28

nlO Oct 79 699-703 (1A03)Hsiao, David K., see Banerjee, Jayanta; T-C v28 n6 Jun 79 414-429 (1C08)Hu, T. C., see Rao, Gururaj S.; T-C v28 n4 Apr 79 291-299 (IA09)Hunt, B. R., see Trussell, H. J.; T-C v28 nl Jan 79 57-62 (1E03)Hwang, Kai; Global and modular two's complement cellular array

multipliers (Corresp.); T-C v28 n4 Apr 79 300-306 (IB04)

IEEE Computer Society; Special issue on data base machines; T-C v28 n6Jun 79 381458 (IA03)

IEEE Computer Society; Special section on programmable logic arrays;T-C v28 n9 Sep 79 593-636 (IA03)

J

Jayakumar, V., see Kulkarni, K. G.; T-C v28 nlO Oct 79 791-794 (IG11)Jino, Mario, see Liu, Jane W. S.; T-C v28 n12 Dec 79 888-906 (IA12)Jullien, G. A., see Tseng, B. D.; T-C v28 nll Nov 79 831-845 (IB13)


K

Kam, John B. and George I. Davida; Structured design ofsubstitution-permutation encryption networks; T-C v28 nJO Oct 79747-753 (ID09)

Kamae, Takahiko, see Suenaga, Yasuhito; T-C v28 n1O Oct 79 728-736(IC04)

Kambayash, Yahlko; Logic design of programmable logic arrays; T-C v28n9 Sep 79 609-617 (IB05)

Kannan,Krlshnamurdil, see Banerjee, Jayanta; T-C v28 n6 Jun 79 414429(IC08)

Kartashev, Steven L. and Svetlana P. Kartashev; A multicomputer systemwith dynamic architecture; T-C v28 nlO Oct 79 704-721 (lA08)

Kartushev, Svetlana P., see Kartashev, Steven I.; T-C v28 nJO Oct 79704-721 (IA08)

Kaunanlthi, S. and Arthur D. Friedman; Analysis of digital systemsusing a new measure of system diagnosis; T-C v28 n2 Feb 79 121-133(IC7)

Kautz, William H.; A readily implemented single-error-correctingunit-distance counting code (Short n.); T-C v19 nlO Oct 70 972-974(2F01)

Comments, T-C v28 n3 Mar 79 253-255 (IF09)Kelia, J., see Zisapel, Y., T-C v28 ni Jan 79 52-56 (ID12)Kine, Charles R.; An abstract model for digital system fault diagnosis;

T-C v28 niO Oct 79 754-767 (IE02)Kime, Charles R., see McPherson, John A.; T-C v28 nl Jan 79 16-27

(IB04)Kinoshita, Kozo see Sasao, Tsutomu; T-C v28 n9 Sep 79 682-685 (2A01)Knaizuk, John, Jr. and Carlos R. P. Hartmann; An optimal algorithm for

testing stuck-at faults in random access memories (Corresp.); T-Cv26 nil Nov 77 1141-1144 (IF13)

Comments, T-C v28 n3 Mar 79 258-261 (IF14)Kobayash, Tomonor, see Suenaga, Yasuhito; T-C v28 nlO Oct 79 728-736

(IC04)Kobylar, Thaddeus and Atef Al-Najjar; An examination of the cost

function for programmable logic arrays (Corresp.); T-C v28 n8 Aug79 586-590 (fD02)

Kohavi, Zv, see Koren, Israel; T-C v28 n3 Mar 79 268-269 (2A02)Kohler, Walter H., see Chow, Yuan-Chieh; T-C v28 n5 May 79 354-361

(IB 10)Koren, Israel; Analysis of the signal reliability measure and an evaluation

procedure (Corresp.); T-C v28 n3 Mar 79 244-249 (IE14)Koren, Israel and Zvi Kohavi; On the properties of sensitized paths

(Corresp.); T-C v28 n3 Mar 79 268-269 (2A02)Korea, Israel and Stephen Y. H. Su; Reliability analysis of N-modular

redundancy systems with intermittent and permanent faults; T-C v28n7 Jul 79 514-520 (ID14)

Koyama, Barbara, see Baer, Jean-Loup; T-C v28 n4 Apr 79 310-316 (IB 14)Krieger, M., see Zisapel, Y.; T-C v28 nl Jan 79 52-56 (ID12)Kuck, David J., see lHanerjee, Utpal; T-C v28 n9 Sep 79 660-670 (lE14)Kulkarni, K. G. and V. Jayakumar; Ordering of connections for

automated routing (Corresp.); T-C v28 n10 Oct 79 791-794 (1GI 1)Kunz, Henry O.; On the equivalence between one-dimensional discrete

Walsh-Hadamard and multidimensional discrete Fourier transforms(Corresp.); T-C v28 n3 Mar 79 267-268 (1G09)

L

Lai, Edmund K, see Leung, Joseph Y.-T.; T-C v28 n9 Sep 79 671-677(lFI I)

Lal, Hung Chi and Saburo Muroga; Minimum parallel binary adderswith NOR (NAND) gates; T-C v28 n9 Sep 79 648-659 (IE02)

Lamagna, Edmund A.; The complexity of monotone networks for certainbilinear forms, routing problems, sorting, and merging; T-C v28 n1OOct 79 773-782 (IF07)

Lamport, Leslie; How to make a multiprocessor computer that correctlyexecutes multiprocess programs (Corresp.); T-C v28 n9 Sep 79690-691 (2A09)

Langdon, Glen G., Jr, Guest ed.; Database machines: An introduction;T-C v28 n6 Jun 79 381-383 (lA03)

Lee, D. T., see Gupta, Udaiprakash I.; T-C v28 nil Nov 79 807-810(IA03)

Lee, Halao-Peng Sherman and Edward S. Davidson; Redundancy testingin combinational networks; T-C v23 niO Oct 74 1029-1047 (ICI 1)

Comments, T-C v28 n3 Mar 79 261-262 (1G03)Lee, Samuel C. and Albert D. Edgar; The focus number system; T-C v26

nil Nov 77 1167-1170 (2A14)Comments, T-C v28 n9 Se 79 693 (2A12)

Lee, Share-Young and Hsu &ang; Associative-search bubble devices forcontent-addressable memory and array logic; T-C v28 n9 Sep 79627-636 (IC09)

Leung, Joseph Y.-T., see Gupta, Udaiprakash I.; T-C v28 nil Nov 79807-8 10(1IA03)

Leung, Joseph Y.-T. and Edmund K. Lai; On minimum cost recoveryfrom system deadlock; T-C v28 n9 Sep 79 671-677 (IFI 1)

Lipovsk,G. J., see Su, Stanley Y. W.; T-Cv28 n6 Jun 79 430-445 (IDlO)Little, W. D. and R. Heuft; An area shading graphics display system

(Corresp.); T-C v28 n7 Jul 79 528-531 (lE14)

Liu, James J., see Cheng, David K.; T-C v28 n2 Feb 79 147-150 (IE05)Liu, Jane W. S. and Mario Jino; Intelligent magnetic bubble memories

and their applications in data base management systems; T-C v28ni2 Dec 79 888-906 (IA12)

M

Mange, Daniel, see Cerny, Eduard; T-C v28 n7 Jul 79 472-482 (IA14)Manning, Frank B.; An approach to highly integrated

computer-maintained cellular arrays (Corresp.); T-C v26 n6 Jun 77536-552 (lB 12)

Comments, T-C v28 n9 Sep 79 691-693 (2A10)Maritsas, Dimitris G., see Arvillias, Alexis C.; T-C v28 n2 Feb 79 89-101

(lA03)Markowsky, George; Diagnosing single faults in fanout-free

combinational circuits (Corresp.); T-C v28 nil Nov 79 863-864(I E03)

Maryanski, Fred J. and Taylor L. Booth; Inference of finite-stateprobabilistic grammars; T-C v26 n6 Jun 77 521-536 (lAI 1)

Comments, T-C v27 nl Jan 79 62-64 (IE08)Masson, Gerald M., see Agarwal, Vinod K.; T-C v28 nil Nov 79 865-870

(IE05)McCluskey, Edward J.; Logic design of multivalued I2L logic circuits;

T-C v28 n8 Aug 79 546-559 (1A04)McCluskey, EdwardJ., see Shedletsky, John J.; T-C v25 n6Jun 76 655-659

(2B05)McPherson, John A. and Charles R. Kime; A two-level diagnostic model

for digital systems; T-C v28 nl Jan 79 16-27 (IB04)Miller, W. C., see Tseng, B. D.; T-C v28 nil Nov 79 831-845 (IB13)Moravec, Hans P.; Fully interconnecting multiple computers with

pipelined sorting nets (Corresp.); T-C v28 nl0 Oct 79 795-798 (2A04)Morris, S. Brent, Arthur Valliere III and Richard A. Wisniewski;

Processes for random and sequential accessing in dynamicmemories; T-C v28 n3 Mar 79 225-237 (1D09)

Mott, T. H., Jr., see Chang, D. M. Y.; T-C v14 n3 Jun 65 335-342Mow, Douglas A., see Current, K. Wayne; T-C v28 n3 Mar 79 200-204

(lB 12)Mukhopadhyay, Amar; Hardware algorithms for nonnumeric

computation; T-C v28 n6 Jun 79 384-394 (IA06)Muroga, S., see Culliney, J. N.; T-C v28 nl Jan 79 76-85 (IF08)Muroga, Saburo, see Cutler, Robert B.; T-C v28 nll Nov 79 874-875

(IE 14)Muroga, Saburo, see Lai, Hung Chi; T-C v28 n9 Sep 79 648-659 (lE02)

N

Nair, Ravindra; Comments on 'An optimal algorithm for testing stuck-atfaults in random access memories'; T-C v28 n3 Mar 79 258-261(lF 14)

Nakagawa, T., see Culliney, J. N.; T-C v28 ni Jan 79 76-85 (lF08)Nakamura, Keijiro; Synthesis of gate-minimum multi-output two-level

negative gate networks; T-C v28 nl0 Oct 79 768-772 (IF02)Nanya, Takashi and Yoshihiro Tohma; Universal multicode STT state

assignments for asynchronous sequential machines; T-C v28 nil Nov79 811-818 (IA07)

Nassimi, David and Sartaj Sahni; Bitonic sort on a mesh-connectedparallel computer; T-C v28 nl Jan 79 2-7 (lA04)

Necia, Maria-Ana; An algorithm for fast evaluation of time functions;T-C v28 n7 Jul 79 506-513 (ID06)

Nguyen, H. B., see Schuster, Stewart A.; T-C v28 n6- Jun 79 446-458(lE12)

Nguyen, Le Huu, see Su, Stanley Y. W.; T-C v28 n6 Jun 79 430-445(lDIO)

Niemann, Heinrich and Jurgen Weiss; A fast-converging algorithm fornonlinear mapping of high-dimensional data to a plane (Corresp.);T-C v28 n2 Feb 79 142-147 (ID14)

Nievergelt, J., see Speelpenning, B.; T-C v28 nl2 Dec 79 927-929 (ID09)

0

Ohanesian, Michael K., see Srihari, Sargur N.; T-C v28 n3 Mar 79 243-244(lE13)

Oja, Erkki; On the construction of projectors using products ofelementary matrices (Corresp.); T-C v28 nl Jan 79 65-66 (IEI 1)

Ojala, Le, see Hartimo, liro; T-C v28 n4 Apr 79 300 (IB04)Ong, E. H., see Saluja, Kewal K.; T-C v28 n7 Jul 79 535-537 (IF07)Ong, S. C., see Atkins, D. E.; T-C v28 ni2 Dec 79 918-926 (IC14)Ostapko, Daniel L. and Se June Hong; Fault analysis and test generation

for programmable logic arrays (PLA's); T-C v28 n9 Sep 79 617-627(I.B13)

Ottmnn, Thomas A., see Bentley, Jon L.; T-C v28 n9 Sep 79 643-647(IDII)

Ozkarahan, Esen A., see Schuster, Stewart A.; T-C v28 n6 Jun 79 446-458(IE12)


p

Paaske, Erik; Comments on 'A new random-error-correction code'; T-Cv28 n3 Mar 79 255-258 (lFl 1)

Pangratz, Heinrich and Hans Weinrichter; Pseudo-random numbergenerator based on binary and quinary maximal-length sequences;T-C v28 n9 Sep 79 637-642 (ID05)

Papakonstantinou, G.; Minimization of modulo-2 sum of products(Corresp.); T-C v28 n2 Feb 79 163-167 (lF07)

Parker, D. Stott, Jr.; Combinatorial merging and Huffman's algorithm(Corresp.); T-C v28 n5 May 79 365-367(1C07)

Path, Suhas S. and Terry A. WVelch; A programmable logic approach forVLSI; T-C v28 n9 Sep 79 594-601 (1AN4)

Peled, Uri N., see Hammer, P. L.; T-C v28 n3 Mar 79 238-243 (lE08)Plavsic, Vojin M. and Per E. Danielsson; Sequential evaluation of

Boolean functions; T-C v28 n12 Dec 79 879-g87 (lA03)Poliatschek, M. A., see Hammer, P. L.; T-C v28 n3 Mar 79 238-243 (lE08)

R

Rao, Gururaj S., Harold S. Stone and T. C. Hu; Assignment of tasks in adistributed processor system with limited memory; T-C v28 n4 Apr79 291-299 (1A09)

Rao, K. R., see Vlasenko, V.; T-C v28 n12 Dec 79 934-938 (lE02)Rau, B. Ramakrsna; Interleaved memory bandwidth in a model of a

multiprocessor computer system; T-C v28 n9 Sep 79 678-681 (1G04)Rau, B. kamakrshnn; Program behavior and the performance of

interleaved memories; T-C v28 n3 Mar 79 191-199 (1B03)Reddy, Sudhakar M., see Gault, James W.; T-C v21 nJ Jan 72 31-36

(ID10)Redinbo, G. Robert; Finite field arithmetic on an array processor; T-C

v28 n7 Jul 79 461-471 (1A03)Reed, Irving S. and T. K. Truong; A new hybrid algorithm for computing

a fast discrete Fourier transform; T-C v28 n7 Jul 79 487-492 (IC01OReed, Irving S., see Swartzlander, Earl E., Jr.; T-C v27 ni Jan 78 21-31

(1B09)Robertson, Edward L.; Microcode bit optimization is NP-complete

(Corresp.); T-C v28 n4 Apr 79 316-319 (lC06)Robinsn, John P., see Gault, James W.; T-C v21 nl Jan 72 31-36 (ID 10)Rubin, Frank; Decrypting a stream cipher based on J-K flip-flops; T-C

v28 n7 Jul 79 483-487 (IB I 1)

S

Sahni, Sartaj, see Nassimi, David; T-C v28 nl Jan 79 2-7 (IA04)Saluja, Kewal K. and E. H. Ong; Minimization of Reed-Muller canonic

expansion (Corresp.); T-C v28 n7 Jul 79 535-537 (1F07)Sance z, Eduardo, see Cerny, Eduard; T-C v28 n7 Jul 79 472-482 (1A14)Sarje, Anil K. and Nripendra N. Biswas; A new approach to

2-asummability testing (Corresp.); T-C v28 nlO Oct 79 798-801(2A07)

Sasao, Tsutomu and Kozo Kinoshita; Conservative logic elements andtheir universality (Corresp.);. T-C v28 n9 Sep 79 682-685 (2A01)

Sasao, Tsutomu and Kozo Kinoshita; On the number of fanout-freefunctions and unate cascade functions (Corresp.); T-C v28 ni Jan 7966-72 (IE12)

Schneck, Paul B.; Comment on 'When to use random testing'; T-C v28 n8Aug 79 580-581 (ICIO)

Schuster, Stewart A., H. B. Nguyen, Esen A. Ozkarahan and Kenneth C.Smith; RAP.2-An associative processor for databases and itsapplications; T-C v28 n6 Jun 79 446-458 (lE12)

Schwartz, Mischa; Throughput and time delay analysis for a commonqueue configuration in a multiprocessor environment (Corresp.);T-Cv8 n12 Dec 79 939-941 (IE07)

Sethi, A. S. and Narsingh Deo; Interference in multiprocessor systemswith localized memory access probabilities (Corresp.); T-C v28 n2Feb 79 157-163 (IFO1)

Sevclk, Ken, see Gelenbe, Erol; T-C v28 nlO Oct 79 737-747 (IC13)Shedletsky, John J. and Edward J. McCluskey; The error latency of a

fault in a sequential digital circuit (Corresp.); T-C v25 n6 Jzun 76655-659 (2B05)

Comments, T-C v28 nl Jan 79 85-86 (1G03)Shih, Lionel C. C., see Gray, F. Gail; T-C v28 n5 May 79 342-353 (IA12)Siegel, Howard J.; A model of SIMD machines and a comparison of

various interconnection networks; T-C v28 n12 Dec 79 907-917(IC03)

Suilo, Charles B, Jr.; An efficient simplex coverability algorithm in E2with application to stochastic sequential machines; T--C v28 n2 Feb79 109-120 (IB09)

Silverston, Stefan M.; A stable, two-multiplies-per-cycle algorithm fordigital generation of sinusoids in real time (Corresp.); T-C v26 nllNov 77 1153-1154 (IGI1)

Comments, T-C v28 n4 Apr 79 300 (lB04)Simoncin, L., see Ciompi, P.; T-C v28 n5 May 79 362-365 (1C04)Sloan, Kenneth R., Jr. and Steven L. Tanimoto; Progressive refinement of

raster-images(Corresp.); T-Cv28nil Nov 79871-874(IE1)Smith, Alan Jay; An analytic and experimental study of multiple channel

controllers; T-C v28 nl Jan 79 38-49 (IC12)

Smith, James E.; Comments on 'Redundancy testing in combinationalnetworks'; T-C v28 n3 Mar 79 261-262 (IG03)

Smith, James E.; Detection of faults in programmable logic arrays; T-Cv28 nll Nov 79 845-853 (IC13)

Smith, James E.; On necessary and sufficient conditions for multiplefault undetectability (Corresp.); T-C v28 nJO Oct 79 801-802 (2A10)

Smith, James E.; Universal system diagnosis algorithms (Corresp.); T-Cv28 n5 May 79 374-378 (ID02)

Smith, Kenneth C., see Schuster, Stewart A.; T-C v28 n6 Jun 79 446458(lE12)

Speelpenning, B. and J. Nievergelt; A simple model of processor-resource utilization in networks of communicating modules(Corresp.); T-C v28 n12 Dec 79 927-929 (1D09)

Srihari, Sargur N. and Michael K. Ohanesian; An efficient algorithm fordetermining Hadamard sequency vectors (Corresp.); T-C v28 n3 Mar79 243-244 (lE13)

Srini, Vason P.; Iterative realization of multivalued logic systems(Corresp.); T-C v28 n4 Apr 79 306-310 (IB10)

Steiglitz, Kenneth, see Toueg, Sam; T-C v28 n7 Jul 79 537-542 (IF09)Stone, Harold S., see Rao, Gururaj S.; T-C v28 n4 Apr 79 291-299 (IA09)Su, Stanley Y. W., Le Huu Nguyen, Ahmed Emam and G. J. Lipovski;

The architectural features and implementation techniques of themulticell CASSM; T-C v28 n6 Jun 79 430-445 (ID10)

Su, Stephen Y. H., see Koren, Israel; T-C v28 n7 Jul 79 514-520 (ID14)Suenaga, Yasuhito, Takahiko Kamae and Tomonori Kobayashi; A

high-speed algorithm for the generation of straight lines and circulararcs; T-C v28 nlO Oct 79 728-736 (IC04)

Sundberg, Carl-Erik W.; Properties of transparent shortened codes formemories with stuck-at faults (Corresp.); T-C v28 n9 Sep 79 686-690(2A05)

Sundberg, Carl-Erik W., see Walker, William K. S.; T-C v28 n7 Jul 79493-500 (IC07)

Swartzlander, Earl E., Jr. and Douglas J. Heath; A routing algorithm forsignal processing networks; T-C v28 n8 Aug 79 567-572 (IBl 1)

Swartlander, Earl E., Jr.; Comment on The Focus number system'; T-Cv28 n9 Sep 79 693 (2A12)

Swartzlander, Earl E., Jr., Barry K. Gilbert and Irving S. Reed; Innerproduct computers; T-C v27 nl Jan 78 21-31 (IB09)

Comments, T-C v28 n12 Dec 79 944 (IE12)Swartzlander, Earl E., Jr.; Microprogrammed control for specialized

processors (Corresp.); T-C v28 n12 Dec 79 930-934 (ID12)

T

Tanimoto, Steven L., see Sloan, Kenneth R., Jr.; T-C v28 nil Nov 79871-874 (IEll)

Tellez-Giron, R., see David, R.; T-C v28 nl Jan 79 85-86 (1G03)Thompson, Richard A., see Gray, F. Gail; T-C v28 n5 May 79 342-353

(lA12)Tmen, Pierre; Generalization of concensus theory, and application to the

minimization of Boolean functions; T-C vl6 n4 Aug 67 446-456Comments, T-C v28 n7 Jul 79 542-543 (lF 14)

Tohma, Yoshihiro, see Nanya, Takashi; T-C v28 nil Nov 79 811-818(IA07)

Torng, H. C., see Fung, Kwok-Tung; T-C v28 nl Jan 79 28-37 (IC02)Toueg, Sam and Kenneth Steiglitz; The design of small-diameter

networks by local search (Corresp.); T-C v28 n7 Jul 79 537-542(1F09)

Towle, Ross A., see Banejee, Utpal; T-C v28 n9 Sep 79 660-670 (IE14)Tront, Joseph G. and Donald D. Givone; A design for multiple-valued

logic gates based on MESFET's; T-C v28 nil Nov 79 854-862 (1D08)Truong, T. K., see Reed, Irving S.; T-C v28 n7 Jul 79 487-492 (IC01)Trussell, H. J. and B. R. Hunt; Improved methods of maximum a

posteriori restoration (Corresp.); T-C v28 nl Jan 79 57-62 (IE03)Tseng, B. D., G. A. Jullien andW. C. Miller; Implementation of FFT

structures using the residue number system; T-C v28 nil Nov 79831-845 (IB13)

Turcat, Claudine and Andre Verdillon; Symmetry, automorphism, andtest (Corresp.); T-C v28 n4 Apr 79 319-325 (1C09)

V

Vairavan, K., see Breitbart, Y.; T-C v28 n12 Dec 79 941-943 (IE09)Valliere, Arthur, III, see Morris, S. Brent; T-C v28 n3 Mar 79 225-237

(1D09)Varshney, Pramod K.; On analytical modeling of intermittent faults in

digital systems (Corresp.); T-C v28 nlO Oct 79 786-791 (1G06)Verilon, Andre, see Turcat, Claudine; T-Cv28 n4 Apr 79319-325 (1C09)Viterbo, Francesco M., see Frosini, Graziano; T-Cv8n8 Aug 79 560-566

(1B04)Vlasenko, V. and K. R. Rao; Unified matrix treatment of discrete

transforms (Corresp.); T-C v28 n12 Dec 79 934-938 (1E02)


W

Walker, William K. S., Carl-Erik W. Sundberg and Colin J. Black; AreLiable spaceborne memory with a single eafor and erasurecorrection scheme; T-C v28 n7 Jul 79 493-500 (lC07)

Weinrchter, Hans, see Pangratz, Heinrich; T-C v28 n9 Sep 79 637-642(ID05)

Weiss, Jurgen, see Niemann, Heinrich; T-C v28 n2 Feb 79 142-147 (ID14)Welch, Terry A, see Patil, Suhas S.; T-C v28 n9 Sep 79 594-601 (1A04)Wheeler, David J., see Hopper, Andrew; T-C v28 nlO Oct 79 699-703

(lA03)Willoner, Robert, see Chen, I-Ngo; T-C v28 nlO Oct 79 721-727 (lB11)Wisnlewskl, Richard A., see Morris, S. Brent; T-C v28 n3 Mar 79 225-237

(ID09)Wong, C. K., see Chandra, Ashok K.; T-C v28 nl Jan 79 8-15 (lAIO)Wong, C. K, see Chung, Kin-Man; T-C v28 n7 Jul 79 500-505 (1C14)Wood, Roy A.; A high density programmable logic array chip; T-C v28 n9

Sep 79 602-608 (1A 12)Wormald, E. G.; A note on synchronizer or interlock maloperation

(Corresp.); T-C v26 n3 Mar 77 317-318 (2D05)Comments, T-C v28 nJO Oct 79 802-804 (2A1 1)

Y

Yenersoy, 0.; Synthesis of asynchronous machines usingmixed-operation mode (Corresp.); F-C v28 n4 Apr 79 325-329 (iDl1)

Yoel, Michael, see Brzozowski, Janusz A.; T-C v28 n3 Mar 79 178-184(1A04)

Young, M. H., see Culliney, J. N.; T-C v28 nl Jan 79 76-85 (1F08)

z

Zisapl, Y., M. Krieger and J. Kella; Detection of hazards incombinational switching circuits (Corresp.); T-C v28 ni Jan 79 52-56(ID12)

SUBJECT INDEX

A

Additionmultioperand binary addition; component and time complexity

measures in terms of number of gates and gate delays; Atkins, D. E.;T-C v28 n12 Dec 79 918-926 (IC14)

parallel binary adders in single-rail input logic having minimumnumber of NOR gates; Lai, Hung Chi; T-C v28 n9 Sep 79 648-659(IE02)

parallel counter implementation using four-valued threshold logic;Current, K Wayne; T-C v28 n3 Mar 79 200-204 (IB12)

Algekra, cf. Specific topicArltedc; f. Ad4tion; Logarithmic arithmetic; Multiplication;

Residue arithmeticArithmetic

arrays for multiplication, division, squaring, and square rooting;high-speed mrtifunction arrays; Agrawal, Dharma P.; T-C v28 n3Mar 79 215-224 (IC13)

finite field arithmetic on array processor; Redinbo, G. Robert; T-C v28n7 Jul 79 461471 (IA03)

Arrays; df. Logic arrays; Parallel processingAssociative memories

magnetic bubble switches with memory; Lee, Share-Young; T-C v28 n9Sep 79 627-636 (IC09)

projection matrix construction using products of elementary matrices;()4 Erkki; T-C v28 ni Jan 79 65-66 (IEII)

pcessingapplication to network maximal flow problem; Chen, I-Ngo; T-C v28n3 Mar 79 184-190 (IAIO)

data base machines; context addressed segment sequential memorysystem havimg associative and parallel processing capabilities;CASSM system; Su, Stanley Y W.; T-C v28 n6 Jun 79 430-445(IDIO)

data base systems; DIRECT multiprocessor organization forsupporting relational DBMS; DeWitt, David J.; T-C v28 n6 Jun 7939-5406 (rsO3)' '

data base systems; relational associative processor, RAP.2; Schuster,Stewart A.; T-C v28 n6 Jun 79 446458 (IE12)

Asynchronous sequential macInesflip-flops in synchronizer circuits; anomalous behavior in response to

logically undefined input conditions; Fleischhammer, Werner; T-Cv28 n3 Mar 79 273-276 (2A07)

mixed-mode operation using asynchronous and self-synchronousexcitations; synthesis procedure; Yenersoy, 0.; T-C v28 n4 Apr 79325-329 (IDOI)

state assignment, universal multicode single transition time stateassignment; Nanya, Takashi; T-C v28 nll Nov 79 811-818 (IA07)

synchronizer or interlock maloperation in metastable region; Chaney,Thomas J.; T-C v28 nlO Oct 79 802-804 (2AI 1)

ternary model of binary gate networks; Brzozowski Janusz A.; T-C v28n3 Mar 79 178-184 (1A04)

Automata; d. Sequential machines; Stochastic automata

B

Bibliographiesdata base machines; Su, Stanley Y W.; T-C v28 n6 Jun 79 430-445(IDIO)

data base machines; hardware algorithms; Mukhopadhyay, Amar; T-Cv28 n6 Jun 79 384-394 (1A06)

multicomputer systems with dynamic architecture; Kartashev, Steven*.; T-C v28 nlO Oct 79 704-721 (IA08)

Biomedical imaging, X-ray; cf. TomographyBipolar integrated circuits, 12L

multivalued logic circuits; logic design; McCluskey, Edward J.; T-C v28n8 Aug 79 546-559 (IA04)

Boolean functions; cf. Logic functionsBoolean functions

binary decision trees for realizing multioutput Boolean functions;minimization of trees; Cerny, Eduard; T-C v28 n7 Jul 79 472-482(lA14)

incompletely specified multioutput switching functions, minimalirredundant disjunctive form representation; Cutler, Robert B.; T-Cv28 n7 Jul 79 542-543 (IF14)

irredundant normal form computation from abbreviated presencefunctions; Cutler, Robert B.; T-C v28 nll Nov 79 874-875 (1E14)

monotone Boolean function synthesis using only operations fromincomplete set of primitives; size of required combinational circuitfor bilinear forms, routing problems, sorting, and merging; Lamagna,Edmund A.; T-C v28 nlO Oct 79 773-782 (IF07)

sequential evaluation; Plavsic, Vojin M.; T-C v28 n12 Dec 79 879-887(1A03)

I-asummability testing algorithm which first tests 2-monotonicity;Sarje, Anil K; T-C v28 nlO Oct 79 798-801 (2A07)

Bubble domains; cf. Magnetic bubble domainsBuffered communication; cf. Queued communicationBuffers

length for Erlang input; Hill, J. S.; T-C v28 n3 Mar 79 269-273 (2A03)

C

Cascade networksmultivalued logic functions realizable by cascades; enumeration;

Hikita, T.; T-C v28 n5 May 79 371-374 (1C13)Cellular logic arrays; cf. Logic arraysCellular logic arrays

arithmetic arrays for multiplication, division, squaring, and squarerooting; high-speed multifunction arrays; Agrawal, Dharma P.; T-Cv28 n3 Mar 79 215-224 (IC13)

easily testable systems; Coy, Wolfgang; T-C v28 n5 May 79 367-371(IC09)

faulty cells in array; using some or all of the good cells that formconnective cluster; Agrawal, Vishwani D.; T-C v28 n9 Sep 79 691-693(2A10)

multipliers, two's complement iterative array multipliers; LSI globaland modular approaches; Hwang, Kai; T-C v28 n4 Apr 79 300-306(IB04)

multivalued logic function realization; fault detection; Srini Vason P.;T-C v28 n4 Apr 79 306-3 10 (IBI0)

Character recognitionword-level recognition of cursive scnpt in small vocabulary

environment; Farag, Raouf F. H.; T-C v28 n2 Feb 79 172-175 (IG02)Circuit switching

signal processing networks; routing in distributed networks;Swartzlander, Earl E., Jr.; T-C v28 nlAug 79 567-572 (IBI 1)

Circuits; cf. NetworksClustering methods; cf. Pattern clustering methodsCoding; cf. Cryptography; Error-correctmg codesCombinational circuit lault diagnosis

cellular arrays; easily testable systems; Coy, Wolfgang; T-C v28 n5 May79 367-371 (IC09)

fanout-free circuits; single-fault diagnosis; Markowsky, George; T-Cv28 nll Nov 79 863-864 (I E03)

modular trees; stuck-at faults detection and location; Gray, F. Gail;T-C v28 n5 May 79 342-353 (IA12)

multiple fault coverage; recursive coverage projection of test sets;Agarwal, Vinod K; F-C v28 nll Nov 79 865-870 (IE05)

multiple faults; Bose, Bella; T-C v28 niO Oct 79 804 (2A13)multivalued logic circuits realized using cellular arrays; Srini, Vason P.;T-C v28 n4 Apr 79 306-3 10 (IBIO)

programmable [ogic arrays; fault analysis and test generation; Ostapko,Daniel L.; T-C v28 n9 Sep 79 617-27 (IB13)

programmable logic arrays, fault model; Smith, James E.; 77-C v28 nilNov 79 845-853 (IC13)


random testing; determining when random testing should be used;Schneck, Paul B.; T-C v28 n8 Aug 79 580-581 (IC10)

sensitized paths; conditions under which test will propagate a faultthrough paths without sensitizing entire paths; Koren, Israel; T-C v28n3 Mar 79 268-269 (2A02)

tree network test set coverage; functional form approach; Agarwal,Vinod K; T-C v28 nl Jan 79 50-52 (IDIO)

undetectability of multiple stuck-at faults; necessary and sufficientconditions; Smith, James E.; T-C v28 nJO Oct 79 801-802 (2A10)

Combinational circuit fault toleranceself-checking and fail-safe system unified design; Diaz, M.; T-C v28 n3Mar 79 276-281 (2A10)

Combinational circuits; cf. Addition; Cellular logic arrays; Logic arrays;Multivaluedlirc circuits; Threshold logic circuits

hazards detection, static and dynamic hazards; Zisapel, Y.; T-C v28 nlJan 79 52-56 (ID12)

Huffman's algorithm for constructing optimal weighted trees; boundson root node weight and application to multiplexer design; Parker,D. Stott, Jr.; T-C v28 n5 May 79 365-367 (IC07)

monotone Boolean function synthesis using only operations fromincomplete set of primitives; size of required combinational circuitfor bilinear forms, routing problems, sorting, and merging; Lamagna,Edmund A.; T-C v28 nlO Oct 79 773-782 (I F07)

NAND arrays of NAND trees; deriving nearly optimal arrays; Curtis,H. Allen; T-C v28 n7 Jul 79 521-528 (1E07)

negative-gate networks; synthesis of gateminimum multi-outputtwo-level networks; Nakamura, Keiiro; T-C v28 nlO Oct 79 768-772(I F02)

redundancy detection; Smith, James E.; T-C v28 n3 Mar 79 261-262(1G03)

Communiadtion netssmall-diameter networks; local search design algorithm; Toueg, Sam;

T-C v28 n7 Jul 79 537-542 (IF09)Communication switching; cd. Circuit switching; Packet switchingComplers; cd. Computer language processorsComputation time; cf. Specific topicComputational complexity; cd. Specific topicComputational complexitymonotone Boolean function synthesis using only operations from

incomplete set of primitives; size of required combinational circuitfor bilinear forms, routing problems, sorting, and merging; Lamagna,Edmund A.; T-C v28 nlO Oct 79 773-782 (1F07)

Computer arithmetic; cf. ArithmeticCompuwr communtin

buffer behavior with Poisson arrivals, peniodic opportunities forservice, and random blocking of service; Heines, Thomas S.; T-C v28n8 Au 79 573-576 (IC03)

pipelined sorting nets for interconnecting multiple computers;Moravec, Hans P.; T-C v28 nlO Oct 79 795-798 (2A04)

routing, binary routing networks; Hopper, Andrew; T-C v28 nlO Oct 79699-703 (lA03)

routing in signal processing networks; circuit-switched network;Swartzlander, Earl E., Jr.; T-C v28 n8 Aug 79 567-572 (BIB1)

CoMuter faut diagnois; cd. Digital system, fault diagnosis; Logic circuitfault diagnosis; Memory fault diagnosis

Computer failt tolnce; cd. Digital system fault tolerance; Logic circuitfault tolerance; Memory fault tolerance

Computer grphics; c. Interactive graphicsComputer graphics

area shading graphics display system; Little, W. D.; T-C v28 n7 Jul 79528-531 (TE14)

geometric intersections; reporting and counting intersections,algorithms; Bentley, Jon L.; T-C v28 n9 Sep 79 643-647 (ID1 1)

straight lines and circular arcs, incremental generation; fast algorithm;Suenaga, Yasuhito; T-C v28 nlO Oct 79 728-736 (lC04)

triangular gind; straight line generation; Freeman, Herbert; T-C v28 n2Feb 79 130-152 (IE08)

Computer interfacmultiple channel controllers for switching given number of channelsamong larger number of input/output devices; Smith, Alan Jay; T-Cv28 nI Jan 79 38-49 (IC12)

Computer language processorshardware Iata interpreter; Chu, Yaohan; T-C v28 n2 Feb 79 101-109

(IBOl)parallel processing of Fortran-like programs; time and processor upper

bounds; Banerjee, Utpal; T-C v28 n9 Sep 79 660-670 (lE14)Computer lngages

for sequential machine studies; application-oriented programminlanguage, AUTOMAT; Feldman, michael B.; T-C v28 n8 Aug 79582-586 (IC12)

u

Computer networks; c. Computer communication; Distributedcomputing; Microcomputer networks; Multiprocessing

Computer networksdynamic architecture, reconfigurable via software available hardware

resources; Kartashev, Steven I.; T-C v28 nJO Oct 79 704-721 (lA08)Computer peripherals; cd. Computer interfacesComputer pipeline arithmetic

arrays for multiplication, division, squaring, and square rooting;

high-speed multifunction arrays; Agrawal, Dharma P.; T-C v28 n3Mar 79 215-224 (IC13)

multiphers, two's complement iterative array multipliers; LSI globaland modular approaches; Hwang, Kai; T-C v28 n4 Apr 79 3OD-306(lB04)

Computer pipeline processinginner product computers; Blankenbaker, John V.; T-C v28 n12 Dec 79944 (IE12)

interconnecting multiple computers using pipelined sorting nets;Moravec, Hans P.; T-C v28 nJO Oct 79 795-798 (2A04)

merging more than two lists without producing intermediate results;ffollaar, Lee A.; T-C v28 n6Jun 79 406-413 (1B14)

Computer security; cd. CryptographyComputer Society, cf. IEEVE Computer SocietyComputer software; cd. Computer languages; MicroprogrammingComputer software analysis

parallel processing of Fortran-like programs; time and processor upperbounds; Banerjee, Utpal; T-C v28 n9 Sep 79660-670 (IE14)

Computer software, operating systemsdeadlock problem; minimum cost recovery from deadlock; Leung,Joseph Y.-T.; T-C v28 n9 Sep 79 671-677 (IFII)

Computers; cf. Specific topicContent-addressable memories; cf. Associative memoriesConvolutionDFT computation, Winograd's method extended; cyclic convolutionperformed using Mersenne number-theoretic transform; Ree4 IrvingS.; T-C v28 n7 Jul 79 487-492 (lCOI)

Convolutional codeserror propagation properties of (12, 6) systematic

double-error-correcting encoder and one-step majority-logicfeedback decoder; Paaske, Erik; T-C v28 n3 Mar 79 255-258 (IF1I)

Correlation functionspseudorandom decimal number generation using binary and quinary

maximal-length sequences; Pangratz, Heinrich; T-C v28 n9 Sep 79637-642 (1DO5)

Counting circuitsparallel counter implementation using four-valued threshold logic;

Current, K Wayne; T-C v28 n3 Mar 79 200-204 (IB 12)Cryptography

decimation of trinomial sequences using toggle registers; Arvillias,Alexis C.; T-C v28 n2 Feb 79 89-101 (IA03)

shift-register based schemes; decrypting stream cipher based on J-Kflip-flops; Rubin, Frank; T-C v28 n7 Jul 79483-487 (IBIlI)

substitution-permutation networks; designing arbitrarily largecomplete SP networks; Kam, John B.; T-C v28 nJO Oct 79 747-753(D09)

D

Data base systemscontext addressed segment sequential memory system having

associative and parallel processing capabilities; CASSM system; Su,Stanley Y. W.; T-C v28 n6 Jun 79430-445 (IDIO)

DB machine for very large databases; Banerjee, Jayanta; T-C v28 n6Jun 79 414-429 (IC08)

DB machines; special issue; T-C v28 n6 Jun 79 381-458 (lA03)DB machines; special issue foreword; Langdon, Glen G., Jr., Guest ed;T-C v28 n6 Jun 79 381-383 (lA03)

hardware algonrthms for nonnumeric computation; Mukhopadhyay,Amar; T-C v28 n6 Jun 79 384-394 (IA06)

intelligent magnetic bubble memories; application to data basemanagement systems; Liu, Jane W. S.; T-C v28 nI2 Dec 79 888-906(IA12)

merging more than two lists without producing intermediate results;follaar, Lee A.; T-C v28 n6 Jun 79 406-413 (lB 14)

multiprocessor organzation for supporting relational DB managementsystem; DIRECT system; DeWitt, David J.; T-C v28 n6 Jun 79395-406 (IB03)

relational associative processor, RAP.2; Schuster, Stewart A.; T-C v28n6 Jun 79 446-458 (IE12)

Data base systems, distributedupdate synchronization in multiple copy systems; Gelenbe, Erol; T-C

v28 nlO Oct 79 737-747 (IC13)Data security; cf. CryptographyDecision procedurs

binary decision trees for realizing multioutput Boolean functions;minimization of trees; Cerny, Eduard; T-C v28 n7 Jul 79 472-482(lA14)

Decoding; cf. Majority-logic decodingDFT; cf. Discrete Fourier transformsDiagnosis; cf. Fault diagnosisDifferential analyzers; d. Digital differential analyzersDifferential equations

numerical integration of linear d.e.; recurrence formula for generatingvalues of sofution function at equally spaced values of independentvariable; Necula, Maria-Ana; T-C v28 n7 Jul 79 506-513 (1D06)

numerical solution; truncation errors; Baker, Paul W.; T-C v28 n3 Mar79 205-214 (IC03)


Digital arithmetic; df. ArithmeticDigital differential analyzers

truncation errors; Baker, Paul W.; T-C v28 n3 Mar 79 205-214 (1C03)Digital ifiters; cf. Nonrecursive digital filters; Recursive digital filtersDigital Image processing; cf. Image processingDigital integrated circuits; cf. Bipolar integrated circuits; FET integrated

circuits; MOS integrated circuits; Semiconductor logic circuitsDigital lnterated circuits

multiphers, two's complement iterative array multipliers; LSI globaland modular approaches; Hwang, Kai; T-C v28 n4 Apr 79 300-306(I1B04)

Digital system fault diagnosis; c. Logic circuit fault diagnosis; Memoryfault diagnosis

Digital system fault diagnosisabstract model; Kime, Charles R.; T-C v28 nJO Oct 79 754-767 (1E02)diagnosability with repair; graph-theoretic formulation; Ciompi, P.;

T-C v28 nS May 79 362-365 (lC0)fault-free units can be replaced during repair; diagnosability measure;

Karunanithi, S.; T-C v28 n2 Feb 79 121-133 (1C07)good units can be replaced during diagnosis process; diagnosis

algorithms independent of system structure; Smith, James E.; T-Cv28 nS May 79 374-378 (ID02)

intermittent faults; analytic models; Varshney, Pramod K; T-C v28 nl OOct 79 786-791 (IG06)

two-level model; part level at which diagnosability is defined and faultlevel at which testing is performed; McPherson, John A.; T-C v28 nlJan 79 16-27 (IB04)

Digital system fault tolerance; cf. Logic circuit fault tolerance; Memoryfault tolerance

Digital system fault toleranceN-modular redundancy systems with intermittent and permanent

faults; reliability analysis; Koren, Israel; T-C v28 n7 Jul 79 514-520(ID 14)

Discrete Fourier banforms; cf. Fast Fourier transformsDisrete Fourier transforms

multidimensional generalized DFT; Corsini, Paolo; T-C v28 nl I Nov 79819-830 (IBO1)

multidimensional transforms; equivalence between one-dimensionalWalsh transform and multidimensional DFT; Kunz, Henry O.; T-Cv28 n3 Mar 79 267-268 (IG09)

Discrete orthogonal trausforms; cf. TransformsDiplays; d. Computer graphics; Graphic displaysDtibuted compung; cf. Data base systems, distributedDistributed computing

assigning program modules to two processors when one processor haslimited memory; minimum cost assignment using network flowalgorithms; Rao, Gururaj S.; T-C v28 n4 Apr 79 291-299 (lA09)

signal processing networks; routing in circuit-switched network;Swartzlander, Earl E., Jr.; T-C v28 n8 Aug 79 567-572 (IBI 1)

Divisionarrays for multiplication, division, squaring, and square rooting;

high-speed multifunction arrays; Agrawal, Dharma P.; T-C v28 n3Mfar 79 215-224 (IC13)

Dynamic memoriesaccessing, random and sequential accessing processes; Morris, S.

Brent; T-C v28 n3 Mar 79 225-237 (lD09)

E

Error-correcting codes; cf. Convolutional codesError-correcting codesmemories with stuck-at faults; transparent shortened codes; Sundberg,

Carl-Erik; T-C v28 n9 Sep 79 686-690 (2A05)memory fault tolerance; single error and erasure correction scheme forspacebore memory; Walker, William K S.; T-C v28 n7 Jul 79493-500 (IC07)

unit-distance counting code; single-error correction in SIB3 codes;Devries, Ronald C.; T-C v28 n3 Mar 79 253-255 (IF09)

F

Fast Fourier ransforms; cf. Discrete Fourier transformsFast Fourier bansforms

algorithms requiring no multiplications and having a form suitable forhigh performance hardware implementations; Despain, Alvin M.;T-C v28 n5 May 79 333-341 (IA03)

finite field arithmetic on array processor; Redinbo, G. Robert; T-C v28n7 Jul 79 461-471 (IA03)

nonrecursive digital filtering; FFT length to minimize computationtime; Butz, Arthur R.; F-C v28 n8 Aug 79 577-580 (1C07)

residue number system and ROM arrays for FFT implementation;Tseng, B. D.; T-C v28 nil Nov 79 831-845 (lB 13)

Winograd's method extended, cyclic convolution performed usingMersenne number-theoretic transform; Reed, Irving S.; T-C v28 n7Jul 79 487492 (ICOI)

Fault diaosis; cf. Digital system fault diagnosis; Logic circuit faultdiagnosis; Memory fault diagnosis

Fault tolerance; cf. Digital system fault tolerance; Logic circuit faulttolerance; Memory fault tolerance

FET integrated circuits; cf. MOS integrated circuitsFET integrated circuits, logicprogrammable logic array chip design using special array folding

techniques and on-chip bus structure; Wood, Roy A.; T-C v28 n9 Sep79 602-608 (1A12)

FETs; cf. Schottky-barrier FETsFF1; cf. Fast Fourier transformsFilters; cf. Digital filtersFinite fields; cf. Galois fieldsFinite word-length effects

differential equation solution; truncation errors; Baker, Paul W.; T-Cv28 n3 Mar 79 205-214 (IC03)

FFT i-mplementation using residue number system and ROM arrays;Tseng, B. D.; T-C v28 nil Nov 79 831-845 (IB13)

oscillators, digital generation of sinusoids in real time; Hartimo, Jiro;T-C v28 n4 Apr 79 300 (1B04)

FIR digital filters; cf. Nonrecursive digital filtersFirmware; cf. MicroprogrammingFlip-flops

cryptography; decrypting stream cipher based on J-K flip-flops;Rubin, Frank; T-C v28 n7 Jul 79 483-487 (IB II)

synchronizer circuits; anomalous behavior of flip-flops in response tologically undefined input conditions; Fleischhammer, Werner; T-Cv28 n3 Mar 79 273-276(2A07)

synchronizer or interlock maloperation in metastable region; Chaney,Thomas J.; T-C v28 nlO Oct 79 802-804 (2AI 1)

Flow networks; cf. NetsFourier transforms; cf. Discrete Fourier transforms; Fast Fourier

transformsFourier transforms

two-parameter orthogonal transformation matrix which reduces toFourier and Hadamard transformation matrices under specialconditions; Cheng, David K; T-C v28 n2 Feb 79 147-150 (IE05)

Frequency estimatoncomplex signal represented by rotating vector; numerical evaluation of

frequency; Frosini, Graziano; T-C v28 n8 Aug 79 560-566 (IB04)

G

Gallium alloys/compounds, devices; cf. Schottky-barrier devicesGalois fields

array processing using finite field arithmetic; Redinbo, G. Robert; T-Cv28 n7 Jul 79 461471 (IA03)

DFT computation, Winograd's method extended; cyclic convolutionperformed using Mersenne number-theoretic transform; Reed4 IrvingS.; T-C v28 n7 Jul 79 487492 (ICOI)

Geometiryintersections; reporting and counting intersections, algorithms; Bentley,Jon L; T-C v28 n9 Sep 79 643-647 (IDI I)

Graph theory; cf. Layout; Nets; TreesGraph theory

digital system fault diagnosis with repair; Ciompi P.; T-C v28 n5 May79 362-365 (IC04)

logic circuit fault diagnosis using graph automorphisms to cluster faultsinto classes; Turcat, Claudine; T-C v28 n4 Apr 79 319-325 (IC09)

small-diameter networks; local search design algorithm; Toueg, Sam;T-C v28 n7 Jul 79 537-542 (1F09)

Graphic displays; cf. Computer graphicsGraphics; cf. Computer graphics; fnteractive graphics

H

Haar transformsunified matrix treatment; Vlasenko, V.; T-C v28 n12 Dec 79 934-938

(1E02)Hadamard matrices

sequency vector determinaton for 2n x 2n matrices; Srihari, Sargur N.;T-C v28 n3 Mar 79 243-244 (IE13)

Hadamard transforms; cf. Walsh transformsHadamard transforms

two-parameter orthogonal transformation matrix which reduces toFourier and Hadamard transformation matrices under specialconditions; Cheng, David K; T-C v28 n2 Feb 79 147-150 (IE0)

unified matrix treatment; Viasenko, V.; T-C v28 n12 Dec 79 934938(1E02)

Huffman codesconstructing optimal weighted trees; bounds on root node weight and

application to multiplexer design; Parker, D. Stott, Jr.; T-C v28 nSMay 79 365-367 (1C07)

I

IEEE Computer Societyeditorial appointment; Booth, T. L.; T-C v28 n8 Aug 79 545 (1A03)


editorial appointment; Booth, Taylor L., Ed.; T-C v28 n3 Mar 79 177(1A03)

editorial appointments; Booth, Taylor L., Ed.; T-C v28 n4 Apr 79 285(1A03)

editonral policy; Booth, Taylor L., Ed.; T-C v28 ni Jan 79 1 (1A03)list of referees; Booth, Taylor L., Ed.; T-C v28 nl2 Dec 79 945-947

(IE13)Image analysis

word-level recognition of cursive script in small vocabularyenvironment; Farag, RaoufF H.; T-C v28 n2 Feb 79 172-175 (IG02)

Image processing; c. Specific topicImage processing

transforms; two-parameter orthogonal transformation matrix whichreduces to Fourier and Hadamard transformation matrices underspecial conditions; Cheng, David K.; T-C v28 n2 Feb 79 147-150(IE05)

Image reconstruction; cf. TomographyImage restorationmaximum a posteriori restoration; Trussell, H. J.; T-C v28 ni Jan 79

57-62 (IE03)Image transmission

interactive computer graphics raster images; transmitter low resolutionapproximations which converge to final image; Sloan, Kenneth R.,Jr.; T-C v28 nll Nov 79 871-874 (lEl 1)

Information systems; cd. Data base systemsIntegrated circuits; c. Bipolar integrated circuits; Digital integrated

circuits; FET integrated circuits; MOS integrated circuitsIntegration; c. Numerncal integrationInteractive graphics

raster images, transmitting low resolution approximations whichconverge to final image; Sloan, Kenneth R., Jr.; T-C v28 nll Nov 79871-874 (lEll)

spline curves to interpolate fixed number of points; Dube, R. Peter;T-C v28 n4 Apr 79 286-290 (1A04)

Interconnection networks; cd. Circuit switchingInterconnection networks

partition networks and full switches from two-state cells;asymptotically optimal with respect to cell count; Chung, Kin-Man;T-C v28 n7 Jul 79 500-505 (IC14)

pipelined sorting nets for interconnecting multiple computers;Moravec, Hans P.; T-C v28 nlO Oct 79 795-798 (2A04)

SIMD machines; Siegel, Howard J.; T-C v28 n12 Dec 79 907-917(IC03)

Interconnections; cd. LayoutInterleaved memories

multiprocessor systems; bandwidth of interleaved memory; Rau, B.Ramakrishna; T-C v28 n9 Sep 79 678-681 (1G04)

processors competing for resources; utilization upper bound;Speelpenning B.; T-C v28 n12 Dec 79 927-929 (ID09)

request sequence behavior and performance of memory system; Rau,B. Ramakrishna; T-C v28 n3 Mar 79 191-199 (1B03)

Interpolation; cf. Spine functionsInterpreters; c. Computer language processorsIterative logic aays; c. Cellular logc arrays12L (integrated injecton logic); cn. Bipolar itegrated circuits, I2L

L

Languages; cd. Computer languages; Stochastic languagesLarge-scale integratfon; cf. Integrated circuitsLayout

channel-assignment problem; optimal solution; Gupta, Udaiprakash I.;T-C v28 nll Nov 79 807-810 (IA03)

printed circuit boards; ordering of connections for automated routing;Kulkarni, K G.; T-C v28 nlO Oct 79 791-794 (IGI )

printed circuit boards; routing cost is function of local blockagedensity; Agrawal, Prathima; T-C v28 n3 Mar 79 262-267 (1G04)

Linear systems, time-invariant continuous-timenumerical integration; recurrence formula for generating values of

solution function at equally spaced values of independent variable;Necula, Maria-Ana; T-C v28 n7 Jul 79 506-513 (ID06)

Logarithmic adthmeticFocus number system; 'focuses' on available resolution near zero;

Swartzlander, Earl E., Jr.; T-C v28 n9 Sep 79 693 (2A12)Logic arrays; cd. Cellular logic arraysLogic arays

magnetic bubble switches with memory capability for associative arraylogic structure; Lee, Share-Young; T-C v28 n9 Sep 79 627-636 (1C09)

NANqD arrays of NAND trees; deriving nearly optimal arrays; Curtis,H. Allen; T-C v28 n7 Jul 79 521-528 (IE07)

programmable logic array chip design using special array foldingtechniques and on-chip bus structure; Wood, Roy A.; T-C v28 n9 Sep79 602-608 (IA12)

programmable logic arrays; cost function definition and coveringprocedures; Kobylarz, Thaddeus; T-C v28 n8 Aug 79 586-590 (1D02)

programmable logic arrays; fault analysis and test generation; Ostapko,Daniel L; T-C v28 n9 Sep 79 617-627 (1B13)

programmable logic arrays, fault model; Smith, James E.; T-C v28 nilNov 79 845-853 (1C13)

programmable logic arrays; logic design; Kambayashi, Yahiko; T-C v28n9 Sep 79 609-617 (IB05)

programmable logic arrays; special section of papers; T-C v28 n9 Sep79 593-636 (1A03)

programmable logic arrays; special section of papers; foreword;Fleisher, Harold, Guest ed.; T-C v28 n9 Sep 79 593 (1A03)

programmable storage/logic array chip for VLSI; Patil, Suhas S.; T-Cv28 n9 Se 79 594-601 (1A04)

Logic circuit fault diagnosis; cf. Combinational circuit fault diagnosis;Digital system fault diagnosis; Sequential machine fault diagnosis

Logic circuit fault diagnosisgraph automorphisms used to cluster faults into classes; Turcat,

Claudine; T-C v28 n4 Apr 79 319-325 (IC09)Logic circuit fault tolerance; c. Combination circuit fault tolerance;

Sequential machine fault toleranceLogic circuit fault tolerance

cellular arrays containing faulty cells; using some or all of the goodcells that form connective cluster; Agrawal, Vishwani D.; T-C v28 n9Sep 79 691-693 (2A10)

Logic circuits; cf. Asynchronous sequential machines; Combinationalcircuits; Counting circuits; Flip-flops; Logic arrays; Magneticbubble logic circuits; Multivalued logic circuits; Sequentialmachines; Threshold logic circuits

Logic circUitsfanout-free functions and unate cascade functions realization; number

of functions; Sasao, Tsutomu; T-C v28 nl Jan 79 66-72 (1E12) -optimal feedforward networks of AND and OR gates for four-variable

switching functions; Culliney, J. N.; T-C v28 nl Jan 79 76-85 (IF08)reliability measure, probability that circuit output is correct; Koren,

Israel; T-C v28 n3 Mar 79 244-249 (IE14)Logic design; cf. Logic circuitsIogic devices

multioutput logic element whose weight of an input is equal to that ofcorresponding output vector, conservative logic element; Sasao,Tsutomu; T-C v28 n9 Sep 79 682-685 (2A01)

Logic functions; cf. Boolean functions; Logic circuits; Multivalued logicfunctions

Logic functionsdualizing a regular switching function; Hammer, P. L; T-C v28 n3 Mar

79 238-243 (1E08)minimization algorithms, computational complexity; switching

functions for which useful pnme implicants are extremely smallfraction of all prime implicants; Breitbart, Y.; T-C v28 nl2 Dec 79941-943 (IE09)

modulo-2 sum-of-products having minimum number of product terms;polarity of variables not fixed; Papakonstantinou, G.; -C v28 n2 Feb79 163-167 (IF07)

Reed-Muller canonic expansion; minimization; Saluja, Kewal K; T-Cv28 n7 Jul 79 535-537 (IF07)

Logic modulesfault diagnosis in modular trees; Gray, F Gail; T-C v28 n5 May 79

342-353 (IA12)LSI (large-scale integration); cf. Integrated circuits

M

Magnetic bubble logic circuitsassociative-search devices for array logic; bubble switches withmemory; Lee, Share-Young; T-C v28 n9 Sep 79 627-636 (IC09)

Mapetic bubble logic devicesmultioutput logic element whose weight of an input is equal to that of

corresponding output vector, conservative logic element; Sasao,Tsutomu; T-C v28 n9 Sep 79 682-685 (2A01)

Magetic bubble memoriesassociative-search devices for associative memories; bubble switches

with memory; Lee, Share- Young; T-C v28 n9 Sep 79 627-636 (IC09)intelligent memories; application to data base management systems;

Liu, Jane W. S.; T-C v28 ni2 Dec 79 888-906 (IAI )lattice files; column movement and permutation using minimalnumber of column interchanges; Chandra, Ashok K; T-C v28 ni Jan79 8-15 (IA1O)

Maintenance; cf. Fault diagnosisMajority-logic decoding

convolutional codes; error propagation properties of (12, 6) systematicdouble-error-correcting encoder and one-step feedback decoder;Paaske, Erik; T-C v28 n3 Mar 79 255-258 (IFl )

Many-valued logic; cf. Multivalued logicMAP estimation

abbr. of Maximum a posteriori estimationimage restoration; Trussell, H. J.; T-C v28 nl Jan 79 57-62 (IE03)

MNarkov processesmultiprocessor systems with local referencing; memory interference

analysis using Markov chain models; Sethi, A. S.; T-C v28 n2 Feb 79157-163 (IFOI)

Mass memories; cd. Specific topic


Mathematical proramming; cd. Nonlinear programmingMatrices; cd. Hadamard matricesMatrices

projection matrix construction using products of elementary matrices;Oja, Erkki; T-C v28 nl Jan 79 65-66 (IEI l)

transposin large 2nx 2n matrices; Ben Ari Mordechai; T-C v28 nl Jan79 72-75(1F04)

Memoris; cf. Associative memories; Dynamic memories; Interleavedmemories; Magnetic memories; Paged memories; Random-accessmemories; Read-only memories; Shift-register memories; Virtualmemories

Memory accssdynamic memories; random and sequential accessing processes;

Morris, S. Brent; T-C v28 n3 Mar 79 225-237 (ID09)interleaved memories; request sequence behavior and performance ofmemory system; Rau, B. Ramakrishna; T-C v28 n3 Mar 79 191-199(IB03)

multi-microprocessor systems; memory conflicts and bus contentions;Fung, Kwok-Tung; T-C v28 nl Jan 79 28-37 (IC02)

multiprocessor systems with local referencing; Markov chain models;Sethi, A. S.; T-C v28 n2 Feb 79 157-163 (FF01)

Memory allocationmulticomputer systems with dynamic architecture; Kartashev, Steven

L.; T-C v28 niO Oct 79 704-721 (1A08)Memory fault diposisRAMs; detecting multiple stuck-at faults; Nair, Ravindra; T-C v28 n3Mar 79 258-261 (IF14)

Memory fault tolerancecodes, transparent shortened codes for stuck-at faults; Sundberg

Carl-Erik; T-C v28 n9 Sep 79 686-690 (2A05)spaceborne memory with single error and erasure correction scheme;

Walker, William K S.; T-C v28 n7 Jul 79 493-500 (IC07)Merging

Huffman's algorithm for constructing optimal weighted trees; boundson root node weight and application to multiplexer design; Parker,D. Stott, Jr.; T-C v28 n5 May 79 365-367 (lCO7)

monotone Boolean function synthesis using only operations fromincomplete set of primitives; size of required combinational circuitfor bilUnear forms, routing problems, sorting, and merging; Lamagna,Edmund A.; T-C v28 nlO Oct 79 773-782 (IF07)

more than two lists without producing intermediate results; Hollaar,Lee A.; T-C v28 n6 Jun 79 406-413 (IB14)

Merseune tfos; cf. Number-theoretic transformsMESFETs; cd. Schottky-barrier FETsMicrocomputer networksdynamic architecture, reconfigurable via software available hardware

resources; Kartashev, Steven I.; T-C v28 nlO Oct 79 704-721 (IA08)multiprocessor systems; memory conflicts and bus-contentions; Fung&Kwok-Tung; T-C v28 nl Jan79 28-37 (IC02)

Microprocessors; c. Microcomputers

control of specialized processors; Swartzlander, Earl E., Jr.; T-C v28nl2 Dec 79930-934 (ID12)

microcode bit optimization is NP-complete; Robertson, Edward L; T-Cv28 n4 Apr 79 316-319 (IC06)

width of control memor minimized using branch-and-bound method;Baer, Jean-Loup; T-Cv28 n4 Apr 79 [316 (1B 14)

Microwave FETslogic elements for multivalued logic circuits; Tront, Joseph G.; T-C v28

nll Nov 79 854-862 (1D08)Modular computer systemsdynamic architecture, reconfigurable via software available hardware

resources; Kartashev, Steven I.; T-C v28 nJQ Oct 79 704-721 (IA08)MOS integrated circuits, logic

negative-gate networks; synthesis of gateminimum multi-outputtwo-level networks; Nakamura, Keiiro; T-C v28 nJO Oct 79 768-772(IF02)

Muldmensional signal processng; cd. Image processingMultidimensionl sinal processing

discrete Fourier transforms; multidimensional generalized DFT;Corsini, Paolo; T-C v28 nil Nov 79 819-830 (IBOI)

transforms; two-parameter orthogonal transformation matrix whichreduces to Fourier and Hadamard transformation matrices underspecial conditions; Cheng, David K; T-C v28 n2 Feb 79 147-150(lE05)

Walsh transform applied to 2" one-dimensional data equivalent ton-dimensional DFT applied to same data arranged on binaryn-cube; Kunz, Henry O.; T-C v28 n3 Mar 79 267-268 (IG09)

MultiplexingHuffman's algorithm for constructing optimal weighted trees; boundson root node weight and application to multiplexer design; Parker,D. Stott, Jr.; T-C v28 nS May 79 365-367 (IC07)

Multiplication; cd. ConvolutionMuliplication

arrays for multiplication, division, squaring, and square rooting;high-speed muftifunction arrays; Agrawal, Dharma A; T-C v28 n3Mar 79 215-224 (IC13)

finite field arithmetic on array processor; Redinbo, G. Robert; T-C v28n7Jul 79 461-471 (lA03)

inner product computers; Blankenbaker, John V.; T-C v28 nl2 Dec 79944 (lE12)

parallel multiplier with bit-sequential input and output operating inO(n) time; Chen, I-Ngo; T-C v28 nlOOct 79 721-727 (IB1 1)

two's complement cellular array multipliers; LSI global and modularapproaches; Hwang. Kai; T-C v28 n4 Apr 79 300-306 ( B04)

Multiprocessing; cd. Distributed computing; Microcomputer networks;Parallel processing

Multiprocessingdata base systems; DIRECT multiprocessor organization for

supporting relational DBMS; DeWitt, David J.; T-C v28 n6 Jun 79395406 (IB03)

deadlock problem; minimum cost recovery from deadlock; Leung,Joseph Y.-T.; T-C v28 n9 Sep 79 671-677 (IFII)

delay-throughput analysis of two-processor system serving twoPoisson-arriving job classes through common queue configuration;comparison with each processor dedicated to one of job classes;Schwartz, Mischa; T-C v28 n12 Dec 79 939-941 (IE07)

dynamic architecture, reconfigurable via software available hardwareresources; Kartashev, Steven I.; T-C v28 nlO Oct 79 704-721 (IA08)

interconnecting multiple computers using pipelined sorting nets;Moravec, Hans P.; T-C v28 ni O Oct 79 795-798 (2A04)

interleaved memory bandwidth in multiprocessor system; Rau, B.Ramakrishna; T-C v28 n9 Sep 79 678-681 (IG04)

job scheduling, minimum-resource fixed job scheduling; optimalsolution; Gupta, Udaiprakash 1.; T-C v28 nil Nov 79 807-8 10 (IA03)

memory interference in systems with local referencing; Markov chainmodels; Sethi, A. S.; T-C v28 n2 Feb 79 157-163 (IF1)

program execution, guaranteeing correct execution; Lamport, Leslie;T-C v28 n9 Sep 79 690-691 (2A09)

queumg models for dynamic load balancing in heterogeneousmultiprocessor system; Chow, Yuan-Chieh; T-C v28 nS May 79354-361 (lB1O)

resource utilization upper bounds; Speelpenning, B.; T-C v28 n12 Dec79 927-929 (ID09)

scheduling, preemptively scheduling set of n independent jobs on mprocessor open shop; Gonzalez, Teofilo; T-C v28 nlO Oct 79 782-786(1602)

Mutiprogrammingdeadlock problem; minimum cost recovery from deadlock; Leung,Joseph Y.-T.; T-C v28 n9 Sep 79 671-677 (Fll)

Multivalued logicsequential networks; ternary model of binary gate networks;

Brzozowski, Janusz A.; T-C v28 n3 Mar 79 178-184 (IA04)Multivalued logic circuits

cellular array reahzation of combinational and sequential networks;fault detection; Srini, Vason P.; T-C v28 n4 Apr 79 306-310 (IB10)

GaAs MESFETs as basic circuit element; Tront, Joseph G.; T-C v28nll Nov 79 854-862 (1D08)

12L circuits, logic design; McCluskey, Edward J.; T-C v28 n8 Aug 79546-559 (IA04)

parallel counter implementation using four-valued threshold logic;Current, K Wayne; T-C v28 n3 Mar 79 200-204 (IB 12)

Multivalued logic functionscascade realizable functions; enumeration; Hikita, T.; T-C v28 n5 May

79 371-374 (IC13)

N

Nets; cd. LayoutNets

distributed computer system assignment of program modules;minimum cost assignment using network flow algorithms; Rao,Gururaj S.; T-C v28 n4 Apr 79 291-299 (IA09)

maximal flow problem solution using associative processing; Chen,I-Ngo; T-C v28 n3 Mar 79 184-190 (IAIO)

Network reliabilitylogic circuit reliability measure, probability that circuit output is

correct; Koren, Israel; T-C v28 n3 Mar 79 244-249 (IE14)Networks; cf. Logic circuitsNonlnear programmingmicroprogrammed processor control-memory width miniization

using branch-and-bound method; Baer, Jean-Loup; T-C v28 n4 Apr79 310-316 (IB14)

Noarecursive digital filtersFFT length to minimize computation time; Butz, Arthur R.; T-C v28 n8Aug 79 577-580 (1C07)

Number-theoretic transformsDFT computation, Winograd's method extended; cyclic convolutionperformed using Mersenne number-theoretic transform; Ree4 IrvingS.; T-C v28 n7 Jul 79 487-492 (lCOI)

Numerical integrationdifferential equations; truncation errors; Baker, Paul W.; T-C v28 n3Mar 79 205-214 (IC03)

linear differential equations; recurrence formula for generating valuesof solution function at equally spaced values of independentvariable; Necula, Maria-Ana; T-C v28 n7 Jul 79 506-513 (1D06)


Numerical methods; cd. Arithmetic; Differential equations

0

Optimizadon methods; cd. Nonlinear programmingOrthogonal transforms; cd. TransformsOscllators

digital generation of sinusoids in real time; stability; Hartimo, Iiro; T-Cv28 n4 Apr 79 300 (IB04)

p

Packet switchingrouting, binary routing networks; Hopper, Andrew; T-C v28 nlO Oct 79

699-703 (IA03)Paged memories; cd. Virtual memoriesPaged memories

page replacement algorithms using use-bit scanning; Easton, MakolmC.; T-C v28 n2 Feb 79 133-141 (1D05)

Parallel processing; cd. Computer pipeline processing; MultiprocessingParallel processing

counters; paraLlel counter implementation using four-valued thresholdlogic; Current, K Wayne; T-C v28 n3 Mar 79 200-204 (IB 12)

data base machines; context addressed segment sequential memoryAsyem having associative and parallel processing capabilities;(ASDl system; Su, Stanley Y. W.; T-C v28 n6 Jun 79 430445(IDIO)

finite field arithmetic on array processor; Redinbo, G. Robert; T-C v28n7 Jul 79 461-471 (IA03)

Fortran-like loops; time and processor upper bounds; Banerjee, Utpal;T-C v28 n9 Sep 79 660-670 (IE14)

SIMD machines model; interconnection networks; Siegel, Howard J.;T-C v28 nl2 Dec 79 907-917 (IC03)

sorting; bitonic sort on mesh-connected computer; Nassimi, David;T-C v28 nl Jan 79 2-7 (IA04)

Pattern chustering methodslogic circuit fault diagnosis using graph automorphisms to cluster faults

into classes; Turcat, Claudine; T-C v28 n4 Apr 79 319-325 (IC09)nonlinear mapping of high-dimensional data to a plane; fast iterative

algorithm; Niemann, Heinrich; T-C v28 n2 Feb f9 142-147 (ID14)Pattern recognidon; cd. Image analysisPeriodic signals

frequency of complex signal represented by rotating vector; numericalevaluation; Frosini, Graziano; T-C v28 n8 Aug 79 560-566 (IB04)

Peripheral equipment; cd. Computer peripheralsPermutation networks

partition networks and full switches from two-state cells;asymptotically optimal with respect to cell count; Chung, Kin-Man;T-C v28 n7 Jul 79 500-505 (IC14)

SIMD machines; Siegel, Howard J.; T-C v28 nl2 Dec 79 907-917(IC03)

Permutationsmagnetic bubble lattice files; column movement and permutation using

minimal number of column interchanges; Chandra, Ashok K; T-Cv28 nl Jan 79 8-15 (lAIO)

Picture processing; cd. Image processingPipehine processing; cd. Computer pipeline processingPlotters

triangular grid; straight line generation; Freeman, Herbert; T-C v28 n2Feb 79 150-152 (1E08)

Poisson processes

delay-through.put analysis of two-processor system serving twoPoisson-arriving Job classes through common queue configuration;comparison wit-h each processor dedicated to one of job classes;Schwartz, Mischa; T-C v28 nl2 Dec 79 939-941 (IE07)

Printed circuts; cd. LayoutProbablistic automata; c. Stochastic automataProgrmming; cd. Computer languages; Computer softwarePseudonoise sequences; cd. Shift-register sequencesPseudorandom number generation

decimal number generation using binary and quinary maximal-lengthsequences; Pangratz, Heinrich; T-C v28 n9 Sep 79 637-642 (IiD5)

decimation of trinomial sequences using toggle registers; Arvillias,Alexis C.; T-C v28 n2 Feb 79 89-101 (1A03)

Q

Quantiatin errors; cf. Finite word-length effectsQueued commution

buffer behavior with Poisson arrivals, periodic opportunities forservice, and random blocking of service; Heines, Thomas S.; T-C v28n8 Aug 79 573-576 (IC03)

Quewing analysisbuffer length for Erlang input; Hill, J. S.; T-C v28 n3 Mar 79 269-273

(2A03)computer system multiple channel controllers; Smith, Alan Jay; T-C

v28 nl Jan 79 3849 (IC12)

multiprocessor systems; dynamic load balancing in heterogeneoussystem; Chow, Yuan-Chieh; T-C v28 n5 May. 79 354-361 (IBlO)

two-processor system serving two Poisson-amving job classes throughcommon queue configuration; delay-throughput analysis;comparison with each processor dedicated to one of job classes;Schwartz, Mischa; T-C v28 n12 Dec 79 939-941 (IE07)

R

Radar signal processingfrequency of complex signal represented by rotating vector; numerical

evaluation; Frosini, Graziano; T-C v28 n8 Aug 79 560-566 (IB04)RAM; cf. Random-access memoriesRandom-access memories

fault detection, multiple stuck-at faults; Nair, Ravindra; T-C v28 n3Mar 79 258-261 (IF14)

Random number generation; cl. Pseudorandom number generationRead-only memoriesFFT implementation using residue number system and ROM arrays;

Tseng, B. D.; T-C v28 nll Nov 79 831-845 (IB13)Recursive digital rilter stability

oscillators, digital generation of sinusoids in real time; Hartimo, Iiro;T-C v28 n4 Apr 79 300 (IB04)

Redundant systems; cf. Fault toleranceRedundant systems

combinational logic circuits; redundancy detection; Smith, James E.;T-C v28 n3 Mar 79 261-262 (1G03)

Reed-Muller codesswitching function canonic expansion; minimization; Saluja, Kewal K;T-C v28 n7 Jul 79 535-537 (IF07)

Registers; cf. Shift registersReliability; cf. Network reliability; System reliabilityRepairable systems

digital system fault diagnosis with repair; graph-theoretic formulation;Ciompi, P.; T-C v28 n5 May 79 362-365 (1C04)

Residue arithmeticFFT implementation using residue number system and ROM arrays;

Tseng, B. D.; T-C v28 nil Nov 79 831-845 (1B13)ROM; cf. Read-only memoriesRoundoff errors; cf. Finite word-length effects

S

Schedulingjob scheduling, minimum-resource fixed job scheduling; optimal

solution; Gupta, Udaiprakash I.; T-C v28 nll Nov 79 807-810 (IA03)preemptively scheduling set of n independentjobs on m processor open

shop; Gonzalez, Teofilo; T-C v28 nlO Oct 79 782-786 (1G02)Schottky-bawrier FETs

logic elements for multivalued logic circuits; Tront, Joseph G.; T-C v28nil Nov 79 854-862 (1D08)

Search methodssmall-diameter networks; local search design algorithm; Toueg, Sam;T-C v28 n7 Jul 79 537-542 (IF09)

Semiconductor lgic circuits; cf.? Bipolar integrated circuits; FETintegrated circuits; MOS integrated circuits

Semiconductor logic circuitsprogrammable storage/logic array chip for VLSI; Patil, Suhas S.; T-C

v28 n9 Sep 79 594-601 (lA04)Sequences; cf. Shift-register sequencesSequences

decimation of trinomial sequences using toggle registers; Arvillias,Alexis C.; T-C v28 n2 Feb 79 89-101 (IA03)

Sequential machine fault diagnosischecking experiments design; Braun, Robert D.; T-C v28 n2 Feb 79

153-156 (IEll)error-latency model applied to analysis of random test procedures;Davi4 R.; T-C v28 nl Jan 79 85-86 (1G03)

multivalued logic circuits realized using cellular arrays; Srini, Vason P.;T-C v28 n4 Apr 79 306-310 (IB10)

redundancy and undetectability of stuck-at faults not equivalent;detection by transition count testing methods; Abramovici, Miron;T-C v28 nll Nov 79 864-865 (IE04)

Sequential machine fault tolerancefail-safe realization under assumption that next-state functions are inany positive form; Halatsis, Constantinos; T-C v28 n2 Feb 79 167-172(lFII)

self-checking and fail-safe system unified design; Diaz, M.; T-C v28 n3Mar 79 276-281 (2A10)

Sequential m ; cf. Asynchronous sequential machines; Shiftregisters

Sequential machinesfinite input-memory and finite-output memory upper bounds;

Freeman, Martin; T-C v28 n3 Mar 79 249-253 (IF05)incompletely specified machines; state minimization; Dunworth, A.;T-C v28 n7 Jul 79 531-535 (IF03)


multivalued logic circuits realized using cellular arrays; Srini, Vason P.;T-C v28 n4 Apr 79 306-310 (IB10)

programming language for sequential machine studies; AUTOMATapplication-oriented language; Feldman, Michael B.; T-C v28 n8 Aug79 582-586 (lC12)

simplex coverability algorithm in C; application to stochasticsequential machines; Silio, Charles B., Jr.; T-C v28 n2 Feb 79 109-120

ternary model of bina gate networks; Brzozowski Janusz A.; T-C v28n3 Mar 79 178-184 (1A04)

Shift-register memoriesaccessing, random and sequential accessing processes; Morris, S.

Brent; T-C v28 n3 Mar 79 225-237 (ID09)magnetic bubble switches with memory for associative memory; Lee,

Share-Young; T-C v28 n9 Sep 79 621-636 (IC09)Shift regiter sequences

cryptography; decrypting stream cipher based on J-K flip-flops;Rubin, Frank; T-C v28 n7 Jul 79 483-487 (IBll)

Shift registersdecimation of trinomial sequences using toggle registers; Arvillias,

Alexis C.; T-C v28 n2 Feb 79 89-101 (1A03)Sigal analysis

frequency of complex signal represented by rotating vector; numericalevaluation; Frosini Graziano; T-C v28 n8 Aug 79 560-566 (IB04)

Signal processing; df. Image processing; Multidimensional -signalprocessing; Transforms

Signal processlngdistributed processing networks; routing in circuit-switched network;

Swartzlander, Earl E., Jr.; T-C v28 n8 Aug 79 567-572 (IBI 1)Software; cf. Computer softwareSorting; cf. MergingSoring

bitonic sort on mesh-connected parallel computer; Nassimi David; T-Cv28 ni Jan 79 2-7 (IA04)

monotone Boolean function synthesis using only operations fromincomplete set of primitives; size of required combinational circuitfor bilinear forms, routing problems, sorting, and merging; Lamagna,Edmund A.; T-C v28 nlO Oct 79 773-782 (IF07)

pipelined sorting nets for interconnecting multiple computers;Moravec, Hans P.; T-C v28 nJO Oct 79 795-798 (2A04)

Space-vehicle computersmemory fault tolerance, single error and erasure correction scheme;

Walker, William K. S.; T-C v28 n7 Jul 79 493-500 (IC07)Specal issues

data base machines; T-C v28 n6 Jun 79 381-458 (1A03)programmable logic arrays; special section of papers; T-C v28 n9 Sep

79 593-636 (IA03)Spline functions

interactive graphics using spline curves to interpolate fixed number ofpoints; Dube, K Peter; T-C v28 n4 Apr 79 286-290 (1A04)

Square rootingarrays for multiplication, division, squaring, and square rooting;

high-speed multifunction arrays; Agrawal, Dharma P.; T-C v28 n3Mar 79 215-224 (IC13)

Squaring; cd. MultiplicationStochstc automata

simplex coverability algorithm in E2; application to stochasticsequential machines; Silio, Charles B., Jr.; T-C v28 n2 Feb 79 109-120(1809)

Stochastic languagesinference of finite-state probabilistic grammars; Gaines, B. R.; T-C v28

ni Jan 79 62-64 (I E08)Storage; cd. MemoriesSwitching circuits; cd. Logic circuitsSwitching, communication; cf. Communication switchingSwitching functions; cd. Logic functionsSwitching systems; cd. Interconnection networksSystem reliability; cd. Fault tolerance

Fourier and Hadamard transformation matrices under specialconditions; Cheng, David K; T-C v28 n2 Feb 79 147-150 (lE05)

Treesbinary decision trees for realizing multioutput Boolean functions;

minimization of trees; Cerny, Eduard; T-C v28 n7 Jul 79 472-482(IA14)

combinational logic circuits; fault diagnosis in modular trees; Gray, F.Gail; T-C v28 n5 May 79 342-353 (1A12)

combinational tree switching network test set coverage; functionalform approach; Agarwal, Vinod K; T-C v28 ni Jan 79 50-52 (IDIO)

Huffman s algorithm for constructing optimal weighted trees; boundson root node weight and application to multiplexer design; Parker,D. Stott, Jr.; T-C v28 nS May 79 365-367 (IC07)

NAND arrays of NAND trees; deriving nearly optimal arrays; Curtis,H. Allen; T-C v28 n7 Jul 79 521-528 (1E07)

Trncation errors; cd. Finite word-length effectsTwo-dimensional; cf. Multidimensional

V

Virtual memories; cf. Paged memoriesVirtual memories

data base systems; DIRECT multiprocessor organization forsupporting relational DBMS; DeWitt, David J.; T-C v28 n6 Jun 79395406 (lB03)

W

Walsh transforms; cf. Hadamard transformsWalsh transforms

multidimensional DFT equivalent to one-dimensional Walshtransform; Kunz, Henry 0.; T-C v28 n3 Mar 79 267-268 (IG09)

Wiring; cf. Layout

X

X-ray imaging; cf. Tomography

T

Ternary loic; cd. Multivalued logicTesting; c. Fault diagnosisThrhld logic circuits

parallel counter implementation using four-valued threshold logic;Current, K Wayne; T-C v28 n3 Mar 79 200-204 (IB12)

Threshold logic funcdonsdualizing a regular switching function; Hammer, P. L.; T-C v28 n3 Mar

79 238-243 (IE08)

inner product computers; Blankenbaker, John V.; T-C v28 n12 Dec 79944 (lE12)

Transforms; cd. Fast Fourier transforms; Haar transforms; Hadamardtransforms; Number-theoretic transforms; Walsh transforms

TrandorMsdiscrete transforms, unified matrix treatment; Vlasenko, V.; T-C v28

n12 Dec 79 934-938 (IE02)two-parameter orthogonal transformation matrix which reduces to

Index IEEE Transactions on Computers C-28 · Breuer, Melvin A., see Abramovici, Miron; ......

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Transcript of Index IEEE Transactions on Computers C-28 · Breuer, Melvin A., see Abramovici, Miron; ......