Split-Phase Control: Achieving Complete

Soft-Charging Operation of a Dickson

Switched-Capacitor Converter

Yutian Lei1, Ryan May1,2 and Robert C.N. Pilawa-Podgurski1

1University of Illinois at Urbana-Champaign, 2Texas Instruments

lei10@illinois.edu

Abstract—Switched-capacitor (SC) converters are gaining pop-ularity due to their high power density and suitability for on-chipintegration. Soft-charging techniques can be used to eliminatethe current transient during the phase switching instances, andimprove the power density and efficiency of SC converters. In thispaper, we propose a split-phase control scheme that enables theDickson converter to achieve complete soft-charging operation,which is not possible using the conventional two-phase control.An analytical method is extended to understand and design split-phase controlled Dickson converters. The proposed technique andanalysis are verified by both simulation and experimental results.An 8-to-1 step-down Dickson converter is built to demonstratethe reduction in output impedance and improvement in efficiencyas a result of the split-phase controlled soft-charging operation.

I. INTRODUCTION

INDUCTORS and transformers are essential in conven-

tional switch-mode power converters. Due to the relatively

low energy density of the magnetic components, they often

dominate the size and cost of a converter. On the other

hand, switched-capacitor (SC) converters use only capaci-

tors to transfer energy and consequently can have higher

power density and greater suitability for on-chip integration

compared to magnetic-based converters. They also tend to

achieve a higher efficiency at large voltage conversion ratios

compared to their magnetic counterparts [1]. These advantages

make SC converters desirable for a broad range of appli-

cations, including voltage balancing [2], CMOS integrated

power conversion [3]–[5] and renewable energy harvesting [6].

However, SC converters also have some drawbacks, which

limit their performance in some applications [7]. Since the

capacitors are directly charged/discharged by other capacitors

or voltage sources, large transient current spikes can occur,

which reduce the efficiency of the converter. Moreover, these

transient effects increase the device stress and can cause

undesirable Electromagnetic Interference (EMI) problems. To

mitigate the current spikes, either large capacitors or higher

switching frequency has to be employed, neither of which is a

satisfactory solution. Interleaved designs [8]–[10] can reduce

the current spike at the output and input terminals, but do not

solve the fundamental efficiency concerns.

Merged two-stage converters can eliminate the current

transient using soft-charging operation, while improving the

efficiency at the same time [11], [12]. In this architecture, the

output capacitor of the SC converter stage is removed and a

second-stage buck converter is cascaded to the output of the

SC converter to act as a controlled current load. As a result,

the SC stage is allowed to operate with a larger capacitor

voltage ripple without adversely affecting the efficiency, which

improves the energy utilization of the capacitors. The second-

stage buck converter operates with a low voltage stress, en-

abling an increase in the switching frequency, thereby reducing

the magnetic component size. The soft-charging technique can

result in significant power density and efficiency improvements

[12]–[14]. A formal method was presented in [15] to aid in

the design of such soft-charging SC converters.

Among the various SC converter topologies, the Dickson

converter [3], [16], [17] has efficient utilization of switches

but poor utilization of capacitors [18], and thus would benefit

significantly from soft-charging operation. However, it has

been demonstrated that the Dickson SC converter cannot

achieve full soft-charging operation with conventional, two-

phase control [15]. In this paper, the operation of the Dickson

converter is examined and the reasons for its inability to

achieve soft-charging are analyzed. Moreover, it is shown

that full soft-charging operation is possible for the Dickson

converter, something that to date has not been demonstrated. A

technique to achieve full soft-charging operation is proposed,

by splitting the original two switching phases into four [19].

Existing analytical methods are expanded to help understand

and design split-phase Dickson converters. The proposed tech-

nique does not introduce any additional component to the

original soft-charging operation, and can be realized with a

small additional control effort. The proposed technique and

analysis are confirmed by simulation as well as experimental

measurements of a converter prototype.

II. SOFT-CHARGING DICKSON CONVERTER

A 4-to-1 step-down Dickson SC converter is shown in Fig. 1

and the two conventional switching phases are shown in Fig. 2.

It should be clarified that the phase in this paper refers to the

state of the switching circuit and should not be confused with

’multi-phase’, which is sometimes used to mean interleaved

designs [10]. For conventional (hard-charging) operation, the

output capacitance Co is large and the load acts as a voltage-

source load. Thus, a large transient current occurs during

the phase switching instances due to the capacitor voltages

mismatch. This is the characteristic of the slow switching limit

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 1U.S. Government work not protected by U.S. copyright

+−Vin

C2

C3

C1

Iload

S8 S7 S6 S5

S4 S1

S2S3

Vsc

Co

Fig. 1: 4-to-1 Dickson topology.

+−Vin Iload

C1

C3

C2

(a) Phase 1.

IloadC1

C3

C2

(b) Phase 2.

Fig. 2: Two-phase operation of a 4-to-1 Dickson converter.

(SSL) of SC converters [1]. The current through one of the

capacitors (C2) is shown in Fig. 3. It can be seen that there is a

large impulse current at phase transitions in the conventional,

hard-charging case (top plot). To minimize this impulse, large

capacitors or high switching frequency have to be employed

such that the converter operates in the fast switching limit

(FSL) [1]. In soft-charging operation, the output capacitance

is removed and a constant current load is used so that the

output voltage can change instantaneously to compensate for

the difference in capacitor voltages. By eliminating the voltage

mismatch and the resultant current impulse, the soft-charging

SC converter exhibit the same behavior as in FSL. Practical

implementations of the constant current load can be either a

magnetic converter [11] or an LC filter [18], [20], but for the

purpose of clear illustration, an ideal constant current load is

used in this section.

A. Conventional two-phase control

In addition to the current load, complete soft-charging op-

eration also requires that there is no voltage mismatch among

the parallel capacitor connections. For the two-phase control,

by applying KVL to the circuits in Fig. 2, the following

requirements can be found.

Start of Phase 1: Vin − VC3= VC2

− VC1(1)

Start of Phase 2: VC3− VC2

= VC1(2)

However, constraints (1) and (2) cannot be satisfied when

the Dickson converter is operated with a conventional, two-

phase control scheme. This can be seen from the following

simplified example. Let the capacitor voltages be VC3, VC2

and VC1respectively. At the start of Phase 1, we have⎡

⎢⎢⎣Vin

VC3

VC2

VC1

⎤⎥⎥⎦ =

⎡⎢⎢⎣4Vc

3Vc

2Vc

Vc

⎤⎥⎥⎦ , (3)

0 5 10 15 20

−25

0

25

Cur

rent

(A

)

Hard−charging

0 5 10 15 20

−25

0

25

Cur

rent

(A

)

Two−phase soft−charging

0 5 10 15 20−5

0

5

Time (μs)

Cur

rent

(A

)

Split−phase soft−charging

Fig. 3: Current waveform of capacitor C2 of the Dickson SC

converter. Simulation parameters: C1 = C2 = C3 = 10 μF,

fsw =100 kHz, Iload = 2 A.

where Vc is the smallest of the capacitor voltages. It can be

seen that (3) satisfies both (1) and (2). At the end of Phase

1, assuming equal capacitor values, the capacitor voltages

become ⎡⎣V ′

C3

V ′

C2

V ′

C1

⎤⎦ =

⎡⎣3Vc +ΔVc

2Vc −ΔVc

Vc +ΔVc

⎤⎦ , (4)

where ΔVc is the change in capacitor voltage due to charges

delivered to the load, and can be obtained by inspection or

KCL [18]. Testing constraint (2), we have

V ′

C3− V ′

C2= Vc + 2ΔVc �= V ′

C1. (5)

It should be noted that the preceding example only shows

a particular case chosen for simplicity, and a more rigorous

proof is presented in [15], which more rigorously analyzes why

the Dickson converter is unable to operate in soft-charging

mode with only two phases.. Due to the charge flow in each

phase, the voltages of the capacitors do not satisfy the KVL

for the next phase, and thus capacitor charge redistribution

loss is unavoidable, even with a current load at the output.

For the Dickson converter, this is due to the asymmetry in the

capacitor connection, particularly for the outer most (C3) and

inner most capacitor (C1). As can be seen in Fig. 2, these two

capacitors are in series with another capacitor in one phase

but not in the other phase. It can be shown that at the start of

Phase 1, VC2−VC1

is always greater than Vin−VC3. Similarly,

at the start of Phase 2, VC3−VC2

is always greater than VC1.

The resultant difference in capacitor voltages is present across

the switches during the phase transitions and creates large

transient current. Therefore, as can be seen in the middle plot

of Fig. 3, while the magnitude and width of the current impulse

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 2

+−Vin Iload

C1

C3

C2

(a) Phase 1a.

IloadC1

C3

C2

(b) Phase 2a.

Iload

C1

C2

(c) Phase 1b.

IloadC3

C2

(d) Phase 2b.

Fig. 4: Split-phase operation of a 4-to-1 Dickson converter.

TABLE I: The RMS, average and peak values of current of

capacitor C2 in a single half period. Simulation parameters

are as in Fig. 3.

Configuration RMS (A) Average (A) Peak (A)

Hard-charging 3.52 1.00 27.3Soft-charging two-phase 1.91 1.00 15.8Soft-charging split-phase 1.15 1.00 2.00

are reduced with two-phase soft-charging operation, there is

still significant transient effect and associated losses.

B. Split-phase control

To ensure that the capacitor network results in the same

voltage at the output node, we propose the split-phase control

of the Dickson converter, with two secondary phases intro-

duced [19], as shown in Fig. 4. Phase 1a and 2a are the same

as Phase 1 and 2 in the original operation, while the Phase

1b configuration is a subset of Phase 1 and the Phase 2b

configuration is a subset of Phase 2. The switching sequence

is Phase 1b → Phase 1a → Phase 2b → Phase 2a. In Phase 1b,

C2 discharges and C1 charges, and thus VC2− VC1

decreases

while Vin−VC3stays the same. The circuit will transition from

Phase 1b to Phase 1a when VC2− VC1

equals Vin − VC1, i.e.

when (1) is satisfied. Similarly, the circuit will transition from

Phase 2b to Phase 2a when (2) is satisfied. Therefore, with the

introduction of these ’buffer’ phases, KVL is satisfied during

phase transitions and current transient can be eliminated. The

effect can be seen in the bottom plot of Fig. 3, which shows

the simulated split-phase results. With the proposed split-phase

operation, the current waveform has no transient component

at all, and is a constant value in each phase. To quantify the

improvement in the power transfer, the RMS, average and

peak values of capacitor current for a half-period duration are

calculated and tabulated in Table I. It can be seen that both

the RMS values and peak values can be greatly reduced with

split-phase control. By eliminating the current transient, the

converter efficiency can be improved and the current stress of

the devices can be reduced.

The control signals for both the original two-phase and the

TABLE II: Control of switches.

Switches S8 S7 S6 S5 S4 S3 S2 S1

Two-phase q1 q2 q1 q2 q1 q2 q1 q2Split-phase q

3q2 q1 q

4q1 q2 q1 q2

t=0 TT

2

q1

q2

q3

q4

Fig. 5: Control diagrams.

proposed split-phase operations are shown in Table II and

Fig. 5. It can be seen that the proposed switching sequence

only delays the turn-on of two switches (S5 and S8). Thus,

generating the extra phases in the split-phase operation does

not increase the switching frequency of the switches, ensuring

no added switching loss. Practical implementation of the

control can be duty ratio based or hysteresis based. In addition,

even though the technique is illustrated with a 4-to-1 Dickson

converter with only three flying capacitors, the technique is

applicable to Dickson converters with larger conversion ratios

without introducing more secondary phases [19].

III. ANALYSIS

While the preceding section presents an intuitive under-

standing why the split-phase control enables full soft-charging

operation of the Dickson converter, it is beneficial to formulate

a general analysis. The analytical method presented in [15]

applies to an SC converter with two phases, but for the

proposed split-phase control, a total of four different circuit

states are present. Hence, the method in [15] is extended to a

higher number of phases and presented in this section.

Complete soft-charging is achieved if and only if the ideal

capacitor network satisfies KVL at all times, including during

phase transitions. The aim of the analysis is to find the set of

charge flow vectors such that KVL is satisfied during phase

transitions. The charge vectors need to satisfy KCL while the

charge vector and the voltage change vector are related by the

capacitor values.

For a general SC circuit, a voltage vector can be defined

for the circuit elements as

v =[vin vc

T vout]T

, (6)

where vc is a column vector of the capacitor voltages. In each

phase of Fig. 4, the circuit consists of a number of closed

loops, where a KVL equation can be written for each loop.

These KVL equations can be lumped into a matrix-vector

product form [21] as

Aivi = 0, (7)

where Ai is called the reduced loop matrix for the ith phase.

In this paper, the entries of the loop matrices are positive if

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 3

the circuit element is traversed from the negative terminal to

the positive terminal and vice versa. At the end of phase i, the

voltage vector becomes vi +Δvi, giving

Ai(vi +Δvi) = 0, (8)

where Δv represents the change in voltage due to charge

being delivered to the load. From (7) and (8), we have

AiΔvi = 0. (9)

Similarly, a charge flow vector is defined as the vector of

charge that flows into the positive terminal of each element in

the circuit and is given in the form of

q =[qin qc

T qout]T

. (10)

It should be noted that in some work, the charge vector is

normalized with respect the total charge delivered to the output

[1], but the unnormalized convention is used in this paper. In

each phase, KCL equations can be expressed by

Biqi = 0, (11)

where Bi represents the reduced incidence matrix [21]. More-

over, for a capacitor, the change in voltage and the charge flow

is related by

q = CΔvc , (12)

In addition, for periodic steady-state operation, there is also a

condition that the net charge that flows into a capacitor in a

period is zero: ∑phases

qi

c= 0. (13)

Combining the constraints given by equation (9) (11) (12)

and (13), the charge vectors (qi) required for soft-charging

operation can be obtained. A detailed derivation of the charge

flow vectors for the 4-phase Dickson converter in Fig. 4 is

provided in the appendix and only the result is given in

this section. Assuming equal flying capacitor values, the final

charge vectors are found to be

q1a

=

⎡⎢⎢⎣−2

2

−1

1

3

⎤⎥⎥⎦ , q

2a=

⎡⎢⎢⎣

0

−1

1

−2

3

⎤⎥⎥⎦ , q

1b=

⎡⎢⎢⎣

0

0

1

−1

1

⎤⎥⎥⎦ , q

2b=

⎡⎢⎢⎣

0

1

−1

0

1

⎤⎥⎥⎦ .

(14)

From the definition in (10), the last entries in the charge

vectors are the amount of charge delivered to the load.

Assuming a constant current load, the last entry of each of

the charge vector is thus equivalent to the relative duration of

each phase. Since the total charge delivered to the load in a

period is 8 units (3 + 3 + 1 + 1), we derive that for complete

soft-charging operation of the Dickson converter with equal

flying capacitance, the duty ratio of each phase is

T 1a =3

8, T 2a =

3

8, T 1b =

1

8, T 2b =

1

8. (15)

Another powerful result that can be obtained from the anal-

ysis is that soft-charging operation can be achieved regardless

of the order of the switching phases, since the preceding

derivation does not depend on the sequence of the phases. With

0 5 10 15 20−5

0

5

Cur

rent

(A

)

Split−phase sequence 1

0 5 10 15 20−5

0

5

Cur

rent

(A

)

Split−phase sequence 2

0 5 10 15 20−5

0

5

Time (μs)

Cur

rent

(A

)

Split−phase sequence 3

Fig. 6: Current waveform of capacitor C2 of the Dickson SC

converter. Simulation parameters are as in Fig. 3.

the proposed split-phase control, there are six total possible

sequences and 3 representative phases are shown below. While

sequence 1 is the same as found intuitively in Section II,

sequence 2 is the reverse of sequence 1; and in sequence 3, the

two original phases (Phase 1a and 2a) are adjacent instead of

being separated. The duration of each phase obeys that given

by (15).

Switching sequences:

1) Phase 1b → Phase 1a → Phase 2b → Phase 2a

2) Phase 2a → Phase 2b → Phase 1a → Phase 1b

3) Phase 1a → Phase 2a → Phase 1b → Phase 2b

Figure 6 shows simulated current waveforms for these switch-

ing sequences. It can be seen that all three of the switch-

ing sequences result in a non-impulse current, showing that

complete soft-charging operation is achieved. While all six

sequences are equivalent from the point of achieving soft-

charging operation, they have some different implications in

practical implementations, which will be discussed in Section

IV.

IV. SIMULATION AND EXPERIMENTAL RESULTS

To illustrate the benefit of the split-phase soft-charging

operation, the 4-to-1 step-down Dickson converter shown in

Fig. 1 is simulated using LTSpice with simulation parameters

given in Table III. Again, a constant current load at the output

is used for simplicity. In the hard-charging operation, the duty

ratio is fixed to 0.5 (as is convention) while the duty ratio of

the split-phase operation is found analytically as in Section

III.

The output referred impedance of a SC converter encapsu-

lates both the capacitor charge transfer loss and the conduction

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 4

TABLE III: Simulation parameters.

Vin 40 V

Iload 2 A

Rds,on 10 mΩRESR 1 mΩ

C1, C2, C3 10 μF

Co,hard−charging 100 μF

Co,soft−charging None

104

105

106

107

10−2

10−1

100

Frequency (Hz)

Out

put i

mpe

danc

e (Ω

)

Two phase, hard−chargingTwo phase, soft−chargingSplit phase, soft−charging

Fig. 7: Simulated output impedance of the Dickson converter.

loss of the converter and is widely used to characterize

the performance of such converters [22]–[24]. The output

impedance for the Dickson converter is plotted in Fig. 7.

It can be seen that the conventional hard-charging Dickson

converter shows two regions of asymptotic behaviors as found

in previous literature [1]. At low frequencies (SSL), when

the power loss due to the current transient dominates, the

impedance decreases as switching frequency increases. The

impedance reaches a constant at high frequencies (FSL), when

the conduction loss dominates. As can be seen in Fig. 7,

with two-phase soft-charging operation, the impedance in the

SSL region is reduced significantly. This means that the soft-

charging converter is able to use smaller flying capacitance

while having the same output impedance at the same switching

frequency. However, there is still non-negligible frequency

dependent behavior since complete soft-charing operation can-

not be achieved on a conventional Dickson converter. With

the proposed split-phase control however, it can be seen that

now the output impedance is independent of the switching

frequency, due to the complete elimination of the charge

transfer losses. It should be noted that the impedance at high

frequencies is slightly higher than the FSL impedance of the

conventional two-phase operation. This is due to the fact that

in the added phases (Phase 1b and Phase 2b), there is one path

fewer that delivers current to the load, and hence a slightly

increased effective switch resistance. However, this increase

in conduction loss will be less noticeable as the converter

conversion ratio increases.

A hardware prototype has been implemented for the pro-

posed split-phase controlled soft-charging Dickson SC con-

verter, with a voltage step-down ratio of 8 to 1. The prototype

Fig. 8: Hardware prototype of the proposed converter.

TABLE IV: Design specifications.

Vin 200 V DC

Iload 3 A

Vout 25 V DC

fsw 50-500 kHz

uses 12 GaN switches and 7 flying capacitors. A photo of the

prototype is shown in Fig. 8 while the design specification

and component listing are provided in Table IV and Table V

respectively. The same converter is used for hard-charging as

well as soft-charging operation. The difference is that in soft-

charging operation, there is an extra inductor added to act as

a current load. Since the same capacitor values are used for

both hard-charging and soft-charging operation, the prototype

focuses on the improvement in efficiency at low switching

frequencies. It is also possible to optimize the hardware design

for power density improvement, or both. Even though the

additional inductor incurs an approximately 20% increase in

the components volume of the power stage, the total enclosed

box volume of the power stage increases to a lesser extent.

The voltage Vsc (as seen in Fig. 1) as well as the switching

functions are shown in Fig. 9. The switching signals are

slightly different from what is used in simulation (Fig. 5). This

is because using the original sequence (1b → 1a → 2b → 2a)

results in negative Vds voltages across some of the switches,

and bidirectional blocking switches would have to be used.

Since it has been shown by the analysis in Section III, that

the switching sequence does not matter, the actual sequence

used in practice is sequence 2 in Section III (i.e. 2a → 2b

TABLE V: Component listing of the proposed converter.

Component Part number Parameters

S12, S5 - S1 EPC2014 40 V, 16 mΩ, 10 AS11 - S6 EPC2007 100 V, 30 mΩ, 6 A

C4 - C7 C1812X224K2RACTU 250 V,2.2 μFC2, C3 C3216X7S2A225K160AB 100 V, 2.2 μF

C1 C3225X7R1H225K250AB 50 V, 2.2 μFCo C3216X5R1V226M160AC 35 V, 22 μF

Inductor XAL5050-562 5.6 μH

Level-shifting ADUM5210Micro-controller STM32f051

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 5

Fig. 9: Output voltage (Vsc in Fig. 1) (upper) and switching

functions (lower).

→ 1a → 1b). This switching sequence results in no negative

Vds voltage and the converter operates without issues using

the GaN FETs.

The output impedance is plotted against the switching

frequency in Fig. 10, and is calculated from the measured

data using

Rout =Vin

N− Vout

Iout,

where N = 8 is the conversion ratio. It can be seen that

similar to the simulation results, the output impedance in hard-

charging operation increases as frequency decreases. Two-

phase soft-charging operation reduces the impedance at low

switching frequencies while the proposed split-phase operation

results in the lowest output impedance. For example, to achieve

the same output impedance as the split-phase operation at 100

kHz, the hard-charging converter has to switch at over 500

kHz. This means that the split-phase converter can reduce the

capacitor values by a factor of 5 if switching at 500 kHz.

Consequently, the reduced capacitor requirement more than

compensates for the additional volume of the added inductor.

In addition, the efficiencies of the converter in the SSL

region are plotted in Fig. 11. It can be seen that soft-charging

operation brings significant efficiency improvement while the

proposed split-phase control has the highest efficiency. The

split-phase soft-charging operation also has the smallest drop

in efficiency as the load increases, due to its smallest output

impedance. The hardware results also confirm that indeed the

split-phase control is effective for a Dickson converter with

high conversion ratios. It should be noted that both the output

impedance measurements and the efficiency measurements are

obtained using reduced input voltage and output current than

the rated values. This is to prevent the converter from breaking

because of the heat produced by the inefficient hard-charging

operation in the SSL region.

V. CONCLUSIONS

In this paper, we proposed a split-phase control method

that enables the Dickson SC converter to operate in soft-

charging mode. With complete soft-charging operation, the

proposed converter has no current transient and thus can

104

105

106

10−1

100

Frequency (Hz)

Out

put i

mpe

danc

e (Ω

)

Hard−chargingSoft−charging two−phaseSoft−charging split−phase

Fig. 10: Output impedance calculated from measured data.

0 0.5 1 1.5 280

85

90

95

100

Load current (A)

Effi

cien

cy (

%)

Hard−chargingSoft−charging, two−phaseSoft−charging, split−phase

Fig. 11: Measured efficiency of the Dickson converter in deep

SSL region. Vin = 40 V, fsw = 100 kHz.

achieve superior efficiency and/or power density compared to

conventional SC converters. The existing analysis is extended

to account for the split-phase and the desired duty ratio for

each phase is found. Besides supporting simulation results,

the proposed technique was experimentally verified with an

8-to-1 Dickson converter. The hardware prototype in soft-

charging operation has been shown to exhibit significantly

lower output impedance and higher efficiency in SSL region

than conventional SC converters.

APPENDIX

For the 4-to-1 Dickson converter in Fig. 4, The reducedloop matrices are

A1a =

[1 −1 0 0 −1

0 0 1 −1 −1

]A2a =

[0 1 −1 0 −1

0 0 0 1 −1

]A1b =

[0 0 1 −1 −1

]A2b =

[0 1 −1 0 −1

](16)

and the reduced incidence matrices are

B1a =

[0 1 0 1 −1

1 0 1 0 1

−1 −1 0 0 0

]B2a =

[0 1 1 0 0

0 1 0 1 1

1 0 0 0 0

]

B1b =

⎡⎢⎣0 0 1 1 0

0 0 0 1 1

1 0 0 0 0

0 1 0 0 0

⎤⎥⎦ B2b =

⎡⎢⎣0 1 1 0 0

0 0 1 0 1

1 0 0 0 0

0 0 0 1 0

⎤⎥⎦(17)

Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 6

In addition, since ΔVin is zero for constant voltage-source

input, another row of[1 0 0 0 0

]can be added to each

reduced loop matrix. Following this, the null space of each

matrix can be found and the basis of the capacitor voltage

change vectors that satisfy (9) and (16) are found to be

w1a

c=

⎡⎣0.12250.63250.7550

⎤⎦⎡⎣−0.6205

0.4472−0.1733

⎤⎦ w2a

c=

⎡⎣−0.2124−0.69680.4844

⎤⎦⎡⎣0.74490.33830.4066

⎤⎦

w1b

c=

⎡⎣100

⎤⎦⎡⎣010

⎤⎦⎡⎣001

⎤⎦ w2b

c=

⎡⎣100

⎤⎦⎡⎣010

⎤⎦⎡⎣001

⎤⎦ (18)

The basis for the possible charge vectors that satisfy (11) and

(17) are found to be

u1a

c=

⎡⎣−0.2443−0.61090.6109

⎤⎦⎡⎣ 0.5615−0.04320.0432

⎤⎦ u2a

c=

⎡⎣−0.4472

0.44720.7236

⎤⎦⎡⎣−0.4472

0.4472−0.2764

⎤⎦

u1b

c=

⎡⎣ 0−0.57740.5774

⎤⎦ u2b

c=

⎡⎣−0.5774

0.57740

⎤⎦ (19)

Each basis in (18) can be multiplied by the respective capacitor

values. The resulting basis can then be represented by

c ∗wi

c, (20)

where ∗ represents element-wise multiplication and c is given

by

c =

⎡⎣C3

C2

C1

⎤⎦ . (21)

To find the actual charge flow, the common space spanned by

(20) and (19) are then found to be

q1a

c=

⎡⎣ 0.3714−0.18570.1857

⎤⎦ q2a

c=

⎡⎣−0.2000

0.20000.4000

⎤⎦

q1b

c=

⎡⎣ 0−0.57740.5774

⎤⎦ q2b

c=

⎡⎣−0.5774

0.57740

⎤⎦ .

These are the basis for the charge vectors which satisfy KCL

and that results in a capacitor voltage change that satisfies

KVL. Finally, using the steady-state condition given in (13),

the overall charge flow vectors are found as in (14).

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