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August 2015
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 1 www.fairchildsemi.comFDMS8095AC Rev.1.0
FDMS8095ACDual N & P-Channel PowerTrench® MOSFETN-Channel: 150 V, 27 A, 30 mΩ P-Channel: -150 V, -2.2 A, 1200 mΩ
FeaturesQ1: N-Channel
Max rDS(on) = 30 mΩ at VGS = 10 V, ID = 6.2 AMax rDS(on) = 41 mΩ at VGS = 6 V, ID = 5.2 A
Q2: P-ChannelMax rDS(on) = 1200 mΩ at VGS = -10 V, ID = -1 AMax rDS(on) = 1400 mΩ at VGS = -6 V, ID = -0.9 AOptimised for active clamp forward converters
RoHS Compliant
General DescriptionThese dual N and P-Channel enhancement mode Power MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench® process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. Shrinking the area needed for implementation of active clamp topology; enabling best in class power density.
ApplicationsDC-DC Converter
Active Clamp
Power 56
Bottom Top
D1
D2
G2S2 S2 S2
G1S1 S1 S1 Pin 1
Pin 1
1
2
3
4
8
7
6
5
Contact to D1 (backside)
Q1 Q2
Contact to D2 (backside)
G1
S1
G2
S2
S1
S1
S2
S2
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Q1 Q2 UnitsVDS Drain to Source Voltage 150 -150 VVGS Gate to Source Voltage ±20 ±25 V
ID
Drain Current -Continuous TC = 25 °C (Note 5) 27 -2.2
ADrain Current -Continuous TC = 100 °C (Note 5) 17 -1.4
-Continuous TA = 25 °C 6.2 1a -1 1b
-Pulsed (Note 4) 143 -8.8EAS Single Pulse Avalanche Energy (Note 3) 216 6 mJ
PD
Power Dissipation for Single Operation TA = 25 °C 2.3 1a 2.3 1b
WPower Dissipation for Single Operation TA = 25 °C 0.9 1c 0.9 1d
Power Dissipation for Single Operation TC = 25 °C 50 12.5TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJA Thermal Resistance, Junction to Ambient 55 1a 55 1b
°C/WRθJA Thermal Resistance, Junction to Ambient 138 1c 138 1d
RθJC Thermal Resistance, Junction to Case 2.5 10
Device Marking Device Package Reel Size Tape Width QuantityFDMS8095AC FDMS8095AC Power 56 13” 12 mm 3000 units
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 2 www.fairchildsemi.comFDMS8095AC Rev.1.0
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Symbol Parameter Test Conditions Type Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 VID = -250 μA, VGS = 0 V
Q1Q2
150-150 V
ΔBVDSS ΔTJ
Breakdown Voltage TemperatureCoefficient
ID = 250 μA, referenced to 25 °CID = -250 μA, referenced to 25 °C
Q1Q2 103
122 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 VVDS = -120 V, VGS = 0 V
Q1Q2
1-1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 VVGS = ±25 V, VDS = 0 V
Q1Q2 ±100
±100nAnA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μAVGS = VDS, ID = -250 μA
Q1Q2
2.0-2.0
3.2-3.2
4.0-4.0 V
ΔVGS(th) ΔTJ
Gate to Source Threshold VoltageTemperature Coefficient
ID = 250 μA, referenced to 25 °CID = -250 μA, referenced to 25 °C
Q1Q2
-11-6 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 6.2 A VGS = 6 V, ID = 5.2 A VGS = 10 V, ID = 6.2 A, TJ = 125 °C
Q1253348
304158
mΩVGS = -10 V, ID = -1 A VGS = -6 V, ID = -0.9 A VGS = -10 V, ID = -1 A, TJ = 125 °C
Q2840940
1520
120014002171
gFS Forward Transconductance VDD = 10 V, ID = 6.2 AVDD = -10 V, ID = -1 A
Q1Q2
190.75 S
Ciss Input Capacitance Q1VDS = 75 V, VGS = 0 V, f = 1 MHZ
Q2VDS = -75 V, VGS = 0 V, f = 1 MHZ
Q1Q2 1441
1622020230 pF
Coss Output Capacitance Q1Q2
12713
18025 pF
Crss Reverse Transfer Capacitance Q1Q2
4.40.6
105 pF
Rg Gate Resistance Q1Q2
0.10.1
1.33.3
3.38.3 Ω
td(on) Turn-On Delay Time Q1VDD = 75 V, ID = 6.2 A, VGS = 10 V, RGEN = 6 ΩQ2VDD = -75 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω
Q1Q2 12
5.22211 ns
tr Rise Time Q1Q2 2.7
1.61010 ns
td(off) Turn-Off Delay Time Q1Q2 18
7.43315 ns
tf Fall Time Q1Q2 4
6.31013 ns
Qg(TOT) Total Gate Charge VGS = 0 V to 10 VVGS = 0 V to -10 V Q1
VDD = 75 V, ID = 6.2 A
Q1Q2
212.8
304 nC
Qg(TOT) Total Gate Charge VGS = 0 V to 6 VVGS = 0 V to -6 V
Q1Q2
131.8
192.6 nC
Qgs Gate to Source Charge Q2VDD = -75 VID = -1 A
Q1Q2 6.7
0.8 nC
Qgd Gate to Drain “Miller” Charge Q1Q2 3.9
0.7 nC
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 3 www.fairchildsemi.comFDMS8095AC Rev.1.0
Electrical Characteristics TJ = 25 °C unless otherwise noted
Drain-Source Diode Characteristics
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθCA is determined by the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Q1: EAS of 216 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 12 A, VDD = 150 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 28 A.
Q2: EAS of 6 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = -2 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.3 mH, IAS = -6.9 A.
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
Symbol Parameter Test Conditions Type Min Typ Max Units
VSD Source-Drain Diode Forward Voltage VGS = 0 V, IS = 6.2 A (Note 2)VGS = 0 V, IS = -1 A (Note 2)
Q1Q2 0.8
-0.91.3-1.3 V
trr Reverse Recovery Time Q1IF = 6.2 A, di/dt = 100 A/sQ2IF = -1 A, di/dt = 100 A/s
Q1Q2
6944
11171 ns
Qrr Reverse Recovery Charge Q1Q2 106
68170109 nC
a.55 °C/W when mounted on a 1 in2 pad of 2 oz copper
c. 138 °C/W when mounted on a minimum pad of 2 oz copper
b.55 °C/W when mounted on a 1 in2 pad of 2 oz copper
d. 138 °C/W when mounted on a minimum pad of 2 oz copper
G DF
DS
SF SS
G DF
DS
SFSS G D
FD
SSF SS
G DF
DS
SF SS
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 4 www.fairchildsemi.comFDMS8095AC Rev.1.0
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
Figure 1.
0 1 2 3 4 50
20
40
60
80
100
VGS = 7 V
VGS = 6 V
VGS = 8 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
VGS = 5.5 V
VGS = 10 V
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 20 40 60 80 1000.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
VGS = 8 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
ID, DRAIN CURRENT (A)
VGS = 7 V
VGS = 6 V
VGS = 10 V
VGS = 5.5 V
Normalized On-Resistance vs Drain Current and Gate Voltage
Figure 3. Normalized On Resistance
-75 -50 -25 0 25 50 75 100 125 1500.5
1.0
1.5
2.0
2.5
ID = 6.2 AVGS = 10 V
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
TJ, JUNCTION TEMPERATURE (oC)
vs Junction TemperatureFigure 4.
4 5 6 7 8 9 100
50
100
150
TJ = 125 oC
ID = 6.2 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
r DS(
on),
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E (m
Ω) PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs Gate to Source Voltage
Figure 5. Transfer Characteristics
2 3 4 5 6 7 80
20
40
60
80
100
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I D, D
RA
IN C
UR
REN
T (A
)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.0 0.2 0.4 0.6 0.8 1.0 1.20.001
0.01
0.1
1
10
100200
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
I S, R
EVER
SE D
RA
IN C
UR
REN
T (A
)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode Forward Voltage vs Source Current
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 5 www.fairchildsemi.comFDMS8095AC Rev.1.0
Figure 7.
0 5 10 15 20 250
2
4
6
8
10ID = 6.2 A
VDD = 100 V
VDD = 75 V
V GS,
GA
TE T
O S
OU
RC
E VO
LTA
GE
(V)
Qg, GATE CHARGE (nC)
VDD = 50 V
Gate Charge Characteristics Figure 8.
0.1 1 10 1001
10
100
1000
10000
f = 1 MHzVGS = 0 V
CA
PAC
ITA
NC
E (p
F)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
Capacitance vs Drain to Source Voltage
Figure 9.
0.001 0.01 0.1 1 10 1001
10
100
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
I AS,
AVA
LAN
CH
E C
UR
REN
T (A
)
Unclamped Inductive Switching Capability
Figure 10.
25 50 75 100 125 1500
6
12
18
24
30
VGS = 10 V
RθJC = 2.5 oC/W
VGS = 6 V
I D, D
RA
IN C
UR
REN
T (A
)
TC, CASE TEMPERATURE (oC)
Maximum Continuous Drain Current vs Case Temperature
Figure 11.
0.1 1 10 100 10000.01
0.1
1
10
100
300
10 μs
CURVE BENT TO MEASURED DATA
100 μs
10 ms
DC
1 ms
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS LIMITED BY rDS(on)
SINGLE PULSETJ = MAX RATEDRθJC = 2.5 oC/WTC = 25 oC
Forward Bias Safe Operating Area
Figure 12.
10-5 10-4 10-3 10-2 10-1 110
100
1000
1000020000
SINGLE PULSERθJC = 2.5 oC/WTC = 25 oC
P(PK
), PE
AK
TR
AN
SIEN
T PO
WER
(W)
t, PULSE WIDTH (sec)
Single Pulse Maximum Power Dissipation
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 6 www.fairchildsemi.comFDMS8095AC Rev.1.0
Figure 13.
10-5 10-4 10-3 10-2 10-1 10.001
0.01
0.1
12
SINGLE PULSE
DUTY CYCLE-DESCENDING ORDER
r(t),
NO
RM
ALI
ZED
EFF
ECTI
VE T
RA
NSI
ENT
THER
MA
L R
ESIS
TAN
CE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5 0.2 0.1 0.05 0.02 0.01
NOTES:ZθJC(t) = r(t) x RθJCRθJC = 2.5 oC/W
Duty Cycle, D = t1 / t2Peak TJ = PDM x ZθJC(t) + TC
PDM
t1t2
Junction-to-Case Transient Thermal Response Curve
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 7 www.fairchildsemi.comFDMS8095AC Rev.1.0
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
Figure 14. On- Region Characteristics Figure 15. Normalized on-Resistance vs Drain Current and Gate Voltage
Figure 16. Normalized On-Resistance vs Junction Temperature
Figure 17. On-Resistance vs Gate to Source Voltage
Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode Forward Voltage vs Source Current
0 1 2 3 4 50
1
2
3
4
VGS = -6 V
VGS = -7 V
VGS = -5.5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
VGS = -10 V
VGS = -5 V
-I D, D
RA
IN C
UR
REN
T (A
)
-VDS, DRAIN TO SOURCE VOLTAGE (V) 0 1 2 3 40.8
1.0
1.2
1.4
1.6
1.8
VGS = -5.5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
-ID, DRAIN CURRENT (A)
VGS = -7 VVGS = -6 V
VGS = -5 V
VGS = -10 V
-75 -50 -25 0 25 50 75 100 125 1500.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
ID = -1 AVGS = -10 V
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
TJ, JUNCTION TEMPERATURE (oC)4 5 6 7 8 9 10
1000
1500
2000
2500
3000
TJ = 125 oC
ID = -1 A
TJ = 25 oC
-VGS, GATE TO SOURCE VOLTAGE (V)
r DS(
on),
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E (m
Ω) PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
2 3 4 5 6 70
1
2
3
4
TJ = 150 oC
VDS = -5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
-I D, D
RA
IN C
UR
REN
T (A
)
-VGS, GATE TO SOURCE VOLTAGE (V)0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
5
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
-I S, R
EVER
SE D
RA
IN C
UR
REN
T (A
)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 8 www.fairchildsemi.comFDMS8095AC Rev.1.0
Typical Characteristics (Q2 P-Channel) TJ = 25°C unless otherwise noted
Figure 20. Gate Charge Characteristics Figure 21. Capacitance vs Drain to Source Voltage
Figure 22. Unclamped Inductive Switching Capability
Figure 23. Maximum Continuous Drain Current vs Case Temperature
Figure 24. Forward Bias Safe Operating Area
Figure 25. Single Pulse Maximum PowerDissipation
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.50
2
4
6
8
10ID = -1 A
VDD = -100 V
VDD = -75 V
-VG
S, G
ATE
TO
SO
UR
CE
VOLT
AG
E (V
)
Qg, GATE CHARGE (nC)
VDD = -50 V
0.1 1 10 1000.1
1
10
100
1000
f = 1 MHzVGS = 0 V
CA
PAC
ITA
NC
E (p
F)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
0.001 0.01 0.1 11
10
20
TJ = 125 oC
TJ = 25 oC
TJ = 100 oC
tAV, TIME IN AVALANCHE (ms)
-I AS,
AVA
LAN
CH
E C
UR
REN
T (A
)
25 50 75 100 125 1500.0
0.5
1.0
1.5
2.0
2.5
VGS = -6 V
RθJC = 10 oC/W
VGS = -10 V-I D
, DR
AIN
CU
RR
ENT
(A)
TC, CASE TEMPERATURE (oC)
1 10 100 6000.01
0.1
1
1020
CURVE BENT TO MEASURED DATA
100 μs
10 msDC
1 ms
-I D, D
RA
IN C
UR
REN
T (A
)
-VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS LIMITED BY rDS(on)
SINGLE PULSETJ = MAX RATEDRθJC = 10 oC/WTC = 25 oC
10-4 10-3 10-2 10-1 110
100
300
SINGLE PULSERθJC = 10 oC/WTC = 25 oC
P(PK
), PE
AK
TR
AN
SIEN
T PO
WER
(W)
t, PULSE WIDTH (sec)
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
Figure 26. Junction-to-Case Transient Thermal Response Curve
10-4 10-3 10-2 10-1 10.01
0.1
1
2
SINGLE PULSE
DUTY CYCLE-DESCENDING ORDER
r(t),
NO
RM
ALI
ZED
EFF
ECTI
VE T
RA
NSI
ENT
THER
MA
L R
ESIS
TAN
CE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5 0.2 0.1 0.05 0.02 0.01
NOTES:ZθJC(t) = r(t) x RθJCRθJC = 10 oC/W
Duty Cycle, D = t1 / t2Peak TJ = PDM x ZθJC(t) + TC
PDM
t1t2
FDM
S8095AC
Dual N
& P-C
hannel PowerTrench
® MO
SFET
©2015 Fairchild Semiconductor Corporation 9 www.fairchildsemi.comFDMS8095AC Rev.1.0
SIDE VIEW
NOTES:
A. DOES NOT FULLY CONFORM TO JEDEC
REGISTRATION, MO-229.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-MLP08Zrev1.
C
RECOMMENDED LAND PATTERN
0.08 C
SEATING
PLANE
0.10 C
0.80 MAX
(0.20)
0.05
0.00
TOP VIEW
A
B
0.10 C
0.10 C
2X
2X
PIN#1
IDENT
5.00
6.00
BOTTOM VIEW
0.10 C A B
0.05 C
1.27
(0.35)4X
1.80
1.70
(2)X
4.15
4.05
(2X)
0.55
0.45
8X
0.25
0.15
(4X)
(0.77) 6X
(3.04) 2X
(0.50)3X
12
3
4
8
7
6
5
PIN#1
IDENT
6.30
0.50
1.75(2X)
4.41 (2X)
0.65(8X)
1
567
8
432
0.55
0.45
(8X)
4.10 (2X)
0.67 (6X)
0.50 (2X)
0.60(8X)
1.27
0.635
1.1252X
2.26
1.15
0.635
8X
8X
2X
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