HP-AN1264-2_Fundamentals of Synchronization Planning

8/14/2019 HP-AN1264-2_Fundamentals of Synchronization Planning

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H

Application Note 1264-2

Synchronizing Te lecommunicat ions

Networks:

Synchronizing SDH/SONET

AccessNetwork

CellularBase

Station

M uxM ux

AccessNetwork

AccessNetwork

Residential

Moving

CorporateUsers


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Table of Conte nts

I. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

II. SDH and SONET Transmission Basics . . . . . . . . . . . . . . . . . . 5

SDH Multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5SONET Multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Pointe rs an d Point er Adjustmen ts . . . . . . . . . . . . . . . . . . . . . . . . . . 7Payload Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

III. Synchronization Performance and Sources of PointerAdjustme nts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Ideal Operation and Random Phase Movements . . . . . . . . . . . . . 10Stress ed Ope ration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Holdover Ope ration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

IV. Synchronization Effect of SDH/SONET on Payload DS3s . . 12Amount of Po inter Adjustmens in a Netw ork . . . . . . . . . . . . . . . . 12

Jitter Introd uced by SDH/SONET on Payload DS3s . . . . . . . . . . . 13Network Requirements to Support SDH/SONET withDS3 Traffic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

V. Synchronization Effect of SDH/SONET on Payload DS1sand E1s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Amount of DS1/E1 Pointer Adjustments in the Network . . . . . . 15Jitter Introduced by SDH/SONET on Payload DS1sand E1s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Wand er Intro duced by SDH/SONET on Payload DS1sand E1s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Suitability for Timing Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Private Network Customer DS1/E1 Service . . . . . . . . . . . . . . . . . 18Network Requirements to Support SDH/SONET with DS1 orE1 Tra ffic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

VI. Synchronization Planning and SDH . . . . . . . . . . . . . . . . . . . 19Referenc e Distribu tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19SSU Clocks Requiremen ts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19SDH Netwo rk Element Clock ing Requireme nts . . . . . . . . . . . . . . 20

VII. Synchronization Planning and SONET . . . . . . . . . . . . . . . . . 21Referenc e Distribu tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21BITS Clock s Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21SONET Network Element Clocking Requirements . . . . . . . . . . . 22

VIII. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Refe rence s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24


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I. Introductio n

Synchronous Digital Hierarchy (SDH) and Synchronous Digital Network (SONET) are new t ransmission systems that p rovide for stand ardized

high-spee d optical tran spo rt. The goal of SDH and SONET is to provideease o f network ing, intervendor comp atibility, standard ized interfaces,and stand ardized overhead for operations, administration, maintenance,and provisioning.

With the introduc tion of SDH and SONET, new dem ands ar e placed o nnetwork synchronization. The synchronization performance of mosttelecommunications networ ks require improvement to su pport SDH andSONET. For the first time, sho rt-term performance (timing stab ility fordurations up to 1,000 seconds ) becomes important. This necessitatesthe use of excellent clocks. Long-term performanc e also requiresscrutiny, as man y administrations begin to utilize mu ltiple PrimaryReference Source (PRS) clocks and sho rten synchron ization chains to

keep wand er to a minimum. All these actions are nec essary to maintainerror-free t ransmission of DS1, E1, and DS3 signals th at pa ss t hroughSDH and SONET.

Section II of this application not e provides the basic background onSDH and SONET necessa ry to under stand t he synchron ization issuespresente d by each system. Section III covers network synchro nizationperformance a nd its impact on SDH and SONET. The impact that SDHand SONET have on current Plesiochronous Digital Hierarchy (PDH)tran spor t is pres ente d in Sections IV and V. Section IV focuse s on theissues of DS3 transport t hrough SDH and SONET systems an d Section Vdescribes the impact on DS1 and E1 transport. The network synchron i-zation requirements to sup port an SDH networ k are considered inSection VI, while the need s for SONET are given in Section VII.

The basic synchronization principles of SDH and SONET are identical.Therefore, when descr ibing common attributes , this application notewill refer to bot h systems as SDH/SONET. There are , however, differ-ences in the architectu re and implementation of networks using eachsystem. When only one system is being referred to, it will be givenexplicitly by name.

Two additional Hewlett-Packard application notes provide backgroundinformation on networ k synchron ization. See reference items [1] and [2]on pa ge 24.


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II. SDH and SONET Transmiss ion Basics

This section presents th e basic transm ission conc epts of SDH andSONET which are necessa ry to understa nd their synchronization. Both

SDH and SONET synch rono usly multiplex their signals. This allowstwo ma jor advantages over curre nt asynchron ous systems: single-stepmultiplexing and c ross-connect a nd a dd-drop functionality.

In current as ynchronous s ystems, to obtain higher rate signals, thesystem must multiplex the signal at each level of the transmissionhierar chy. For example, DS1 signals are multiplexed into DS2, thenDS2 to DS3, then DS3 to pro prieta ry optical rate s. In SDH/SONET,multiplexing is done in one step , since the signal is synchrono us.

The second major advantage is cross-connect an d add-drop cap ability.In order to o btain a DS1 or E1 in current asynchr onous systems , theentire signal must be de-multiplexed. The optical rate must b e

de-multiplexed t o a DS3, the DS3 to a DS2, the DS2 to a DS1 or E1.You mus t obtain all DS1s or E1s in order to obta in a single one. InSDH/SONET the DS1 or E1 can be obtained directly withoutde-multiplexing the entire signal.

SDH Multiplexing

The 155.520 Mbps Synchron ous Transp ort Modu le - Level 1 (STM-1) isthe b asic rat e for SDH [3]. All lower ra te payloads, such a s DS1, E1, andDS3, are map ped into an STM-1 [4]. Higher ra te signals are o bta ined bymultiplexing N STM-1s into an STM-N. No additiona l overhead orpro cess ing is used t o create an STM-N from STM-1 signals. The STM-1

signal is comp osed of either three Administrat ive Unit Level 3 (AU-3)signals or one AU-4 signal.

Payloads may be mapped into SDH in several ways. See Figure 1 onpage 6. A DS1 or E1 signal is first map ped into a Virtual Conta iner(VC-11, VC-12, respectively). This VC co ntains the payload plus over-head informat ion. The VC-11 or VC-12 is then ma pped into a higher ra teVC, such as VC-3, which can also b e used to ca rry DS3 signals. TheVC-3 signal has ad ditional overh ead informat ion. The higher r ate VC isthen mapped into the AU-3 or AU-4 signal of which the STM-1 is com-prised.

SONET Multiplexing

SONET is similar to SDH, but it u ses d ifferen t building blocks for itstran spo rt [5]. The 51.84 Mbps Synchr ono us Tran spor t Signal - Level 1 isthe bas ic building block of SONET. Lower ra te payloads are map pedinto STS-1. Multiple STS blocks a re multiplexed to form an STS-N.

In SONET, DS1 payloads ar e first mapp ed into Virtual Tributa ries,called VT1.5 (Figure 2). The VTs are similar to th e SDH VC in that t heycontain the p ayload plus overhead information. The VT1.5s are the nmapped into the STS-1 SPE. DS3 payloads ar e mappe d directly into anSTS-1 SPE.


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Figure 2. SONETMultiplexing.

Figure 1. SDHMultiplexing.

VT1.5 SPE VT1.5

VT2

VT Group

VT3

VT6

VT2 SPE

VT3 SPE

VT6 SPE

STS-1 SPE STS-1

STS-N

STS-3c SPE STS-3c

x4

x3

x2

x1

x7

xN

xN/3

x1

x1

DS11544 kbit/s

E12048 kbit/s

DS1C3152 kbit/s

DS26312 kbit/s

DS344736 kbi t/s

E4139264 kbit/s

ATM149760 kbit/s

VC-11 VC-11

VC-12

VC-2 TU-2 TUG-2

VC-3 AU-3

AUGTUG-3TU-3VC-3 STM-N

VC-4 AU-4

TU-12

TU-11x4

x3

x1 x7

x7x1

x1

x1

x3

x3

x1

DS11544 kbit/s

E12048 kbit/s

DS26312 kbit/s

DS11544 kbit/s

E334368 kbit/ s

DS344736 kbit/ s

E4139264 kbit/s

ATM149760 kbit/s


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Pointers and Pointe r Adjustment s

Both SDH and SONET utilize payload po inters to carry the signal. Thepayload pointer gives the location of the beginning of the p ayload withinthe SDH/SONET structure.

Differences in phase and frequency between two SDH/SONET NEs(Network Elements) can be ha ndled by the use of payload pointers. If the sending SDH/SONET NE is faster than the receiving NE, the receiv-ing NE will introduc e a n egative pointer a djustment an d shift thepayload ahead b y one byte or 8 bits. See Figure 3 on page 8. In thismanner, the receiving NE can keep up with the send ing NE without lossof informa tion. Similarly, if the sending NE is slower than th e rece ivingNE a positive pointer adjustment of one byte is introduc ed. See Figure 4on page 9.

Payload Mapping

DS3 signals are mapped into SDH/SONET by using stuffing bits toaccount for the variations in timing between the DS3 and the SDH/ SONET system.

DS1 and E1 signals can be mapped using one of four methods [4, 5, 6]:Asynchronous mapping, Floating Byte Synchrono us mapping, LockedByte Synchronous mapping, and Bit Synchron ous ma pping.

In asynchronous mapping, the DS1 or E1 signal is mapped into the VT1.5or VC-12/13 asynchronously using stuff bits to accommodate timingdifferences. Pointe rs are use d to indicate the beginning of the VT/VCframe. With asynchronou s mapp ing, the DS1 or E1 signal is tra nsportedwithout slips and w ithout retiming of the signal. It will, however, besubject to pointer adjustments which occur du e to any frequencydifferences between SDH/SONET NE in the transmission pa th.

Floating byte synchrono us map ping differs from asynchro nous m appingin that it does not include stuff bits to acco mmodate timing differencesbetwee n the payload and the NE. This mapping allows direct access toDS0 signals. However, it requires that the DS1 or E1 be locked to theSDH/SONET NE. Any frequen cy differenc e between the inco mingpayload and the first SDH/SONET NE in the transport will cause slips.

Locked byte synchronou s mapping does not allow for any stuff bits orpointers in the mapping process. Therefore, the DS1 or E1 must belocked t o the SDH/SONET NE. A slip buffer must be pro vided toaccommod ate timing differences throughout the tr ansport.

Bit synchronous ma pping is the same as locke d byte synchronousmapping except that it does not a ssume that t he DS1 or E1 structure isorganized into DS0s. The DS1 or E1 is passed a s a single bit strea m withor without DS0 or DS1/E1 frames.

It is expec ted that the majority of networ ks will use asynchro nousmapping to trans port DS1 and E1 signals.


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Figure 3. AU-3 pointeradjustment ope ration negative justification.

H1 H1 H1 H2 H2 H2 H3 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3 H3

Start of VC-3 # 3

n - 1, n - 1, n - 1, n n n n + 1,n + 1,n + 1,n + 2

n - 1, n - 1, n - 1, n n n n + 1,n + 1,n + 1,n + 2

n - 1, n - 1 n - 1, n n n n + 1,n + 1,n + 1,n + 2

n - 1, n - 1 n - 1, n n n n + 1,n +1,n + 1,n + 1,n + 2

Pointer value (n )

Pointer value (D-bits inverted)

Negative justification byte for VC-3 # 3

Pointer value (n - 1 )

Frame 1

Frame 2

Frame 3

Frame 4

125 s

250 s

375 s

500 s

270AUG1 2 3 4 5 6 7 8 9 10

1

1

34

5

9

1

34

5

9

34

5

91

34

5

9

Indicates pointer operating on the VC-3 # 3


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Figure 4. AU-3 pointeradjustment ope ration positive justification.

H1 H1 H1 H2 H2 H2 H3 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3 H3

H1 H1 H1 H2 H2 H2 H3 H3 H3

Start of VC-3 # 3

n n n n + 1,n + 1,n + 1,n + 2

n n n n + 1,n + 1,n + 1,n + 2

n n n n + 1,n + 1 n + 1, n + 2

n n n n + 1,n + 1 n + 1,n + 2

Pointer value (n )

Pointer value (D-bits inverted)

Negative justification byte for VC-3 # 3

Pointer value (n + 1 )

Frame 1

Frame 2

Frame 3

Frame 4

125 s

250 s

375 s

500 s

270AUG1 2 3 4 5 6 7 8 9 10

1

1

34

5

9

1

34

5

9

34

5

91

34

5

9

Indicates pointer operating on the VC-3 # 3


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III. Synchronizatio n Performance and Source sof Pointe r Adjustment s

Pointer adjustment s occu r when the se nding SDH/SONET Network Elemen ts (NEs) t iming is differen t th an t he r eceiving SDH/SONET

NEs timing. The synchronization performanc e at any one e lement in anetwork is typically charact erized by three c omponen ts: the accuracy of the mas ter clock, the performance of the facilities distributing thereference, and the performance o f the receiver clocks obtaining areference over t he facilities [1]. The synchronization inaccura cy of themaster c lock usually contributes a sma ll portion of the timing inaccura-cies in a synchronization networ k [1]. Synchron ization performance isdominated by a combination of the facility and rece iver clock pe rfor-mance.

The receiver clock performance can be char acterized by its opera tion inthree s cenarios [7]:

Ideal Operation Stressed Operation Holdover Operation

Ideal operation describes the short-term behavior of the clock and isimportant to co ntrol pointer adjustment s in SDH and SONET networks .Stressed oper ation is the typical mode of opera tion of a receiver clock,where a receiver clock is expected to receive timing from a sourceclock over a facility that has short-term impairments. Finally, holdoveroperation char acterizes the clocks performance in the rare c ase whenall timing references to the clock are lost.

The major sources of pointer adjustments co rrelate with these modes of clock operation. Under ideal operation, the clock produces randomphase mo vements which greatly contributes to DS3 pointer adjust-ments. Stress operation of network clocks causes an accumulation of phase err ors in a network w hich can be a major cause of DS1 and E1pointer adjustments. Lastly, holdover operation will cause a ste adystream of DS3, E1, and DS1 periodic pointers.

Ideal Operation and Random Phase Movements

In ideal operation, the rec eiver clock exp eriences no interru ptions of the input timing reference. Even though this is not typical of realnetwork operation, understa nding a clocks performance un der idealoperation gives boun ds for the clocks performance. It also indicates

the shor t-term noise of a clock, which will impact the occ urrence of DS3 pointer adjustmen ts in SDH/SONET networks and t he res ultingSDH/SONET DS3 payload jitter.

Stressed Operation

This cate gory of operation reflects th e performanc e of a rec eiver clock under actual network conditions where short interruptions of thetiming reference can be expec ted. The number of interruptions canrange from 1 to 100 per day.


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All interrup tions will affect the receiver clock. During the interruption,the timing reference canno t be used. When reference is restored or if

the interruption persists and the clock switches references , there issome erro r regarding the actua l time difference b etween th e localreceiver clock and the new ly restored re ference. The timing error thatoccurs du e to each interruption depend s on the clock design, but itshould be less than 1 microseco nd [8, 9].

A timing error of 1 microsecond ca n caus e up to seven DS3 pointeradjustments. These seven pointer adjustments c an occur in a very shortperiod of time. The SDH/SONET NE is designed to handle this withoutintroducing errors on the payload DS3.

A single stre ss event will not affect DS1 or E1 transpo rt thr oughSDH/SONET, since 4.6 and 3.5 micros eco nds o f timing erro r are

required to cau se DS1 or E1 pointer adjustments, resp ectively.Unfortunately, the timing errors due to stres s will accumulate [1]. Thisaccumulation of timing errors is a major caus e of DS1 or E1 pointers.

Holdover Operation

A receiver clock will operate in holdover in the rare case th at it loses allits timing references for a significant period o f time. There are tw o maincontributors to ho ldover performance: initial frequency offset andfrequenc y drift. Initial frequenc y offset is cau sed by the sett ability of thelocal oscillator frequency and the noise on th e timing reference whenthe clock first enters holdover. Frequency drift occurs du e to aging of the quartz os cillators.

If the SDH/SONET NE is in holdover or locked to another clock that isin holdover, there will be a stead y accumulation of phase er rors. In thiscase, a steady stream of pointer adjustments w ill occur. The rate atwhich these po inter adjustments occu r will increase a s the frequency of the ho ldover clock drifts.


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IV. Synchronizatio n Effe ct of SDH/SONET onPayload DS3 s

SDH/SONET can affect DS3 transport, even though it is asynchron-ous [1]. This is due to the p ayload pointer adjustmen ts. A change in

payload pointer reflects a cha nge in the position of the p ayload by onebyte or 8 UI. (A UI, or unit interval, is the dura tion of time needed tosend a s ingle bit.) This is incompatible with curre nt DS3 systems sincethey are de signed to acc ept on ly 5 UI of jitter. Only 5 UI of sudd enphase movement a re allowed on t he input to DS3 equipment. If this5-UI specification is exceed ed, the DS3 equipment may no t be able toread the da ta input and will cause an e rror in transmission.

It is necessary for t he SDH and SONET equipment to slow dow n (filter)the phase movement cau sed by a pointer adjustment so that the receiv-ing DS3 equipment can acce pt the signal without error. However, if theSDH/SONET equipment slows d own th e phas e movement t oo much , itmay begin to overlap with the phase movement ca used by the next

pointer adjustment. Engineering an SDH/SONET network requires thatlimiting the occurr ence of pointer adjustmen ts be ba lanced againstrest ricting the SDH/SONET filtering requirements . The former placesdemands and expense on the network synchronization performance;the latter puts the d emands an d expens e on the SDH/SONETequipment.

As a gene ral tren d, ANSI has b een s pec ifying SONET inso far as it willwork in current netw orks with minimal changes. Therefore, it has beenplacing more dema nds on th e SONET equipment. ETSI and ITU, ingeneral, have taken a s lightly different appro ach an d placed fewersynchronization demand s on the SDH equipment and more on th enetwork.

Amount o f Pointer Adjustment s in a Net work

The number of pointer adjustments in the network can be understoodby considering operation in th e thr ee sce narios given in Section III:ideal, stress, and holdover operations.

Under ideal operation, all clocks in the synchronization net work e xhibitsome random phase movement. Simulations have been done based ontypical random ph ase movement mea sured in telecommunicationnetwork s. They have shown that pointer adjustment s on DS3 payloadscan occ ur every 20 to 100 seconds . The number o f DS3 pointer adjust-

ments is highly dependent on th e sho rt-term ( less than 1,000-second)timing stability in the netwo rk. In addition, it was found that th erecould be up to thre e pointer adjustments o ccurring simultaneou sly.


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A second major cause of timing inaccuracy is stressed o peration onnetwor k clocks and the resulting clock rearran gements. The timingerror c aused by a clock rear rangement is limited to 1 microsecond [8, 9].However, such a phase movement ca n cause up t o seven DS3 pointeradjustments. These seven pointer adjustments can occu r in a very shortperiod of time. The SDH/SONET NE must be ab le to spr ead th eseadjustments o ut so tha t the DS3 payload leaving the NE does no texperience mo re than 5 UI of jitter. The numbe r of such events ca nrange from 1 to 100 per day, depending on the netw ork arch itecture andfacility performance.

Clock ho ldover is a third cause of timing inaccuracies betwe en clocks.With a clock in holdover , the clock s timing will drift from the timing of the netwo rk. This will cause a steady stream of pointer adjustments tooccur on the pa yload. For SONET NEs, pointer adjustments may occur

every 34 millisecon ds wh en the NE is in holdover. For SDH NE, theyoccur every 320 milliseconds.

Jitter Introduced by SDH/SONET on Payload DS3s

In orde r to ma intain the 5-UI jitter r equiremen t on DS3 payloads, ANSIhas spe cified the amount of jitter that SONET introduces on t hepayload [10]. Table 1 gives the DS3 jitter requirement s of ANSI. Itshould be no ted that all entries in the table include jitter caus ed by DS3mapping.

Table 1. ANSI DS3 Jitter Requirements for SONET Interfaces

Mapping 0.4 UISingle Pointer 0.7 UITriple Pointer Bursts 1.3 UIPhase Transient 1.2 UIPeriodics 1.0 UIPeriodics + Single Pointer 1.3 UI

The jitter levels are given for each situation described in the pr evioussections. Mapping jitter, single pointer jitter, and t riple pointer b urstscover the ideal operation situation. The phase transient requirementcovers clock rearr angements. Finally, jitter during clock holdoveroperation is given by the periodics listing.


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Network Requirements to Support SDH/SONET with DS3Traffic

The netw ork requirements to support DS2 traffic th rough SDH/SONETare geared towa rds reduc ing the numb er of DS3 pointer adjustmen ts.The three major sources o f pointer adjustments are again considered.

To limit random pha se movements a nd the r esulting pointer adjust-ments, the short -term noise of the networ k synchronization clocks mustbe limited.

ANSI requires that th e ban d-limited short-term noise a t the output of any clock not exceed 100 nanosec onds [8]. In addition, the band-limited short-term noise from a BITS clock shou ld not ex ceed17 nanosec onds. This implies that the network ope rates at the Bellcore

stratum 3E [11] or ITU local clock performance levels and that s ynchro-nization chains in the network are limited.

Some administrations have actively pursue d reducing the numb er of clock rearr angements a nd th eir impact on SDH/SONET, although theseare not absolutely necessary for DS3 transport. To reduce their num-bers, synchronization chains are sho rtened, more pr imary referenceclocks are use d in the netw ork, and/or selected high-performance, low-error facilities are used in the synchronization networ k. To reduce theimpact of rearran gements, some ad ministrations ar e requiring clockswith better than 1 microsecond rearran gement [11], while ETSI and ITUare propos ing that netwo rk clocks have slower respo nding rearrange-ments, spreading out the seven pointers that may occur.

The impact of clock holdover is not an issue. Clocks rare ly enter intoholdover for periods of more than a few minutes, as long as diversereferences are supp lied [1]. The network only requires that stratum3 holdover (for SONET networks) and local clocks (for SDH networks)be used.


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V. Synchronizat ion Effe ct of SDH/SONET onPayload DS1s and E1s

The effect of SDH/SONET on pa yload DS1s and E1s is different th an itsimpact on DS3 signals. A pointer adjustment on a DS1 or E1 causes an

8 UI change of phase . This, like the DS3 case, is inconsistent with therequirement that DS1 and E1 equipment are designed to acc ept 5 UI of jitter . Therefor e, the SDH/SONET equipment must slow down (filter)the pointer adjustmen t. The difference in the DS1 and E1 case is thatDS1/E1 pointer adjustments do not o ccur often. Therefore, it is rela-tively easy to slow down one po inter adjustment without having itoverlap with the occurr ence of the next pointer adjustment.

An additional concern with DS1 and E1 payload through SDH/SONET isthe wander that can occur. The accumulation of pointer adjustmentevents over time will cause wand er on th e payload DS1/E1. This is not aconcern in the DS3 case, since DS3s are transmitted asynchronou sly.

Amount o f DS1/E1 Pointe r Adjustment s in the Network

As with t he DS3 pointer adjustment case, the number of DS1/E1 pointeradjustments is given by the three scenarios o f Section III: ideal, stress,and holdover operations.

Simulations, based on ran dom clock pha se movement of clocks in idealoperation, has shown tha t DS1 pointer adjustments are ex pected tooccur every 1,200 to 8,000 second s on the DS1 payload . This is soseldom that it is unlikely for two pointer adjustments to occu r at thesame time.

Since clock rearra ngements cause 1 microsecond o f phase error or less,it takes several such events to accumu late enough phase erro r for a DS1or E1 pointer adjustment . A DS1 pointer adjustment reflects 4.6 micro-second s of timing difference, whereas E1 pointer adjustments ar e3.5 microseconds. The num ber of DS1/E1 pointer adjustments c aused b ystress con ditions is dependent on the nu mber of clock rearrangementsin the network. This, in turn, is highly depend ent on networ k architec-ture, clock performance, and facility performance. The number of clock rearran gements can range from less than one pe r day to hundreds perday. Even in situations where the numbe r of rearrangements is large,DS1/E1 pointer adjustments will occur as discrete individual events.

In clock holdover, even the w orst net work clock ( stratum 3) will cause

only one pointer ad justment every 12 seconds for a DS1 payload an devery nine secon ds for E1s. An SDH or SONET netwo rk elemen t inholdover will cause a DS1 (E1) pointer adjustmen t every nine (seven)second s. These are seldom enough that the adjustments will againappear as discrete individual events.

It is important to note that ther e are no mechanisms in the network tha twill cause phas e movements large enough to require two s imultaneousDS1/E1 pointer adjustments. Under all network o peration cond itions(ideal, stress, and holdover), only single discrete DS1/E1 pointer adjust-ment occurs.


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Jitter Introduced by SDH/SONET on Payload DS1s and E1s

In orde r to maintain th e 5-UI jitter re quiremen t on DS3 payloads, ANSIhas spec ified the amoun t of jitter that SONET introdu ces on th e pay-load [12]. (See Table 2.) A port ion of the 5 UI jitter into DS1 and E 1equipment will be caused b y asynchronous DS3 transport in the ne t-work. ANSI allows 2.5 UI of jitter for the asynch rono us por tion of thetran spor t. The remaining 2.5 UI is alloca ted for SONET transp ort. InTable 2, both ideal and stress operations ar e covered by the singlepointer adjustment specification.

Table 2. ANSI DS1 Jitter Requirements for SONET Interfaces

Mapping 0.7 UI

Single positive pointer 0.6 UISingle negative pointer 0.6 UIHol dover posi ti ve poi nt er s 0.6 UIHol dover n egat ive poi nt er s 0.6 UI

Wander Int roduce d by SDH/SONET on Payload DS1 sand E1s

The major imp act o f SDH/SONET on DS1 and E 1 is wande r.G. Garner [13] has sho wn tha t in typical transport ne tworks, SDH/ SONET can add 90 microseconds of wander per da y onto the DS1/E1signal. Wander o f more than 18 microseconds can cause slips [1],although much DS1 and E1 equipment is designed to hand le up to

90 microseco nds of wand er before incu rring a slip. As a result, ITU [9]and EIA/TIA [14] require that wander on DS1 and E1 transport belimited to 18 microsecond s.

To keep w ithin this limit, ANSI has work ed on a wand er bud get for asingle DS1 line. This is given in Table 3. These wa nde r figures are forDS1s intende d for transport on ly. They are not intended to be app liedto DS1 lines used for timing transfer.

Table 3. ANSI Daily DS1 Transport Wander Budget

Network switches 3.7 MicrosecondsDS1 - DS3 mapping 0.3 MicrosecondsDS1 - VT1.5 mapping 2.6 MicrosecondsFiber 1.3 MicrosecondsSONET 10.1 Microseconds


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Networks that just meet current ANSI [8] and ITU [9] synchronizationperformance r equirements cannot achieve the 10.1-microsecond w ander

budget for DS1s transp orted b y SONET. One method to meet the 10.1-microsecond bu dget is to improve network synchronization perfor-mance. Garner [13] found that the 10.1-microsecond bud get can be metif the netw ork is operat ed with performance that is betwee n 10 and 100times bett er than is currently specified by ANSI and ITU. This wou ldrequire two major changes to a network. First, there would need to bebetter clock performanc e un der ideal oper ation, especially in the 100- to10,000-second ra nge. Second, much tighter boun ds on stressed o pera-tion performance are required.

Suitability for Timing Transfer

DS1 and E 1 payloads that are tr ansmitted by SDH/SONET are notsuitable for passing timing from one location to anoth er. There areseveral reasons for this. The first is because of the excessive wanderthat SDH/SONET introduces. Second, each pointer adjustment repre-sents a sud den phas e jump. For DS1 through SONET this phase jump is4.6 microsecon ds. For E1 through SDH, it is 3.5 microseco nds . Almostall stratum 2 and tra nsit level and most stratum 3 and local clocks willreject a timing signal that has such a phas e jump. Therefore, in mostcases, the network clock will reject the timing signal when it exp eri-ences a pointer adjustment.

As discusse d pre viously, DS1/E1 pointer adjustments can o ccur severaltimes per da y. Thus, if this signal is used for timing, the ne twork clock will reject its timing reference an d reference switch several times perday. This would add several microseconds of additional wander to theclock. Since ANSI and ITU require daily wander of less tha n 1 and10 microseco nds p er da y, respectively [8, 9], the ne twork is in jeopardyof not meeting the standards.

All timing tran sfer with SDH/SONET is done by deriving timing from t heoptical carrier (Figure 5). The optical carrier is synchronous and freefrom pointe r adjust ment s. A DS1 or E1 signal derived from th is will besynchronized to the upstrea m SDH/SONET network element. Thedisadvantage of such an ar rangement is that there ca n be additionalclocking elements in the synchron ization path.

Figure 5. Timingdistribution usingSDH lines.

SDH NESwitch

P

P

S

S

S SP

E1Traffic

STM-N STM-N

E1Traffic

P

TSG BITS

SDH NE

E1Clock

E1 Clockderived from

STM-N


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Private Ne twork Customer DS1/E1 Se rvice

As ca rriers introduc e SDH/SONET into their ne tworks, many privatenetwork services will be pr ovisioned as payload on SDH or SONETsystems. In these situations, all services for a p rivate ne twork locationmay be subjected to SDH/SONET pointer adjustmen ts and the as soci-ated jitter and wand er (Figure 6). Typically, the ca rriers SDH orSONET equipment will not be on the cus tomers premises a nd theprivate network operato r will not ha ve access t o the SDH/SONETtiming signal derived from the op tical carrier. The private network must rely on the SDH/SONET traffic signal for timing. This can causeproblems, since the SDH/SONET payload is not suitable for timingtransfer. This situation is currently under study in standard s bodies andaffected pr ivate netw ork ope rators a re hand led on a case-by-case ba sisby the service provider.

Network Requirements to Support SDH/SONET with DS1or E1 Traffic

The wand er introd uced by SDH/SONET onto payload DS1/E1 causes

the mos t stringent requirements to a netw ork sup porting SDH/SONETwith DS1/E1. Two key performance requirements need to be met: lownetwork wander in the 100- to 10,000-second range und er ideal opera -tion, and tight bounds on stress operation performance. The lownetwork w ander can be achieved by the use of stratum 3E or local levelclocks. Tightening the bound s of stress operation performance is muchmore difficult.

Network performan ce under stress co nditions is a function of facilityperformance, netwo rk clock performance, and synchro nization archi-tecture [1]. To limit stres s oper ation performance, clock chains shou ldbe ke pt sho rt, excellent facilities sh ould be used, and the BITS/SSUclock should have excellent rearra ngement MTIE specifications. Theactual requirements will differ with ea ch individual netw ork.

As a guideline for stresse d opera tion performance, consider a network with no more t han th ree t o four BITS/SSU clocks in a synchron izationchain from the primary reference source (PRS) clock. Assume that thenetwork uses e xcellent facilities with an average of two SES per dayperformance for its synchronization reference facilities. It wou ldrequire that the BITS/SSU clocks have a 100-nanosec ond rearran gementMTIE in ord er for it to support the DS1 wander budget for SONETtranspor t. If the facility performance could not be guarantee d or thesynchronization c hains we re longer, a better BITS/SSU clock wouldbe needed.

PBXPBXPBXSDH

NE

E1

Traffic

Private NetworkLocation

Netw ork ServingOffice

Figure 6. Privatenetwork serviceprovided by SDH.


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VI. Synchronizat ion Planning and SDH

The focus of synchro nization planning is the de termination of timingdistribution and the selection of clocks and facilities used to time the

networ k [2]. The distribution of timing and the se lection of clocks ar edifferent betwe en SDH and SONET networks . Therefore, this sectionwill consider the synchronization p lanning needs of SDH networks.SONET networks will be the topic of the next s ection.

Reference Distribution

ITU provides a synchr onization netw ork reference connec tion(Figure 7) as a guideline for synchron ization distribution [15]. In thechain, there should be no more than 10 transit or local nodes. Thesenodes refer to 10 offices th at utilize a transit or local level clock as theSSU. Between offices are c hains of SDH network element ( NE) clocks.No one chain of SDH NE clocks should exceed 20 in number. The totalnumber o f SDH NE clocks in the en tire reference conn ection should beless than 60. Each clock in the chain receives timing from the op ticalcarrier as shown in Figure 5 on page 17.

This reference conne ction was determined based on simulations of operation under ideal conditions. It should meet the needs for maintain-ing 5-UI jitter levels for DS3, DS1, and E1 transp ort. Practical measure -ments have not been don e to verify the simulations. It should be notedthat the wand er introduced on DS1 and E1 transport was no t consideredin this reference connection. The need to reduce wander levels bylimiting stress ope ration performance ma y require a cha nge to thereference conne ction as discussed in the previous section. Also,

reliability concerns ma y require the length of the chain to b e shorte ned.

SSU Clock Requirements

To meet the jitter requirements of DS3, DS1, and E1 transpo rt thro ughSDH, the SSU clock u sed t o time the office in an SDH network should beat the tr ansit or local level. The clock should have low intrinsic noiseand sh ould have a filter ban dwidth of no mo re tha n 0.1 Hz to filternetwor k noise. The clock is also required to have a rearrangementMTIE of 1,000 ns with a pha se slop e of less th an 5 108 for most of itsrearran gement period. This phase slope is considerably less than thephase slope requirements of SONET-based networ k clocks [8].

To limit E1 and DS1 wander, an SSU clock with co nsiderably betterrearran gement MTIE and increas ed filtering should be used. ITU hasnot yet developed guidelines for meeting DS1/E1 wande r nee ds.

N SDH networkelement clocks




1 st

K-1th

Kth

PRCG 811

Slave G 812transit

Slave G 812

Transit

SlaveG 812transit

or local

For w orst-case scenariocalculation purpose:

K = 10

N = 20 w ith restrictionthat total number of SDHnetwork element clocksis limited to 60 T1816920-92/d28

Figure 7. SDHsynchronizationnetwork referencechain.


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SDH Net work Element Clocking Requirements

The SDH network element (NE) clock is a p oorer performing clock than the ITU local level clock. It has a holdover requirement of 5 108 for initial frequency offset and 5 107 per d ay for frequency drift.Its clock rearran gement requirements ar e an MTIE of less than 1.0microseconds w ith a phase slope of less than 5 108 for most o f itsrearrangement period.

A major difference betw een th e SDH NE clock and the SSU clock isthe bandw idth of its design. The SDH NE clock has a band width of 1 to 10 Hz. It is limited to this range for two reas ons. First, the band-width must be at least 10 times the b andwidth of the SSU clock so t hatwander accumulation unde r ideal operating conditions is minimized.Second, the NE clock must su pport fast synchro nization

rearrangements.

When t he SDH NEs are co nfigured in a ring and a facility car ryingsynchronization is interrup ted (F igure 8a), the synchronization distribu-tion in the ring is reconfigured. The reconfigured distribution is shownin Figure 8b. The entire ring of 20 SDH NEs must re con figure itssynchronization distribution in about 15 seconds. This requires thateach NE must r econfigure its synchronization and have a stable outp utwithin about one secon d. The one-second s tability requirement limitshow s lowly the SDH NE can r eact, and hence, limits its filteringbandwidth.

SDHNE#2

SDHNE#1

SDHNE#20

SDHNE#19

SDHNE#3

SDHNE#4

Figure 8a. S DH ringwith normal timingflow counterclockwise.

SDHNE#2

SDHNE#1

SDHNE#20

SDHNE#19

SDHNE#3

SDHNE#4

Figure 8 b. SDH Ringwith facility failure timing flow clockwise.


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VII. Synchronizat ion Planning and S ONET

In this section, we consider the synchr onization planning needs of SONET networks. Synchronization planning involves the determina-

tion of timing reference distribution and the se lection of clocks andfacilities use d in the synchronization n etwork.

Reference Distribution

Synchronization distribution in SONET-based networks is differentfrom distribution in SDH network s. In SONET networks, there a re noSONET network elements (NEs) in the synchro nization chain [6, 8].The typical synchro nization plan is given in Figure 9. The length of thesynchr onization chain is not specified by ANSI. However , mostadministrations will keep the synchronization cha ins short, with cha inlengths o f 1 to 6 being typical.

This synchr onization n etwork configuration, in con junction with BITSand SONET NE clocks described in the following sections, shou ldsupport error-free transmission of DS3, DS1, and E1 payloads.

BITS Clocks Requirements

The BITS clock ne eds to meet several requirements if it is to s upportSONET transport. First, the band-limited sho rt-term noise sho uld notexceed 17 nanosec onds [8]. Second, the BITS clock must filter noisebelow 100 seconds, as is implied by the ANSI output noise require-ments. Third, to sup port DS1/E1 transpo rt, the BITS clock requires lowdaily wander , implying that the BITS clock h as ex cellent phase

buildout and low MTIE du ring rearrangement.

To meet these requirements, it is recomm ended th at the BITS clock beat the stratum 2 or 3E level and h ave exceptional rearra ngement MTIE.The stratum 3E clock is a new clock, introduced by Bellcore [11] tomeet the needs o f SONET networks. A stratum 3E clock is between astratum 2 and 3 in performance. It has the required noise filteringcapabilities, a rea rrangement MTIE of 100 ns, and the holdover capa bil-ity of an ITU local clock. This clock is curren tly not acc epted as astandard by ANSI. It does, however, provide a useful guideline for theminimum level of performance n eeded from a BITS clock.

Figure 9. TypicalSONET networksynchronization plan.

PRC

SONETNE

SONETNE

SONETNE

SONETNE

BITS BITS

DS1 DS1DS1 DS1

STS-3 STS-3


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SONET Netwo rk Element Clocking Requirements

The clock in a SONET network element (NE) differs from the SDH NEclock pr imarily in its noise filtering. The SONET NE clock has afiltering bandwidth of 0.1 Hz, as comp ared to th e 1 - 10 Hz bandw idthof the SDH NE clock. This is needed to filter the quicker phasetransients of the BITS clocks (as co mpared t o those of the SSU clock)and to filter netw ork noise.

The SONET NE does not have the s peed re striction of SDH. Thesynchronization re arrangement for a ring of 16 SONET NEs can occurover a 5-minute p eriod. Similar to the SDH NE clock, the SONET NEhas a ho ldover requirement o f 5 108 for initial frequency offset and5 107 per da y for frequency drift. The SONET NE also has a clock rearrangement requirement of less than 1.0 microseconds MTIE with aphase slope of less than 9 107 for the first 0.5 seconds and 3 107

thereafter. Note that this phase slope is more lenient than that forSDH NE clocks .


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VIII. Conclus ions

The introduction o f SDH and SONET presents greatly increase d de-mands on network synchronization. The synchronization performance

of most telecommunications networks requires improvement to supportSDH and SONET. Short-term wande r pe rformance is crucial, requiringthe use of excellent clocks. Stress operation performance also needs tobe greatly limited. This requires the shorten ing of synchronizationchains, necessitating the use of multiple primary reference clocks inmany networks and th e use of clocks with excellent rearrangementMTIE. All these ac tions are nec essary to maintain accept able transmis-sion error rates for DS1, E1, and DS3 signals that pa ss thr ough SDHand SONET.


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References

[1] Synchronizing Telecommunications Networks: Basic Concepts,Hewlett-Pack ard Application Note 1264-1.

[2] Synchronizing Telecommunications Networks: Fu ndament als of Synchron ization Plann ing, Hewlett-Packa rd Application Not e 1264-3.

[3] ITU-T Reco mmen dat ion G.707, Synchron ous Digital Hierarchy BitRates, March 1993.

[4] ITU-T Recommend ation G.709, Synchron ous Multiplexing Struc -ture, March 1993.

[5] A Comparison o f SONET (Synchron ous Opt ical NETwork) a ndSDH (Synch ron ous Digital Hierarchy) , ANSI T1X1.2/93-024R2.

[6] SONET Synchronization Plann ing Guidelines, Bellcore SpecialReport, SR-NWT-002224, Issue 1, February 1992.

[7] ITU COM XVIII D.1378, Stan dar d Clock Tes ting Methodology,1987.

[8] American National Standard for Telecommunications, Synchroniza-tion Interface Sta ndar ds for Digital Netwo rks, ANSI T1.101-1994.

[9] ITU-T Recomme nda tion G.823, The Cont rol of Jitte r an d WanderWithin Digital Network s Which Are Based On The 2048 kbit/s Hier-archy, March 1993.

[10] American National Standard for Telecommunications, Synchro-nous Optical Network (SONET) - Jitter at Network Interfaces, ANSIT1.105.03-1994.

[11] Clocks for the Synchronized Network: Common Generic Criteria,

Bellcore Technical Advisory, TA-NWT-001244, Issue 2, November 1992.[12] American National Standard for Telecommunications, Synchro-nous Optical Network (SONET) - Jitter at Network Interfaces DS1Supplement, ANSI T1X1.3/94-001R4.

[13] G. Garn er, Total Ph ase Accu mulation in a Network of VT Islandsfor Various Levels o f Clock No ise, Cont ribution to ANSI T1X1.3,Number 94-094, Septe mber , 1994.

[14] Electron ics Indus try Association, Private Digital Network Syn-chron ization , EIA/TIA-594.

[15] ITU-T Recomme nda tion G.803, Arch itectu res o f Transp ort Net -works Based On The Synchrono us Digital Hierarch y, March 1993.

[16] ITU-T Draft Reco mmen dat ion G.81s, Timing Chara cter istics of Slave Clocks Suitable for Operation of SDH Equipment.

H

For more information:Application Note 1264-1Application Note 1264-3

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