High Speed Devices Group RF Pulse Modulation and the Digitally Driven Class C Power Amplifier R....

16
High Speed Devices Group RF Pulse Modulation and the Digitally Driven Class C Power Amplifier R. Uang, J. Keyzer, A. Dalvi, Y. Sugiyama, M. Iwamoto, I. Galton and P. Asbeck, UCSD
  • date post

    22-Dec-2015
  • Category

    Documents

  • view

    216
  • download

    0

Transcript of High Speed Devices Group RF Pulse Modulation and the Digitally Driven Class C Power Amplifier R....

High Speed Devices Group

RF Pulse Modulation and the Digitally Driven Class C Power Amplifier

R. Uang, J. Keyzer, A. Dalvi, Y. Sugiyama,

M. Iwamoto, I. Galton and P. Asbeck, UCSD

High Speed Devices Group

Introduction

• Digital RF generation – DSP’s are approaching the microwave

regime:• Intel Pentium 4 ALU operates at 4 GHz.

– CMOS processes continue to be scaled in size, reducing power and increasing speed.

• We can use digital RF to improve modern wireless communication systems by:– Reducing power dissipation using high efficiency

power amplifiers.– Using DSP to generate signals such that system can

overcome limitations of PA alone.– Developing versatile “mostly-CMOS” transmitters with

programmable functionality.

High Speed Devices Group

Overview

• System Overview – RF Digital Pulsewidth Modulation

• The Digitally Driven Class C Power Amplifier

• Simulations and Experimental Results

• Conclusions

High Speed Devices Group

Future RF Transmitters

PresentMicrowaveTransmitter

DAC

DAC

xI

Q x+ Filter x Filter VGA PA

fofIF(sin)

DSP

fIF(cos)

FutureMicrowaveTransmitter

I

Q

fbb=fs/N

Analogfilter

Pulse

Modulator PA

fclk

DSPDigital

Upconverter

DSPx 8

High Speed Devices Group

Desired RF signal with AM and PM

RF pulse modulated waveform

RF pulse modulated waveform

Concept: Digital RF Pulse Modulation

t j t j

e e t A t RF

Re

High Speed Devices Group

Concept: Digital RF Pulse Modulation

t j t j

e e t A t RF

Ret

RF(t)

t

tA 1 13

3 4 6

(Pulse Position)

(Pulse Wdith)

High Speed Devices Group

Pulse Modulator Block Diagram

Modulator

in(t)

fclk

Digital pulse Position

Modulator

3 Bit Word

PulseGenerator

8 fclk

Ain(t)

Digital Pulse Width

Modulator

1.5 Bit Word

PhaseModulation

EnvelopeModulation

Modulator

fclk

8 fclk

RF Output

High Speed Devices Group

Simulations

• Single tone: spur level typically below - 55 dBc in desired band.

• Delta-Sigma modulator shapes quantization noise away from signal of interest.

CDMA: Linearity Test

Meets IS-95 ACPR Specs

CDMA (broad band view)

Single Tone

High Speed Devices Group

The Digitally Driven Class C Power Amplifier

t

Vin

RF Pulse Digital Input

• Replace modulated sinusoidal input with RF digital pulse modulated signal• Input is digital pulse train with varying

pulse width and position• ID assumes pulse shape

• Desired output is modulated sinusoid

Vout

t

Vdd

LoadGaAsFET

RFC

CL

Shunt LCResonator

ID

High Speed Devices Group

Digitally Driven Class C PA - Analysis

)V

V(

T

dd

min1)sinc( 1

min

I

VVR ddLopt

@

T

WIVP dddc max )sin(

)( minmax1 T

WVVIP dd

VD

ωt2π0 π

Vdd

Vmin

t

ID

W < T/2

T/2 T0

Imax

T/4

Po

wer

at

fun

da

men

tal

(W)

Efficiency and Output Power vs. Conduction Angle

0

10

20

30

40

50

60

70

80

90

100

04590135180225270315360Conduction Angle (Degrees)

Dra

in E

ffic

ien

cy (

%)

0

0.1

0.2

0.3

0.4

0.5

Class C

Traditional PA Pout Drain Efficiency

Drain Efficiency Pout Digitally Driven PA

High Speed Devices Group

Simulated PA Performance:

RL,opt

Rl,opt coincides with max voltage swing at output, max power at fundamental.

Pattern Rlopt ADS Rlopt Analysis

1’s 49Ω 41Ω

3’s 16Ω 13Ω

10 20 30 40 50 60 70 80 900 100

0.05

0.10

0.15

0.20

0.25

0.30

0.00

0.35

Rl

Pow

er

of

fun

dam

enta

l (W

)Power of fundamental vs. Load Resistance

Rlopt for 3’s

Rlopt for 1’s

3’s

1’s

• Peak efficiency does not occur at fixed Rl for varying pulse widths.

• Optimum load occurs before maximum drain efficiency is reached.

10 20 30 40 50 60 70 80 900 100

10

20

30

40

50

60

0

70

Rl

Dra

in E

ffici

ency

Drain Efficiency vs. Load Resistance

1’s

3’s

High Speed Devices Group

Experimental Test Setup

•Pattern generator outputs looping bit sequence•Serializer multiplexes to high data rate (3.2 Gbps), 900mV signal swing•Laser driver amplifies signal 2x to 2.5V max swing (adjustable)

MatlabGeneratedSequences

1 bit

3.2 Gbps

Conexant CX60061OC-192 Serializer

16 bits

200 Mbps

HP16522APattern

Generator

Synchronized200 MHz /3.2GHz Clocks

16:1

Conexant CX60077Laser Driver

Class C PAunder testing

AmplifiedOutput

High Speed Devices Group

Experimental Results: Pulse Train

• Measured efficiency for 3’s exceeds calculated value.

• Measured efficiency for 1’s is much less than expected.

0

20

40

60

80

100

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1Pout (Normalized)

Dra

in E

ffici

ency

Drain Efficiency vs. Output Powerfor ideal amplifierswith modulatedsignals

Switching Mode

Digitally Driven Class C

Class B

Class A

Pattern

Drain Efficiency

Calculated

Simulated

Measured

1’s 73% 55% 39%

3’s 59% 63% 74.5%

Prototype Class C PA

High Speed Devices Group

Experimental Results: CDMA

Linearity Results to Date

“CDMA” signal - OQPSK at 400MHz

Po = +17.1 dBm, 22% Drain Efficiency

IS-95 ACPR specificationsoverlaid in red

Input to PA Output

5dB/div30 kHz BW

5dB/div30 kHz BW

High Speed Devices Group

Conclusions

• A novel Digitally Driven Class C Power Amplifier has been demonstrated using a commercial power GaAsFET.

• This new variant of the Class C PA presents many unique challenges in its design and implementation.

• RF Digital Pulsewidth Modulation combined with the Digitally Driven Class C Power Amplifier may potentially provide a means for high efficiency, high linearity, easily reconfigured RF and microwave transmitters.

High Speed Devices Group

Simulated PA Performance:

RL,opt

Rl,opt coincides with max voltage swing at output, max power at fundamental.

Pattern Rlopt ADS Rlopt Analysis

1’s 49Ω 41Ω

3’s 16Ω 13Ω

10 20 30 40 50 60 70 80 900 100

0.05

0.10

0.15

0.20

0.25

0.30

0.00

0.35

Rl

Pow

er

of

fun

dam

enta

l (W

)Power of fundamental vs. Load Resistance

Rlopt for 3’s

Rlopt for 1’s

including package model3’s

1’s

10 20 30 40 50 60 70 80 900 100

10

20

30

40

50

60

0

70

Rl

Dra

in E

ffici

ency

Drain Efficiency vs. Load Resistance

1’s

3’sincluding package model

• Peak efficiency does not occur at fixed Rl for varying pulse widths.

• Optimum load occurs before maximum drain efficiency is reached.