High performance 110 nm InGaAs/InP DHBTs in dry-etched in-situ refractory y yemitter contact technology

Vibhor Jain Evan Lobisser Ashish Baraskar Brian J Thibeault Vibhor Jain, Evan Lobisser, Ashish Baraskar, Brian J Thibeault, Mark RodwellECE Department, University of California, Santa Barbara, CA 93106-9560

Zach Griffith, Miguel UrteagaTeledyne Scientific & Imaging, Thousand Oaks, CA 91360

Sebastian T BartschNanoelectronics Device Laboratory, EPFL, Switzerland

D Loubychev, A Snyder, Y Wu, J M Fastenau, W K LiuIQE Inc., 119 Technology Drive, Bethlehem, PA 18015

vibhor@ece.ucsb.edu, 805-893-3273

Outline

• HBT Scaling Laws• Fabrication• Fabrication

– Challenges– Process Development– Process Development

• DHBT Epitaxial Design• Results• Results

– DC & RF Measurements

• Summary• Summary

2

Bipolar transistor scaling laws

W

T d bl t ff f i f HBT t

We

Tb TcWbcRC

f tr 21

effcbeffbb CRff

,,max 8

To double cutoff frequencies of a mesa HBT, must:

(emitter length Le)Keep constant all resistances and currentsReduce all capacitances and transit delays by 2

Epitaxial scalingexitbnbb vTDT 22vT 2

Lateral scaling

satcc vT 2

cccb /TAC 2

cbmax /)( cbieeffc TVAvI

Oh i t teex AR /contact

WW

cbmax, )( cbieeffc

Ohmic contactscontacts

contactsheet 612 AL

WL

WRe

bc

e

ebb

3

InP Bipolar transistor scaling roadmap

Emitter256 128 64 32 Width (nm)

8 4 2 1 Access ρ (Ω µm2)8 4 2 1 Access ρ (Ω·µm2)

Base175 120 60 30 Contact width (nm)

2Desig

n

Base 10 5 2.5 1.25 Contact ρ (Ω·µm2)

Collector 106 75 53 37.5 Thickness (nm)

D

Current density 9 18 36 72 mA/µm2

Breakdown voltage 4 3.3 2.75 2-2.5 Vance

fτ 520 730 1000 1400 GHz

fmax 850 1300 2000 2800 GHzPerfo

rm

Evan Lobisser et al, IPRM 2009 4

Sub-200 nm HBT node: Fabrication Challenges - I

Emitter yield drops during base contact, subsequent lift-off steps

Fallen emitters

High stress in emitter metal stackP t l dh i t I G APoor metal adhesion to InGaAs

5

Need for low stress, high yield emitters

Sub-200 nm HBT node: Fabrication Challenges - II

Undercut in emitter semiconductorHelps in Self Aligned Base Liftoff

Slow etch planeInP Wet Etch

Fast etch plane

Narrow emitters need controlled semiconductor undercutThin semiconductor

To prevent short, base metal needs to be thinnedHigher base metal resistance

Solution: Undercut in the emitter metal to act as a shadow mask6

Composite Emitter Metal Stack

W emitter

TiW

WErik Lind

• W/Ti0.1W0.9 metal stack

Evan LobisserTiW emitter

• Low stress• Refractory metal emitters• Vertical dry etch profile

7

Junction Width via SEM, TEM

M1

BCB

M1

100 nm

TiW200 nm

110 nm

W

SiNx

BC100 nm emitter metal-semiconductor junction110 nm emitter-base junction 8

In-situ Emitter Contact

25

30

35

)

10

15

20

Res

ista

nce

(In-situ Mo contacts*

0

5

0 5 10 15 20 25 30Gap spacing ( m)

c ~ 1.1 .m2

• Highly doped n-InGaAs regrown on IQE InGaAs and in-situ Mo deposited • Active carriers ~ 5×1019 cm-3

Gap spacing (m)

• Active carriers ~ 5×1019 cm 3

• In-situ Mo deposition on n-InGaAs - c ~ 1.1 .m2 *• In-situ deposition repeatable contact resistivityp p y

* A. Baraskar et al., J. Vac. Sci. Tech. B, 27, 4, 2009

9

Process flowSiO2/Cr

Mo

emitter capn+ InGaAs

n InPTiWW

SiN (SW)

baseN- collector

sub collector

emitter n InP

emitter capemitter

MoW

emitter

Regrown InGaAs emitter cap

W/TiW/SiO2/Cr dep SiO2/Cr removal Second SiNxSidewall

Base Contact Lift-off

InP substrateemitterbase

emitterbase base base

emitter capIn-situ Mo dep

SF6/Ar etchSiNx Sidewall

InGaAs Wet Etch SidewallInP Wet Etch

Lift-off

W/TiW interface acts as shadow mask for base lift off W/TiW interface acts as shadow mask for base lift off Base and collector formed via lift off and wet etchBCB used to passivate and planarize devicesBCB used to passivate and planarize devices

10Self-aligned process flow for 110 nm DHBT

Epitaxial Design

T(nm) Material Doping (cm-3) Description10 In0.53Ga0.47As 51019 : Si Regrown Cap

10 In Ga As 5 1019 : Si Emitter Cap )

0.5

1

1.5

10 In0.53Ga0.47As 51019 : Si Emitter Cap

10 InP 41019 : Si Emitter10 InP 11018 : Si Emitter30 InP 81017 : Si Emitter

Ener

gy (e

V)

Emitter-1

-0.5

0

30 InP 810 : Si Emitter25 In0.53Ga0.47As 7-41019 : C Base7.5 In0.53Ga0.47 As 91016 : Si Setback15 InGaAs / InAlAs 91016 : Si B-C Grade

Collector

Base

-2.5

-2

-1.5

0 50 100 150 200

3 InP 5 1018 : Si Pulse doping74.5 InP 91016 : Si Collector7.5 InP 11019 : Si Sub Collector

Vbe = 1 V, Vcb = 0.7 V, Je = 0, 30 mA/m2

Distance (nm)

7.5 In0.53Ga0.47 As 21019 : Si Sub Collector300 InP 21019 : Si Sub Collector

Substrate SI : InP

Thin emitter semiconductor Enables wet etching

High collector dopingHigh collector doping High Kirk threshold

11

Results - DC Measurements

60 40 W/ 2 C itt I V

40

50

60

m2 )

50 mW/m240 mW/m2

Aje = 0.11m x 3.5m

I 0 2 mA@Peak ft,fmax

Common emitter I-V

20

30

J e (mA

/um

V 0 V

Ib,step

= 0.2 mAJe = 23.1 mA/m2

P = 41 mW/m2Peak ft,fmax

0

10

0 1 2 3

Vcb

= 0 V

Ib = 0.01 mA

10-2

Solid Line: Vcb

= 0 V

BVceo = 2.5 V @ Je = 1 kA/cm2

0 1 2 3V

ce (V)

10-6

10-4

I c (A)

Ic

Ib

3 04

cbDashed Line: V

cb = 0.7 V

BVceo 2.5 V @ Je 1 kA/cmβ = 18Base ρsheet = 730 Ω/, ρc < 4 Ω·µm2

10-8

I b,

nc = 1.41

nb

= 3.04

Collector ρsheet = 12 Ω/, ρc = 9 Ω·µm2 10-10

0 0.2 0.4 0.6 0.8 1V

be (V)

12Gummel plot

Results - RF Measurements using Off-Wafer LRRM

* Koolen et al IEEE BCTM 1991

DUT

Koolen et al., IEEE BCTM 1991

DUTShort

S GG S G

Open Standard Off Wafer LRRMOpen & Short Pad Cap Extraction

111 ))()(( openshortopenDUTtrans YYYYY 13

1-67 GHz RF Data and Extrapolated Cutoff Frequencies

40MAG/MSG Ic = 8.9 mA

30

dB) U

H

Vce = 1.74 VJe = 23.1 mA/m2

10

20

Gai

n (

A 0 11 3 5

H21 Vcb = 0.7 V

0

10 Aje

= 0.11m x 3.5m

ft = 400 GHz

fmax

= 660 GHz

0109 1010 1011 1012

freq (Hz)

Single-pole fit to obtain cut-off frequencies14

Parameter Extraction

500

7

8V

cb = 0 V

400

500

z) Vb

= 0 V

Vcb

= 0.7 V

5

6

Ccb

(fF)

Vcb

= 0.4 V200

300

f t (GH

z cb

3

4

0 5 10 15 20 25 30

Vcb

= 0.7 V

750

1000 5 10 15 20 25 30 35J

e (mA/m2)

Je (mA/m2)

600

750

GH

z)

Vcb

= 0.7 V

300

450

f max

(G Vcb

= 0 V Jkirk = 32 mA/m2 (@Vcb = 0.7V)Ccb/Ic = 0.43 psec/V

15

1500 5 10 15 20 25 30 35

Je (mA/m2)

Equivalent CircuitCcb x = 2.97 fFcb,x

Rcb = 31 kRex ≈ 3.6 m2

Ccb,i = 0.99 fF Rc = 2.2

R 126

Rbb = 40

BaseCol

Rbe = 126

Cje + Cdiff = 8.5 + 43.5 fF gme-j

Ccg = 3 fFS21/5

S12x5S21/5

S12x5Rex = 9.4 0.169e(-j0.15ps)

Emitter

S S

--- : Measured x : Simulated

S S

--- : Measured x : Simulated

S11 S22S11 S22 Hybrid- equivalent circuit from measured RF data

16

Microstrip Style TRL Calibration

Ref Plane for TRL

Ref Plane for TRL

w ~ 1 7 mA A’

t ~ 1 m

w 1.7 mA – A’

Metal 1Ref Plane set at device edgeNo further de-embedding required

h ~ 1 mBCBNo further de-embedding required

17Collector Metal

140-180GHz RF data

15

UIc = 9.1 mAV 1 75 V

10

dB)

UA

je = 0.11m x 3.5m Vce = 1.75 V

Je = 23.6 mA/m2

5Gai

n (

H21

Vcb = 0.7 V

0

fmax

= 660 GHzft = 465 GHz

01011 1012

freq (Hz)

-20dB/decade fit to obtain cut-off frequencies18

Conclusion

• Demonstrated smallest junction width for a III-V DHBT (110 nm)• Peak ft/fmax = 465/660 GHz

– Je = 23.6 mA/m2

– Power Density (P) = 41 mW/m2

• High current and power density operation (P > 50 mW/m2)

19

Thank YouThank You

Questions?

This work was supported by the DARPA THETA program under HR0011-09-C-0060 and DARPA TFAST under This work was supported by the DARPA THETA program under HR0011 09 C 0060 and DARPA TFAST under N66001-02-C-8080. A portion of this work was done in the UCSB nanofabrication facility, part of NSF funded NNIN network and MRL Central Facilities supported by the MRSEC Program of the NSF under award No. MR05-20415