HDMI Compliance Test Specification 1 · HDMI Compliance Test Specification Version 1.4a HDMI...

HDMI Licensing, LLC. Confidential

High-Definition Multimedia Interface

Compliance Test Specification

Version 1.4a

Hitachi, Ltd.

Panasonic Corporation

Philips Consumer Electronics, International B.V.

Silicon Image, Inc.

Sony Corporation

Technicolor, S.A.

Toshiba Corporation

CONFIDENTIAL

HDMI Compliance Test Specification Version 1.4a

HDMI Licensing, LLC. Confidential Page ii

Preface Notice THIS SPECIFICATION IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, NO WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE.

Hitachi, Ltd., Panasonic Corporation, Philips Consumer Electronics International B.V., Silicon Image, Inc., Sony Corporation, Technicolor, S.A., Toshiba Corporation and HDMI Licensing, LLC. disclaim all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification.

Copyright © 2001-2010 by Hitachi, Ltd., Panasonic Corporation, Philips Consumer Electronics International, B.V., Silicon Image, Inc., Sony Corporation, Technicolor, S.A., and Toshiba Corporation. All rights reserved. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Unauthorized use or duplication prohibited. “HDMI” and all associated logos are trademarks of HDMI Licensing, LLC. Third-party trademarks and servicemarks are property of their respective owners.


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Document Revision History

1.4a 2010/03/04 Addition of Test for 3D Video Format (7-38) Addition/Modification of Test of EDID for new fields (3D) (8-3) Addition of Test for 3D Video Format (8-29) Other editorials (7-37)

1.4 2009/11/09 Correction/Addition of Test Method (5-2) Clarification of the requirement of measurement of the current on +5V Power (5-3) Addition of Test of Inter-Pair Skew for Active cable (5-5) Clarification of Test for Active cable (5-8) Modification of Test Method (5-10) Modification of Test Method (5-11) Clarification of EDID content value for Converter cable (5-13) Addition of Test in power off state (7-3) Addition of Test on CEC pins on all output connectors (7-14, 8-13) Addition of Test on Vcec measurement on Repeater output without CEC connection (7-15, 8-14) Clarification of Test for Through Repeater (9-1)

Addition/Clarification of Test Equipments (4.2.1.1.4, 4.2.1.1.6, 4.2.1.1.7, 4.2.1.2, 4.2.1.3, 4.2.1.9, 4.2.1.17, 4.2.5.4) Clarification of Cable Assembly Test Points (5) Addition of Tests for type D (5-1, 5-2) Addition of Tests for type E (5-1, 5-2, 5-3, 5-4, 5-5, 5-10, 5-16) Addition of Test for Utility line impedance (5-15) Addition of plug and receptacle tests for type E (6.3) Addition of Source Test Points (7.3) Addition of Test for Quantization Range (7-23, 7-24) Addition of 60-64 VIC formats to the table (7-25, 7-26) Addition of Test for Content Type (7-27) Removal of Test for Quantization Range (7-27) Addition of Test for LFEPBL (7-31) Addition of Test for 3D Video Format (7-38) Addition of Test for 4K x 2K Video Format (7-39) Addition of Test for Extended Colorimetry Transmission (without xvYCC) (7-40) Addition/Modification of Test of EDID for new fields (3D, 4K x 2K, etc) (8-3) Addition of Sink Test Points (8.3) Addition of Test for type E (8-7) Correction for the range of VIC (8-20) Addition of Test for High Bitrate Audio (8-27) Addition of Test for One Bit Audio (8-28) Addition of Test for 3D Video Format (8-29) Addition of Test for 4K x 2K Video Format (8-30) Addition of Test for AVI InfoFrame supporting Extended Colorimetry, Content Type and Selectable YCC Quantization Range (8-31)

1.3c 2008/07/25 Addition of TMDS Signal Generator (4.2.1.9) Addition of overmold value for Type C connector(5-1)


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Addition of test for Active cable and Converter cable(5-2, through 5-8) Removed Active Cable Test (5-9) Addition of New Cable Test (5-10, 5-11, 5-12, 5-13 and 5-14) Correction of Test for CEC root Repeater (7-14, 8-13, 9-5) Editorial correction (7-3, 8-9, 8-24, Table7-1, Table7-2) Clarification of Test Signal (7.4.1) Addition of test for Type 2 cable emulator (8-7) Clarification of Non-HDMI I/O (9.2.4) Modification of Repeater Mini-CDF for Source/Sink function (Appendix 3) Addition of CDF fields for Cable (Appendix 3)

1.3b1 2007/08/01 Added Efficere fixtures for Type C connector

1.3b 2007/03/16 Modifications to TE overview and policy description (4.1) Addition of Agilent TDR to Recommended TE (4.2.1.11) Clarification of tentative cable emulators (4.2.1.17) Jitter tolerance test changes (8-7) Added cable tests for TMDS_CLOCK channel (5-3) New VL triggering (7-2) Editorial and clarifications on CEC Line Degradation (7-15, 8-14) Added testing of additional source-supported Deep Color formats (7-34) Additional HDMI VSDB EDID checks (8-3) Additional TTC usage (5-3, 8-5, 8-6, 8-7) Incorporated Tek-recommended setup and calibration for TDR (8-8) Clarification on Sink Deep Color Recommended Test Method (8-25) Added long cable or cable emulator use for Repeater test (9-3) Added color-depths for each format in Source_Video_Formats (App. 3) Removed test for filler bytes (8-3) Removed Tektronix part number of cable emulator EFF-HDMI-CE-01

1.3a 2006/11/10 Clarified pixel clock vs. TMDS clock (throughout). Added new test equipment and test fixtures from Agilent and Tektronix for high-speed testing (throughout) Added Reference Cable Equalizer to eye analysis equipment and tests. Added tests and test equipment capabilities for 1.3 features (Deep Color, cable categories, xvYCC, HBRA, Type C connector) Added testing of 1080p 50Hz/60Hz in various tests. Added Transition Time Control (TTC) equipment and usage (5-3, 8-7) Allowed use of any sufficient multi-meter, I2C analyzer and power supply. Added preliminary cable phase measurements for passive-equalized cables per HDMI 1.3a (5-7) Relaxed impedance requirements with 250ps excursion window as specified in HDMI 1.3a (5-8, 8-8) Added preliminary active cable test (5-9) Modified VL limits, per HDMI 1.3 and 1.3a (7-2) Removed max rise/fall time limit, per HDMI 1.3a (7-4) Removed Source Overshoot/Undershoot test (7-5) Added 20-bit trigger sequence for Inter-Pair skew check (7-6) Removed erroneous check of CLOCK in Inter-Pair skew check (7-7) Set jitter measurement window at 0V (7-9) Clarified which frequencies to test for jitter and eye (7-9, 7-10, 8-7). Changed CEC capacitance limits, per HDMI 1.3a (7-13, 8-9) Added check for new AVI InfoFrame fields (7-27) Added optional testing of jitter injected onto TMDS_DATA (8-7)


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Perform HPD voltage in both standby and off (8-10) Eliminated VGA Established Timings check (8-20) Degraded input signal used for Repeater output test (9-1) Added check of Physical Address-related CDF fields (9-5) Added HDCP testing requirements (section 1).

1.2a 2005/12/15 Incorporation of Quantum Data 882 for CEC and EDID tests (sects. 4.2.1.1.9, 4.2.3.1, 4.2.3.2, Appendix 1) Add note regarding discontinued test equipment (sect.4.1.1) Added General Oscilloscope (4.2.3.4) New policy – submit all longer cable length (sect. 5 first paragraph) Clarified extent of overmold restriction (5-1) Restricted cable power consumption to 5mA (5-3) Clarified use of Tektronix TDR (5-8, 8-8) Clarified policy – all connectors must be tested and results submitted (sect. 6 intro) Addressed capacitance measurement issues with TE and configuration change (7-13, 8-9) Replaced IOFF test with VOFF test (7-3) Adjusted HPD voltages per HDMI Spec (7-12) Verify legal usage of “independent CEC” function (7-14, 8-13) Adjusted CEC resistance allowance per HDMI Spec (7-14, 8-13) Adjusted CEC degradation check (7-15, 8-14) Removed Type A-related test (7-20) Verify compliance with audio-must-output rule (7-28) Changed audio/video format combinations to test (7-30) Added max differential test and adjusted max VICM (8-5) Added new video formats (7-25, 7-26, 8-17) Removed DTD requirement per HDMI Spec (8-17) Clarified variety of TE specs (4.2.1.5, 4.2.1.9, 4.2.1.11, 4.2.1.16, 4.2.3.3, Clarified test methods and configurations (7-1, 7-3, 7-5, 7-6, 7-7, 7-11, 7-13…18, 7-23…33, 8-1…3, 8-5, 8-7, 8-9, 8-14, 8-16…23, 9-1…9-5) Numerous clarifications in CDF fields (Appendix 3)

1.1 2004/06/04 Clarified Multi-meter vs. Voltage meter usage (throughout). Changed to SMA version of differential probe (sect. 4.2.1.5, 7-5, 7-10). Clarified test conditions and procedures (5-3, 7-10, 7-23, 7-24, 7-25, 7-27, 7-29, 7-31, 8-7, 8-15, 8-17). Added testing of Type B connectors (5-1). Clarified testing of active, unidirectional cables (5-2). Clarified use of serial pattern trigger (7-6). Changed limits of +5V Power Signal [per HDMI 1.1 change] (7-11). Changed test conditions for DDC/CEC capacitance (7-13, 8-9). Simplified/clarified testing of CEC connectivity (7-14, 8-13). Added test conditions for CEC degradation (7-15, 8-14). Added tests for additional CTLx restrictions (7-17). Added tests for new HDMI 1.1 packets (7-19). Modified test requirements and methods for AVI check (7-27). Added check for channel status indication of Fs (7-28). Added check for extended HDMI VSDB handling (7-33). Verify HDMI VSDB extension fields [new in HDMI 1.1] (8-3). Clarified initialization procedure and failure conditions (8-7). Changed limits of HPD voltage and test conditions [per HDMI 1.1 change] (8-10).


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Clarified testing of HPD for non-ordinary circumstances (8-11). Add testing for new Supports_AI capability [HDMI 1.1] (8-16). Clarified EDID use and test of 640x480p format (8-20). Swapped tests to correct positions (9-2, 9-4). Updated ATC test equipment lists for new and evaluation TE (App. 1). Updated CDF with new fields for HDMI 1.1 and new tests (App. 3) Many editorial changes throughout.

1.0a 2003/07/22 Fix table in Test 7-22

1.0 2003/07/18 1.0 Release

0.9 2003/06/26 0.9 Release


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Table of Contents PREFACE .................................................................................................................................................... II

NOTICE........................................................................................................................................................ II DOCUMENT REVISION HISTORY ................................................................................................................. III

1 INTRODUCTION ................................................................................................................................ 1 1.1 PURPOSE AND SCOPE....................................................................................................................... 1 1.2 NORMATIVE REFERENCES ............................................................................................................... 1 1.3 ORGANIZATION OF THIS DOCUMENT................................................................................................ 1

2 DEFINITIONS...................................................................................................................................... 3 2.1 CONFORMANCE LEVELS .................................................................................................................. 3 2.2 USAGES AND CONVENTIONS ........................................................................................................... 3 2.3 GLOSSARY OF TERMS...................................................................................................................... 4 2.4 ACRONYMS AND ABBREVIATIONS................................................................................................... 5

3 OVERVIEW ......................................................................................................................................... 6

4 TEST EQUIPMENT ............................................................................................................................ 7 4.1 TEST EQUIPMENT OVERVIEW AND POLICY...................................................................................... 7 4.2 TEST EQUIPMENT REQUIREMENTS .................................................................................................. 7

5 TESTS – CABLE ASSEMBLY ......................................................................................................... 39 5.1 CABLE – MECHANICAL.................................................................................................................. 41 5.2 CABLE – ELECTRICAL: PERFORMANCE TESTS ............................................................................... 42 5.3 CABLE – ELECTRICAL: PARAMETRIC TESTS .................................................................................. 58 5.4 CABLE – ADDITIONAL ELECTRICAL PERFORMANCE TESTS .......................................................... 73

6 TESTS – PLUG AND RECEPTACLE............................................................................................. 83 6.1 MECHANICAL TESTS ..................................................................................................................... 83 6.2 CONNECTOR – ANSI 364 TESTS.................................................................................................... 85 6.3 CONNECTOR – SAE/USCAR-2 AND ANSI 364 TESTS .................................................................. 89

7 TESTS – SOURCE............................................................................................................................. 93 7.1 SOURCE PRODUCTS OVERVIEW..................................................................................................... 93 7.2 SOURCE – EDID / E-DDC / HPD .................................................................................................. 94 7.3 SOURCE – ELECTRICAL.................................................................................................................. 97 7.4 SOURCE – PROTOCOL .................................................................................................................. 143 7.5 SOURCE – VIDEO ......................................................................................................................... 152 7.6 SOURCE – AUDIO......................................................................................................................... 169


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7.7 SOURCE – INTEROPERABILITY WITH DVI ................................................................................... 181 7.8 SOURCE – ADVANCED FEATURES................................................................................................ 183

8 TESTS – SINK.................................................................................................................................. 207 8.1 SINK PRODUCTS OVERVIEW ........................................................................................................ 207 8.2 SINK – EDID / E-DDC ................................................................................................................ 208 8.3 SINK – ELECTRICAL..................................................................................................................... 220 8.4 SINK – PROTOCOL ....................................................................................................................... 258 8.5 SINK – VIDEO .............................................................................................................................. 261 8.6 SINK – AUDIO.............................................................................................................................. 269 8.7 SINK – INTEROPERABILITY WITH DVI ........................................................................................ 273 8.8 SINK – ADVANCED FEATURES..................................................................................................... 274

9 TESTS – REPEATER...................................................................................................................... 285 9.1 REPEATER PRODUCTS OVERVIEW ............................................................................................... 285 9.2 INTERNAL FUNCTIONAL BLOCK CATEGORIZATION ..................................................................... 285 9.3 TESTS OF OUTPUT PORTS ............................................................................................................ 288 9.4 TESTS OF INPUT PORTS................................................................................................................ 290 9.5 TESTS FOR PHYSICAL ADDRESS HANDLING ................................................................................ 292

10 TESTS – HDCP ............................................................................................................................ 294 10.1 OVERVIEW .................................................................................................................................. 294 10.2 TEST METHOD ............................................................................................................................. 294

APPENDIX 1 – AUTHORIZED TESTING CENTER – TEST EQUIPMENT LIST ....................... 295 STANDARD ATC CONFIGURATIONS: ....................................................................................................... 295 HIGH-SPEED CONFIGURATIONS:.............................................................................................................. 299

APPENDIX 2 – SOFTWARE CRU TECHNOLOGY .......................................................................... 303

APPENDIX 3 – CAPABILITIES DECLARATION FORM (CDF) .................................................... 308 SOURCE/SINK/REPEATER CHARACTERISTICS .......................................................................................... 308 SOURCE CHARACTERISTICS..................................................................................................................... 309 SINK CHARACTERISTICS.......................................................................................................................... 318 REPEATER CHARACTERISTICS ................................................................................................................. 324 CABLE ASSEMBLY CHARACTERISTICS .................................................................................................... 326

APPENDIX 4 – TEST RESULTS FORM.............................................................................................. 329 TEST RESULTS FORM – SOURCE DUT..................................................................................................... 330 TEST RESULTS FORM – SINK DUT .......................................................................................................... 334 TEST RESULTS FORM – REPEATER DUT ................................................................................................. 339


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TEST RESULTS FORM – CABLE ASSEMBLY DUT..................................................................................... 340 TEST RESULTS FORM – PLUG & RECEPTACLE......................................................................................... 343

SUPPLEMENT 1 – CONSUMER ELECTRONICS CONTROL ..............................................CEC-I

SUPPLEMENT 2 – HDMI ETHERNET AND AUDIO RETURN CHANNEL (HEAC) ........... HEAC-I


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1 Introduction 1.1 Purpose and Scope This document constitutes the specification of procedures, tools and criteria for testing the compliance of devices with the High-Definition Multimedia Interface Specification Version 1.4a.

Each individual test is designed to ensure compliance with one or more requirements in the HDMI Specification or in one of its normative (required) specifications. No amount of testing can guarantee 100% interoperability among all passing devices when operated in all possible modes but, properly executed, the tests described in this document should give a very high level of confidence in the ability of the device to interoperate with other HDMI devices.

Due to the nature of testing a closed-box system such as a TV or DVD player, there are a variety of requirements in the HDMI Specification which are very difficult or impossible to directly verify. Compliance testing for these items will depend upon alternative methods, which may not have 100% correlation with the HDMI-required behavior but will achieve the objective of generating confidence in the interoperability of the device.

Consumer Electronics Control (CEC) test methods are given in the HDMI Compliance Test Specification Supplement 1.

HDMI Ethernet and Audio Return Channel (HEAC) test methods are given in the HDMI Compliance Test Specification Supplement 2.

Type B and dual-link functionality is not fully covered by this test specification. Such details will be included in a future version.

1.2 Normative References HDMI Licensing, LLC., “High-Definition Multimedia Interface, Specification Version 1.4a”, March, 2010, (“HDMI 1.4a”)

DCP, LLC, “High-bandwidth Digital Content Protection Specification, Compliance Test Specification, Revision 1.2”, November, 2009 (http://www.digital-cp.com)

Note that the HDMI Specification includes normative references affecting the required operation of HDMI devices.

1.3 Organization of this document This specification is organized as follows:

Chapter 1 describes the Purpose and Scope of the document, references, usages and conventions.

Chapter 2 defines terms and acronyms used within the document.

Chapter 3 provides an Overview to HDMI compliance testing.

Chapter 4 describes the Required Capabilities for the defined test equipment as well as certain Recommended Test Equipment that has been proven to meet those requirements.

Chapter 5 describes the tests for a Cable Assembly. For each test, a Required Test Method is described that defines the minimum requirements for accurate and valid testing


Section 1 Introduction


and a Recommended Test Method that describes the specific procedure for the use of specific test equipment known to adequately test for the required condition.

Chapter 6 describes the tests for Plug and Receptacles used on any HDMI product.

Chapter 7 describes the tests for a Source.

Chapter 8 describes the tests for a Sink

Chapter 9 describes the tests for a Repeater.

Chapter 10 describes HDCP testing requirements.

Appendix 1 lists the test equipment used by the Authorized Testing Centers.

Appendix 2 describes the Software CRU technology used during TMDS electrical testing.

Appendix 3 defines the Capabilities Declaration Form, which is filled out and submitted by the product manufacturer whenever a product is sent for testing at an Authorized Testing Center (ATC) or when the results of ATC or self-testing are sent to the HDMI Licensing, LLC.

Appendix 4 defines the Test Results Form, which is completed by the test operator and submitted as the results of ATC or self-testing to the HDMI Licensing, LLC.

Supplement 1: CEC, defines the tests for the optional Consumer Electronics Control protocol.

Supplement 2: HEAC, defines the tests for the optional HDMI Ethernet and Audio Return Channel (HEAC).



2 Definitions 2.1 Conformance Levels expected A key word used to describe the behavior of the hardware or software in

the design models assumed by this specification. Other hardware and software design models may also be implemented.

may A key word that indicates flexibility of choice with no implied preference.

shall A key word indicating a mandatory requirement. Designers are required to implement all such mandatory requirements.

should A key word indicating flexibility of choice with a strongly preferred alternative. Equivalent to the phrase is recommended.

2.2 Usages and Conventions Note that the HDMI Specification should be referenced for definitions of all usages and conventions that are not defined below.

bit N Bits are numbered in little-endian format, i.e. the least-significant bit of a byte or word is referred to as bit 0.

D[X:Y] Bit field representation covering bit X to bit Y (inclusive) of value or field D.

0xNN Hexadecimal representation of base-16 numbers are represented using ‘C’ language notation, preceded by ‘0x’.

0bNN Binary (base-2) numbers are represented using ‘C’ language notation, preceded by ‘0b’.

NN Decimal (base-10) numbers are represented using no additional prefixes or suffixes.

!= Does not equal (‘C’ notation).

== Is Equal to (‘C’ notation). Used to test for a specific value (e.g. if bit 3 == 1, or, verify that byte SB0 == 0).

= Equals (‘C’ notation). Used to assign a value to a variable (e.g. number of packets = number of pixels / 32) or is used in the specification of a required value (e.g. AVcc = 3.3V ±5%).

[HDMI: X.Y.Z] Shorthand notation indicating a reference to the HDMI Specification. Examples: [HDMI: 3.2] denotes a reference to the HDMI Specification, section 3.2.

[CEC: X.Y.Z] Denotes a reference to the HDMI Specification, Supplement 1, “Consumer Electronics Control”, section CEC X.Y.Z.

[861-D: X.Y.Z] Denotes a reference to the CEA-861-D specification. Examples: [861-D: 3.2] denotes a reference to the CEA-861-D specification, section 3.2.


Section 2 Definitions


[comment] Informative comment describing subsequent normative test step.

TMDS_DATA0 Equivalent to the differential signal pair TMDS Data0. When referring to a single-ended signal within this pair, TMDS_DAT0+ or TMDS_DATA0– is used. Same applies to TMDS_DATA1, TMDS_DATA2 and TMDS_CLOCK.

FAIL, “xxx” Indicates a directive to the test operator to fail this test and to write “FAIL” in the “Pass/Fail” field of the Test Results form, and the comment “xxx” in the Comments field. It is permitted and frequently useful for the remainder of the test to be performed to provide additional information about the failure.

PASS, “xxx” Indicates a directive to the test operator to pass this test and to write “PASS” in the “Pass/Fail” field of the Test Results form, and the comment “xxx” in the Comments field. The PASS directive indicates that the test is complete unless indicated otherwise. There is an implied PASS directive at the end of every test method, causing successfully completed tests to PASS.

SKIP, “xxx” Indicates a directive to the test operator to skip this test and to write “SKIP” in the “Pass/Fail” field of the Test Results form, and the comment “xxx” in the Comments field.

2.3 Glossary of Terms Note that the HDMI Specification should be referenced for definitions of any terms that are not defined below.

CEA format Also called CEA-861-D-defined video format. Any video format listed in CEA-861-D for which a Video Identification Code exists.

test coupon A test trace, that emulates the signal traces, present on a test fixture PCB. The test coupon is used to measure and compensate for process variations during PCB manufacture.

support The ability for a device to perform the appropriate action (for that device) with the specified format or option. For display devices, a video format is supported if such a signal is displayed in a manner comparable to other video formats or video from other inputs. For source devices, a video format is supported if the device is capable, after appropriate user input or delivery of appropriate content to the device, of outputting a signal with that format.

TBIT One bit time at the specified TMDS clock frequency (= TCHARACTER/10). If no TMDS clock frequency is specified, it is assumed to be the current (tested) TMDS clock frequency.

TCHARACTER One character time at the specified (TMDS) clock frequency. If no TMDS clock frequency is specified, it is assumed to be the current (tested) TMDS clock frequency. If a video format is pixel-repeated, TCHARACTER continues to be defined as 10* TBIT.


Section 2 Definitions


2.4 Acronyms and Abbreviations Note that the HDMI Specification should be referenced for definitions of any terms that are not defined below.

ATC Authorized Testing Center

CDF Capabilities Declaration Form

DTD Detailed Timing Descriptor (also called “18-byte timing descriptor”)

DUT Device Under Test

ISVM I (current) Source Voltage Measurements

SVD Short Video Descriptor (in Data Block collection of CEA EDID Timing Extension)

TDR Time Domain Reflectometer/Reflectometry

TDT Time Domain Transmission

TE Test Equipment

TPA Test Point Access

VSIM Voltage Source I (current) measurements



3 Overview HDMI system architecture is defined to consist of Sources, Sinks, Repeaters and Cable Assemblies. A given device may have one or more HDMI inputs and one or more HDMI outputs. Each HDMI input on a device shall follow all of the rules for an HDMI Sink and each HDMI output shall follow all of the rules for an HDMI Source. Consequently, each HDMI input shall be fully tested for compliance using the tests specified for Sink devices and each HDMI output shall be fully tested against the full set of tests specified for Source devices.

Any device with at least one HDMI input and at least one HDMI output is defined to be a Repeater. In addition to the Source and Sink tests required for each of the inputs and outputs, additional Repeater tests may be required.

In addition to the tests described for Sources, Sinks, Repeaters and Cable Assemblies, there are tests described for connectors present on these devices. The manufacturer of the device is required to verify the compliance of the connector in all cases, whether the product is ATC-tested or self-tested.

In order to provide the best coverage possible, it is necessary to perform many of the tests herein for each relevant operational mode of the Device Under Test (DUT). For instance, it is necessary to perform some of the video tests for each supported video format timing.

The primary purpose of the testing is to reveal whether the product passes all test cases. A failure of a single test item within a test case constitutes a failure of the product to meet the overall compliance testing requirement. However, even if an intermediate test step within a test case reveals a failure, it is permitted and frequently useful for the remainder of that test case and other test cases to be performed in order to provide additional information about the failure.



4 Test Equipment 4.1 Test Equipment Overview and Policy 4.1.1 Required Capabilities versus Recommended Equipment

Each piece of test equipment referenced by the individual test cases in the Source, Sink, Repeater and Cable Assembly sections is listed below. For each of these, the “Required Test Equipment Capabilities” are described. All equipment used for testing the related attributes shall comply with the requirements listed for that equipment.

In addition, for each of the defined pieces of equipment, specific commercial or custom “Recommended Test Equipment" is described. This includes the primary equipment that is used in the HDMI Authorized Test Centers and should also, if possible, be used for any self-testing of the related functions. An equivalent successor to the recommended test equipment may be used as a replacement. Adopters and ATCs should contact the recommended test equipment maker to learn which products are equivalent replacements. Other configurations and equipment may be used for self-testing, as long as that equipment and the processes used meet all of the stated and implied requirements and permit an equivalent level of testing. It is the Adopter’s responsibility to verify that the substituted equipment and processes are sufficient.

Adopter should understand that HDMI Licensing, LLC, the HDMI Founders and the test equipment maker may not ensure the future commercial availability of the “Recommended Test Equipment”.

4.1.2 Analyzers and Generators

In general, Source devices are tested using various Sink emulators with measurement functions, typically called “Analyzers”. These Sink emulators may have a variety of EDID structures used to encourage certain behavior by the Source DUT and they are capable of measuring a variety of parameters or attributes of the HDMI signals delivered by the Source DUT. The measurement may be performed using the facilities of the Sink emulator itself or using standard test equipment such as digital oscilloscopes, logic analyzers or network analyzers.

Likewise, Sink devices are tested using a variety of Source emulators or “Generators” capable of generating a variety of test signals. These generators may consist of custom hardware designed for HDMI compliance testing or may consist of standard waveform and pattern generators or some combination thereof.

4.1.3 Simultaneous Test Case Execution

Some test tools can be used for a variety of test cases. These tests can sometimes be executed simultaneously so that, with one running of the tool, several tests can be passed or failed without re-running the tool.

4.2 Test Equipment Requirements All test equipment requiring calibration in order to ensure accurate and repeatable results shall be calibrated prior to and, if necessary, during the test procedure.


Section 4 Test Equipment


4.2.1 Electrical Testing

4.2.1.1 Test Point Access Boards

4.2.1.1.1 Overview

In order to gain access to the required signals, a variety of Test Point Access boards are required, each tailored for a particular test purpose. TPA boards provide test points for the pins on the HDMI connector.

For each of the different connector types there are two classes of TPA fixtures. These are the Receptacle TPA (TPA-R) and Plug TPA (TPA-P). A TPA-P is typically used for Source and Sink tests and one or two TPA-R are used for cable tests. In addition, A TPA-R is sometimes used to calibrate the test signal meant to be delivered to a Sink DUT.These boards permit direct access to all TMDS, DDC and CEC signals. Due to the variety of measurements taken (e.g. skew, jitter) and the types of probes used, several TPA boards are needed for each connector type (Plug and Receptacle).

When a TPA board is acting as a Sink (for Source DUT testing), additional functionality may be required. If appropriate termination resistors are not integrated into the probes used then such resistors must be connected between each TMDS signal and a (typically) 3.3V supply. In addition, a variety of EDID images may be required in order to get the Source to create the required signal. For this reason, an EDID Emulator may need to be attached to the TPA board. Lastly, as a Sink, the TPA is typically operated with the Hot Plug Detect signal connected to the +5V Power signal through a 1.2kΩ resistor.

Required Test Equipment Capabilities

Following are the capabilities common among all of the TPA boards:

HDMI plug or receptacle is mounted in such a way to enable direct connection to a Source, Sink or Cable Assembly. This includes being able to attach the assembly in tight or awkward locations such as within a connector access panel at the rear of a flat panel display.

Termination: On some TPAs that are used to emulate the behavior of a Sink, termination resistors are provided on each of the TMDS signal lines. In this case:

• Connector is provided allowing input of external DC 3.3V source to +3.3V power rail used for TMDS termination.

• Test point is provided on 3.3V rail.

• Each single-ended TMDS signal is pulled up to +3.3V power rail through a 50Ω resistor with less than ± 1% tolerance.

• Test coupon test ports (see below) are pulled up to the +3.3V rail through a 50Ω resistor with less than ± 1% tolerance. At least 1 GND pin is mounted near the test port (closer than 15mm).

All TMDS signals have the following characteristics:

• Test port shall be appropriate to the type of probe used and is located at an equivalent trace length from the HDMI connector as all other test ports.

• Characteristic differential impedance of the connector, for each differential TMDS pair is 100Ω ± 15%. A single excursion is permitted out to a maximum of 100 ohm+/-25% and of a duration less than 250psecs.




• Characteristic differential impedance of the leads (cables or traces), for each differential TMDS pair, is 100Ω ± 5% as a average over the entire trace. Peak impedance of up to 100Ω ±10% is also permitted.

• Intra-pair skew is less than 15psec.

• Inter-pair skew is less than 40psec.

• If TPA is PCB-based, then at least 1 GND pin is mounted near each TMDS test port. This pin is connected to the PCB ground plane as well as to all of the TMDS shields.

Non-TMDS pins (if required for test):

• These pins have testing ports that can be used to measure or drive each of the signals.

• Connector is provided to allow input of DC 5V to the HDMI +5V Power pin.

• HDMI HPD signal may be connected to HDMI +5V Power through a removable 1.2kΩ resistor.

If TPA is PCB-based, then it is recommended that a test coupon be provided to measure and compensate for process variation of PCB manufacture:

• Test coupon consists of one or two traces meant to emulate the traces of a single-ended TMDS signal or a differential pair of TMDS signals.

• Each of the traces is located on the same layer of the PCB as the trace that it is emulating.

• Trace length and characteristics are equivalent to that of the emulated trace on this board.

• To enable easy and accurate attachment of testing equipment, each trace is terminated at one end to an SMA connector (or other connector of sufficient quality) and at the other with a Test port, which is identical to the Test ports for the TMDS signals and designed to match the probes used for the measurement.

4.2.1.1.2 TPA-P for Differential measurement

Access points are provided for differential probes to measure each of the four TMDS differential pairs.


• All standard TPA capabilities described above in Section 4.2.1.1.1.

• Plug connector is mounted to enable direct connection to a Source or Sink.

• TMDS test ports consist of two pins (for each TMDS differential pair) designed to allow direct and reliable connection of a differential probe.

• Test coupon consists of two traces as described in Section 4.2.1.1.1 with test ports identical to those on the TMDS traces.

Recommended Test Equipment – For use with Tektronix P7330 Probe and at TMDS clock frequencies less than or equal to 74.25MHz

• Tektronix TPA-P-DI, available as one component in Tektronix 013-A013-50




4.2.1.1.3 TPA-R for Differential measurement

Access points are provided for differential probes to measure across each of the four TMDS differential pairs.



• Receptacle connector is mounted to allow direct connection to a Cable Assembly.

• TMDS test ports consist of two pins (for each TMDS differential pair) designed to allow direct and reliable connection of a differential probe.

• Test coupon consists of two traces as described in Section 4.2.1.1.1 with test ports identical to those on the TMDS traces.


• Tektronix TPA-R-DI, available as one component in Tektronix 013-A012-50

4.2.1.1.4 TPA-P for Single Ended measurement

Access points are provided for single-ended probes to measure each of the TMDS single-ended signals.



• Plug connector is mounted to allow direct connection to a Source or Sink.

• TMDS test ports consist of two pins (for each TMDS single-ended signal) designed to allow direct and reliable connection of a single-ended probe with corresponding ground connection.

• Test coupon consists of one trace as described in Section 4.2.1.1.1 with test port identical to those on the TMDS traces.


• Tektronix TPA-P-SE, available as one component in Tektronix 013-A013-50

• For DC characteristics testing of Sources with Type-C Plugs:

• Tektronix TPA-R-SE with JAE Type A to Type C jig cable DC1DC2ST2020A.

• Tektronix TPA-R-SE with Molex Type A to Type D jig cable 687830004

• Tektronix TPA-R-SE with JAE Type A to Type E jig cable MX50-DC1-L200

4.2.1.1.5 TPA-R for Single Ended measurement

Access points are provided for single-ended probes to measure each of the TMDS single-ended signals.







• TMDS test ports consist of two pins (for each TMDS single-ended signal) designed to allow direct and reliable connection of a single-ended probe with corresponding ground connection.

• Test coupon consists of one trace as described in Section 4.2.1.1.1 with test port identical to those on the TMDS traces.


• Tektronix TPA-R-SE, available as one component in Tektronix 013-A012-50

4.2.1.1.6 TPA-P with SMA Connection

This TPA is typically used in a manner that emulates a Source device, rather than a Sink device. Access points are provided for driving each of the TMDS signals.



• Plug connector is mounted to allow direct connection to a Source or Sink.

• TMDS test ports consist of one SMA connector for each TMDS signal and are designed to allow easy connection of any SMA connection.

• There are no TMDS pull-up resistors installed.

• Can support a TDR-effective rise time of less than 200psec (10-90%), when connected to the TDR oscilloscope..

• Test coupon consists of one trace as described in Section 4.2.1.1.1 with test port identical to those on the TMDS traces (SMA).

Recommended Test Equipment #1 – For use at TMDS clock frequencies less than or equal to 74.25MHz

• Tektronix TPA-P-TDR, available as one component in Tektronix 013-A013-50

Recommended Test Equipment #2 – For use at any TMDS clock frequency

• Agilent N1080A Opt H01 TPA-Plug & Opt H03 TPA-Control

• Agilent N5380A TPA-SMA termination and probe head

• Type-D: BIT-HDMI-TDPL-0001 available from BitifEye Digital Test Solutions

• Type-E: BIT-HDMI-TEPL-0001 available from BitifEye Digital Test Solutions


• Type-A : EFF-HDMI-TPA-P with EFF-E-EDID-TPA (EDID/Control breakout adapter), available from Efficere Technologies as part of set ET-HDMI-TPA-S.

• Type-C: EFF-HDMIC-TPA-P with EFF-E-EDID-TPA (EDID/Control breakout adapter), available from Efficere Technologies as part of set ET-HDMIC-TPA-S.




• Type-D: BIT-HDMI-TDPL-0001 available from BitifEye Digital Test Solutions

• Type-E: TF-HDMIE-TPA-P with ET-HDMI-TPA-CE (EDID/Control breakout adapter), available from Tektronix as part of set TF-HDMIE-TPA-KIT

• Note: EFF-HDMIC-TPA-P is preliminary and is subject to change without notice.

4.2.1.1.7 TPA-R with SMA Connection





• TMDS test ports consist of one SMA connector for each TMDS signal and are designed to allow easy connection of any SMA connection.

• There are no TMDS pull-up resistors installed.

• Can support a TDR-effective rise time of less than 200psec (10-90%), when connected to the TDR oscilloscope.

• Test coupon consists of one trace as described in Section 4.2.1.1.1 with test port identical to those on the TMDS traces (SMA).

Recommended Test Equipment #1 – For use at TMDS clock frequencies of 74.25MHz or lower

• Tektronix TPA-R-TDR, available as one component in Tektronix 013-A012-50


• Agilent N1080A Opt H02 TPA-Receptacle & Opt H03 TPA-Control

• Agilent N5380A TPA-SMA termination and probe head

• Type-D: BIT-HDMI-TDRE-0001 available from BitifEye Digital Test Solutions

• Type-E: BIT-HDMI-TERE-0001 available from BitifEye Digital Test Solutions

Recommended Test Equipment #3 – For use with any SMA probe at any TMDS clock frequency

• Type A: EFF-HDMI-TPA-R with EFF-E-EDID-TPA (EDID/Control breakout adapter), available from Efficere Technologies as part of set ET-HDMI-TPA-S.

• Type C: EFF-HDMIC-TPA-R with EFF-E-EDID-TPA (EDID/Control breakout adapter), available from Efficere Technologies as part of set ET-HDMIC-TPA-S.

• Type D: BIT-HDMI-TDRE-0001 available from BitifEye Digital Test Solutions

• Type E: TF-HDMIE-TPA-R with ET-HDMI-TPA-CE (EDID/Control breakout adapter), available from Tektronix as part of set TF-HDMIE-TPA-KIT.

• Note: EFF-HDMIC-TPA-R is preliminary and is subject to change without notice.




4.2.1.1.8 TPA-R for Network Analyzer measurement (TPA-R-NA)



All standard TPA capabilities described above in Section 4.2.1.1.1.

Receptacle connector is mounted to allow direct connection to a Cable Assembly.

TMDS test ports consist of one SMA connector for each TMDS signal and are designed to allow easy connection of a Network Analyzer.

Measurement bandwidth is 300kHz - 4.125GHz

Test coupon is preferred but not required.

Recommended Test Equipment #1

• ADVANTEST CAX-ATI013


• Agilent N1080A Opt H02 TPA-Receptacle

4.2.1.1.9 TPA-CEC-R – Quiescent CEC Electrical Test Fixture


• Test pin to measure the voltage of CEC line

• Following connection capability is necessary

- Connect CEC line to DDC/CEC Ground via a 1Mohm ±5% resistor

- Connect CEC line to 3.3V via a 27kohm ±5% resistor

- Connect CEC line to 3.3V via a 27kohm ±5% resistor and to DDC/CEC Ground via 1kΩ ±5%

- Connect CEC line to 3.63V via a 27kohm ±5% resistor


• Quantum Data TPA-CEC-R

- Connect CEC line to DDC/CEC Ground via a 1Mohm ±5% resistor (Position 1)

- to 3.3v via a 27kohm ±5% resistor (Position 3)

- to 3.3v via a 27kohm ±5% resistor and to DDC/CEC Ground via 1kΩ ±5% (Position 4)

- Connect CEC line to 3.63V via a 27kohm ±5% resistor (Position 5)


• Agilent N1080A Opt H03 TPA-Control




4.2.1.2 Jitter/Eye Analyzer

All jitter and eye measurements are taken relative to a Recovered Clock which is generated by a Clock Recovery Unit (CRU). This recovered clock is meant to approximate the Ideal Recovery Clock specified in the HDMI Specification. This Recovered Clock, rather than the real TMDS differential clock, is used as the trigger for measurement of the TMDS clock jitter and TMDS data eye diagram.

Figure 4-1 shows functionally how the CRU is used to measure an eye diagram. Clock jitter is measured using a very similar approach, shown in Figure 4-2. Effectively, the CRU generates the trigger that the oscilloscope uses to capture and display the data eye. Figure 4-2 shows how the CRU is used to measure the jitter on a transmitted TMDS clock.

Figure 4-1 TMDS Eye Diagram Measurement

Figure 4-2 TMDS Clock Jitter Measurement

In reality, the recommended CRU consists of software that digitally processes captured data. Following the capture, the software CRU processes the captured TMDS_CLOCK waveform according to the mathematical definition of the Ideal Recovery Clock, specified in [HDMI: 4.2.3]. The eye diagram is then drawn as if a series of captures had occurred, each triggered by a Recovered Clock edge.




This type of approach can be made to work with any oscilloscope with sufficient resolution, speed, memory depth and jitter-free capture clock. Following the capture, the software CRU algorithm could process and display the resulting eye and clock edge data. A digital oscilloscope with signal pre-processing capabilities is used to provide the data capture, software processing and display.

This software approach is strongly recommended, due to the high correlation between the software implementation and the mathematical definition of the Ideal Recovery Clock.

For testing of Cable and Sinks operating at TMDS clock frequencies above 165MHz, the testing also involves use of a Reference Cable Equalizer in the Jitter/Eye Analyzer. In both Figure 4-3 and Figure 4-4, the analyzer is shown including the Reference Cable Equalizer, which is used primarily for cable output and receiver input eye measurements. Like the CRU, it is intended to approximate the ideal equalization as specified in the HDMI specification. For Source tests, the Reference Cable Equalizer is not used.

Figure 4-3 TMDS Eye Diagram Measurement With Reference Cable Equalizer

Figure 4-4 TMDS Clock Jitter Measurement With Reference Cable Equalizer

Jitter and eye measurements are used for Source, Sink, and Cable Assembly compliance testing. For Source testing, the Jitter/Eye Analyzer is used to verify the compliance of the output eye and TMDS clock jitter directly. For Sinks, the Jitter/Eye Analyzer is used during the calibration of a worst-case eye from a TMDS Signal Generator. The worst-case eye is input to the Sink to determine its data recovery capabilities. For cables, generation of a worst-case input eye and analysis of the cable’s output eye are performed.





The Jitter/Eye Analyzer must be capable of accurately indicating the amount of jitter or the actual eye diagram on the tested TMDS differential signal.

The transfer function for an Ideal Recovery Clock is shown in Equation 4-1 below. An ideal CRU would perfectly match this function.

Across the tested clock frequency range, the Jitter/Eye Analyzer’s CRU shall have a jitter transfer amplitude that differs, from the ideal transfer function, by no more than ±0.2dB from DC to 10MHz. At 20MHz the difference must be less than ±1dB and at 50MHz, less than +2/-6dB. From DC to 20MHz, the jitter transfer phase response must be within ±1.8 degrees of the phase response of the ideal recovery clock.

H(jω) = 1 / ( 1 + jω/ω0 )

Where ω0 = 2ωF0, F0 = 4.0MHz

Equation 4-1 Jitter Transfer Function of PLL for Ideal Recovery Clock Definition

The Jitter/Eye Analyzer’s Reference Cable Equalizer function may be selected by the operator to be applied to all or none of the measured TMDS differential signals. The equation defining the equalizer is shown in Equation 4-2 below.

7.00

3.00

7.00

3.10

0

0*

00)*2.1(*

0*

**98.1

**7.0

**07.1

**47

834.725.2*2

7.0:Where

)*4.1()*4.1(

)()(

20

ω

ω

ω

ω

πω

ωωωωω

ωωω

ω

ωω

ω

AE

AD

AC

AB

EAGHz

N

eee

jHED

CB

A N

=

=

=

=

−===

<<<

<=

−

−

+−

+−−

Equation 4-2 Reference Cable Equalizer Function

The Jitter/Eye Analyzer’s Reference Cable Equalizer function for Automotive may be selected by the operator to be applied to all or none of the measured TMDS differential signals for TP2 eye. The equation defining the equalizer is shown in Equation 4-3 below.




Equation 4-3 Reference Cable Equalizer Function for Automotive

Configuration #1 – May be used for testing at TMDS clock rates of 148.5MHz or lower. For testing at 148.5MHz, it is better to use the alternative scopes below.

• Recommended Digital Oscilloscope #1 (see section 4.2.1.3 below)

- Tektronix TDS74041 4GHz Digital Oscilloscope

• Two (2) Tektronix P7350SMA Differential Probes

Configuration #2 – For testing at any TMDS clock rate

• Recommended Digital Oscilloscope #2 (see section 4.2.1.3 below)

- Agilent DSO 80000B >8GHz Digital Oscilloscope

• Agilent N5380A probe head + Agilent 1169A probe amplifier

Configuration #3 – For testing at any TMDS clock rate

• Recommended Digital Oscilloscope #3

- Tektronix DPO70004 >8GHz Digital Oscilloscope (e.g. DPO70804) with option 2XL or Tektronix DSA70004 (e.g. DSA70804) (equivalent)

- Tektronix TDSHT3 software version 3.3.0 or equivalent*

- * software version 5.0.or equivalent is required for Type-E testing

- Tektronix P7313SMA probe

1 Tektronix TDS7404B is available as an equivalent successor.




4.2.1.3 Digital Oscilloscope


For testing at TMDS clock rates of 148.5MHz or lower:

• DC to 4GHz, -3dB bandwidth or greater

• Input configurations:

- 1 or more Differential Probes

- 1 or more Single-Ended probes

• Sampling rate >= 10G samples/sec, sampling 2 channels simultaneously.

• Sample memory: 2 channels at >=16M samples per channel (can be acquired with a single or with multiple smaller captures)

For testing at TMDS clock rates above 148.5MHz:

• DC to 8GHz, -3dB bandwidth or greater

• Input configurations:

- 1 or more Differential Probes

- 1 or more Single-Ended probes

• Sampling rate >= 20G samples/sec, sampling 2 channels simultaneously.

• Sample memory: 2 channels at >=16M samples per-channel (can be acquired with a single or with multiple smaller captures)

Recommended Test Equipment #1 – May be used for testing at TMDS clock rates of 148.5MHz or lower. For testing at 148.5MHz, it is better to use the alternative scopes below.

• Tektronix TDS7404, 4GHz Digital Oscilloscope with:

- large memory option (#4M)

- serial pattern trigger option (#ST)

- Tektronix TDSHT3 software version 3.3.0

TDSHT3 may be used only as described in test methods below.

Recommended Test Equipment #2 – For testing at any TMDS clock rate

• Agilent DSO80000B >=8GHz Digital Oscilloscope (e.g. DSO80804B)

- DSO80000-001 1-2M memory

- Agilent HDMI compliance test software N5399A version 2.0.0


• Tektronix DPO70000 >=8 GHz Oscilloscope (e.g. DPO70804) with option 2XL or Tektronix DSA70000 >=8 GHz Oscilloscope (e.g. DSA70804) (equivalent)

- Tektronix TDSHT3 software version 3.3.0 or equivalent*

- * software version 5.0.or equivalent is required for Type-E testing

2 Tektronix TDS7404B is available as an equivalent successor.




4.2.1.4 Differential Probe


• For testing at TMDS clock rates less than or equal to 74.25MHz:

- DC - 3.5GHz bandwidth (or greater) when connected to the oscilloscope

• For testing at TMDS clock rates above 74.25MHz:

- DC – 8GHz bandwidth (or greater) when connected to the oscilloscope

• Length of Ground Lead is less than 7cm

Recommended Test Equipment #1 – For use with Tektronix oscilloscope, but only at TMDS clock rates less than or equal to 74.25MHz

• Tektronix P7330 Differential Probe

- Tektronix 016-1884-00 Square Pin Adapter

- Tektronix 196-3469-00 Ground Lead

Recommended Test Equipment #2 – For use with Agilent oscilloscope

• Agilent 1169A (12GHz) probe amplifier

• Agilent N5380A probe head


• Tektronix P7313SMA

4.2.1.5 Differential SMA Probe


• For testing at TMDS clock rates less than or equal to 74.25MHz:

- DC - 3.5GHz bandwidth (or greater) when connected to the oscilloscope

• For testing at TMDS clock rates above 74.25MHz:

- DC – 8GHz bandwidth (or greater) when connected to the oscilloscope

• Differential Input Resistance : 100 Ω

• Single-ended Input Resistance : 50 Ω

• DC Bias Port for Common Mode Voltage termination

• Can connect directly and reliably to the TPA-P-SMA or TPA-R-SMA fixtures

Recommended Test Equipment #1 – For use with Tektronix oscilloscope, but only at TMDS clock rates less than or equal to 74.25MHz

• Tektronix P7350SMA Differential Probe

- Tektronix 174-4866-00 Matched pair SMA cables

Recommended Test Equipment #2 – For use with Agilent oscilloscope at any TMDS clock rate

• Agilent 1169A (12GHz) probe amplifier





Recommended Test Equipment #3 – For use with Tektronix oscilloscope, at any TMDS clock rate

• Tektronix P7313SMA

4.2.1.6 Single-Ended Probe


• DC - 4GHz bandwidth (or greater) when connected to the oscilloscope .

• Can connect directly and reliably to corresponding TPA-P or TPA-R fixtures

Recommended Test Equipment #1 – For use with Tektronix TDS7404 oscilloscope

• Tektronix P7240

- Tektronix 016-1773-00 Square pin socket

Recommended Test Equipment #2 – For use with Agilent oscilloscope

• Agilent 1169A, configured to perform single-ended measurements.



• Tektronix P7313SMA, configured to perform single-ended measurements.

4.2.1.7 SMA Cables


Less than 2 meters, preferably less than 1 meter.

Bandwidth: 9GHz or greater

50Ω impedance

Recommended Test Equipment

Any of the following are sufficient:

• Tektronix 174-1428-00 (1.5 meter)

• Tektronix 174-1341-00 (1 meter)

• Agilent N4871A matched pair cable

4.2.1.8 50Ω SMA Terminators


50Ω impedance ± 1% or better

Connects directly to SMA female.


Any lab-quality terminator which meets requirements above is sufficient.




4.2.1.9 TMDS Signal Generator

Generates HDMI signal with a variety of patterns, clock jitter, data waveform (eye diagram) and amplitude characteristics.


Capable of outputting an HDMI signal with any of the following characteristics that are supported by the DUT:

• Video format timings: 24-bit (normal) and 36-bit versions of following timings

- 1920x1080p @ 60Hz

- 1920x1080p @ 50Hz

- 720x480p @ 59.94Hz

- 1920x1080i @ 60Hz

- 1280x720p @ 60Hz

- 720x576p @ 50Hz

- 1920x1080i @ 50Hz

- 1280x720p @ 50Hz

• Data Patterns

- Patterns Available

1) “RGB” pattern (available for all video formats above and with 24-, 30-, 36- and 48-bit pixel sizes): RGB pixel encoding: Repeating gray scale ramp 0, 1, 2…254, 255, 0, 1, 2…during each active video period. For deep color patterns, each step in the gray ramp (0 to maximum) is 4, 16 or 256 for 30-, 36- and 48-bit color respectively.

2) “YCbCr 4:2:2” pattern (available for 720x480p and 720x576p video formats and 24-bit pixel size only): YCBCR 4:2:2 pixel encoding: Repeating gray scale ramp. This should display the same as the RGB gray ramp, i.e. the displayed ramp should increment every pixel.

3) “YCbCr 4:4:4 pattern (available for 720x480p and 720x576p video formats and 24-bit pixel size only): YCBCR 4:4:4 pixel encoding: Repeating gray scale ramp. This should display the same as the RGB gray ramp, i.e. the displayed ramp should increment every pixel.

- Audio format:

For VGA or [480p and 576p] formats only at 24-bit/pixel RGB only: 2-channel 16-bit L-PCM audio at 48kHz sampling frequency, N and CTS values (constant) per recommended values for 48kHz at transmitted video frequency [HDMI: Table 7-3].

- Audio data:

1kHz sine wave with amplitude of –18 dBFS (full scale) on Left channel

400Hz or 500Hz sine wave with amplitude of –18 dBFS (full scale) on Right channel

- Additional Data




During vertical blanking, one compliant AVI and one Audio InfoFrame packet whenever required.

• +5V Power always set to +5.0V

• TMDS Clock signal characteristics:

- Ability to add the following sinusoidal Jitter components

1MHz and 7MHz. NOTE: the 1MHz component is used to emulate data jitter, while the 7MHz component is used to emulate clock jitter.

500kHz and 10MHz. NOTE: the 500kHz component is used to emulate data jitter, while the 10MHz component is used to emulate clock jitter.

The amplitude of all jitter components can be adjusted independently from 0.0 to 1.0 Tbit (up to max of 1.1nsec) with resolution of 0.05*TBIT or smaller

• TMDS Data signal characteristics:

- Data Eye shape

Rise time, fall time can be changed to match slope of TP1 eye diagram at following test frequencies: 27MHz, 74.25MHz, 148.5MHz, 165MHz, 222.75MHz, 340MHz. This may require addition of an appropriate transition time converter (TTC).

Overshoot ≤10% of differential 1Vp-p swing.

Undershoot ≤10% of differential 1Vp-p swing.

- Intrinsic TMDS_DATA Jitter no greater than 0.15 Tbit

• All Outputs:

- Common Mode (average) voltage levels (when driving a 50Ω termination to 3.3V):

2.9V to 3.3V (may require addition of a Bias-T on outputs)

- Output: Differential swing range:

0V (±0.06V) to 1.2Vp-p in 10mV steps

- Channel-to-channel skew range:

0 to 37 nsec (i.e. 1 TCHARACTER@ 27MHz TMDS clock) in steps less than or equal to 0.1TBIT of tested frequency

Recommended Test Equipment #1 – For testing at TMDS clock frequencies of 74.25MHz or lower

The recommended TMDS Signal Generator based on the Tektronix DTG consists of the following components:

• (1) Tektronix DTG5274 2.7GHz Digital Timing Generator (DTG)

- (3) Tektronix DTGM30 output modules

• (1) Tektronix AWG710 Arbitrary Waveform Generator

- (1) SMA (female)-BNC (male) adapter

• (2) Mini-Circuits ZFBT-4R2GW Bias-Tee

- (2) Tektronix 012-1503-00 Pin Header SMB cable 51cm (20in.)

- (2) Tektronix 015-0671-00 SMB-BNC adapter




- (2) BNC (female)-SMA (male) adapters (1 for each Bias-Tee)

- (2) SMA (female)-SMA (female) adapters (1 for each Bias-Tee)

- (2) SMA (male)-SMA (male) adapters (1 for each Bias-Tee). Note that SMA cables (below) may be used instead of directly connecting the Bias-Tees to the AWG front panel with these adapters.

• (10 or 12) SMA Cables: either Tektronix 174-1428-00 (1.5 meters) or Tektronix 174-1341-00 (1 meter), as needed to connect output of equipment to TPA boards and to deliver synchronization signal(s) between AWG and DTG


Agilent HDMI TMDS Signal Generator configuration, consisting of the following components:

• (1) Agilent E4887A-007 TMDS Signal Generator

• (1) Agilent E4887A-307 Accessory and Cable Kit for E4887A-007 TMDS Signal Generator

• (2) Agilent E4438 series Signal Generators bandwidth >4GHz

- Option 504 250kHz - 4GHz

- Option 601 Internal baseband generator, 8Msa memory with digital bus

• (8) Picosecond Pulse Labs 5542 Bias-Tee

- available as part of (1) BIT-HDMI-BTK-0001 Bias-Tee Kit for E4887A-007

• (1) Agilent E4887A-207 HDMI Frame Generator Software for E4887A-007

• (1) Agilent Test Automation Software Platform N5990A

- Option 150 HDMI Electrical High-Speed Sink Test Library

- Option 250 Interface to N5399A Electrical Source Tests

Note that this equipment configuration has AC-coupled output characteristics, which may differ from the DC-coupled HDMI source specifications.


• (1) Tektronix DTG5334, 3.4GHz Digital Timing Generator. (Note - DTG5334 requires S/N greater than B020100 for testing at clock rates above 222.75MHz).

- (3) Tektronix DTGM30 output modules. (Note - DTGM30 requires S/N greater than B020100 for testing at clock rates above 222.75MHz)

- (1) Tektronix DTGM32 clock output module

• (1) AFG or AWG jitter source, either:

- Tektronix AFG3102 Arbitrary Function Generator (AFG), or,

- Tektronix AWG710 or AWG7102 Arbitrary Waveform Generator (AWG)

• (10 or 12) SMA Cables: either Tektronix 174-1428-00 (1.5 meters) or Tektronix 174-1341-00 (1 meter), as needed to connect output of equipment to TPA boards and to deliver synchronization signal(s) between AWG and DTG

Recommended Test Equipment #4 – For testing with Type1, Type2 and Type3 cable emulator effect in Test ID 8-7 and with Automotive EA cable emulator effect in Test ID 5-3

• (2) Tektronix AWG7102 Arbitrary Waveform Generators (AWG) with Opt 01 and 06 or




• (2) Tektronix AWG7122B Arbitrary Waveform Generators ( AWG) with Opt 01,06 and 08 or upgraded AWG7000B series,

• (1) Tektronix AFG3102/3252 Arbitrary Function Generator (AFG)

• (8) Mini Circuits Bias Tee model number ZX85-12G-S+ needed to connect to the output of the AWG analog ports

• (10 or 12) SMA Cables: Tektronix 174-1428-00 ( 1.5 meters), as needed to connect output of Bias Tees to Efficere TPA boards

• (1) DC Power Supply: To Connect 5V to the +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P.

• (1) Tektronix HDMI Fixture Set ET-HDMI-TPA-S.

• (1) HT3 software version with Direct Synthesis capability version 5.0 or equivalent.

• (8) Picosecond filter 5915-110-120PS.

4.2.1.10 Network Analyzer


• 4 ports used simultaneously

• At least 300kHz - 4.125GHz bandwidth is available.

• Dynamic accuracy over the frequency range 300kHz - 4.125GHz

- Magnitude: ≤ (±)0.50dB from 0 to – 50dBm

- Phase: ≤ (±) 4 degrees from 0 to – 50dBm


• ADVANTEST R3860A

• ADVANTEST R17051 (Auto Cal KIT)


• Agilent E5071C : ENA Series Network Analyzer

• Agilent E5071C option 480 : 4-port Test Set, 9 kHz to 8.5 GHz

• Agilent N4431B : 4-port RF E-Cal module

4.2.1.11 TDR/TDT Oscilloscope


• TDR measurement

- Bandwidth : ≥ 18GHz

- Pulse rise time : ≤ 75ps (10-90%)

- 2 port (1 differential in-out)

- Ability to adjust the effective rise time of the TDR waveform that is displayed on the screen to a value below but very close to 200 ps (10-90%).




• TDT measurement

- Bandwidth: ≥ 18GHz

- Pulse rise time : ≤ 75ps (10-90%)

- 4 port (1 differential out and 1 differential in)


• (1) Tektronix TDS8200B

• (1) Tektronix 80E04 TDR-module

• (1) Tektronix 80E03 Sampling module


• Agilent 86100C Digital Communications Analyzer

• Agilent 86100C Option 202 Enhanced TDR and S-parameter application

• Agilent 54754A TDR/TDT Module

• Agilent 86112A Dual Electrical Receiver module or second 54754A module

4.2.1.12 DC Source/Meter and Probe


• Basic DC voltage, DC current, DC resistance measurement capability as well as ISVM and VSIM capabilities.

• Both ISVM function and VSIM function capability

- ISVM: Can measure the voltage with controlling the max drain current

- VSIM: Can measure the current with controlling the output voltage.

• Indicate the value of the DC resistance as a digital number.

• DC resistance resolution is more than 3 digits.

• DC resistance accuracy is ≤ ±1%.

- In-circuit test capability: range 0 - 100Ω must be measured.

- At least 1MΩ (disconnected) must be measured.

• Indicates the value of the DC voltage as a digital number.

• DC voltage resolution is smaller than 10mV when range is more than 10V.

• DC voltage accuracy is ≤ ±1%


• ADVANTEST R6240A DC Voltage Current Source/Monitor




4.2.1.13 Digital Multi-Meter


• Basic DC voltage, DC resistance measurement capability.

• DC voltage

- DC voltage resolution ≤ 1μV when range is 0-1mV.

- DC voltage accuracy ≤ ±10μV when range is 0-1mV.

- Indicates the value of the DC voltage as a digital number.

• DC resistance

- DC resistance resolution is more than 3 digits.

- DC resistance accuracy ≤ ±1%.

- At least 1MΩ (disconnected) must be measured.

- Indicate the value of DC resistance as a digital number.


Any digital multi-meter meeting the above requirements may be used. One such option is:

• ADVANTEST R6552

4.2.1.14 Resistor for HPD Test


• For Sink testing; 10kΩ ≤ ±1%, 0.25W

• For Source testing 1.2kΩ ≤ ±1%


Any resistor with the Required Capabilities is sufficient.

4.2.1.15 DC Power Supply


• Can output DC 3.3V and 5V with accuracy of ≤ ±1%

• Maximum output current can be set with accuracy of ≤ ±5% over the 10 to 100mA range.


Any DC power supply meeting the above requirements may be used. One such option is:

• KENWOOD PW18-1.8AQ




4.2.1.16 Digital LCR Meter


• Test signal specification

- Frequencies: 100kHz

- AC level: 2.5Vp-p and 3.5Vp-p

- DC level: 1.65V and 2.5V

• Resolution is equal or less than 1pF

• Accuracy is equal or less than 1pF


• HIOKI 3522-50 Digital LCR Meter

• HIOKI 9143 Probe

• HIOKI 9268-01 DC Bias unit

4.2.1.17 HDMI Cable Emulators

HDMI cable emulators are intended to emulate the characteristics of worst-case but compliant cables. All of the cable emulators can be used with all of the TMDS Signal Generators and must be made available for all of the TMDS Signal Generators.


• Attenuation or skew affected TP2 eye degradation or ISI jitter is compliant with cable specification.

• TMDS_DATA jitter degradation of 0.2 TBIT ± 0.015 TBIT measured at the crossing point.

• Output signal meet TP2 eye mask at four corners exept for most left and most right point.

Recommended Test Equipment – Tentative

There are three types of recommended HDMI cable emulators, each targeting a different type of signal degradation but compliant with cable specification on the TMDS channels.

Type 1

The Type 1 cable emulators have typical copper attenuation and inter-symbol interference (ISI) effects. When a 74.25MHz TP1 worst-case signal is applied to the input of the Category 1 emulator, it will output a worst-case TP2 signal that still meets the TP2 eye mask but with approximately 0.2Tbit of ISI. The Category 2 device has the same characteristics, but for 165MHz signals. When a 74.25MHz TP1 worst-case signal is applied to the input of the Automotive 1 emulator, it will output a worst-case TP2 signal for Automotive that still meets the TP2 eye mask for Automotive but with approximately 0.2Tbit of ISI. The concatenation of Automotive 1 and Automotive 2 cable emulators has the same characteristics, but for 27MHz signals. When a 74.25MHz TP1 worst-case signal is applied to the input of the Automotive EA emulator, it will output a worst-case TP5 signal that still meets the TP5 eye mask but with approximately 0.2Tbit of ISI.

• Category 1: Agilent E4887A-101





• Automotive 1: Agilent E4887A-106


• Automotive EA: Agilent E4887A-107

Type 2

The Type 2 cable emulators degrade the TMDS signals through large intra-pair skew, slight attenuation and very slight ISI. When a TP1 worst-case signal is applied to the input, it will generate an almost worst-case TP2 signal, with horizontal degradation primarily due to intra-pair skew. There are two versions: one for 27MHz and one for 74.25MHz testing.

• 27MHz: JAE DC1P19ST02700AA


Type 3

The Type 3 cable emulators are intended to emulate passive equalized cables and primarily attenuate the signal and add a very slight amount of ISI. They are used for testing at all Category 2 rates. At both 165MHz (measured without Reference Cable Equalizer) and at 340MHz (measured after application of Reference Cable Equalizer), a worst-case TP1 eye will output a TP2 eye with the 4 corner points of the eye nearly touching.

• Agilent E4887A-103 (or E4887A-104 equivalent which is divided into eight modules.)

4.2.1.18 Transition Time Converter

Transition time converters are used to control the slew rate of the TMDS Signal Generator to create a consistent slew rate among the different generators and to attain a slew rate to match a particular eye diagram.


• TTC is implemented in hardware (at the output of the Signal Generator) and may be optionally implemented in software (in the Digital Oscilloscope) as an equivalent method for cable testing.

• When used with a particular TMDS Signal Generator, the transition time converter will decrease the slew rate such that the slew rate near the middle of the swing will match that of the left edge of the HDMI-specified TP1 eye at a particular test frequency.

- Software TTC is applied during the calculation of the eye diagram by applying a mathematical TTC that is equivalent to the hardware TTC requirement above.

• TTCs are used for all of the recommended TMDS Signal Generators and at the following test frequencies:

- 74.25MHz, 165MHz, 340MHz – required for testing cables

- 74.25MHz, 148.5MHz, 222.75MHz – required for testing Sink DUTs

Recommended Test Equipment #1 – For use with the Tektronix DTG5274

• Tektronix 250ps 015-0711-00

- 74.25MHz 250ps+250ps+250ps




Recommended Test Equipment #2 – For use with the Agilent E4887A-007 ParBERT

• 74.25MHz: 450ps Picosecond Pulse Labs 5915-110-450PS


• 165MHz: 200ps Picosecond Pulse Labs 5915-110-200PS


• 340MHz: 60ps PIcosecond Pulse Labs 5915-110-60PS

Recommended Test Equipment #3 – For use with the Tektronix DTG5334

• Tektronix 150ps 015-0710-00

• Tektronix 250ps 015-0711-00

• These devices can be configured for configuring the eye to meet the following:

- 74.25MHz 250ps+250ps+250ps

- 148.5MHz 250ps

- 165MHz 150ps+150ps

- 222.75MHz 150ps

- 340MHz 0ps

4.2.2 Connector Testing

There are a number of tests designed to verify compliance of the connector with HDMI-specified dimensions or performance. The HDMI Compliance Test Specification does not attempt to describe the test equipment or processes required for this testing.

4.2.3 EDID/DDC/CEC Testing

4.2.3.1 EDID Reader/Analyzer

The Sink’s EDID is read and evaluated by the EDID Reader/Analyzer.


The EDID Reader/Analyzer shall be capable of:

• reading all bytes of all blocks within the EDID,

• presenting the entire contents of the EDID to the operator in an easily understandable format

• detecting and clearly indicating to the operator the failure to comply with at least some of requirements referenced in Section 8.2.

• allowing the operator to manually but easily identify compliance with the remaining items in Section 8.2.


• Quantum Data 882CA Generator/Analyzer (Rev. C with Analyzer option)




• PC running Quantum Data software on Windows OS

4.2.3.2 EDID Emulator

An EDID image may be presented to a Source DUT by connecting an EDID Emulator to the SDA and SCL signals on any of the standard TPA fixtures.


The EDID Emulator shall be capable of:

• presenting a 2-block (256-byte) and a 4-block (512-byte) E-EDID to a Source,

• applying 3.3V through a 50 ohm resistance to each of the eight TMDS lines,

• connecting to the +5V Power, SDA and SCL signals of any standard TPA fixture,


The recommended EDID Emulator includes:

• Quantum Data 882CA Generator/Analyzer (Rev. C with Analyzer option).

• PC running Quantum Data software on Windows OS


The recommended EDID Emulator includes:

• Silicon Image CP9100 EDID Tester Kit.

• PC running Windows 32-bit OS.

The Silicon Image CP9100 consists of the following:

• Silicon Image EDID Tester PCB. This hardware provides a variety of EDID-related functions. In this use, it can be attached to a Source DUT in order to provide a complete Sink emulation function at the TPA.

• Serial cable. Connected between the PC and the EDID Tester PCB, allowing the PC to acquire the EDID image read from the Sink.

• Silicon Image EDID Analyzer / Editor Software. This software is designed to enable the operator to create and edit EDID images per the HDMI Specification, VESA E-EDID 1.3, and CEA-861-D and to download those images into the EDID Tester PCB.

To use this equipment as an EDID Emulator do the following:

• Connect the PC to the EDID Tester PCB using the serial cable.

• Connect the EDID Tester PCB to the TPA fixture’s SDA, SCL, +5V Power and Ground signals.

• Run the EDID Analyzer/Editor software and download the appropriate image.

• Press the HPD button for ½ second or so to notify the Source DUT of the new EDID image.

Recommended Test Equipment #3 – for use with EFF-HDMI-TPA-x or EFF-HDMIC-TPA-x fixtures

• EFF-HDMI-E-EDID-TPA.




4.2.3.3 I2C Analyzer

An I2C analyzer is required to test E-DDC.


The I2C analyzer shall be capable of:

• Displaying all elements of an I2C transaction in a manner that allows the operator to determine if the transaction is compliant with the E-DDC protocol.

• Ability to be connected to the SDA and SCL signals on an EDID Emulator PCB or TPA fixture.

• Ability to measure the worst-case SCL frequency (minimum period between rising edges of SCL)


Any I2C analyzer meeting the above requirements may be used. One such option is:

• Yokogawa DL1640/F5 Oscilloscope (includes I2C Analyzer option)

4.2.3.4 General Oscilloscope


• Specific capability is not required for General Oscilloscope


• Any type of oscilloscope may be used.

4.2.4 Protocol Testing

4.2.4.1 Encoding Analyzer

The Encoding Analyzer is used to verify correct low-level encoding by the Source DUT.


The Encoding Analyzer is capable of analyzing an HDMI signal and detecting the following:

• Any illegal 10-bit code generated by a Source on any of the three channels. Legal codes are limited to the following:

- Any legal Video Data codes

- 4 Control Period codes

- 16 TERC4 codes

- 4 Data Island Guard Band codes

- Video Guard Band code




• Any Video Data Code that was encoded with an incorrect “data stream disparity” value, that is, which causes the channel to become more, rather than less DC-balanced.

• Any TCHARACTER period that does not use a consistent coding method across all three TMDS channels.

The Encoding Analyzer should be capable of recovering the data from any compliant HDMI signal with a bit error rate of better than 10-9. The Encoding Analyzer shall be designed assuming no data recovery errors. On occasion, a test may therefore fail due to a rare, but permitted, data recovery error. The operator may re-run the test in the case of these intermittent errors.

The Encoding Analyzer shall be capable of attaining character synchronization (detection of the start of the 10-bit code on each channel) following the reception of 12 contiguous Control Period-encoded pixels and of maintaining the synchronization for the duration of the data capture.


• Panasonic UITA-1000-based setup, described below


• Agilent N5998A -based setup, described below

Panasonic UITA-1000 HDMI Protocol Analyzer

This tool can act as a recommended Encoding Analyzer, Protocol Analyzer, Audio Timing Analyzer and Video Timing Analyzer. UITA-1000 supports only Primary video formats and 24-bit pixel format.

This tool consists of the following components:

• Panasonic UITA-1000 Data Acquisition Unit

• Personal Computer running a Windows 32-bit OS with an IEEE1394 port available and connected to the TMDS Capture Board for downloading the captured TMDS sequences.

• Panasonic UITA-1000 HDMI Analysis Software running on the PC

• IEEE1394 cable connected between Data Acquisition Unit and PC

The HDMI Analysis software has the following major features:

• Can download the data file from the TMDS Capture Hardware

• Can execute several commands selected via menus that perform different groups of tests.

• Can output the results of the tests on-screen and/or to a text file, indicating, for each test performed, a PASS or FAIL result.

• Can output a processed HDMI protocol sequence data file, outlining the positions of Data Islands, specific packet types, Video Data Periods, Preambles, etc. and including markers indicating at the positions in the sequence where specific tests failed.

The Recommended Test Methods using the Panasonic UITA-1000 will describe which HDMI Analysis commands are executed and what the indication will be if that test fails or passes. Following are the configuration and operation instructions for the Panasonic UITA-1000.




• Connect Source DUT to the TMDS Capture board with an HDMI cable.

• Connect the TMDS capture board to the PC with an IEEE1394 cable.

• If required, connect a Timer/Counter to the appropriate test points and set to Frequency mode.

• Operate the Source DUT as described in the Recommended Test Method.

• Initiate the “Capture” operation of the TMDS Capture board. Continue the operation of the Source DUT for the duration of the capture.

• Run the HDMI Analysis software on the PC.

• Select the HDMI Analysis “Download Capture” command. If needed, input the TMDS clock frequency value read from the Timer/Counter. Save the capture file.

• Select the command specified in the Recommended Test Method and select the capture file just saved.

• Examine the output of the HDMI Analysis software for the indication described in the Recommended Test Method and document the results in the Test Results Form as instructed.

Agilent N5998A Protocol/Audio/Video Analyzer

This tool can act as a recommended Protocol Analyzer, Audio Timing Analyzer and Video Timing Analyzer.

This tool consists of the following components:

• Agilent N5998A Unit

• Personal Computer running a Windows 32-bit OS with a USB 2.0 port available and connected to the Agilent N5998A unit for downloading the captured TMDS sequences.

• Agilent N5998A HDMI Analysis Software running on the PC

• USB 2.0 cable connected between N5998A Unit and PC

The HDMI Analysis software has the following major features:

• Can download the data file from the N5998A Unit

• Can execute several commands selected via menus that perform different groups of tests.

• Can output the results of the tests on-screen and/or to a text file, indicating, for each test performed, a PASS or FAIL result.

• Can output a processed HDMI protocol sequence data file, outlining the positions of Data Islands, specific packet types, Video Data Periods, Preambles, etc. and including markers indicating the positions in the sequence where specific tests failed.

The Recommended Test Methods using this tool will describe which HDMI Analysis commands are executed and what the indication will be if that test fails or passes. Following are the configuration and operation instructions for the N5998A Unit.

• Connect Source DUT to the N5998A Unit with an HDMI cable.

• Connect the N5998A Unit to the PC with a USB 2.0 cable.




• If required, connect a Timer/Counter to the appropriate test points and set to Frequency mode.

• Operate the Source DUT as described in the Recommended Test Method.

• Initiate the “Capture” operation of the N5998A Unit. Continue the operation of the Source DUT for the duration of the capture.

• Run the HDMI Analysis software on the PC.

• Select the HDMI Analysis “Download Capture” command. If needed, input the TMDS clock frequency value read from the Timer/Counter. Save the capture file.

• Select the command specified in the Recommended Test Method and select the capture file just saved.

• Examine the output of the HDMI Analysis software for the indication described in the Recommended Test Method and document the results in the Test Results Form as instructed.

4.2.4.2 Protocol Analyzer

The Protocol Analyzer is used to detect protocol errors generated by a Source. Proper operation of the Protocol Analyzer is only guaranteed if the Source DUT passes all tests in Section 7.2, 7.3 and Test ID 7-16: Legal Codes.


The Protocol Analyzer data recovery and character synchronization performance requirements are identical to those of the Encoding Analyzer.

On occasion, a test may therefore fail due to a rare, but permitted, data recovery error. The operator may re-run the test in the case of these intermittent errors.

The Protocol Analyzer shall be capable of determining whether each Protocol element is compliant with the requirements described in the Source Protocol tests section. These include, but are not limited to:

• Preamble values.

• Relative placement or length of Preambles, Guard Bands, Data Islands, Control Periods, etc.

• BCH parity bits for any of the five ECC blocks in every packet.

Recommended Test Equipment #1 – Can be used only for 74.25MHz operation and below.

• Panasonic UITA-1000-based setup, described above

Recommended Test Equipment #2 – Can be used for all TMDS clock frequencies.

• Agilent N5998A -based setup, described above




4.2.5 Audio/Video Testing

4.2.5.1 Video Timing Analyzer

The Video Timing Analyzer analyzes the relative timing of pixels, HSYNC, VSYNC and Video Data Periods, and absolute pixel clock frequency, and uses this information to determine compliance with the relevant specifications. Proper operation of the Video Timing Analyzer is only guaranteed if the Source DUT passes all tests in the Source Protocol section. Note that the pixel clock rate is determined using the TMDS clock rate in conjunction with the current pixel size (24-bit, 30-bit, 36-bit, 48-bit).


The Video Timing Analyzer examines the transmitted video timing and shall be capable of:

• determining the exact number of pixel clocks within the horizontal front porch, HSYNC pulse, back porch and Video Data Period (excluding the Video Guard Band).

• determining the HSYNC polarity (positive or negative),

• determining the exact number of video lines within the vertical front porch, VSYNC pulse, back porch and active data period,

• determining the VSYNC polarity (positive or negative),

• determining the exact offset (in pixel clocks) of the active edge of VSYNC from to the active edge of HSYNC,

• determining the pixel clock frequency with an accuracy of ±0.01%

• determining, or allowing the operator to determine, if all of the above values match the required values specified in CEA-861-D.


• Panasonic UITA-1000-based setup, described in section 4.2.4.1 above

Recommended Test Equipment #2 – Can be used for major TMDS clock frequencies.

• Agilent N5998A -based setup, described in section 4.2.4.2 above

4.2.5.2 Video Picture Analyzer


The Video Picture Analyzer allows the operator to view or otherwise examine the contents of the transmitted video and shall be capable of:

• presenting to the Source DUT, a specific EDID image selected by the operator,

• accurately indicating the contents of any and all AVI InfoFrames transmitted by the Source DUT, and

• accurately indicating, through operator observation, the aspect ratio of the transmitted picture, assuming that the picture content provides sufficient clues (circles or other obvious structures).





The first recommended Video Picture Analyzer consists of the following components:


Recommended Test Equipment #2 – Can be used for all TMDS clock frequencies.

A second recommended Video Picture Analyzer consists of the following components:


4.2.5.3 Audio Timing Analyzer

The Audio Timing Analyzer analyzes the timing and content of audio-related packets and of using this information to determine compliance with the relevant specifications. Proper operation of the Audio Timing Analyzer is only guaranteed if the Source DUT passes all tests in the Source Protocol section.


The Audio Timing Analyzer shall be capable of any of the following that are supported by the DUT:

• Extracting the ACR, Audio Sample Packets, High Bitrate Audio Packets and accurately timing the number of TMDS clocks since the arrival of the previous such packet.

• Extracting the Audio InfoFrame Packets and timing their arrival to determine which video field the packet was transmitted in.

• Extracting the audio sample size, sample rate, and sample rate accuracy encoded within the Channel/Status bits of the Audio Sample Packets and High Bitrate Audio Packets.

• Extracting the N and CTS values from the ACR Packets.

• Determining the TMDS clock frequency with an accuracy of ±1ppm.

• Using the above information to determine whether these values and timings are within the requirements of the HDMI and IEC 60958 specifications.

Recommended Test Equipment #1 – Can be used for 74.25MHz operation and below, and for DUTs without support for High Bitrate Audio.


Recommended Test Equipment #2 – Can be used for all major TMDS clock frequencies.


4.2.5.4 Audio/Video Protocol Generator

Sink DUTs are tested using an Audio/Video Protocol Generator.


The Audio/Video Protocol Generator shall be capable of operating in two modes:




• outputting a DVI signal carrying:

- a valid video signal using RGB pixel encoding, or,

• outputting an HDMI signal carrying:

- a valid video signal using RGB pixel encoding and,

- a valid IEC60958 audio signal

- a valid Audio InfoFrame

…where the video signal may be configured to be any CEA Video Format Timing that is supported by the Sink DUT:…and where the audio signal consists of a 1kHz sine wave or other readily identifiable test signal and may be configured to use any of the following formats supported by the Sink DUT:

- PCM at 32, 44.1, 48, 88.2, 96, 176.4 and 192kHz

- And optionally, Dolby Digital (AC-3) at 44.1 and 48kHz

Also capable of generating the following special patterns:

Valid 640x480p video frame with every horizontal and vertical blanking interval completely filled with one or more Data Islands and with all Control Periods either 12 or 13 characters in length. Note: 640x480p has 160 pixels in HBLANK (158 clocks after removing the Video Guard Band). A four packet Data Island can be centered within this period. There are multiple arrangements possible for VBLANK period.

720x480p and 720x576p with 2 channel 48kHz audio HDMI signal with following characteristics:

• During VBLANK, one or more Data Islands contain a valid

- Null Packet (0x00)

- General Control Packet (0x03)

- Vendor-specific InfoFrame Packet (0x81)

- AVI InfoFrame Packet (0x82)

- Source Product Description Packet (0x83)

- Audio InfoFrame Packet (0x84)

- MPEG Source InfoFrame Packet (0x85).

• The Vendor-specific InfoFrame Packet will contain a length of 3 and a 24-bit IEEE registration identifier belonging to the HDMI Licensing, LLC (0x000C03).

• The General Control Packet will have Set_AVMUTE and Clear_AVMUTE clear (0).

720x480p and 720x576p with 2 channel 48kHz audio HDMI signal with following characteristics:


- ACP Packet (0x04)

- ISRC1 Packet (0x05)

- ISRC2 Packet (0x06)




Recommended Test Equipment #1 – For testing at all major TMDS clock frequencies, all major CEA video formats and with all color depths.

The recommended Audio/Video Protocol Generator consists of the following components:

• Tektronix DTG5274/DTG5334 Digital Pattern/Timing Generator-based setup/ AWG7122B Arbitrary Waveform Generators (AWG) with Opt 01,06 and 08, described in section 4.2.1.9 (TMDS Signal Generator) above

Recommended Test Equipment #2 – Can be used only for the HDMI Primary Video Formats at a color depth of 24 bits/pixel in Test ID 8-24 and 30.


• Agilent E4887A-007-based setup, described in section 4.2.1.9 (TMDS Signal Generator) above

Recommended Test Equipment #3 – For testing at all major TMDS clock frequencies, all major CEA video formats and with all color depths in Test ID 8-16, 21, 23, 25, 29 and 31.

• Agilent N5998A -based setup, described in section 4.2.4.2 (Protocol Analyzer) above

Recommended Test Equipment #4 – Can be used only for High-Bitrate Audio Stream Packets and One Bit Audio Sample Packets in Test ID 8-27 and 28.


• ASTRODESIGN VG-849-C-A Unit

• Personal Computer (PC) running a Windows 98, 2000, NT or XP OS with RS-232C or Ethernet port available and connected to the ASTRODESIGN VG-849-C-A Unit for contoling the Unit, editing the parameter and executing the tests

• ASTRODESIGN software SP-8848 for VG-849C-A running on the PC

• RS-232C or Ethernet cable connected between VG-849-C-A Unit and the PC



5 Tests – Cable Assembly Adopters shall submit to the ATC any new Cable Assembly product that has a length that exceeds previously submitted cable products in each cable category or that has construction substantially different than that of previously submitted cable products.

In addition, in the case of Type E-E and Automotive Relay (Type E-A) Cable Assembly for Automotive, which may have one or more relay-connector(s) between Type E plugs, or Type E plug and Type A relay receptacle, the following change requires for the adopter to submit to the ATC any new Cable Assembly product: - When Cable Assembly has more relay-connectors than previously submitted cable product

Note that a relay-connector consists of a Type E plug and a Type E receptacle with mating keys.

Due to the difficulty of accessing the plug contacts directly, cable assembly tests may be performed using standard HDMI receptacles, at test points CTP1 and CTP2 shown in Figure 5-1 (corresponding to TP3 and TP4 as used in the HDMI Specification). Also, CE Relay cable assembly tests may be performed using standard HDMI receptacles, at test points CTP1 and CTP5 shown in Figure 5-2 (corresponding to TP3 and TP6 as used in the HDMI Specification). And, Automotive Relay cable assembly tests may be performed using standard HDMI plugs, at test points CTP5 and CTP2 shown in Figure 5-3 (corresponding to TP6 and TP4 as used in the HDMI Specification).

Figure 5-1 Cable Test Points


Section 5 Tests – Cable Assembly


Figure 5-2 CE Relay Cable Test Points

Figure 5-3 Relay Cable Test Points




5.1 Cable – Mechanical

Test ID 5-1: Connector Maximum Envelope

Reference Requirement

[HDMI: 4.1.9] Connector Drawings

<See reference for details.>

Test Objective

Verify that DUT’s connector shell and cable fit inside minimum allowable receptacle envelope.

Required Test Method

1) Measure all overmold dimensions.

[Verify that all dimensions fall within maximum permitted values]:

2) if overmold is closer than 9mm for Type A and Type B, 6.3mm for Type C, 5.35mm for Type D, 22.75ms for Type E to the tip of the shell then FAIL

3) For the following, measure the maximum extension from the shell in the rigid portion of the connector, not in the area where the cable can flex.

4) If connector is Type A:

4.1) If overmold extends more than 3.5mm above or below connector shell then FAIL

4.2) if overmold extends more than 3.5mm to the left or right of the shell then FAIL

5) If connector is Type B:

5.1) If overmold extends more than 4.5mm above or below connector shell then FAIL


6) If connector is Type C:

6.1) if overmold is wider than 14mm then FAIL

6.2) if overmold is taller than 8.4mm then FAIL

7) If connector is Type D:

7.1) if overmold extends more than 2.9mm above or below connector shell then FAIL


8) If connector is Type E:

8.1) if overmold extends more than 2.5mm above or below connector shell then FAIL


Recommended Test Method

Perform steps in Required Test Method above using a ruler, caliper, micrometer or similar.




5.2 Cable – Electrical: Performance Tests

Test ID 5-2: Wire Assignment


[HDMI: Table 4-14] Type A-to-Type A Cable Wire Assignment

Wire assignment of Type A / Type A cable assembly

[HDMI: Table 4-15] Type A-to-Type B Cable Wire Assignment

Wire assignment of Type A / Type B cable assembly

[HDMI: Table 4-16] Type B-to-Type B Cable Wire Assignment

Wire assignment of Type B / Type B cable assembly

[HDMI: Table 4-18] Type C-to-Type A Cable Wire Assignment

Wire assignment of Type C / Type A cable assembly

[HDMI: Table 4-19] Type D-to-Type A Cable Wire Assignment

Wire assignment of Type D / Type A cable assembly

[HDMI: Table 4-20] Type E-to-Type E Cable Wire Assignment

Wire assignment of Type E / Type E cable assembly

[HDMI: Table 4-21] Type E-to-Type A Cable Wire Assignment

Wire assignment of Type E / Type A cable assembly

Test Objective

Verify that all specified connections are present in cable and that no connections are present where not specified.


If CDF field Cable_Type is “Wire”.

Refer to one connector as “Connector 1” and the other as “Connector 2”.

Using the appropriate reference for the type of cable tested (Type A/Type C/Type D/Type E, Type A vs. Type B connectors) perform the following:

For each pin “X” from 1 to 19 (if Type A/C/D/E) or 29 (if Type B) on connector 1:

• For each pin “Y” from 1 to 19 (if Type A/C/D/E) or 29 (if Type B) on connector 2:

- check connection between Connector 1 pin X and Connector 2 pin Y

- if connection is specified between Connector 1 pin X and Connector 2 pin Y and no valid connection, then FAIL

- if no connection is specified between Connector 1 pin X and Connector 2 pin Y and not a valid no-connect, then FAIL

If cable has Type A connector on one end and Type B on other end:

• For each pin “X” from 13 to 21, 23 and 24 on Type B connector:

- For each pin “Y” from X+1 to pin 24 on Type B connector:




check connection between pin X and pin Y

if connection exists between pin X and pin Y then FAIL

If CDF field Cable_Type is “Passive”

For CEC, SDA, SCL, +5V, HPD, Utility and Ground lines, confirm that each pin has valid no-connection with any pins at both side except where a connection is specified in the Cable Wire Assignment table.

• if no connection is specified and not a valid no-connection, then FAIL

If CDF field Cable_Type is not “Wire”

If CDF field Cable_CEC_Connection is “Y”, confirm that CEC pins at both ends has valid connection.

• if no valid connection, then FAIL

If CDF field Cable_DDC_Connection is “Y”, confirm that SCL/SDA pins at both ends have valid connection.


If CDF field Cable_+5V_Connection is “Y”, confirm that +5V Power pins at both ends have valid connection.


If CDF field Cable_HPD_Connection is “Y”, confirm that HPD pins at both ends have valid connection.


If CDF field Cable_Utility_Connection is “Y”, confirm that Utility pins at both ends have valid connection.


If any of the above CDF fields is "Y",

• if Cable_Ground_Connection is "N", then FAIL

If CDF field Cable_Ground_Connection is “Y”, confirm that Ground pins at both ends have valid connection.



A valid connection is defined as <100Ω. For all signal types, a valid no-connection is defined as >1MΩ. Perform the “Required Test Method” using a standard Digital Multi-meter set for measurement of Resistance using the valid connection criteria above.




Test ID 5-3: TMDS Data Eye Diagram

Reference Requirement [HDMI: 4.2.6] Cable Assembly

Category 1 (up to 74.25MHz): The cable shall meet either:

A) the parameters specified for Category 1 cables in Table 4-29, or,

B) the non-equalized eye diagram requirements at 74.25MHz.

Category 2 (up to 340MHz): The cable shall meet either


B) all of:

- the non-equalized eye diagram requirements at 165MHz and,

- the equalized eye diagram requirements at 340MHz

Category 2 (TMDS clock up to 340MHz): Any passive equalizer circuit embedded in the cable shall meet either


B) all of:

- the non-equalized eye diagram requirements at 165MHz and,

- the equalized eye diagram requirements at 340MHz

[HDMI: 4.2.7] +5V Power Signal

“A Cable Assembly shall be able to supply a minimum of 50mA to the +5V Power pin to a Sink, even when connected to a Source supplying no more than 55mA.”

Test Objective

Confirm that the Cable Assembly outputs a compliant data eye.


All cables must be capable of passing this test. The ATC will perform this test on all cable DUTs. However, for self-testing, this test may be skipped if CDF field Cable_Type is “Wire” or “Passive” and all of the tests in Section 5.3, Cable – Electrical: Parametric Tests, have passed.

If CDF field Cable_Type is “Wire”, “Passive” and “Active”, then:

Setup:

1) If CDF field Cable_Category is neither 1 nor 2 then FAIL.

2) If CDF field Cable_Configuration is “Automotive_EE”/“Automotive_AA”/“Automotive_EA”, and if CDF field Cable_Category is 2, then FAIL.

3) If CDF field Cable_Configuration is “Automotive_EA”, connect TMDS Signal Generator to the input TPA-P using the Automotive EA Cable Emulator. Else, connect the TMDS Signal Generator to the input TPA-R.

4) If the CDF field Cable_Type is “Active” (and optionally for all cables) then:




5) Connect a +5V power supply between the +5V_Power and DDC/CEC ground signals on the input TPA and connect a 1.2kohm resistor between the +5V_Power and HPD signals on the output side. Provide additional power supply if required by cable to operate properly.

6) If CDF field Cable_Category == 1, “test frequency” for the following is 74.25MHz.

7) If CDF field Cable_Category == 2, “test frequency” for the following is 165MHz.

8) If software TTC equivalent method is not being used, then, on the path between the TMDS Signal Generator and the DUT, connect a transition-time-converter (TTC) on the + and – signals of each tested TMDS_DATA pair.The value of the TTC must be sufficient to cause the signal slew rate of the cable input signal to match the slew rate of the leading edges of the HDMI-specified TP1 eye diagram at the test frequency. Add TTCs to the TMDS_CLOCK outputs, as needed, to create a TMDS rise/fall time between 75pS and 110pS.

9) Set voltage swing to 400mV and output common mode to 3.1V for every TMDS single-ended signal.

Calibrate Input Eye: (Calibration must occur as often as necessary to ensure a worst-case TP1/TP5 eye is used for each test.)

10) Using a TMDS Signal Generator, transmit a video format corresponding to the test frequency to the Cable DUT. For 340MHz test frequency, a 335MHz format may be used.

11) Connect the Digital Oscilloscope to the input TPA using a separate TPA-P. Supply 3.3V termination power to the probe or TPA-P if needed.

12) Inject 500kHz jitter onto the TMDS_CLOCK signal, starting with a jitter amplitude of 0.3*TBIT (worst data jitter permitted at TP1, e.g. 0.4nS for a 74.25MHz clock).

13) Using Digital Oscilloscope, measure eye diagram of all three TMDS_DATA pairs at the input to the Cable DUT (without application of reference cable equalizer). (If software TTC equivalent method is being used instead of step 8 then enable the software TTC in the oscilloscope.)

14) Adjust the jitter amplitude of the TMDS_CLOCK jitter to create the input worst-case data eye diagram. If CDF field Cable_Configuration is “Automotive_EA”, this will be attained when the measured data eye nearly touches both the left-most and right-most points of the TP5 eye mask but without causing a TP5 eye mask violation. Else, this will be attained when the measured data eye nearly touches both the left-most and right-most points of the TP1 eye mask but without causing a TP1 eye mask violation. (Verify that appropriate TTC is chosen to generate appropriate TP1 mask.) Record this calibrated jitter magnitude for subsequent tests.

15) Disconnect Digital Oscilloscope and the TPA-P from the input TPA-R.

Measure Output Eye:

16) Connect Cable DUT between input and output TPA-R adapters with the Digital Oscilloscope connected to the output TPA-R. If the cable is unidirectional (CDF field Cable_Unidirectional = “Y”) then connect in the specified direction.

17) Supply 3.3V termination power to the probe or TPA if needed.

18) Measure the cable’s output eye diagrams for all TMDS_DATA channels using the CRU. If software TTC equivalent method is being used then enable the software TTC in the oscilloscope. If the test frequency is 340MHz, also apply the Reference Cable Equalizer before measurement. If CDF field Cable_Configuration is “Automotive_EE” or “Automotive_EA”, also apply the Reference Cable Equalizer before measurement.




• For jitter measurements (informative), use a measurement box vertical setting of: 0V±5mV

19) If CDF field Cable_Configuration is “Automotive_AA”, if any measured eyes do not meet the minimum eye mask for Automotive at TP5, then FAIL. Else, if any measured eyes do not meet the Sink minimum eye mask then FAIL

20) If +5V Power is supplied at 5), measure the current on +5V Power. If the current on +5V Power ever exceeds 5 mA then FAIL

21) If CDF field Cable_Category == 2 then repeat the above steps starting at “Calibrate Input Eye:” at a test frequency of 340MHz but enable the Reference Cable Equalizer before measuring the cable output eye diagram.

22) If the CDF field Cable_Type is not “Active” then

23) Swap the TMDS_DATA0 and TMDS_CLOCK pairs at the input to the cable DUT (from the TMDS Signal Generator) and also swap the pairs at the oscilloscope, either manually or by changing scope settings.

24) Measure the TMDS_DATA0 data eye diagram now present on the DUT’s TMDS_CLOCK channel following the steps in “Measure Output Eye” above.

• Failure of this TMDS_CLOCK eye measurement does not constitute a failure of the overall compliance check. However, the adopter is strongly advised to correct the issue before shipping the product.

25) If the CDF field Cable_Type is “Active” then perform above test using a Vicm of 3.3V.

If the CDF field Cable_Type is “Converter” then perfom above steps under the following condition

• Cable_Category == 1 then use 1080i TMDS signal as 74.25MHz signal and perform above test under the both condition of Vicm of 3.1V and 3.3V

• If CDF field Cable_Category == 2 then the following steps shall be used - Use 1080i TMDS signal as 74.25MHz signal and perform above test under the both condition of Vicm of 3.1V and 3.3V - Use 1080p TMDS signal as 165MHz signal and perform above above test under the both condition of Vicm of 3.1V and 3.3V - Use 1080p with 48-bit pixel depth TMDS signal as 340MHz signal and perform above above test under the both condition of Vicm of 3.1V and 3.3V

Software TTC Equivalent Test Method:

If CDF field Cable_Type is “Wire” then Software TTC may be used as an Equivalent Test Method.

In this case, do not connect hardware TTC to output of TMDS Signal Generator but instead configure the oscilloscope to apply a software transition-time filter that causes the eye to match the slew rate of the HDMI-specified TP1 eye diagram at the test frequency.




Recommended Test Method – Tektronix

For Category 1 Testing Only:

Setup 1. Test ID 5-3: TMDS Data Eye Diagram: Tektronix TDS7404-based Setup

No. Description Recommended TE Reference Qty. 1 Digital Oscilloscope Tektronix TDS7404 4.2.1.3 1 2 Differential SMA Probes Tektronix P7350SMA 2 3 TMDS Signal Generator Tektronix DTG5274 or

DTG5334 4.2.1.9 1

4 DC Power Supply 3.3V <See reference> 4.2.1.15 2 5 SMA Cables <See reference> 4.2.1.7 8 6 TPA-R (for cable output) Tektronix TPA-R-TDR, EFF-

HDMI-TPA-R or EFF-HDMIC-TPA-R

4.2.1.1.7 1

7 TPA-R (for cable input) Tektronix TPA-R-TDR, EFF-HDMI-TPA-R or EFF-HDMIC-TPA-R

4.2.1.1.7 1

8 TPA-P (for eye calibration) Tektronix TPA-P-TDR, EFF-HDMI-TPA-P or EFF-HDMIC-TPA-P

4.2.1.1.7 1

9 Transition Time Converters (TTC)

<See reference> 4.2.1.18 2+ (if needed)




For Category 1 or Category 2 Testing:

Setup 2. Test ID 5-3: TMDS Data Eye Diagram: Tektronix DTG5334-based Setup

No. Description Recommended TE Reference Qty. 1 Digital Oscilloscope Tektronix DPO70804 with option

2XL or DSA70804 scope 4.2.1.3 1

2 Differential SMA Probes Tektronix P7313SMA 2 3 TMDS Signal Generator Tektronix DTG5334, including three

(3) DTGM30 modules 4.2.1.9 1

4 DC Power Supply 3.3V <See reference> 4.2.1.15 2 5 SMA Cables <See reference> 4.2.1.7 8 6 TPA-R (for cable output) EFF-HDMI-TPA-R / EFF-HDMI-

TPA-R-CAL or EFF-HDMIC-TPA-R4.2.1.1.3 1

7 TPA-R (for cable input) EFF-HDMI-TPA-R-CAL 4.2.1.1.7 1 8 TPA-P (for eye calibration) EFF-HDMI-TPA-P or EFF-HDMIC-

TPA-P 4.2.1.1.7 1

9 Transition Time Converters (TTC)

<See reference> 4.2.1.18 2+ (if needed)




1) If CDF field Cable_Type is “Wire” then

2) Optionally configure the oscilloscope to apply a software transition-time filter that causes the eye to match the slew rate of the HDMI-specified TP1 eye diagram at the test frequency. The degree of filtering will depend upon the rise time of the DTG.

3) If CDF field Cable_Type is not “Wire” or if no software TTC is being used then

4) Add a transition-time-converter module (TTC) onto each of the six TMDS_DATA signals with a value that causes the signal slew rate to match the slew rate of the leading edges of the HDMI-specified TP1 eye diagram.

5) Connect DTG to “input” TPA-R using eight 1 meter (preferable) or 1.5 meter SMA cables or use recommended cable supplied with TPA-R-TDR fixture:

- Module A, Channel 1+, 1–: connect to TMDS_CLOCK+, –

- Module A, Channel 2+, 2–: No connect

- Module B, Channel 1+, 1–: connect to TMDS_DATA0+, – (“DATA0_P”, “DATA0_N”)

- Module B, Channel 2+, 2–: connect to TMDS_DATA1+, –

- Module C, Channel 1+, 1–: connect to TMDS_DATA2+, –

- Module C, Channel 2+, 2–: No connect

6) Connect Oscilloscope to “input” TPA-R by using a TPA-P with two Differential Probes. Supply 3.3V power to the probes.

Perform the steps in the Required Test Method. Tektronix TDSHT3 software may be used to automate the test sequence.

Note that if +5V Power is supplied between the +5V_Power and DDC/CEC ground signals on the input TPA, connect a 1.2kohm resistor between the +5V_Power and HPD signals on the output side, then measure the current on +5V Power.

Note that this configuration allows the addition of jitter to the TMDS_CLOCK pair using the DTG. Alternatively, an AWG, configured as shown in Test ID 8-7, could be used to generate the TMDS_CLOCK signal with jitter.

Note: The setup drawings above show the testing configuration for the output measurement steps. For the eye calibration steps, use a TPA-P on the oscilloscope, connected directly to the “input” TPA-R from the TMDS Signal Generator.




Recommended Test Method – Tektronix Direct Synthesis, Type-E Cable Testing

Setup 3. Test ID 5-3: TMDS Data Eye Diagram: Tektronix Direct Synthesis Type-E

Instead of direct GPIB-HS connection the Tektronix Direct Synthesis setup can be used using ENET-GPIB connection or NI-GPIB-USB connection.




No. Description Recommended TE Reference Qty. 1 TMDS Signal Generator Tektronix AWG7102 w opt 01 and

06 or AWG7122B w opt 01,06 & 08 or superior series AWG7000 series

4.2.1.9 2

2 Arbitrary Function Generator Tektronix AFG3102 or superior AFG 3K series.

4.2.1.9 1

3 Digital Oscilloscope Tektronix DPO/DSA70000 series with BW >/= 8GHz

4.2.1.3 1

4 TDSHT3 Software Tektronix HDMI Compliance Test Software with Direct Synthesis capability version 5.0 or equivalent

4.2.1.9 1

5 DC Power Supply < See Reference> 4.2.1.15 1 6 SMA/BNC Cables and

adapters < See Reference> 4.2.1.7 As

needed7 Bias -Tees Mini-Circuits ZX85-12G-S+ 4.2.1.9 8 8 HDMI Test Fixture set Tektronix TF-HDMIE-TPA-KIT 4.2.1.1.7 1 set 9 120PS filters Picosecond Pulse Labs 5915-100-

120PS 4.2.1.18 8

10 Differential Probes TektronixP7313SMA 4.2.1.5 2 or 4

Do the following steps for each TMDS clock rate supported by the HDMI Cable DUT.

1) Ensure that the HDMI Cable DUT port on which you perform the test is selected.

2) Connect the test equipment and DUT.

3) Connect the two AWGs, Bias-Tees, AFG, DPO/DSA70804, and TPA-R as follows and as shown in the setup diagram. One AWG is used as the MASTER and the other AWG is used as the SLAVE (called AWG1 and AWG2 respectively).

• AWG1 Ch1+ output to 120 PS TTC filter

- 120 PS TTC filter output to Bias-Tee #1 signal input (RF) - Bias-Tee #1 signal output (RF and DC) to TMDS_CLOCK+

• AWG1 Ch1– output to 120 PS TTC filter

- 120 PS TTC filter output to Bias-Tee #2 signal input (RF)

- Bias-Tee #2 signal output (RF and DC) output to TMDS_CLOCK–

• AWG1 DC_OUT (1) to Bias-Tee #1 and #2 DC-level input (DC)



- Bias-Tee #3 signal output (RF and DC) to TMDS_DATA0+



- Bias-Tee #4 signal output (RF and DC) to TMDS_DATA0–



















• AFG3102 Ch1 using BNC-T adapter to trigger input of AWG1 and AWG2 with BNC cables

• AFG3102 Ch2 to be connected to Ext Ref input of AWG 2 with BNC cable

• AWG1 10 MHz Ref output to be connected to AFG3102 Ext Ref input with BNC cable

4) Connect TPA-R to HDMI Cable DUT.

5) Configure the setup as follows:

• Run the TDSHT3 software (with the Direct Synthesis capability version 5.0 or equivalent) on the digital oscilloscope.

• Select the DDS method in the configuration panel of the Cable Eye Diagram Test.

• Select the cable frequency based on the category of the cable (74 MHz Type E).

• In the Signal Source dialog box, check the GPIB connection of the two AWGs and the AFG to ensure proper connection.

• Once the test completes, you can view the result.


Note: The setup drawings above show the testing configuration for the output measurement steps. For the eye calibration steps, use a TPA-P on the oscilloscope, connected directly to the “input” TPA-R from the TMDS Signal Generator.




Recommended Test Method – Agilent

Setup 4. Test ID 5-3: TMDS Data Eye Diagram: Agilent ParBERT-based Setup




No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Agilent DSO80000B

(>=8GHz) 4.2.1.3 1

2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 2 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 4 4 TMDS Signal Generator Agilent E4887A 4.2.1.9 1 5 Bias-T <See reference> 4.2.1.9 8 6 DC Power Supply <See reference> 4.2.1.15 3 7 SMA Cable Agilent N4871A 4.2.1.7 8 8 Transition Time Converters (TTC) <See reference> 4.2.1.18 2 + 9 TPA-P (for eye calibration) Agilent N1080A Option 101 4.2.1.1.6 1 10 TPA-R (for cable input and output) Agilent N1080A Option 102 4.2.1.1.7 2 11 Agilent TPA-Control Agilent N1080A Option 103 4.2.1.1.6 1

1) If CDF field Cable_Type is “Wire” then

2) Optionally configure the oscilloscope to apply a software transition-time filter that causes the eye to match the slew rate of the HDMI-specified TP1 eye diagram at the test frequency.

In "Select Test" tab of N5399A HDMI compliance test software,

select Cable/Receiver test

select Eye diagram

In "Configure" tab of N5399A

select "manual select" in the Equalizer/Filter mode

Then measurement start

After the equalizer/filter selection window appears, select proper software TTC file for the measured clock rate.


4) Add a transition-time-converter module (TTC) onto each of the six TMDS_DATA signals with a value that causes the signal slew rate to match the slew rate of the leading edges of the HDMI-specified TP1 eye diagram. Add TTCs to the TMDS_CLOCK outputs, as needed, to create a TMDS rise/fall time between 75pS and 110pS.

5) Connect the Agilent E4887A to the input TPA-R.

• Attach Bias-Tees to each Agilent ParBERT output and connect Bias-Tee “DC” input to power supply at 3.1V.

• Attach Transition Time Converter for tested frequency to each Bias-Tee’s output.

• Clockgroup A, Channel 1+, 1–: connect to TMDS_CLOCK+, –

• Clockgroup B Channel 1+, 1–: connect to TMDS_DATA0+, – (“DATA0_P”, “DATA0_N”)

• Clockgroup B, Channel 2+, 2–: connect to TMDS_DATA1+, –


• Clockgroup B Channel 4+, 4–: No connect





Perform the steps in the Required Test Method.


Note: The setup drawings above shows the testing configuration for the output measurement steps. For the eye calibration steps, use a TPA-P on the oscilloscope, connected directly to the “input” TPA-R from the TMDS Signal Generator.

For Cable_Configuration = “Automotive_EA” Only:

Setup 4. Test ID 5-3: TMDS Data Eye Diagram: Agilent Cable Emulator-based Setup

Agilent E4887A HDMI TMDS Signal Generator

E4438C E4438C

TPA-Control

DC Power Supply for Bias-T

DC Power Supply

TPA-R

Cable DUT

DSO80000B

Bias-T

DC Power Supply

Transition Time Converters

Cable Emulator

TPA-P




No. Description Recommended TE Reference Qty.

1 8GHz Digital Oscilloscope Agilent DSO80000B 4.2.1.3 1

2 Differential Probe Amplifier Agilent 1168A or 1169A 4.2.1.4 2

3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 4

4 TMDS Signal Generator Agilent E4887A 4.2.1.9 1

5 Bias-T <See reference> 4.2.1.9 8

6 DC Power Supply <See reference> 4.2.1.15 3

7 SMA Cable Agilent N4871A 4.2.1.7 8

8 Transition Time Converter <See reference> 4.2.1.18 8

9 TPA-P Test Assembly Agilent N1080A Option 101 4.2.1.1.6 1

10 TPA-R Test Assembly Agilent N1080A Option 102 4.2.1.1.7 2

11 Agilent TPA-Control Agilent N1080A Option 103 4.2.1.1.6 1

12 Cable Emulator <See reference> 4.2.1.17 1

1) If CDF field Cable_Category is “Wire” then

2) Optionally configure the oscilloscope to apply a software transition-time filter that causes the eye to match the slew rate of the HDMI-specified TP1 eye diagram at the test frequency.

- In "Select Test" tab of N5399A HDMI compliance test software,

- select Cable/Receiver test

- select Eye diagram

- In "Configure" tab of N5399A

- select "manual select" in the Equalizer/Filter mode

- Then measurement start

- After the equalizer/filter selection window appears, select proper software TTC file for the measured clock rate.


4) Add a transition-time-converter module (TTC) onto each of the six TMDS_DATA signals with a value that causes the signal slew rate to match the slew rate of the leading edges of the HDMI-specified TP1 eye diagram. Add TTCs to the TMDS_CLOCK outputs, as needed, to create a TMDS rise/fall time between 75pS and 110pS.

5) Connect the TMDS Signal Generator (Agilent E4887A) to the input TPA-R.

• Attach Bias-Tees to each Agilent E4887A output and connect Bias-Tee “DC” input to power supply at the test-directed common mode voltage.




• Attach Transition Time Converter for tested frequency to each Bias-Tees output,

• Attach a Cable Emulator for TP5

• Clockgroup A, Channel 1+, 1–: connect to TMDS_CLOCK+, –

• Clockgroup B Channel 1+, 1–: connect to TMDS_DATA0+, – (“DATA0_P”, “DATA1_N”)



• Clockgroup B Channel 4+, 4–: No connect


Perform the steps in the Required Test Method.


Note: The setup drawings above shows the testing configuration for the output measurement steps. For the eye calibration steps, use a TPA-P on the oscilloscope, connected directly to the “input” TPA-R from the TMDS Signal Generator.




5.3 Cable – Electrical: Parametric Tests The tests in this section correspond to the cable parameters specified in [HDMI: Table 4-29] through [HDMI: Table 4-33].

Test ID 5-4: Intra-Pair Skew

Reference Requirement [HDMI: Table 4-29, 30] Cable Assembly TMDS Parameters

Cable Assembly Intra-Pair Skew should be no more than 151ps.

[HDMI: Table 4-31] Automotive Cable Assembly TMDS Parameters


[HDMI: Table 4-32] CE Relay Cable Assembly TMDS Parameters


[HDMI: Table 4-33] Automotive Relay Cable Assembly TMDS Parameters


Test Objective

Confirm that the Cable Assembly does not have intra-pair skew on the TMDS lines greater than that allowed in the specification.


If CDF field Cable_Type is “Active”, then skip this test

If CDF field Cable_Type is “Converter”, Test ID 7-7 (Intra-Pair skew test for source) shall be performed for both ATC testing and self testing under the condition that PASS/FAIL criteria is the worst Intra-Pair skew of the cable (151p/112p if CDF field Cable_Configuration is “Home”, 101p if CDF field Cable_Configuration is “Automotive_AA”). In this case, a TMDS signal generator is connected to the source side of the cable.

If CDF field Cable_Type is “Wire” or “Passive”, this test is always recommended for ATC testing, but for self-testing, this test shall be performed if the Adopter is unable to perform Test ID 5-3 above.

If all tests in section 5.2 have passed then a FAIL on this test does not constitute an overall testing failure.


2) If CDF field Cable_Configuration is “Automotive_EE”/“Automotive_AA”/“Automotive_EA”, and if CDF field Cable_Category is 2, then FAIL.

3) De-skew the measurement equipment according to the manufacturer’s recommended procedure.

4) Connect one TPA-R adapter to each end of Cable DUT.

5) Connect operator to anti-static strap.




6) Connect TDT output (stimulus) channel + side to TMDS_DATA0+ and – side to TMDS_DATA0- pins of input TPA-R adapter.

7) Connect TDT input channel + side to TMDS_DATA0+ and – side to TMDS_DATA0- pins of output TPA-R adapter.

8) Configure TDT to measure the two single-ended signals on channel #2.

9) Set vertical axis to 100 mV/Div and horizontal axis to 100 psec/Div.

10) Measure skew (delay between inputs on channel 2), TIPSKEW, using TDT oscilloscope. Measurement point is absolute voltage +125mV of + side of input channel and -125mV of – side of input channel.

11) If the CDF field Cable_Category is 1

12)If CDF field Cable_Configuration is “Home”:

13) If (TIPSKEW > 151ps) then FAIL.

14) Else if CDF field Cable_Configuration is “Automotive_EE”:


16) Else if CDF field Cable_Configuration is “Automotive_AA”:


18) Else if CDF field Cable_Configuration is “Automotive_EA”:


20) Else (CDF field Cable_Category is not 1)


22) Repeat the test on the remaining TMDS pairs.




Recommended Test Method – Tektronix Test ID 5-4: Intra-Pair Skew

Setup 5. Test ID 5-4: Intra-Pair Skew: Tektronix

No. Description Recommended TE Reference Qty. 1 TDR/TDT Oscilloscope Tektronix TDS8200B 4.2.1.11 1 2 SMA Cables <See reference> 4.2.1.7 4 3 TPA-R-SMA Fixture Tektronix TPA-R-TDR or

EFF-HDMI-TPA-R or EFF-HDMIC-TPA-R

4.2.1.1.7 2

Perform the Required Test Method using the Recommended Test Equipment shown above.

In case of Converter cable, refer to Test ID 7-7, with modified PASS/FAIL criteria as noted above. When performing Test ID 7-7, TPA-R Fixture is used instead of TPA-P Fixture.




Test ID 5-5: Inter-Pair Skew

Reference Requirement [HDMI: Table 4-29, 30] Cable Assembly TMDS Parameters

Cable Assembly Inter-Pair Skew should be no more than 2.42ns

[HDMI: Table 4-31] Automotive Cable Assembly TMDS Parameters


[HDMI: Table 4-32] CE Relay Cable Assembly TMDS Parameters


[HDMI: Table 4-33] Automotive Relay Cable Assembly TMDS Parameters


Test Objective

Confirm that the Cable Assembly does not have inter-pair skew on the TMDS lines greater than that allowed in the specification.


If CDF field Cable_Type is “Active”, Test ID 7-6 (Inter-Pair skew test for source) shall be performed for both ATC testing and self testing under the condition that PASS/FAIL criteria is the worst Inter-Pair skew of the cable (2.42n/1.78n if CDF field Cable_Configuration is “Home”, 1.61n if CDF field Cable_Configuration is “Automotive_AA”). In this case, a TMDS signal generator is connected to the source side of the cable. Configure the TMDS signal generator to output an HDMI signal at the following test frequency;

If CDF field Cable_Category == 1, the test frequency is 74.25MHz.

If CDF field Cable_Category == 2, the test frequency is 340MHz.

If CDF field Cable_Type is “Converter”, Test ID 7-6 (Inter-Pair skew test for source) shall be performed for both ATC testing and self testing under the condition that PASS/FAIL criteria is the worst Inter-Pair skew of the cable (2.42n/1.78n if CDF field Cable_Configuration is “Home”, 1.61n if CDF field Cable_Configuration is “Automotive_AA”). In this case, a TMDS signal generator is connected to the source side of the cable.



1) De-skew the measurement equipment according to the manufacturer’s recommended procedure

2) Connect one TPA-R adapter to each end of Cable DUT.

3) Set vertical axis to 100 mV/Div and horizontal axis to 100 psec/Div.

4) Configure TDT to measure the differential signal.




5) For each TMDS differential pair (TMDS_CLOCK, DATA0, DATA1…) perform the following:

5.1) Connect TDT output channel to + and - pins of tested TMDS pair on input TPA-R adapter using SMA cables.

5.2) Connect TDT input channel to + and - pins of tested TMDS pair on output TPA-R adapter using SMA cables.

5.3) Measure the waveform and save for later analysis.

6) Inter-pair Skew measurement point must be 50% of the amplitude of the driven step pulse (consult TDT equipment specifications for this value). Measure skew (delay between saved waveforms), TXPSKEW, for every combination of channels. This can be done in one operation by overlaying all four saved waveforms and noting left-most and right-most edges.

7) If the CDF field Cable_Category is 1 then

8) If CDF field Cable_Configuration is “Home”:

9) If (TXPSKEW > 2.42ns) then FAIL.







16) If the CDF field Cable_Category is 2 then

17) If (TXPSKEW > 1.78ns) then FAIL

18) Repeat the test on the remaining TMDS pairs.




Recommended Test Method Test ID 5-5: Inter-Pair Skew

Setup 6. Test ID 5-5: Inter-Pair Skew: Tektronix

No. Description Recommended TE Reference Qty. 1 TDR/TDT Oscilloscope Tektronix TDS8200B 4.2.1.11 1 2 SMA Cables <See reference> 4.2.1.7 4 3 TPA-R-SMA Fixture Tektronix TPA-R-TDR or


4.2.1.1.7 2

Perform Required Test Method using Recommended Test Equipment shown above.

In case of Active cable, refer to Test ID 7-6, with modified PASS/FAIL criteria as noted above.

In case of Converter cable, refer to Test ID 7-6, with modified PASS/FAIL criteria as noted above. When performing Test ID 7-6, TPA-R Fixture is used instead of TPA-P Fixture.




Test ID 5-6: Far End Crosstalk

Reference Requirement [HDMI: Table 4-29, 30] Cable Assembly TMDS Parameters [HDMI: Table 4-31] Automotive Cable Assembly TMDS Parameters [HDMI: Table 4-32] CE Relay Cable Assembly TMDS Parameters [HDMI: Table 4-33] Automotive Relay Cable Assembly TMDS Parameters

Cable Assembly far end crosstalk should be less than –20dB.

Test Objective

Confirm that the Cable Assembly does not have crosstalk at the far-end between the TMDS lines greater than that allowed in the specification.



If CDF field Cable_Type is “Active” or “Converter”, then skip this test.If all tests in section 5.2 have passed then a FAIL on this test does not constitute an overall testing failure.

Setup:

1) Setup the network analyzer with measurement frequency range of 300kHz to 5GHz. IF bandwidth is not critical.

2) Calibrate the NA using a 4-port auto-calibration kit, or a standard calibration kit.

3) Calibrate NA, including SMA and TPA fixture, using a port extension function. Less than ±10 degrees at 2.475GHz.

Measure Crosstalk:

4) Connect input end of cable to first TPA-R adapter.

5) Connect output end of cable to second TPA-R adapter.

6) Connect Network Analyzer ports 1 and 2 to the input TPA-R fixture, TMDS_CLOCK channel + and – respectively.

7) Connect Network Analyzer ports 3 and 4 to the output TPA fixture, TMDS_DATA0 + and – respectively.

8) Connect a 50Ω terminator to each of the untested TMDS signals.

9) Measure the crosstalk and find the maximum value (XFE )

10) If XFE ≥ -20dB then FAIL.

11) Repeat the measurement for all remaining combinations of TMDS pairs:




- CLOCK, DATA0

- CLOCK, DATA1

- CLOCK, DATA2

- DATA0, DATA1

- DATA0, DATA2

- DATA1, DATA2

Recommended Test Method – ADVANTEST Test ID 5-6: Far End Crosstalk

Setup 7. Test ID 5-6: Far End Crosstalk: ADVANTEST

No. Description Recommended TE Reference Qty.1 Network Analyzer (NA) ADVANTEST R3860A 4.2.1.10 1 2 SMA Cables <See reference> 4.2.1.7 4 3 50Ω SMA Terminators <See reference> 4.2.1.8 12 4 TPA-R-NA Fixture or TPA-R-

SMA Fixture ADVANTEST CAX-ATI013 or EFF-HDMIC-TPA-R

4.2.1.1.8 2

1) Setup the ADVANTEST analyzer with 1601 measurement points, measurement frequency range of 300kHZ to 5GHz. IF bandwidth is not critical.






Perform the Required Test Method starting with “Measure Crosstalk:”.

Recommended Test Method – Agilent Test ID 5-6: Far End Crosstalk

Setup 8. Test ID 5-6: Far End Crosstalk: Agilent

No. Description Recommended TE Reference Qty.1 Network Analyzer (NA) Agilent E5071C 4.2.1.10 1 2

SMA Cable and adapter, as needed <See reference> 4.2.1.7 4

3 50ohm SMA Terminator <See reference> 4.2.1.8 12 4 TPA-R-SMA Fixture Agilent N1080A H02 4.2.1.1.7 2

1) Setup the Network Anayzer with 1601 measurement points, measurement frequency range of 300kHz to 5GHz. IF bandwidth is not critical.

2) Calibrate the NA using a 4-port E-cal module, or standard calibration kit.

3) Calibrate NA, including SMA and TPA, using port extension function.

Perform the Required Test Method starting with “Measure Crosstalk:”.




Test ID 5-7: Attenuation and Phase


See reference for details.

Test Objective

Confirm that the Cable Assembly does not have attenuation and phase on the TMDS lines greater than that allowed in the specification.



If CDF field Cable_Type is “Active” or “Converter”, then skip this test.


Setup:


2) Connect input end of cable to first TPA-R adapter.

3) Connect output end of cable to second TPA-R adapter.




Measure Attenuation:

7) Connect Network Analyzer ports 1 and 2 to the input TPA fixture, TMDS Clock channel ‘+’ and ‘–‘ respectively.

8) Connect Network Analyzer ports 3 and 4 to the output TPA fixture, TMDS Clock channel ‘+’ and ‘–‘ respectively.

9) Connect a 50Ω terminator to each of the untested TMDS signals.




10) Measure the attenuation using SDD21 log-mag (S-parameter, S-matrix component number 2-1, differential-to-differential).

11) If CDF field Cable_Type is Wire then use HDMI Spec Figure 4-22 for Category 1 cable and Figure 4-23 for Category 2 cable for attenuation limits.

12) If the measured attenuation curve falls below the limits at any point then FAIL.

13) If CDF field Cable_Type is Passive, use HDMI Spec Figure G-1 and G-3 for attenuation and phase curves.

14) If the measured attenuation or phase curve violates the shaded area at any point then FAIL.

15) Repeat the measurement for remaining TMDS channels.

Recommended Test Method – ADVANTEST Test ID 5-7: Attenuation and Phase

Setup 9. Test ID 5-7: Attenuation and Phase: ADVANTEST

No. Description Recommended TE Reference Qty. 1 Network Analyzer (NA) ADVANTEST R3860A 4.2.1.10 1 2 SMA Cables <See reference> 4.2.1.7 4 3 50Ω SMA Terminators <See reference> 4.2.1.8 12 3 TPA-R-NA Fixture or TPA-R-

SMA Fixture ADVANTEST CAX-ATI013 or EFF-HDMIC-TPA-R

4.2.1.1.8 2

1) Setup the ADVANTEST analyzer with 1601 measurement points, measurement frequency range of 300kHz to 5GHz. IF bandwidth is not critical.





3) Calibrate NA, including SMA and TPA fixtures, using a port extension function. Less than ±10 degrees at 2.475GHz is required.

Perform the Required Test Method starting with “Measure Attenuation.”

Note that, in case of the phase differential measurement, phase is measured using u-phase mode The data saved as CSV format will be analyzed by PC software as follows.

Approximate linear line is calculated by using the method of least squares

- Frequency range is from 300K to 1.7GHz.

- The phase value equals to zero at zero crossing point

Recommended Test Method – Agilent Test ID 5-7: Attenuation and Phase

Setup 10. Test ID 5-7: Attenuation and Phase: Agilent

No. Description Recommended TE Reference Qty. 1 Network Analyzer (NA) Agilent E5071C 4.2.1.10 1

2 SMA Cable and adapter, as needed <See reference> 4.2.1.7 4

3 50ohm SMA Terminator <See reference> 4.2.1.8 12

４ TPA-R-SMA Fixture Agilent N1080A H02 4.2.1.1.7 2

1) Connect input end of cable to first TPA-R.

2) Connect output end of cable to second TPA-R.


4) Calibrate the NA using a 4-port E-cal module, or a standard calibration kit.

5) Calibrate NA, including SMA and TPA fixture, using a port extension function.




Perform the Required Test Method starting with “Measure Attenuation:”.Note that, in case of the phase differential measurement, use the automated HDMI cable measurement mode.

Test ID 5-8: Differential Impedance


Cable Assembly differential impedance should be: 100Ω±15%*, measured at connector area, and 100Ω±10%, measured at the cable area. *A single excursion is permitted out to a maximum of 100 ohm+/-25% and of a duration less than 250psecs.

Test Objective

Confirm that the Cable Assembly does not have differential impedance on the TMDS lines outside the tolerances allowed in the specification.


For both ATC and self testing, this test is always required.

If CDF field Cable_Type is “Wire” or “Passive”

1) Connect near end of cable to first TPA-R adapter.

2) Connect far end of cable to second TPA-R adapter.

3) Connect 50Ω terminators to all TMDS + and – signals on the far-end TPA-R.

4) Connect SMA cable from TDR oscilloscope to TMDS_DATA0+ on near-end TPA-R.

5) Connect 50Ω terminators to all untested TMDS signals on near-end TPA-R.

6) Configure the TDR oscilloscope to measure differential impedance in TDR mode:

6.1) TDR effective rise time = 200ps (determined by using the test coupon on TPA-R, if available). Note that many TDRs use a much faster actual rise time and use a digital filter to attain the effective near-200psec rise time.

6.2) Vertical axis set to ‘ohms (Ω)’.

7) View the TDR trace of impedance, ZDIFF, on TMDS_DATA0+:

ZDIFF_CONN_LOW = lowest impedance through the connector and transition area (up to 1ns max)

ZDIFF_CONN_HI = highest impedance through the connector and transition area (up to 1ns max)

ZDIFF_CABLE_LOW = lowest impedance in the cable area (1ns to 2.5ns)




ZDIFF_CABLE_HI = highest impedance in the cable area (1ns to 2.5ns)

8) If (ZDIFF_CABLE_LOW < 90Ω) OR (ZDIFF_CABLE_HI > 110Ω) then FAIL.

9) If (ZDIFF_CONN_LOW < 75Ω) OR (ZDIFF_CONN_HI > 125Ω) then FAIL.

10) If (ZDIFF_CONN_LOW < 85Ω) OR (ZDIFF_CONN_HI > 115Ω) then

11) If the duration of violation is 250psec or longer or there is more than one excursion then FAIL

12) Repeat the test for all remaining + and - TMDS signals.

13) If cable is not unidirectional (CDF field Cable_Unidirectional = “N”) then swap near and far-end TPA-R and repeat the test, otherwise end test.

If CDF field Cable_Type is “Active” or “Converter”, measure the impedance using the same method for sink impedance measurement specified in Test ID 8-8 with following exceptions.

CDF fields Cable_Diff_PowerOn and Cable_Term_Distance are used instead of Sink_Diff_PowerOn and Sink_Term_Distance, respectively.

If CDF field Cable_Type is “Active” and if Cable_Diff_PowerOn is N, measurement area is 0ns to 2.5ns. In this case, PASS/FAIL criteria of 8) through 11) of Test ID 5-8 is applied.




Recommended Test Method – Tektronix Test ID 5-8: Differential Impedance

Setup 11. Test ID 5-8: Differential Impedance: Tektronix

No. Description Recommended TE Reference Qty. 1 TDR/TDT Oscilloscope Tektronix TDS8200B 4.2.1.11 1 2 SMA Cables <See reference> 4.2.1.7 2 4 50Ω SMA Terminators <See reference> 4.2.1.8 14 3 TPA-R-SMA Fixture Tektronix TPA-R-TDR or


4.2.1.1.7 2


In case of Converter cable and Active cable, refer to Test ID 8-8. When performing Test ID 8-8, TPA-R-SMA Fixture is used instead of TPA-P-TDR Fixture.

Note that the Tekronix TDR uses a much faster actual rise time and uses a digital filter to attain the effective near-200psec rise time.




5.4 Cable – Additional Electrical Performance Tests

Test ID 5-9: Reserved

Test ID 5-10: DDC/CEC Line Capacitance and Voltage

Reference Requirement [HDMI: Table 4-35] Maximum Capacitance of DDC Line

SDA capacitance must be ≤ 700pF.

SCL capacitance must be ≤ 700pF.

[HDMI: Table 4-36] Maximum Capacitance of DDC Line for Automotive

SDA capacitance must be ≤ 700pF for Automotive Cable.

SDA capacitance must be ≤ 210pF for CE Relay Cable.

SDA capacitance must be ≤ 490pF for Automotive Relay Cable.

SCL capacitance must be ≤ 700pF for Automotive Cable. SCL capacitance must be ≤ 210pF for CE Relay Cable.

SCL capacitance must be ≤ 490pF for Automotive Relay Cable.

[HDMI: Table 4-40] CEC line Electrical Specifications for all Configurations

Maximum capacitance load of a Cable Assembly is 700pF Maximum capacitance load of an Automotive Cable Assembly is 700pF.

Maximum capacitance load of a CE Relay Cable Assembly is 210pF.

Maximum capacitance load of an Automotive Relay Cable Assembly is 490pF.

Test Objective

Confirm that the capacitance load on the DDC and CEC lines does not exceed the limit in the specification for all of cable type. In case of no-DDC/CEC connection, also confirm that that DDC and CEC pull-ups are at the correct voltage.


If CDF field Cable_DDC_Connection ="Y" then:

1) Set the LCR meter test signal:

• DC Bias voltage = 2.5V

• AC voltage = 3.5V peak-to-peak

• Frequency = 100kHz

2) Verify that the test equipment, including fixtures, is disconnected from the DUT.




3) If the CDF field Cable_Type is “Active” or “Converter” (and optionally for all cables), then Drive +5.0V between +5V Power signal and DDC/CEC Ground signal on the TPA. Provide other power supply if the cable need to operate properly.

4) Connect the DDC/CEC Ground signal to the frame ground of the TPA.

5) Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1con.

6) Attach the test equipment to the DUT and measure the capacitance of the SDA line. This is the total capacitance, C2con.

7) DUT capacitance, CDUT_con = C2con – C1con.

8) Disconnect the DDC/CEC Ground signal to the frame ground of the TPA.

9) Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1dis.

10) Attach the test equipment to the DUT and measure the capacitance of the SDA line. This is the total capacitance, C2dis.

11) DUT capacitance, CDUT_dis = C2dis – C1dis.


13) If (CDUT_con > 700pF) AND (CDUT_dis > 700pF), then FAIL.







20) Repeat the C1con, C1dis and C2con, C2dis measurements and the CDUT_con,CDUT_dis calculation for the SCL pin.









If CDF field Cable_CEC_Connection ="Y" then:








30) Repeat the C1con, C1dis and C2con, C2dis measurements and the CDUT_con,CDUT_dis calculation for the CEC pin.









If CDF field Cable_DDC_Connection ="N", then measure the capacitance and voltage of DDC according to Test ID 8-9 and 7-13 with the following exception.

If CDF field Cable_CEC_Connection ="N", then measure the capacitance and voltage of CEC according to Test ID 8-9 and 7-13 with the following exception

Exception:

• If CDF field Cable_Type is “Active” or “Converter”, testing shall be performed in power on state of the Cable DUT only. If CDF field Cable_Type is “Passive”, as the Cable DUT does not have power on state, testing shall be performed in power off state of the Cable DUT only (The description of Turning on/off power to the DUT in test ID 7-13 or 8-9 is not applied)

• PASS/FAIL criteria is 700pF, if CDF field Cable_Configuration is “Home”.

• PASS/FAIL criteria is 700pF, if CDF field Cable_Configuration is “Automotive_EE”.

• PASS/FAIL criteria is 210pF, if CDF field Cable_Configuration is “Automotive_ AA”.

• PASS/FAIL criteria is 490pF, if CDF field Cable_Configuration is “Automotive_ EA”.

• Refer to CDF field of Cable_DDC_Conv_cap for the condition for DDC capacitance measurement under the Test ID 7-13

• When VSDA, VSCL and VCEC are measured, Source or Sink device is connected (if necessary) in test ID 7-13 or 8-9 respectively





No. Description Recommended TE Reference Qty. 1 Digital LCR Meter HIOKI 3522-50 4.2.1.16 1 2 LCR Meter Probe HIOKI 9143 4.2.1.16 1 3 LCR DC-Bias Unit HIOKI 9268-01 4.2.1.16 1 4 Digital Multi-Meter <See reference> 4.2.1.13 1 5 DC Power Supply 3.3V <See reference> 4.2.1.15 1 6 TPA-R Any unterminated TPA giving

access to DDC & CEC signals

4.2.1.1 1

7 General Oscilloscope <Any> 4.2.3.4 1 If the CDF field Cable_Type is "Wire" or "Passive", for the time being, a FAIL on this test caused by capacitance of over 700pF does not constitute an overall testing failure. If CDF field Cable_DDC_Connection ="Y" or CDF field Cable_CEC_Connection ="Y" then:

Perform the steps in the Required Test Method using the Test Equipment listed above. In all capacitance measurements, connect the Hioki DC-Bias Unit in an inverted configuration:

• Supply the DC bias voltage in the direction opposite from a typical configuration.

• As shown in setup above, probe polarity should also be connected in an inverted direction.(i.e. GND line is connected to H port of the probe, and Signal line to L port.) Note that, for accurate measurement, the earth line (3rd pin) of the AC plug should be disconnected for both the HIOKI-3522-50 and DC-power supply.

If CDF field Cable_DDC_Connection ="N", then measure the capacitance and voltage of DDC according to Test ID 8-9 and 7-13 with the following exception

If CDF field Cable_CEC_Connection ="N", then measure the capacitance and voltage of CEC according to Test ID 8-9 and 7-13 with the following exception

• If CDF field Cable_Type is “Active” or “Converter”,testing shall be performed in power on state of the Cable DUT only. If CDF field Cable_Type is “Passive”, testing shall be performed in power off state of the Cable DUT only.

• PASS/FAIL criteria is 700pF, if CDF field Cable_Configuration is “Home”.

• PASS/FAIL criteria is 700pF, if CDF field Cable_Configuration is “Automotive_EE”.

• PASS/FAIL criteria is 210pF, if CDF field Cable_Configuration is “Automotive_ AA”.

• PASS/FAIL criteria is 490pF, if CDF field Cable_Configuration is “Automotive_ EA”.

• Refer to CDF field of Cable_DDC_Conv_cap for the condition for DDC capacitance measurement under the Test ID 7-13

• When VSDA, VSCL and VCEC are measured, Source or Sink device is cconnected (if necessary) in test ID 7-13 or 8-9 respectively

• TPA-R Fixture is used instead of TPA-P Fixture.




Test ID 5-11: +5V Power

Reference Requirement [HDMI: 4.2.7] +5V Power Signal

“A Cable Assembly shall be able to supply a minimum of 50mA to the +5V Power pin to a Sink,even when connected to a Source supplying no more than 55mA.”

Test Objective

Confirm that the Cable DUT does not consume more power than allowed.


1) Supply 4.8V to +5V pin of the Source side connector, while drawing 50mA from the +5V Power pin of the Sink side connector.

- Measure the current (ISOURCE)at the source side. If (ISOURCE > 55mA), then FAIL

2) Repeat 1) under the condition that 5.3V is supplied to +5V line instead of 4.8V.

3) If CDF field Cable_+5V_Connection is “N”,

Supply 4.8V to +5V pin of the Source side connector, while drawing 50mA from the +5V Power pin of the Sink side connector.

Note that the supply voltage should be measured at TPA-R Fixture of the Sink side. In this case, TPA-P Fixture or TPA-R Fixture with a short cable may be used for the Source side.

- Measure the voltage(VSINK(HIGH)) at sink side. If (VSINK(HIGH) < 4.7V) then FAIL

Repeat the test after setting up the current source to draw 0mA from the pin

4) Supply 5.3V to +5V pin of the Source side connector, while drawing 0mA from the +5V Power pin of the Sink side connector.

- Measure the voltage(VSINK(HIGH)) at sink side. If (VSINK(HIGH)) > 5.3V) then FAIL





No. Description Recommended TE Reference Qty. 1 DC Source/Meter ADVANTEST R6240A 4.2.1.12 1 2 DC Power Supply <See reference> 4.2.1.15 1 3 TPA-R Any TPA giving access to

control signals 4.2.1.1 2


Test ID 5-12: HPD signal


[HDMI: Table 4-38] Required Output Characteristics of Hot Plug Detect Signal

High voltage level (Sink) Minimum 2.4 Volts, Maximum 5.3 Volts

Low voltage level (Sink) Minimum 0 Volts, Maximum 0.4 Volts

Output resistance 1000Ω ±20%

[HDMI: Table 4-39] Required Detect Levels for Hot Plug Detect Signal

The high voltage level must be within 2.0V to 5.3V.

The low voltage level must be within 0.0V to 0.8V.

Test Objective

Confirm that the Hot Plug Detect signal transferred on the cable conforms to the specified voltage levels.


If CDF field Cable_Type is “Wire” then skip this test.

If CDF field Cable_HPD_Connection is “Y” then skip this test

1) Supply +5V to +5V pin of the source side connector.

• Supply 2.4 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(HIGH) If (VHPD(HIGH) < 2.0V) OR (VHPD(HIGH) > 5.3V) then FAIL

• Supply 5.3 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(HIGH) If (VHPD(HIGH) < 2.0V) OR (VHPD(HIGH) > 5.3V) then FAIL

• Supply 0 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(LOW) If (VHPD(LOW) < 0.0V) OR (VHPD(LOW) > 0.80V) then FAIL.

• Supply 0.4 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(LOW) If (VHPD(LOW) < 0.0V) OR (VHPD(LOW) > 0.80V) then FAIL.




2) Supply 0V to +5V pin of the source side connector.

• Supply 0 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(LOW) If (VHPD(LOW) < 0.0V) OR (VHPD(LOW) > 0.80V) then FAIL.

• Supply 0.4 V to HPD of sink side connector and measure the voltage level at the Source side connector VHPD(LOW) If (VHPD(LOW) < 0.0V) OR (VHPD(LOW) > 0.80V) then FAIL.


No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.15 2 3 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

4 TPA-R Any TPA giving access to DDC & CEC signals

4.2.1.1 2


Test ID 5-13: DDC communication


(none) DDC communication shall be performed even if a valid connection does not exist between SCL/SDA pins at both cable ends.

Test Objective

Confirm that DDC communication is performed when a valid connection does not exist between SCL/SDA pins at both cable ends.


If CDF field Cable_DDC_Connection ="Y" then skip this test.

Attach Cable DUT between EDID Emulator and compliant source device.

Power-on the EDID Emulator. Ensure that 3.3V termination power is applied to the TMDS signals.

Attach I2C Analyzer to SDA and SCL signals between the source device and Cable DUT either directly through a TPA board, or some other method.

Turn on the cable DUT if necessary

Turn on Source

Configure I2C Analyzer to capture and analyze all I2C transactions.

Apply a valid HDMI EDID containing the following 2 blocks:




• 0: EDID 1.3 1: CEA Timing Extension version 3 containing an HDMI VSDB of a length >=6

Pulse HPD low for more than 100msec between cable DUT and Source device

Examine I2C transactions occurring after HPD pulse.

If I2C commands do not perform full read of EDID blocks 0 and 1 then FAIL

Note that Converter Cable may modify the EDID as supplied by EDID emulator. In such case, the monitored EDID content value by the I2C Analyzer might not be the same as that of EDID emulator, but nevertheless needs to be a valid EDID.


No. Description Recommended TE Reference Qty.1 I2C Analyzer <See reference> 4.2.3.3 1 2 DC Power Supply 3.3V <See reference> 4.2.1.15 1 3 EDID Emulator Any Recommended EDID Emulator 4.2.3.2 1 4 Additional capacitance <As needed to reach 750pF total> 1 5 Source device Any compliant source device


Test ID 5-14: CEC communication


(none) CEC communication shall be performed even if a valid connection does not exist between CEC pins at both cable ends.

Test Objective

Confirm that CEC communication is performed when a valid connection does not exist between CEC pins at both cable ends.


If CDF field Cable_CEC_Connection ="Y" then skip this test.

Perform both Test IDs CEC7-1 and CEC7-2 with following exception

• Use the CEC Compliant Source device instead of Source DUT.

• Use the cable DUT for the connection between CEC Compliant Source device and TPA-CEC-RR.

• If the TE indicates that the CEC Compliant source fails either test, then FAIL

Perform CECT 8.1-1, CECT 8.1-2 and CECT 8.1-3 with following exception

• Use the CEC Compliant Source device instead of Source DUT.

• Use the cable DUT for the connection between CEC Compliant Source device and TE-




• If the TE indicates that the CEC Compliant source fails any of these tests, then FAIL

If Cable_Unidirectional is “Y” repeat above steps using CEC compliant Sink device instead of CEC compliant Source Devices


Perform the Required Test Method using the Recommended Test Equipment shown in corresponding test IDs.

Test ID 5-15: Utility Line impedance

Reference Requirement [HDMI: 7.12] Audio Return Channel Overview

Once activated through a CEC message, the Utility line alone (single Mode) or the Utility line in conjunction with the Hot Plug Detect line (common Mode) may be used for ARC transmission as specified in Supplement 2.

[HDMI: Table 4-41] Utility line Electrical Specifications (Recommendation)

Impedance should be: 55Ω±35%

Test Objective

Confirm that the impedance of the Uitility line does not exceed the tolerances recommended in the specification.


If CDF field Cable_Utility_Connection is “Y”, then measure the impedance of Uitiliy line as follows:

1) Connect near end of cable to first HEAC-TPA-R adapter.

2) Connect far end of cable to second HEAC-TPA-R adapter.

3) Connect 50Ω terminators to Utility signal on the far-end HEAC-TPA-R.

4) Connect SMA cable from TDR oscilloscope to Utility on near-end HEAC-TPA-R.

5) Configure the TDR oscilloscope to measure single impedance in TDR mode:

5.1) TDR effective rise time =1ns (determined by using the test coupon on TPA-R, if available).

5.2) Vertical axis set to ‘ohms (Ω)’.

6) View the TDR trace of impedance, ZSINGLE, on Utility:

ZSINGLE_LOW = lowest impedance in the area (up to 2.5ns max)

ZSINGLE_HI = highest impedance in the area (up to 2.5ns max)

7) If (ZSINGLE_LOW < 35.75Ω) OR (ZSINGLE_HI > 74.25Ω) then FAIL.

Note: The above test is always recommended for ATC testing. The FAIL of the above test does not constitute an overall testing failure.





Perform the Required Test Method using the Recommended Test Equipment shown in corresponding test IDs.

Test ID 5-16: Type E Cable Wire Thermal Deformation (ISO 6722)


ISO-6722 <See reference for details.>

[HDMI: 4.1.6, 4.1.7 and 4.1.8] <See reference for details.>

Test Objective

Confirm that Cable Wire satisfies the standard of Thermal Deformation specified in ISO-6722.


This test must be run at a facility equipped for such testing. The adopter shall ask the supplier of the connector which is used in Cable DUT to perform this test.

Note that the adopter must submit passing test result to the ATC. The ATC will fail cable products submitted without passing test result of this test by the supplier of the connector.

THERMAL

DEFORMATION

DIELECTRIC

WITHSTANDING VOLTAGE

ANSI/EIA 364-20

Number of Samples

2 : Cable wire.


Perform the Required Test Method using a qualified facility of the system.



6 Tests – Plug and Receptacle The following tests must be run on individual connector samples at a facility equipped for such testing. The adopter may have this testing performed by the supplier of the connector. All HDMI connectors on Cable Assemblies, Sources, Sinks and Repeaters shall be capable of passing the specified tests in this section according to the following table.

Plug and Receptacle Section Test ID

Type A

Type B

Type C

Type D

6.1 and 6.2 6-1, 6-2, 6-3, 6-4, 6-5 and 6-6

Type E 6.1 and 6.3 6-1, 6-7, 6-8, 6-9, 6-10, 6-11and 6-12

Note that all connectors shall be tested at a qualified facility of the system or connector vendor’s choosing. HDMI Licensing LLC maintains an approved list of connectors which have passed such testing. To have a connector placed on the approved list, the vendor must submit full and passing test results to the ATC or directly to HDMI Licensing LLC. The ATC will fail products submitted with connectors that are not on the approved list. Note that the connectors are specified in the CDF under “Connector Vendor Name” and “Connector Model Name/ID.”

6.1 Mechanical Tests

Test ID 6-1: Connector Mechanical Specification


[HDMI: 4.1.9] Connector Drawings


Test Objective

Verify that plug mechanical dimensions are within specified tolerances.


Measure the following dimensions: all mating surfaces of: shell, pins, insulators, and contacts.

Connector dimensions shall be within tolerances shown in relevant figures. [HDMI: Figure 4-1 through Figure 4-6]


Section 6 Tests – Source



Perform steps in Required Test Method above.




6.2 Connector – ANSI 364 Tests Tested using ANSI/EIA 364. Refer to [HDMI: 4.1.6, 4.1.7 and 4.1.8] for parameter to be measured.


ANSI/EIA 364 <See reference for details.>


Test ID 6-2: GROUP1: Environmental Performance

CONTACT AND SHELL

RESISTANCE

1/2 SAMPLES AS RECEIVED 1/2 SAMPLES DURABILITY

100 CYCLES

CONTACT AND SHELL

RESISTANCE

THERMAL SHOCK

ANSI/EIA 364-32

CONTACT AND SHELL

RESISTANCE

THERMAL AGING

ANSI/EIA 364-17

CONTACT AND SHELL

RESISTANCE

HUMIDITY (CYCLIC)

CONDITION B

ANSI/EIA 364-31




CONTACT AND SHELL

RESISTANCE

Number of Samples

6 : Receptacle assembled to printed circuit board.

6 : Cable assemblies with a plug assembled to one end, 50.8mm long.

Test ID 6-3: GROUP2: Mated Mechanical CONTACT AND SHELL

RESISTANCE

VIBRATION

ANSI/EIA 364-28

CONTACT AND SHELL

RESISTANCE

MECHANICAL SHOCK

ANSI/EIA 364-27

CONTACT AND SHELL

RESISTANCE

Number of Samples






Test ID 6-4: GROUP 3 Insulator Integrity DIELECTRIC


ANSI/EIA 364-20

THERMAL SHOCK

ANSI/EIA 364-32

DIELECTRIC


ANSI/EIA 364-20

INSULATION RESISTANCE

ANSI/EIA 364-21

HUMIDITY (CYCLIC)

CONDITION A

ANSI/EIA 364-31


ANSI/EIA 364-21

Number of Samples






Test ID 6-5: GROUP 4 Cable Flexing CABLE FLEXING

ANSI/EIA 364-41

DIELECTRIC


ANSI/EIA 364-20


ANSI/EIA 364-21

Number of Samples

2 : Cable assemblies.

Test ID 6-6: GROUP 5 Electrostatic Discharge ELECTROSTATIC

DISCHARGE

Number of Samples

1 : Receptacle connector.

1 : Plug Cable




6.3 Connector – SAE/USCAR-2 and ANSI 364 Tests Tested using SAE/USCAR-2. Refer to [HDMI: 4.1.6, 4.1.7 and 4.1.8] for parameter to be measured.


SAE/USCAR-2 <See reference for details.>


Test ID 6-7: GROUP 1: Environmental Performance

CONTACT AND SHELL

RESISTANCE

DURABILITY

SAE/USCAR-2 5.1.7

CONTACT AND SHELL

RESISTANCE

THERMAL SHOCK

SAE/USCAR-2 5.6.1

HUMIDITY

SAE/USCAR-2 5.6.2

THERMAL AGING

SAE/USCAR-2 5.6.3

CONTACT AND SHELL

RESISTANCE

Number of Samples






Test ID 6-8: GROUP 2: Mated Mechanical

CONTACT AND SHELL

RESISTANCE

DURABILITY

SAE/USCAR-2 5.1.7

CONTACT AND SHELL

RESISTANCE

MECHANICAL SHOCK

SAE/USCAR-2 5.4.6

VIBRATION

SAE/USCAR-2 5.4.6

CONTACT AND SHELL

RESISTANCE

Number of Samples


2 : Cable assemblies with a plug assembled to one end, 254mm long.




Test ID 6-9: GROUP 3: Insulator Integrity DIELECTRIC


ANSI/EIA 364-20


ANSI/EIA 364-21

DURABILITY

SAE/USCAR-2 5.1.7

HUMIDITY

SAE/USCAR-2 5.6.2

DIELECTRIC


ANSI/EIA 364-20


ANSI/EIA 364-21

Number of Samples






Test ID 6-10: GROUP 4: Cable Flexing CABLE FLEXING

ANSI/EIA 364-41

DIELECTRIC


ANSI/EIA 364-20


ANSI/EIA 364-21

Number of Samples

2 : Cable assemblies.

Test ID 6-11: GROUP 5: Electrostatic Discharge ELECTROSTATIC

DISCHARGE

Number of Samples

1 : Receptacle connector.

1 : Plug Cable

Test ID 6-12: GROUP 6: Drop DROP

SAE/USCAR-2 5.4.8

Number of Samples

3 : Plug with no cable wire.




7 Tests – Source 7.1 Source Products Overview In order to be adequately tested, the Source (DUT) shall have the ability to output an HDMI signal that is indicative of the behavior of the Source DUT during normal user operation. For instance,

• If the DUT is a DVD player or similar device, the operator may use the ability of the DUT to playback pre-recorded or recorded media (disk, tape, etc) in order to output the HDMI video test signal.

• If the DUT is a set-top box or similar device, the operator may use the ability of the DUT to decode a received signal in order to output the HDMI video test signal.

• The operator may use a menu mode or other user interface on the DUT in order to output an HDMI signal.

The Source device needs to output an HDMI signal as specified in the test. This procedure will be product-specific but will likely be accomplished by presenting specific EDID images to the Source, manually configuring the Source and/or by supplying certain media or content into the Source. In many cases, this effort can be assisted by configuring an EDID present in the test equipment (analyzer) to indicate support for each of the formats supported by the Source.




7.2 Source – EDID / E-DDC / HPD

Test ID 7-1: EDID-Related Behavior


[HDMI: 8.4.5] Enhanced DDC Source

“The Source shall use Enhanced DDC protocols.

The Source reads Enhanced EDID extensions data at DDC address 0xA0 using segment pointer 0x60.”

[HDMI: 8.3] EDID Data Structure

“A Source shall read the EDID 1.3 and first CEA EDID Timing Extension to determine the capabilities supported by the Sink.”

Test Objective

Verify that Source supports the reading of the EDID 1.3 block and first CEA EDID Timing Extension from both 2- and 4-block EDIDs.


Attach Source DUT to EDID Emulator.

Power-on the EDID Emulator. Ensure that 3.3V termination power is applied to the TMDS signals.

Attach I2C Analyzer to SDA and SCL signals either directly to EDID Emulator, through a TPA board, or some other method.

Turn on Source DUT

Configure I2C Analyzer to capture and analyze all I2C transactions.

Configure EDID Emulator for 750pF total capacitance (emulator plus cable plus probes, etc.) and nominal pull-up resistance on SDA and SCL.


• 0: EDID 1.3 1: CEA Timing Extension version 3 containing an HDMI VSDB of a length >=6

Pulse HPD low for more than 100msec



If SCL frequency exceeds 100kHz (less than 10microseconds between rising edges) then FAIL


• 0: EDID 1.3 1: Extension Map




2: CEA Timing Extension version 3 (includes HDMI VSDB, length >=6) 3: CEA Timing Extension version 3 (single DTD)

Pulse HPD low for more than 100msec



Recommended Test Method Test ID 7-1: EDID-Related Behavior

Setup 12. Test ID 7-1: EDID-Related Behavior

No. Description Recommended TE Reference Qty.1 I2C Analyzer <See reference> 4.2.3.3 1 2 DC Power Supply 3.3V <See reference> 4.2.1.15 1 3 EDID Emulator Any Recommended EDID Emulator 4.2.3.2 1 4 Additional capacitance <As needed to reach 750pF total> 1

1) Attach Source DUT to EDID Emulator using a short (<1meter) HDMI cable. If DUT has a Type C plug, use HDMI-C to –A cable.

2) Connect probes of I2C Analyzer to SDA and SCL signals either through a TPA board, directly to EDID Emulator or some other method.

3) Power on EDID Emulator. Using a short cable, connect a display to the downstream port of the EDID Emulator and turn the display on.

4) Turn on Source DUT.

5) Configure oscilloscope:

• I2C mode is selected

• Trigger is set to “Single shot” mode.

• Triggering pattern is set to “address = 0xA0”.

6) Configure I2C Analyzer to capture and analyze all I2C transactions.




7) Configure EDID Emulator capacitance so that total capacitance of Emulator and HDMI cable is 750pF. Configure EDID Emulator to have nominal pull-up resistance on SDA and SCL.

8) Apply a valid HDMI EDID containing the following 2 blocks:

• 0: EDID 1.3 1: CEA Timing Extension version 3 (includes HDMI VSDB, length >=6)

9) Pulse HPD for more than 100msec

10) If no oscilloscope trigger occurs then FAIL

11) If oscilloscope capture does not contain: <0xA0+ack> <0x00+ack> RS <0xA1+ack> then FAIL

12) If I2C commands do not perform full read of EDID blocks 0 and 1 then FAIL

13) If SCL frequency exceeds 100kHz (less than 10microseconds between rising edges) then FAIL

14) Apply a valid HDMI EDID containing the following 4 blocks:

• 0: EDID 1.3 1: Extension Map 2: CEA Timing Extension version 3 (includes HDMI VSDB, length >=6) 3: CEA Timing Extension version 3 (single DTD)

15) Pulse HPD low for more than 100msec

16) If no oscilloscope trigger occurs then FAIL

17) If oscilloscope capture does not contain: <0x60+ack> <0x01+ack> RS <0xA0+ack> then FAIL

18) If I2C commands do not perform full read of EDID blocks 0 and 2 then FAIL




7.3 Source – Electrical

Source tests may be performed at test points CTP1 shown in Figure 7-1 (corresponding to TP1 as used in the HDMI Specification).

Figure 7-1 Source Test Points

Test ID 7-2: TMDS –VL


[HDMI: Table 4-23] Source DC Characteristics at TP1

Single-ended low level output voltage, VL:

if attached Sink supports only <=165MHz : (AVcc – 600mVolts) ≤ VL ≤ (AVcc – 400mVolts)

if attached Sink supports >165MHz : (AVcc – 700mVolts) ≤ VL ≤ (AVcc – 400mVolts)

Test Objective

Confirm that DC voltage levels on the HDMI link are within specified limits for each TMDS signal.


Setup:

1) Connect TPA-P adapter to Source DUT HDMI output connector.

2) Connect probe to TMDS_DATA0+. If using a differential probe, follow the manufacturer’s instructions for use in measuring a single-ended signal.

3) Configure the EDID to indicate only 27MHz formats (480p and 576p, no Deep Color support) with the 640x480p Established Timings bit set.

4) Control the Source DUT to output a video format with lowest supported TMDS clock frequency (typically 27MHz).




Measure:

5) Capture 1000 or more repetitions, triggered at the vertical mid-point of the High-to-Low transition of a H-L-L-L bit sequence. Each capture must be of duration 3*TBIT.

6) Display the voltage (vertical) histogram on the scope, with the histogram data accumulated only from the last 2-bits of the H-L-L-L sequence.

7) Read the VL value as the most common low-level voltage shown on the histogram.

8) If (VL > 2.90V) OR (VL < 2.70V) then

9) Capture 10,000 repetitions, triggered at mid-point of waveform, of duration ≥ 2*TBIT to get proper histograms.

10) Display the voltage (vertical) histogram on the scope.

11) If (VL > 2.90V) OR (VL < 2.70V) then FAIL

12) Repeat the test for all eight TMDS signals.

13) If CDF field Source_Above_165 then:

14) Switch to an EDID that additionally indicates:

- Support for 1080p50Hz and 60Hz

- Deep Color 36-bits/pixel

- Max_TMDS_Clock of 225MHz (value = 225/5 = 45).

15) Repeat test sequence above still using lowest clock rate format.

16) If (VL > 2.90V) OR (VL < 2.60V) then FAIL

17) Repeat the test for all eight TMDS signals.

Recommended Test Method – Tektronix TDS7404 Test ID 7-2: TMDS –VL

Because the measurement is at the lowest-supported frequency, the Tektronix TDS7404 may be used for all DUTs for this test except the case where DUT uses Type C connector.




Setup 13. Test ID 7-2: TMDS –VL: Tektronix TDS7404

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix TDS7404 4.2.1.3 1 2 Single-Ended Probe Tektronix P7240 4.2.1.6 1 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID Emulator 4.2.3.2 1 5 TPA-P-SE Fixture <See reference> 4.2.1.1.4 1

1) Connect TPA-P-SE adapter to Source DUT HDMI output connector.

2) Connect probe to TMDS_DATA0+.

Perform the Required Test Method with this setup. Tektronix TDSHT3 software may be used to automate the test sequence.




Recommended Test Method – Tektronix DPO70804 Test ID 7-2: TMDS –VL

Setup 14. Test ID 7-2: TMDS –VL: Tektronix DPO70804

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix DPO70804 with option 2XL

or DSA70804 4.2.1.3 1

2 Single-Ended Probe Tektronix P7313SMA (configured to measure singled-ended signal)

4.2.1.6 1

3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID Emulator 4.2.3.2 1 5 TPA-P-SMA Fixture <See reference> 4.2.1.1.6 1


2) Configure the P7313SMA probe to perform a single-ended measurement:

3) Connect the + side of the P7313SMA probe to the measured signal, through a 50 ohm termination to 3.3V.

4) Connect the – side of the probe to 3.3V through a 50 ohm termination. (This will offset the measurement to AVcc /2.)

5) If performing the test manually, setup a math expression taking the resulting input and offset it by ½ Vterm. Refer to Tektronix documentation for more info. The test automation software normally will perform this operation.

6) Connect 50 ohm termination to remaining TMDS Clock and Data signals with 3.3V pullup. This can be done with additional probes.





Recommended Test Method – Agilent DSO80000B Test ID 7-2: TMDS –VL

Setup 15. Test ID 7-2: TMDS –VL: Agilent DSO80000B

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Agilent DSO80000B (>=8GHz) 4.2.1.3 1 2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 1 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 5 4 DC Power Supply <See reference> 4.2.1.15 1 5 EDID Emulator Any recommended EDID

emulator 4.2.3.2 1

6 TPA-P Test Assembly Agilent N1080A H01 4.2.1.1.6 1 7 TPA-Control Agilent N1080A H03 4.2.1.1.6 1


2) Connect the + side of the first SMA differential probe head (N5380A) with the differential probe amplifier (1169A) to TMDS_DATA0+. The - side of this SMA differential probe head is left open.

3) Connect the + side of the second SMA differential probe head to TMDS_DATA0- for termination. The - side of this SMA differential probe head is left open.

4) If performing this test manually configure the probe to perform a single-ended measurement. (The test automation software normally will perform these steps.)

- Enter the probe setup menu:

Enable “External scaling” and set offset to 3.3V.




5) Connect three SMA differential probe heads to remaining TMDS Clock and Data pairs for termination.

Perform the Required Test Method with this setup. Agilent automation software may be used to automate the test sequence.

Test ID 7-3: TMDS – VOFF


[HDMI: Table 4-23] Source DC Characteristics at TP1

TMDS single-ended standby (off) output voltage, VOFF must be within AVcc ±10mVolts.

Test Objective

Confirm that a disabled TMDS link only allows leakage currents within specified limits.



2) Supply 3.3V to the AVCC side of the 50Ω pullups on the TPA-P adapter.

3) Disconnect DUT from AC mains or other power source.

4) Configure the Digital Multi-Meter to measure voltage.

5) Connect Digital Multi-Meter probes across the pull-up resistor on TMDS_DATA0+ (single-ended signal).

6) Measure voltage, VOFF.

7) If |VOFF - AVCC| > 10mV then FAIL.

8) Repeat measurement for all remaining TMDS Clock and Data, + and - signals.

9) Repeat the test with standby state if DUT disables its HDMI output in the standby state

10) Repeat the test with power off state if DUT disables its HDMI output in the power off state.




Recommended Test Method Test ID 7-3: TMDS – VOFF

Setup 16. Test ID 7-3: TMDS – VOFF

No. Description Recommended TE Reference Qty.1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply 3.3V <See reference> 4.2.1.15 1 3 TPA-P-SE Fixture (For TypeA )

TPA-R-SE Fixture with Type-A to Type-C jig cable (For TypeC）

<See reference> 4.2.1.1.4 1

Perform Required Test Method using test equipment shown above.




Test ID 7-4: TMDS – TRISE, TFALL


[HDMI: Table 4-24] Source AC Characteristics at TP1

75psec ≤ Rise Time or Fall Time

Test Objective

Confirm that the rise times and fall times on the TMDS differential signals fall within the limits of the specification.



2) Configure Source DUT to output a video format and pixel size with highest supported TMDS clock frequency.

3) Accumulate at least 10,000 triggered waveforms.

4) Measure TRISE as the mode of the sampled edge times from 20% to 80% of the differential swing voltage rising edge.

5) Measure TFALL as the mode of the sampled edge times from 80% to 20% of the differential swing voltage on the falling edge.

6) If (TRISE < 75ps) then FAIL.

7) If (TFALL < 75ps) then FAIL.

8) Repeat the test for all remaining TMDS clock and data pairs.

Recommended Test Method – Tektronix TDS7404

The following may only be used for testing of DUTs with a max supported TMDS clock frequency of 148.5MHz or less. For testing at 148.5MHz, it is better to use the alternative scopes below.




Setup 17. Test ID 7-4: TMDS – TRISE, TFALL: Tektronix TDS7404

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix TDS7404 4.2.1.3 1 2 Differential Probe Tektronix P7330 or Tektronix

P7350SMA 4.2.1.4 1

3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P Fixture Tektronix TPA-P-DI , TPA-P-TDR, EFF-HDMI-TPA-P with EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.2 1





Recommended Test Method – Tektronix DPO70804

Setup 18. Test ID 7-4: TMDS – TRISE, TFALL: Tektronix DPO70804

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix DPO70804 with

option 2XL / DSA70804 4.2.1.3 1

2 Differential Probe <See reference> 4.2.1.4 1 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P Fixture <See reference> 4.2.1.1.2 1





Recommended Test Method – Agilent DSO80000B

Setup 19. Test ID 7-2: TMDS –VL: Agilent DSO80000B

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Agilent DSO80000B (>=8GHz) 4.2.1.3 1 2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 1 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 4 4 DC Power Supply <See reference> 4.2.1.15 1 5 EDID Emulator Any recommended EDID

emulator 4.2.3.2 1



2) Connect the SMA differential probe head (N5380A) with the differential probe amplifier (1169A) to tested TMDS pair.

3) Connect 50 ohm termination to remaining TMDS Clock and Data pairs with 3.3V pullup. This can be done with additional differential probe heads. Alternatively, all 4 TMDS pairs may be connected to the oscilloscope simultaneously using four terminated differential probe heads.

4) Connect Power supply (3.3V) to all SMA differential probe heads.






Test ID 7-6: TMDS – Inter-Pair Skew



Inter-pair skew must not exceed 0.20*TCHARACTER.

Test Objective

Confirm that any skew between the differential pairs in the TMDS portion of the HDMI link does not exceed the limits in the specification.



2) Connect first differential probe to TMDS_DATA0.

3) Connect second differential probe to TMDS_DATA1.

4) Configure Source DUT to output an HDMI signal with a video format and pixel size with highest supported TMDS clock frequency.

5) Capture (trigger) or find a sequence of Control Period encoded characters. Either 10-bit or 20-bit trigger may be used. For 10-bit trigger:

6) Find the first bit of the TMDS character on the two TMDS channels. The CTL encoding pattern 1101010100 corresponds to:

- TMDS_DATA0: HSYNC=1, VSYNC=0

- TMDS_DATA1: CTL0=1, CTL1=0 (any Preamble)

- TMDS_DATA2: CTL2=1, CTL3=0 (Data Island Preamble)

- If it is difficult to capture using the above pattern, then any of the following (Control Period) patterns may be used:

0010101011

1101010100




0010101010

1101010101

7) Examine second channel for any valid CTL code and measure TIPSKEW between channels.

8) For 20-bit trigger:

- 9) Find the first bit of the following 20-bit sequence on the TMDS channels.

For Channel 0: 0010101011 0011001101

For Channel 0: 1101010100 0011001101

For Channel 0: 0010101010 0011001101

For Channel 0: 1101010101 0011001101

For Channel 1: 0010101010 1100110010

For Channel 2: 0010101011 0011001101

10) Examine second channel for the appropriate sequence and measure TIPSKEW between channels.

11) If TSKEW > 0.2*TCHARACTER then fail.

12) Repeat the test for remaining combinations of TMDS_DATAx pairs.



Setup 20. Test ID 7-6: TMDS – Inter-Pair Skew – Tektronix TDS7404





7350SMA 4.2.1.4 2


Emulator 4.2.3.2 1


4.2.1.1.2 1



Setup 21. Test ID 7-6: TMDS – Inter-Pair Skew - Tektronix DPO70804





option 2XL / DSA70804 4.2.1.3 1

2 Differential Probe Tektronix P7313SMA 4.2.1.4 2 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P-SMA Fixture EFF-HDMI-TPA-P with EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.2 1


Recommended Test Setup - Agilent Test ID 7-6: TMDS – Inter-Pair Skew

Setup 22. Test ID 7-6: TMDS – Inter-Pair Skew – Agilent DSO80000B




No. Description Recommended TE Reference Qty.1 8GHz Digital Oscilloscope Agilent DSO80000B (>=8GHz) 4.2.1.3 1 2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 2 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 4 4 DC Power Supply <See reference> 4.2.1.15 1

5 EDID Emulator Any recommended EDID emulator 4.2.3.2 1



Test ID 7-7: TMDS – Intra-Pair Skew



Intra-pair skew between TMDS DATA pairs must not exceed 0.15*TBIT.

Test Objective

Confirm that any skew within any one differential pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.


1) Connect TPA-P adapter to the Source DUT HDMI output connector.

2) Connect first single-ended probe to TMDS_DATA0+.

3) Connect second single-ended probe to TMDS_DATA0-.


5) Set the trigger on TMDS_DATA0+ rising edge.

6) Display the waveform of TMDS_DATA0+ and DATA0-. Accumulate 10,000 or more triggers. Find the closest falling edge of DATA0- (either preceding or following DATA0+ rising edge), and determine the most common 50% crossing point of that TMDS_DATA0- falling edge using a horizontal (time) Histogram method.

7) Measure skew from trigger point to most common 50% crossing point of TMDS_DATA0-.

8) If (Tskew > 0.15*TBIT) then FAIL.

9) Repeat the test for all remaining TMDS differential pairs.





The following may only be used for testing of DUTs, which uses Type A connector, with a max supported TMDS clock frequency of 148.5MHz or less. For testing at 148.5MHz, it is better to use the alternative scopes below.

Setup 23. Test ID 7-7: TMDS – Intra-Pair Skew - Tektronix TDS7404

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix TDS7404 4.2.1.3 1 2 Single-Ended Probes Tektronix P7240 4.2.1.6 2 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P-SE Fixture Tektronix TPA-P-SE 4.2.1.1.4 1






Setup 24. Test ID 7-7: TMDS – Intra-Pair Skew - Tektronix DPO70804


option 2XL / DSA70804 or DSA70000

4.2.1.3 1

2 Single-Ended Probes Tektronix P7313SMA 4.2.1.6 2 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1


4.2.1.1.4 1


2) Configure the P7313SMA probe to perform a single-ended measurement:

3) Connect the + side of the P7313SMA probe to the measured signal, through a 50 ohm termination to 3.3V.

4) Connect the – side of the probe to 3.3V through a 50 ohm termination. (This will offset the measurement to AVcc /2.)

5) If performing the test manually, setup a math expression taking the resulting input and offset it by ½ Vterm. Refer to Tektronix documentation for more info. The test automation software normally will perform this operation.




6) Connect 50 ohm termination to remaining TMDS Clock and Data signals with 3.3V pullup. This can be done with additional probes.


Recommended Test Setup - Agilent Test ID 7-7: TMDS – Intra-Pair Skew

Setup 25. Test ID 7-7: TMDS – Intra-Pair Skew - Agilent

No. Description Recommended TE Reference Qty.1 8GHz Digital Oscilloscope Agilent DSO80000B (>=8GHz) 4.2.1.3 1 2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 2 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 5 4 DC Power Supply <See reference> 4.2.1.15 1 5 EDID Emulator Any recommended TE 4.2.3.2 1 6 TPA-P Test Assembly Agilent N1080A H01 4.2.1.1.6 1 7 TPA-Control Agilent N1080A H03 4.2.1.1.6 1


2) Connect the + side of First SMA differential probe head (N5380A) with the differential probe amplifier (1169A) to TMDS_DATA0+. The - side of this SMA differential probe head is open.

3) Connect the + side of Second SMA differential probe head with the differential probe amplifier to TMDS_DATA0-. The - side of this SMA differential probe head is open.

4) Connect three SMA differential probe heads to remaining TMDS Clock and Data pairs for termination




5) Connect Power supply (3.3 volts) to all SMA differential probe heads.


Test ID 7-8: TMDS – Clock Duty Cycle



Clock duty cycle must be at least 40% and not more than 60%.

Test Objective

Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification.




3) Connect differential probe to TMDS Clock.

4) Display the waveform of 1 clock period.

5) Configure the Digital Oscilloscope: trigger source is the TMDS Clock rising edge, turn on infinite persistence, measurement is duty cycle, capture at least 10,000 or more triggers.

6) Measure minimum duty cycle as earliest crossing of TMDS_CLOCK falling edge.

7) Measure maximum duty cycle as latest crossing of TMDS_CLOCK falling edge.

8) If (TDUTY(MIN) < 40%) OR (TDUTY(MAX) > 60%) then FAIL.






Setup 26. Test ID 7-8: TMDS – Clock Duty Cycle - Tektronix TDS7404


7350SMA 4.2.1.4 1


Emulator 4.2.3.2 1


4.2.1.1.2 1






Setup 27. Test ID 7-8: TMDS – Clock Duty Cycle - Tektronix DPO70804


option 2XL / DSA70804 4.2.1.3 1


Emulator 4.2.3.2 1

5 TPA-P-SMA EFF-HDMI-TPA-P with EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.2 1





Recommended Test Setup – Agilent Test ID 7-8: TMDS – Clock Duty Cycle

Setup 28. Test ID 7-8: TMDS – Clock Duty Cycle - Agilent





2) Connect the SMA differential probe head (N5380A) with differential probe amplifier (1169A) to TMDS Clock.

3) Connect three SMA differential probe heads to three TMDS Data pairs for termination

4) Connect Power supply (3.3 volts) to all SMA differential probe heads





Test ID 7-9: TMDS – Clock Jitter



TMDS differential clock jitter must not exceed 0.25*TBIT, relative to the ideal Recovery Clock.

Test Objective

Confirm that the TMDS Clock does not carry excessive jitter.



2) Connect differential probe to TMDS Clock pair.

3) Configure oscilloscope and CRU:

- Evaluate 16M samples per channel (can be acquired with a single or with multiple smaller captures).

4) Configure Source DUT to output one video format for each of the following TMDS Clock frequencies if that frequency is supported by the DUT: 27MHz (or 25MHz), 74.25MHz, 148.5MHz, and 222.75MHz. For each of these test frequencies, perform the following

• Capture the waveform and process it with the Digital Oscilloscope

If test frequency is <=165MHz then set Sampling Rate ≥10GSa/s

If test frequency is >165MHz then set Sampling Rate ≥20GSa/s

• Measure Clock jitter as difference between farthest left sampling point and farthest right sampling point, within the measurement box below:

- Vertical setting = VC = 0V ± 20mV.

• If Clock jitter exceeds 0.25*TBIT then FAIL

5) Repeat the test for remaining supported test frequencies. Only one video format/pixel-size combination is required per TMDS clock rate.






Setup 29. Test ID 7-9: TMDS – Clock Jitter - Tektronix TDS7404


P7350SMA 4.2.1.4 1


Emulator 4.2.3.2 1

6 TPA-P Fixture Tektronix TPA-P-DI or TPA-P-TDR (as needed)

4.2.1.1.2 1






Setup 30. Test ID 7-9: TMDS – Clock Jitter - Tektronix DPO70804


option 2XL / DSA70804 4.2.1.3 1


Emulator 4.2.3.2 1


4.2.1.1.2 1





Recommended Test Setup - Agilent Test ID 7-9: TMDS – Clock Jitter

Setup 31. Test ID 7-9: TMDS – Clock Jitter - Agilent





2) Connect the SMA differential probe head (N5380A) with differential probe amplifier (1169A) to TMDS Clock.

3) Connect three SMA differential probe heads to three TMDS Data pairs for termination

4) Configure oscilloscope :

• Single-shot trigger by rising edge of TMDS clock

• Accumulation mode on

• Memory length set to 16M samples per-channel with 1M/2M acquisitions.

• If test frequency is <=165MHz then set Sampling Rate ≥10GSa/s




• If test frequency is >165MHz then set Sampling Rate ≥20GSa/s

5) Configure Software CRU:

• Software CRU input is TMDS clock

• Software CRU is the first order

• Drawing window size: horizontal is ±1.0 TPIXEL


Test ID 7-10: TMDS – Data Eye Diagram


[HDMI: Figure 4-30] Eye Diagram Mask at TP1 for Source Requirements

Refer to the “Eye Diagram Mask at TP1 for Source Requirements”

Test Objective

Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.


Figure 7-2 Source (TP1) Eye Diagram

1) Connect TPA-P-TDR to Source DUT HDMI output connector.

2) Connect first differential SMA probe to TMDS Clock, and configure as trigger.

3) Connect second differential SMA probe to TMDS_DATA0.

4) Connect 50 ohm pullups to each of the non-probed TMDS lines to 3.3V.




5) Configure Source DUT to output one video format for each of the following TMDS Clock frequencies if that frequency is supported by the DUT: 27MHz (or 25MHz), 74.25MHz, 148.5MHz, and 222.75MHz, and, if not already covered, the highest DUT-supported frequency. For each of these test frequencies, perform the following

6) Capture the waveforms on the Digital Oscilloscope. Process with the CRU to display the data eye diagram.

Memory length set to 16M samples per-channel.

If test frequency is <=165MHz then set Sampling Rate ≥10GSa/s

If test frequency is >165MHz then set Sampling Rate ≥20GSa/s

7) Compare the data eye to the TP1 Eye Diagram Mask:

7.1) If any part of the waveform exceeds either the high or low maximum voltage (+/- 780mV), then FAIL.

7.2) Shift the mask left or right through one entire TBIT to determine if any horizontal position has no capture points within eye mask. No vertical shifting is allowed.

7.3) If no shifted position exists where no part of the waveform touches or crosses into the data eye, then FAIL.

8) Measure the data jitter at the zero crossing point.

8.1) Measurement box vertical setting: 0V ±5mV

9) If data jitter > 0.3*TBIT then FAIL.

10) Repeat the test for remaining TMDS_DATA pairs.

11) Repeat the test for remaining supported test frequencies. Only one video format/pixel-size combination is required per TMDS clock rate.






Setup 32. Test ID 7-10: TMDS – Data Eye Diagram - Tektronix TDS7404

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix TDS7404 4.2.1.3 1 2 Differential SMA Probe Tektronix P7350SMA 4.2.1.5 2 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P-TDR Fixture <See reference> 4.2.1.1.6 1






Setup 33. Test ID 7-10: TMDS – Data Eye Diagram - Tektronix DPO70804


option 2XL / DSA70804 4.2.1.3 1

2 Differential SMA Probe <See reference> 4.2.1.5 2 3 DC Power Supply 3.3V <See reference> 4.2.1.15 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1


4.2.1.1.6 1





Recommended Test Method – Agilent DSO80000B

Setup 34. Test ID 7-10: TMDS – Data Eye Diagram - Agilent

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Agilent DSO80000B (>=8GHz) 4.2.1.3 1 2 Differential Probe Amplifier Agilent 1169A 4.2.1.4 2 3 SMA Differential Probe Head Agilent N5380A 4.2.1.5 4 4 DC Power Supply <See reference> 4.2.1.15 1



1) Connect TPA-P to Source DUT HDMI output connector.

2) Connect first SMA differential probe head (N5380A) with differential probe amplifier (1169A) to TMDS Clock.

3) Connect second SMA differential probe head with differential probe amplifier to TMDS DATA0.

4) Connect two SMA differential probe heads to remaining TMDS Data pairs for termination

5) Connect Power supply (3.3 volts) to all SMA differential probe heads

6) Configure oscilloscope :

• Single-shot trigger by rising edge of TMDS clock

• Accumulation mode on




• Memory length set to 16M samples per-channel.

• If test frequency is <=74.25MHz then set Sampling Rate ≥10GSa/s

• If test frequency is >74.25MHz then set Sampling Rate ≥20GSa/s

7) Configure Software CRU:

• Software CRU input is TMDS clock

• Software CRU is the first order

• Drawing window size: horizontal is ±1.0 TPIXEL


Test ID 7-11: +5V Power


[HDMI: 4.2.7] +5V Power Signal

“All Sources shall assert the +5V Power signal whenever the source is using the DDC or TMDS signals.”

[HDMI: Table 4-34] Power Pin Voltage

Power pin voltage shall be 4.8V to 5.3V at TP1.

Test Objective

Confirm that +5V Power signal meets voltage and current capacity requirements.



2) Connect the DC Source/Meter to the +5V Power signal on the TPA fixture.

3) Power on the DUT.

4) While drawing 55mA from the +5V Power pin, measure the voltage, V5V.

5) If (V5V < 4.8V) OR (V5V > 5.3V) then FAIL

6) Repeat the test after setting up the current source to draw 0mA from the pin.




Recommended Test Method Test ID 7-11: +5V Power

Setup 35. Test ID 7-11: +5V Power

No. Description Recommended TE Reference Qty. 1 DC Source/Meter ADVANTEST R6240A 4.2.1.12 1 2 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

3 TPA-P Any TPA giving access to control signals

4.2.1.1 1

Perform the Required Test Method using the Recommended Test Equipment (ISVM-type DC Source/Meter) shown above.

Test ID 7-12: Hot Plug Detect



High voltage level (Sink) Minimum 2.4 Volts, Maximum 5.3 Volts

Low voltage level (Sink) Minimum 0 Volts, Maximum 0.4 Volts

Output resistance 1000Ω ±20%

[HDMI: Table 4-39] Required Detect Levels for Hot Plug Detect Signal

The high voltage level must be within 2.0V to 5.3V.

The low voltage level must be within 0.0V to 0.8V.

Test Objective

Confirm that the Source load on the Hot Plug pin allows the signal to meet the specified requirements.





1) Connect power supply (+) to HPD through a 1.2kΩ resistor and (–) to ground.

2) Terminate each TMDS pin to 3.3V through a 50 ohm resistor.

3) For each of the following tests, measure the voltage, VHPD, at the input point of the Source’s HPD pin.

4) Apply DC power of 2.4V and 5.3V. For each:

5) Measure the voltage level at the HPD input: VHPD(HIGH).

6) If (VHPD(HIGH) < 2.0V) OR (VHPD(HIGH) > 5.3V) then FAIL.

7) Apply DC power of 0.0V and 0.4V. For each:

8) Measure the voltage level at the HPD input: VHPD(LOW).

9) If (VHPD(LOW) < 0.0V) OR (VHPD(LOW) > 0.80V) then FAIL.

Recommended Test Method Test ID 7-12: Hot Plug Detect

Setup 36. Test ID 7-12: Hot Plug Detect

No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.15 1 3 1.2kΩ ± 1% resistor <Any> 1 4 EDID Emulator Any Recommended EDID

Emulator 4.2.3.2 1

5 TPA-P Any TPA giving access to DDC & CEC signals

4.2.1.1 1


Termination of TMDS signals can be accomplished with TPA-P-DI.




Test ID 7-13: DDC/CEC Capacitance and Voltage


[HDMI: 4.2.8] DDC

“The Display Data Channel (DDC) I/Os and wires … shall meet the requirements specified in the I2C-bus Specification, version 2.1, Section 15 for ‘Standard Mode’ devices.”

(Note: The VESA E-DDC specification specifies use of I2C at +5V.)

[HDMI: Table 4-35] Maximum Capacitance of DDC Line




Maximum capacitance load of a Source, or of a Repeater that is not a CEC root device 150pF CEC Line Capacitance

Test Objective

Confirm that the capacitance load on the DDC and CEC lines does not exceed the limit in the specification and that DDC and CEC pull-ups are the correct voltage.


NOTE for Repeater DUTs: This test only needs to be performed once per connector. If test has already been performed on this port, then SKIP.

If CDF field Source_DDC_cap_power-on = “Y”

• Turn on power to the DUT.

else

• Turn off power to the DUT.

Set the LCR meter test signal:




Verify that the test equipment, including fixtures, is disconnected from the DUT.

Connect the HPD signal to the DDC/CEC Ground signal on the TPA.

Connect the DDC/CEC Ground signal to the frame ground of the TPA.

Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1.

Attach the test equipment to the DUT and measure the capacitance of the SDA line. This is the total capacitance, C2.

DUT capacitance, CDUT = C2 – C1.

If CDUT > 50pF, then FAIL.




Repeat the C1 and C2 measurements and the CDUT calculation for the SCL pin.

If CDUT > 50pF, then FAIL.

Set the LCR meter so that the test signal delivered to the TPA has:




Disconnect the TPA from the DUT

Perform the C1 measurement for the CEC pin on the TPA.

Turn off power to the DUT.

If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Source(s).

Repeat the C2 measurement and the CDUT calculation for the CEC pin (CDUT_ OFF ).

If CDUT_OFF > 150pF, then FAIL.

Turn on power to the DUT.

Repeat the C2 measurement and the CDUT calculation for the CEC pin (CDUT_ ON).

If CDUT_ON > 150pF, then FAIL.

Disconnect the LCR meter from the TPA.

Verify that the HPD signal is connected to the DDC/CEC Ground signal on the TPA.

Turn on power to the DUT.

Attach an oscilloscope to the DUT and measure the voltage (VSDA) of the SDA line when not being driven low.

If VSDA < 4.5V or VSDA > 5.5V then FAIL

Measure the voltage (VSCL) of the SCL line when not being driven low.

If VSCL < 4.5V or VSCL > 5.5V then FAIL

Measure the voltage (VCEC) of the CEC line when not being driven low.

If VCEC > 0.6V and (VCEC < 2.5V or VCEC > 3.6V) then FAIL

If DUT is being tested as a Repeater, reconnect test Source(s) before proceeding.





Setup 37. Test ID 7-13: DDC/CEC Capacitance and Voltage

No. Description Recommended TE Reference Qty. 1 Digital LCR Meter HIOKI 3522-50 4.2.1.16 1 2 LCR Meter Probe HIOKI 9143 4.2.1.16 1 3 LCR DC-Bias Unit HIOKI 9268-01 4.2.1.16 1 4 TPA-P Any TPA giving access to

DDC & CEC signals 4.2.1.1 1

5 General Oscilloscope <Any> 4.2.3.4 1 1) Verify that the TPA is disconnected from the DUT.

2) Connect the Hioki DC-Bias Unit in an inverted configuration:

2.1) Supply the DC bias voltage in the direction opposite from a typical configuration.

2.2) As shown in setup above, probe polarity should also be connected in an inverted direction (i.e. GND line is connected to H port of the probe, and Signal line to L port). Note that, for accurate measurement, the earth line (3rd pin) of the AC plug should be disconnected for both the HIOKI-3522-50 and DC-power supply.

3) If CDF field Source_DDC_cap_power-on = “Y”

4) Turn on power to the DUT.

else

5) Turn off power to the DUT. 6) Connect the HPD signal to the DDC/CEC Ground signal on the TPA.




7) Connect the DDC/CEC Ground signal to the frame ground of the TPA. 8) Verify that the TPA is disconnected from the DUT.

9) Starting with a Hioki CV setting of 1.2V, adjust the CV setting until the test signal delivered to the TPA has:

9.1) DC Bias voltage = 2.5V

9.2) AC voltage = 3.5V peak-to-peak

9.3) Frequency = 100kHz

10) Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1SDA.

11) Measure the capacitance of the SCL line: C1SCL. 12) Attach the TPA to the DUT.

13) Measure the capacitance of the SDA line. This is the total capacitance, C2SDA.

14) Calculate the DUT capacitance, CDUT_ SDA = C2 SDA – C1 SDA.

15) If CDUT_ SDA > 50pF, then FAIL. 16) Disconnect the TPA from the DUT

17) Measure the inherent TE capacitance of the SCL line, C1SCL. 18) Attach the TPA to the DUT.

19) Measure the total capacitance of the SCL line, C2SCL.

20) CDUT_ SCL = C2 SCL – C1 SCL.

21) If CDUT_SCL > 50pF, then FAIL. 22) Disconnect the TPA from the DUT

23) Starting with a CV value of 0.9V, adjust the LCR meter CV setting until the test signal delivered to the TPA has:




24) Measure the capacitance of the CEC pin to measure the intrinsic capacitance of the TPA, C1CEC.

25) Turn off power to the DUT

26) If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Sources.

27) Connect the TPA to the DUT.

28) Measure the total capacitance of the CEC line, C2OFF_CEC.

29) CDUT_OFF_CEC = C2OFF_CEC – C1CEC.

30) If CDUT_OFF_CEC > 150pF, then FAIL.





32) Repeat the C2 measurement and the CDUT_ON_CEC calculation for the CEC pin.

33) If CDUT_ON_CEC > 150pF, then FAIL. 34) Disconnect the LCR meter from the TPA, leaving the TPA connected to the DUT.

35) Verify that the HPD signal is connected to the DDC/CEC Ground signal on the TPA.


37) Attach the oscilloscope to the DUT and measure the voltage (VSDA) of the SDA line when it is not being driven low.

38) If VSDA < 4.5V or VSDA > 5.5V then FAIL

39) Measure the voltage (VSCL) of the SCL line when not being driven low.

40) If VSCL < 4.5V or VSCL > 5.5V then FAIL

41) Measure the voltage (VCEC) of the CEC line when not being driven low.

42) If VCEC > 0.6V and (VCEC < 2.5V or VCEC > 3.6V) then FAIL

43) If DUT is being tested as a Repeater, reconnect test Sources before proceeding.

Test ID 7-14: CEC Line Connectivity


[HDMI: Table 4-40] CEC line Electrical Specifications for all Configurations - Line Connectivity

<See reference for details>

Test Objective

Ensure that CEC lines on all inputs and outputs are connected as specified in following description:

CEC lines from all HDMI inputs (if present) and a single HDMI output (if present) shall be interconnected.

Except :

- A device which has no HDMI output is allowed to have separate CEC lines for each HDMI connector if that device takes a logical address of 0 on each CEC line.

- A device that is acting as the CEC root device shall not connect the CEC line to any HDMI output.


NOTE: This test only needs to be performed once per product, not once per connector as with all of the other tests in this document. If test has already been performed on product, then SKIP.




[Verify correct CDF fields: Independent CEC may be set only if DUT has no HDMI output and only if DUT is performing CEC operations at logical address 0]

If CDF field Independent_CEC = “Y” then:

• If CDF field HDMI_output_count > 0 then FAIL

• If CDF field CEC_protocol = “N” then FAIL

[Verify that CEC pins on all input connectors are tied together]

Turn DUT off

For every combination of two HDMI input connectors on the DUT:

• Measure the resistance between the CEC pins of the two connectors.

• If any resistance measurement > 5Ω then:

- If CDF field Independent_CEC = “N” then FAIL

- If resistance < 48kΩ then FAIL

[Verify that CEC pins on all output connectors are not connected to each other]

For every output connector;

• Measure the resistance between the CEC pin of that output connector and the CEC pin of every other output connector

• If resistance is less than 1MΩ then FAIL

[Verify that DUT has CEC connected to only 1 output]


• Measure the resistance between the CEC pin of that output connector and the CEC pin of each input connector.

• If resistance is between 5Ω and 1MΩ then FAIL

• If resistance is less than 5Ω then note the output connection ID.

If more than one output connection ID noted then FAIL

If no output connection ID noted,

• If CDF field CEC_root_device = “N” then FAIL

If one output connection ID noted,

• If CDF field CEC_root_device = “Y” then FAIL





No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 TPA-P Any TPA giving access to

CEC signals 4.2.1.1 2

NOTE: This test only needs to be performed once per product, not once per connector as with all of the other tests in this document. If test has already been performed on product then SKIP.

Note that two TPA-P boards may be needed to perform this test and, due to the mechanical constraints of the product, it may be impossible to insert more than one TPA-P board into the DUT simultaneously. It is permitted to use a short HDMI cable in connection with a TPA-R board in place of one or both of the TPA-P boards. To calibrate, measure the resistance of the CEC wires in each short cable, add those values to determine the total CEC test equipment resistance and subtract that value from the test measurements below before performing the test comparisons below.

[Verify correct CDF fields]



• If CDF field CEC_protocol = “N” then FAIL


1) Turn DUT off

2) Set Digital Multi-Meter to measure resistance using auto scale mode.

3) Connect one probe of the meter to the CEC pin on the first TPA-P

4) Connect the other probe of the meter to the CEC pin on the second TPA-P

5) For every combination of two HDMI input connectors on the DUT

6) Connect first TPA-P to first selected HDMI connector

7) Connect second TPA-P to second selected HDMI connector

8) Read resistance value from Digital Multi-Meter

9) If reading is greater than 5Ω then:

10) If CDF field Independent_CEC = “N” then FAIL

11) If resistance < 48kΩ then FAIL


12) For every HDMI output connector (from 1 to value in CDF field HDMI_output_count):

13) Connect first TPA-P to selected HDMI output connector

14) For every other HDMI output connector (on which the resistance with selected HDMI output connecor has not been measured):




15) Connect second TPA-P to selected HDMI output connector


17) If resistance is less than 1MΩ then FAIL

18) Continue to next output connector


[Verify that DUT has CEC connected to at most 1 output]



22) For every HDMI input connector:

23) Connect second TPA-P to selected HDMI input connector


25) If resistance is between 5Ω and 1MΩ then FAIL

26) If resistance is less than 5Ω then note the output connection ID.

27) Continue to next input connector


29) If more than one output connection ID noted then FAIL, “CEC line connected to > 1 output”

30) If no output connection ID noted,

31) If CDF field CEC_root_device = “N” then FAIL, “CEC line not connected to any output”

32) If one output connection ID noted,

33) If CDF field CEC_root_device = “Y” then FAIL, “CEC line is connected to one output”

Test ID 7-15: CEC Line Degradation



A device with power removed (from the CEC circuitry) shall not degrade communication between other CEC devices (e.g. the line shall not be pulled down by the powered off device).

Maximum CEC line leakage current must be ≤1.8μA

Test Objective

Ensure that the DUT does not degrade communication between other CEC devices when power is applied, when power is removed and, if supported, in standby mode (the line must not be pulled down by the powered off device).





NOTE: This test only needs to be performed once per product, not once per connector as with all of the other tests in this document.

If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Source(s) and Sink(s).

[Perform following for all DUTs whether or not they support CEC_protocol]

Remove power (mains) from DUT

Disconnect CEC line from both resistors going to DDC/CEC Ground and 3.3V

Connect CEC line to 3.63V via 27kΩ ±5% resistor with ammeter in series

Measure the CEC line leakage current. If current > 1.8μA then → FAIL

If CDF field CEC_protocol is N, do the following. Else if the DUT is being tested as a Repeater under Test ID 9-1 and has additional output ports other than indicated in CDF field Repeater_CEC_Output, then, do the following on all ports that are not indicated in CDF field Repeater_CEC_Output.

• Connect the CEC line on DUT to DDC/CEC Ground via a 1MΩ ±5% resistor

• Power on DUT

[Measure voltage when “disconnected”]

- Measure CEC line voltage on DUT and record as VCEC1.

- If VCEC1 is in the range 0V to 0.1V [no connect] or is in the range > 2.88V to 3.63V then continue else then FAIL

• Disconnect the CEC line from DDC/CEC Ground

[Measure voltage when “pulled-up externally”]

• Connect the CEC line to 3.3V via a 27kΩ ±5% resistor

- Measure CEC line voltage.

- If voltage not 3.3V ±10% then → FAIL

[Measure voltage when “pulled-down externally”]

• Connect the CEC line on the DUT to DDC/CEC Ground via 1kΩ ±5% load resistor (as well as the previously connected 3.3V via 27kΩ±5%)

- Measure CEC line voltage on the DUT output connector and record as VCEC2

- If VCEC1 is in the range 0V to 0.1V and VCEC2 is not in the range 0.12V ±12% then → FAIL

- If VCEC1 is in the range 2.88V to 3.63V and VCEC2 is not in the range 0.196V to 0.274V then → FAIL

• Repeat tests with DUT in power off state

• If standby power mode exists on DUT, repeat test in that state




If DUT is being tested as a Repeater, reconnect test Source(s)/Sink(s) before proceeding.


No. Description Recommended TE Reference Qty.1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.14 1 3 27kΩ±5% resistor <any> 1

4 1kΩ±5% Resistor <any> 1

5 1MΩ±5% Resistor <any> 1

6 TPA-P Any TPA giving access to CEC signals

4.2.1.1 1

TPA-CEC-R incorporates the resistances shown above and so may be used instead of other TPA-P and discrete resistors.


1) If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Sources and Sink(s).


2) Remove power (mains) from DUT

3) Disconnect CEC line from both resistors going to DDC/CEC Ground and 3.3V

4) Set DC Power Supply to 3.63V

5) Connect the CEC line on the TPA input connector to one end of 27kΩ resistor

6) Set Multi-Meter to current measurement and connect between free end of 27kΩ resistor and DC power supply.

7) From multi-meter, record leakage current. If measured current > 1.8μA then → FAIL

8) If CDF field CEC_protocol is N, do the following. Else if the DUT is being tested as a Repeater under Test ID 9-1 and has additional output ports other than indicated in CDF field Repeater_CEC_Output, then, do the following on all ports that are not indicated in CDF field Repeater_CEC_Output.

9) Connect TPA to DUT


11) Connect the CEC line to DDC/CEC Ground on the TPA-P via a 1MΩ ±5% resistor

12) Set Multi-Meter to voltage measurement and connect between CEC pin and DDC/CEC Ground on TPA

13) Power on DUT

14) Measure voltage with Multi-Meter, record as VCEC1

15) if (VCEC1 is in the range 0V to 0.1V) or (VCEC1 is in the range 2.88V to 3.63V) then continue else then FAIL




16) Disconnect the CEC line from DDC/CEC Ground

17) Connect the CEC line on TPA to DC Power Supply (3.3V) via the 27kΩ ±5% resistor

18) Measure voltage; if voltage is not 3.3V ±10% then → FAIL

19) Connect the CEC line on the TPA to DDC/CEC Ground on TPA via 1kΩ ±5% load resistor (as well as the previously connected 3.3V via 27kΩ)

20) Measure voltage, record as VCEC2

21) If VCEC1 in the range 0V to 0.1V and VCEC2 is not in the range 0.12V ±12% then → FAIL

22) If VCEC1 >= 2.88V and <= 3.63V and VCEC2 is not in the range 0.196V to 0.274V then → FAIL

23) Repeat tests with DUT in power off state

24) If standby power mode exists on DUT, repeat test in that state

25) If DUT is being tested as a Repeater, reconnect test Source(s)/Sink(s) before proceeding.




7.4 Source – Protocol 7.4.1 Required Test Method Setup for Protocol Tests

Unless stated otherwise, the Required Test Method for all of the tests in this section includes the following setup and Source DUT operation:

Connect Source DUT to an Encoding Analyzer or Protocol Analyzer as specified in test.

1) Operate the Source DUT to transmit any one of the following video format timings for at least 2 seconds while also transmitting basic audio (if supported).:

• 720x480p @ 59.94Hz

• 640x480p @ 59.94Hz

• 720x576p @ 50Hz

2) Perform the specified protocol test(s) for the entire analysis period.

3) Operate the Source DUT to transmit the first of the following video format timings which is supported by the DUT (if any are supported) while also transmitting basic audio (if supported).:

• 1080i @ 60Hz

• 720p @ 60Hz

• 1080i @ 50Hz

• 720p @ 50Hz

4) Perform the specified protocol test(s) for the entire analysis period.

Note that with the most common Recommended Test Equipment, all of the Protocol tests (except for the conditional second half of Test ID 7-19) can be performed with a single capture for each of the two selected video formats from above.




7.4.2 Tests

Test ID 7-16: Legal Codes


[HDMI: 5.1.2] Operating Modes Overview

“The HDMI link operates in one of three modes: Video Data Period, Data Island period, and Control period.”

[HDMI: 5.2.2.1] Video Guard Band


[HDMI: 5.2.3.3] Data Island Guard Bands


[HDMI: 5.4.2] Control Period Coding


[HDMI: 5.4.3] TERC4 Coding


[HDMI: 5.4.4] Video Data Coding


Test Objective

Verify that Source only outputs legal 10-bit codes.


Connect DUT to a recommended Encoding Analyzer and operate Source DUT as described in Section 7.4.1.

Verify that, for all pixels within the analysis period, the Source DUT transmits only 10-bit values on each of the three TMDS channels that correspond to one of the following:

• Any legal Video Data codes

- Any Video Data Code that was encoded with an incorrect “data stream disparity” value, that is, which causes the channel to become more, rather than less DC-balanced.

• 4 Control Period codes

• 16 TERC4 codes

• Data Island Guard Band (all 4 possible values for Channel 0)

• Video Guard Band

[Illegal 10-bit code] If any channel contains a 10-bit code that is not one of the above then FAIL

Verify that, for all pixels, all three TMDS channels are encoded using the same of the 5 encodings above.

[Inconsistent channel coding] If any TCHARACTER does not use consistent encoding across all three channels then FAIL




Recommended Test Method Test ID 7-16: Legal Codes

1) Setup Source DUT and Encoding Analyzer and operate Source DUT as described in Section 7.4.1.

2) Output one of the 480p/576p formats described in Section 7.4.1.

3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Legal Codes’

4) If HDMI Analysis reports ‘PASS’, then PASS, else FAIL

5) Output one of the 1080i/720p formats described in Section 7.4.1.

6) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Legal Codes’


Test ID 7-17: Basic Protocol


[HDMI: 5.2.1] Control Period

“The HDCP-specified Enhanced Encryption Status Signaling ENC_EN code (CTL0:3=1001) shall not be used except as a correct ENC_EN during the HDCP-specified window of opportunity.”

[HDMI: 5.2.1.1] Preamble

“Immediately preceding each Video Data Period or Data Island Period is the Preamble. This is a sequence of eight identical Control characters that indicate whether the upcoming data period is a Video Data Period or is a Data Island.” “The Data Island Preamble control code (CTL0:3=1010) shall not be transmitted except for correct use during a Preamble period.”

[HDMI: 5.2.2] Video Data Period

“…the Video Data Period begins with a two character Video Leading Guard Band.”

[HDMI: 5.2.3] Data Island Period

“The first two data characters within the Data Island are the Leading Guard Band. The last two data characters within the Data Island are the Trailing Guard Band.”

[HDMI: Table 5-3] TMDS Link Timing Parameters

“Minimum duration Control Period: 12 TPIXEL”

[HDMI: 5.4] Encoding


Test Objective

Verify that Source only outputs code sequences for Control Periods, Data Island Periods and Video Data Periods corresponding to basic HDMI protocol rules.


Connect Source DUT to a Protocol Analyzer and operate as described in Section 7.4.1.




Suspend HDCP functionality (if present) and examine the CTL3:CTL2:CTL1:CTL0 values for the 16 (Control-encoded) pixels during the HDCP-specified window of opportunity. If the ENC_EN code (CTL0:3=1001) is included. then FAIL, (ENC_EN code is detected)

For every transition from a character with Control Period Coding to next character using any other (non-Control) encoding:

• If the 12 pixels prior to the transition contain any pixels not encoded with Control Period Coding then FAIL, (Control Period too short)

• Examine the CTL3:CTL2:CTL1:CTL0 values for the 8 (Control-encoded) pixels immediately prior to the transition and compare to the values 0b0001 (Video Data Period Preamble) and 0b0101 (Data Island Preamble).

• [Check for Invalid Data Island Preamble control code usage]

- Examine whole control period prior to the Preamble. If the period includes Data Island Preamble control code (CTL0:3=1010) then FAIL

• [Inconsistent Preamble]

• If any of the 8 pixels does not match the CTLx value for any of the other 7 pixels then FAIL

• [Illegal Preamble]

• If the Preamble value is neither Data Island Preamble nor Video Data Preamble then FAIL

• If the Preamble value is Data Island Preamble:

- Examine the first two pixels following the Preamble (Leading Guard Band).

- If TMDS channel 0 for either of these pixels does not equal one of the 4 permitted Data Island Guard Band characters (0xC, 0xD, 0xE, 0xF) [HDMI: 5.2.3.3] then FAIL

- If TMDS channel 1 or 2 for either of these pixels does not equal the specified Data Island Guard Band character [HDMI: 5.2.3.3] then FAIL

- Scan through following pixels, while counting pixels, until finding a transition to Control Period Coding, verifying that every character is encoded with Data Island Coding.

- Examine the last two pixels preceding this transition (Trailing Guard Band).

- If TMDS channel 0 for either of these pixels does not equal one of the 4 permitted Data Island Guard Band characters (0xC, 0xD, 0xE, 0xF) [HDMI: 5.2.3.3] then FAIL

- If TMDS channel 1 or 2 for either of these pixels does not equal the specified Data Island Guard Band character [HDMI: 5.2.3.3] then FAIL

- If any character following the Leading Guard Band but preceding the Trailing Guard Band is not a legal TERC4 code then FAIL

- If first character following the Leading Guard Band has TERC4 ch. 0, bit 3 == 1 then FAIL

- If any other character prior to Trailing Guard Band has TERC4 ch. 0, bit 3 != 1 then FAIL

- Length of Data Island is equal to number of pixels following Leading Guard Band and prior to Trailing Guard Band. Number of packets = Length of Data Island / 32.

- If number of packets is not an integer then FAIL

- If number of packets == 0 then FAIL




- If number of packets > 18 then FAIL

- For every packet within the Data Island:

For each of the 5 ECC blocks within the packet:

If BCH parity bits are incorrect then FAIL

• If the Preamble value is Video Data Preamble:

- Examine the first two pixels following the Preamble.

- If either of these pixels does not equal the Video Data Guard Band character [HDMI: 5.2.2.1] then FAIL

- Scan through following pixels until finding a transition to Control Period Coding, verifying that every character is encoded with Video Data Coding.

- If any character following Video Guard Band up to transition is not a correctly encoded Video Data code then FAIL

If no “FAIL” above, then PASS

Recommended Test Method Test ID 7-17: Basic Protocol

1) Setup Source DUT and Protocol Analyzer and operate Source DUT as described in Section 7.4.1.


3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Basic Protocol’



6) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Basic Protocol’


Test ID 7-18: Extended Control Period


[HDMI: Table 5-4] Extended Control Period Parameters

Maximum time between Extended Control Periods 50 msec

Minimum duration Extended Control Period 32 TPIXEL

Test Objective

Verify that Source outputs an Extended Control Period within the required period.


Connect Source DUT to a Protocol Analyzer and operate as described in Section 7.4.1.

Starting with the first character of the capture, perform the following search for each 50milliseconds of capture

• [Search for Extended Control Period]




• If no Control Period within the 50msecs is 32 or more pixels in length then FAIL

• If any Control Period within the 50msecs is 32 or more pixels in length then CONTINUE


1) Setup Source DUT and Protocol Analyzer and operate Source DUT as described in Section 7.4.1.


3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Extended Control Period’



6) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Extended Control Period’


Test ID 7-19: Packet Types


[HDMI: 5.3] Data Island Packet Definitions


[HDMI: 8.8] ISRC Handling

“When fields UPC_EAN_ISRC_16 through 31 include effective data (i.e. not "reserved"), a subsequent ISRC2 Packet shall be transmitted. In other cases, the ISRC2 packet may optionally be transmitted. “ “When a subsequent ISRC2 Packet is transmitted, the ISRC_Cont field shall be set and shall be clear otherwise.“

[HDMI: 9.3] Usage of Audio Content Protection (ACP) Packets


Test Objective

Verify that Source only transmits permitted Packet Types and that reserved fields are zero.


Connect Source DUT to a Protocol Analyzer, containing an EDID with

• HDMI VSDB length field == 6 with

- Supports_AI bit = 1

• No support for non-primary video formats, no Deep Color support

• Only Basic Audio support (no compressed, DSD, DST or High-Bitrate audio formats)

• No Colorimetry Data Block




Operate as described in Section 7.4.1.

If no Data Island is detected at least once per two video fields then FAIL

For each Packet within each Data Island in the capture:

• If packet type is not equal to any of the following: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x81, 0x82, 0x83, 0x84, 0x85 then FAIL, (optionally continue to next packet)

• If packet type is equal to 0x00 (Null Packet)

- Check bytes HB1, HB2 and all bytes in packet body.

- If any bytes do not equal 0x00 then FAIL

• If packet type is equal to 0x01 (ACR Packet)

- Check bytes HB1, HB2.

- If HB1 or HB2 does not equal 0x00 then FAIL

- Check byte SB0 of subpacket 0

- If SB0 does not equal 0x00 then FAIL


- If bits 7, 6, 5 and 4 of SB1 do not equal 0 then FAIL


- If bits 7, 6, 5 and 4 of SB4 do not equal 0 then FAIL

- Compare SB0…SB6 of subpacket 0 with SB0…SB6 of every other subpacket. Likewise compare subpacket 1 with subpacket 2 and 3 and compare subpacket 2 with subpacket 3.

- If any subpacket differs from any other then FAIL

• If packet type is equal to 0x02 (Audio Sample Packet)

- Check byte HB1.

- If bits 7, 6, and 5 of HB1 do not equal 0 then FAIL

• If packet type is equal to 0x03 (General Control Packet)

- Check bytes HB1, HB2.

- If either byte does not equal 0x00 then FAIL

- Check byte SB0 of subpacket 0.

- If SB0 does not equal 0x00, 0x01, or 0x10 then FAIL

- Check bytes SB1…SB6 of subpacket 0.

- If any SB1…SB6 does not equal 0x00 then FAIL

- Compare SB0…SB6 of subpacket 0 with SB0…SB6 of subpackets 1, 2 and 3. Likewise, compare subpacket 1 with subpacket 2 and 3 and compare subpacket 2 with subpacket 3.

- If any subpacket differs from any other then FAIL

- If this General Control Packet was transmitted anywhere except between an active edge of VSYNC and 384 pixels following that same edge FAIL

• If packet type is equal to 0x04 (ACP Packet)

- Note that ACP Packet has been received




- If the value of HB1(ACP_type) is not equal to any of the following: 0x00, 0x01, 0x02, 0x03 then FAIL, (optionally continue to next packet)

- If ACP_type equals to 0x00 (Generic Audio) or 0x01(IEC 60958 conformant)

Check byte HB2 and PB0 through PB27

If these reserved field is not zeros then FAIL

- If ACP_type equals to 0x02 (DVD Audio)


If these reserved fields are not zero then FAIL

Check byte PB0

If the value is not equal to 0x01 then FAIL

Check the transmission timing of ACP packet.

If the ACP packet is not transmitted at least once per 300msec then FAIL

Check the existence of ISRC1 Packet

If ISRC1 Packet is not transmitted then FAIL

- If ACP_type equals to 0x03 (Super Audio CD)


If these reserved fields are not zero then FAIL

Check the transmission timing of ACP packet.

If the ACP packet is not transmitted at least once per 300msec then FAIL

• If packet type is equal to 0x05 (ISRC1)

- Note that ISRC1 Packet has been received

- Check following Reserved field

Bit 3,4, and 5 of HB1

HB2

PB16 through PB27

- If these reserved fields are not zero then FAIL

- If the value of ISRC_Cont is one

Check the existence of ISRC2 Packet in the subsequent Packets

If ISRC2 Packet is not transmitted then FAIL

- If the value of ISRC_Cont is zero

Check the existence of ISRC2 Packet in the subsequent Packets

If ISRC2 Packet is transmitted then FAIL

• If packet type is equal to 0x06 (ISRC2)

- Note that ISRC2 Packet has been received

- Check following Reserved field

HB1

HB2




PB16 through PB27


If ACP or ISRC1 or ISRC2 packet was received during the test,

• Change HDMI VSDB in Protocol Analyzer to length = 5 or Supports_AI=0.

• Repeat entire test procedure

• If any ACP, ISRC1 or ISRC2 packet is transmitted then FAIL

Recommended Test Method Test ID 7-19: Packet Types

Note: Panasonic UITA-1000 cannot be used for One Bit Audio testing or testing of ACP_Type value of Super Audio CD.

1) Setup Source DUT and Protocol Analyzer and operate Source DUT as described above.

2) Configure Protocol Analyzer with HDMI VSDB of length 6 with Supports_AI = 1

3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Packet Types’


5) If ACP, ISRC1 or ISRC2 packet is received during test:

6) Configure Protocol Analyzer with HDMI VSDB of length 5

7) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Packet Types’


9) If ACP, ISRC1 or ISRC2 packet is received during test then FAIL




7.5 Source – Video


Test ID 7-21: Minimum Format Support


[HDMI: 6.2.1] Format Support Requirements

An HDMI Source shall support at least one of the following video format timings: 640x480p @ 59.94/60Hz 720x480p @ 59.94/60Hz 720x576p @ 50Hz

Test Objective

Verify that Source meets minimum Video Format support requirement.


1) Check CDF field Source_Video_Formats for any of the following video format timings.

• 640x480p @ 59.94/60Hz 4:3 (Format 1)

• 720x480p @ 59.94/60Hz 4:3 (Format 2) or 16:9 (Format 3)

• 720x576p @ 50Hz 4:3 (Format 17) or 16:9 (Format 18)

2) If CDF contains any of the video format timings then PASS

3) Else, FAIL


Perform steps in Required Test Method.




Test ID 7-22: Additional Format Support


[HDMI: 6.2.1] Format Support Requirements

“An HDMI Source that is capable of transmitting any of the following video format timings using any other component analog or uncompressed digital video output, shall be capable of transmitting that video format timing across the HDMI interface. 1280x720p @ 59.94/60Hz 1920x1080i @ 59.94/60Hz 720x480p @ 59.94/60Hz 1280x720p @ 50Hz 1920x1080i @ 50Hz 720x576p @ 50Hz”

Test Objective

Verify that Source is capable of transmitting formats required due to similar support on non-HDMI interfaces.


1) For each of the rows in table below, If CDF field in column “If CDF field…is ‘Y’” then:

2) Check CDF field Source_Video_Formats for the CEA format number(s) in column “CDF…must contain value below”

3) If none of these formats is in CDF field Source_Video_Formats then FAIL, “Missing <Comment text>”

If CDF field below == ‘Y’ CDF Source_Video_Formats must indicate “Y” for format

number below:

Comment text

Source_480p60_Other 2 or 3 480p60

Source_720p60_Other 4 720p60

Source_1080i60_Other 5 1080i60

Source_576p50_Other 17 or 18 576p50

Source_720p50_Other 19 720p50

Source_1080i50_Other 20 1080i50


Perform steps in Required Test Method to manually verify CDF entries.




Test ID 7-23: Pixel Encoding – RGB to RGB-only Sink


[HDMI: 6.2.3] Pixel Encoding Requirements

“All HDMI Sources and Sinks shall be capable of supporting RGB 4:4:4 pixel encoding.”


“An HDMI Source may determine the pixel-encodings that are supported by the Sink through the use of the E-EDID. If the Sink indicates that it supports YCBCR-formatted video data and if the Source can deliver YCBCR data, then it can enable the transfer of this data across the link.”

[861-D: 5] Colorimetry and Quantization


[861-D: 6] Auxiliary Information Carried from Source to DTV Monitor


Test Objective

Verify that the Source DUT always outputs required pixel encoding (RGB), which also correlates with AVI fields Y0 and Y1 when connected to an RGB-only Sink.

Also verify that the Source DUT outputs AVI InfoFrame with default range value in Q and YQ field when a Sink device does not support selectable RGB Quantization Range.


1) For each video format timing listed in CDF field Source_Video_Formats, perform the following tests. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

2) Attach Source DUT to Video Picture Analyzer containing a valid HDMI EDID with bits 4 and 5 of byte 3 of the CEA EDID Timing Extension both clear (0).

3) Operate Source DUT to output video using material or a pattern that can clearly indicate, on the attached Sink, whether the proper pixel encoding is being used.

4) Examine video output and any AVI InfoFrame transmitted from Source.

[Verify that transmitted video uses RGB pixel encoding.]

5) Examine image on Video Picture Analyzer.

6) If image appears to be transmitted with a non-RGB pixel encoding then FAIL

7) If CDF field Source_AVI_Supported == ‘Y’:

[Verify that an AVI InfoFrame is transmitted on every two video fields.]

8) If any two video fields occur with no AVI InfoFrame then FAIL

[Verify that any transmitted AVI InfoFrame is correct and indicates RGB pixel encoding]

9) For every AVI InfoFrame,

10) If field Y1 and Y0 does not indicate RGB encoding (0, 0) then FAIL




If CDF field Source_Q_FullRange == “Y”,

11) Attach Source DUT to Video Picture Analyzer containing an EDID with the following,

• VCDB (Video Capability Data Block) QS bit = 0

12) Operate Source DUT to output RGB 640x480p video format signal.

13) If field Q1,Q0 is not 0,0 (Default) or 1,0 (Full Range) then FAIL.

14) If field YQ1,YQ0 is not 0,0 (Limited Range) or 0,1 (Full Range) then FAIL.

15) Operate Source DUT to output RGB except 640x480p video format signal.

16) If field Q1,Q0 is not 0,0 (Default) or 0,1 (Limited Range) then FAIL.

17) If field YQ1,YQ0 is not 0,0 (Limited Range) or 0,1 (Full Range) then FAIL.

18) Repeat for remaining video formats.


Note: Panasonic UITA-1000 cannot be used when CDF field Source_Q_FullRange == “Y”.

1) For each format listed in CDF field Source_Video_Formats perform the following tests. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

2) Perform Required Test Method using a Recommended Video Picture Analyzer.

3) Verify, that the indicated pixel encoding (AVI Y0 and Y1 fields in AVI) corresponds to RGB.

4) By viewing the video output, verify that the transmitted pixel encoding is RGB (as shown in Required Test Method above).

5) Verify, that the indicated quantization (Q1,Q0 and YQ1,YQ0 fields in AVI) corresponds to RGB Quantization.

PASS/FAIL criteria are defined above.




Test ID 7-24: Pixel Encoding – YCBCR to YCBCR Sink



“All HDMI Sources shall support either YCBCR 4:2:2 or YCBCR 4:4:4 pixel encoding whenever that device is capable of transmitting a color-difference color space across any other component analog or digital video interface.”

[HDMI: 6.5.1] Pixel Encodings


[861-D: 5] Colorimetry and Quantization


[861-D: 6] Auxiliary Information Carried from Source to DTV Monitor


[HDMI: Table 8-5] YCC Quantization Range


Test Objective

Verify that the Source DUT always outputs pixel encoding that correlates with AVI fields Y0 and Y1 when presented with a YCBCR-capable Sink and that DUT is capable of supporting YCBCR pixel encoding when required.

Also verify that the Source DUT outputs AVI InfoFrame with default range value in Q and YQ field when a Sink device does not support selectable YCC Quantization Range.


1) For each video format timing listed in CDF field Source_Video_Formats perform the following tests. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

2) Attach Source DUT to Video Picture Analyzer containing a valid HDMI EDID with

bits 4 and 5 of byte 3 of the CEA EDID Timing Extension both set (1).

3) Operate Source DUT to output video using material or a pattern that can clearly indicate, on the attached Sink, whether the proper color space is being used.

4) If Source supports YCBCR transmission (CDF field Source_HDMI_YCBCR is “Y”), configure the DUT to transmit YCBCR pixel encoding.

5) If CDF field Source_AVI_Supported == ‘Y’:

[Verify that an AVI InfoFrame is transmitted on every two video fields.]

6) If any two video fields occur with no AVI InfoFrame then FAIL

7) Examine video output and all AVI InfoFrames transmitted from Source.

8) For every AVI InfoFrame,

9) If AVI Y1 and Y0 fields do not indicate same pixel encoding as is used in transmitted video then FAIL




10) If CDF field Source_HDMI_YCBCR is “Y” :

11) If transmitted video uses RGB pixel encoding then FAIL

12) If any transmitted AVI InfoFrame indicates RGB pixel encoding then FAIL

If CDF field Source_YQ_FullRange == “Y”,

13) Attach Source DUT to Video Picture Analyzer containing an EDID with the following,

• VCDB (Video Capability Data Block) QY bit = 0

14) Operate Source DUT to output YCBCR,

15) If field Q1,Q0 is not 0,0 (Default) or 0,1 (Limited Range) then FAIL.

16) If field YQ1,YQ0 is not 0,0 (Limited Range) then FAIL.

17) Repeat for remaining video formats.


Note: Panasonic UITA-1000 cannot be used when CDF field Source_YQ_FullRange == “Y”.

1) For each format listed in CDF field Source_Video_Formats perform the following tests. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

2) Attach Source DUT to Video Picture Analyzer and set the DVI/HDMI EDID switch to HDMI (up) position and the right switch to position A or C. (EDID indicates support for YCBCR).

3) Operate Source DUT to output video using material or a pattern that can clearly indicate, on the attached Sink, whether the proper color space is being used.

4) If Source supports YCBCR transmission (CDF field Source_HDMI_YCBCR is “Y”), configure the DUT to transmit YCBCR pixel encoding.

5) Capture the stream using the Video Picture Analyzer

6) Verify, that the indicated pixel encoding (AVI Y0 and Y1 fields) corresponds to the transmitted pixel encoding

7) By viewing the video output, verify that YCbCr pixel encoding is used when supported (as shown in Required Test Method above).

8) Verify, that the indicated quantization (Q1,Q0 and YQ1,YQ0 fields in AVI) corresponds to YCC Quantization.




Test ID 7-25: Video Format Timing


[HDMI: 6.3] Video Format Timing Specifications”

“All specified video line pixel counts and video field line counts (both active and total) and HSYNC and VSYNC positions, polarities and durations shall be adhered to when transmitting a specified video format timing.”

[861-D: Chapter 4] VIDEO FORMATS AND WAVEFORM TIMINGS”


[HDMI: Table 8-4] VIC AVI InfoFrame Packet Contents


Test Objective

Verify that Source DUT, whenever transmitting any CEA video format, complies with all required pixel and line counts and pixel clock frequency range.


ATC testing is required to verify active and total counts for both horizontal and vertical as well as HSYNC and VSYNC polarity. The ATC may optionally verify all other parameters.

Connect Source DUT to a Video Timing Analyzer.

For each video format timing listed in CDF field Source_Video_Formats perform the following. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

Operate Source DUT to output the tested format at a color depth of 24 bits/pixel. For all of the following, refer to the values listed in Table 7-1 and Table 7-2 for the tested format.

If CDF field Source_AVI_Required is ‘Y’:

• [Verify that at least one AVI InfoFrame is transmitted within every two video fields.]

• If any two video fields occur with no AVI InfoFrame then FAIL

With a frequency counter, measure the pixel clock rate.

For any video format listed in Table 7-1 and Table 7-2 as 60Hz, 30Hz, 24Hz, 120Hz or 240Hz, pixel clock may be +0.5%/-0.6% of the listed pixel rate to allow for lower vertical rates than those listed (59.94Hz vs. 60Hz, etc.). Formats listed as 25Hz, 50Hz, 100Hz or 200Hz must be +0.5%/-0.5% of the listed pixel rate.

If pixel clock is outside of allowable range then FAIL

From beginning of capture data, scan for first Video Data Period in capture.

Examine HSYNC and VSYNC values at last pixel before transition to Video Data Period.

If HSYNC == 1 then HS_POLARITY = 0, else HS_POLARITY = 1

If VSYNC == 1 then VS_POLARITY = 0, else VS_POLARITY = 1

If either value HS_POLARITY or VS_POLARITY do not equal values for the selected video format then FAIL




For each HSYNC active edge, examine all HSYNC and Video Data Periods to calculate following variables:

• HS_LEN = number of pixels that HSYNC remains active

• VIDEO_TO_HS = number of pixels from end of Video Data Period to HSYNC active edge

• H_ACTIVE = number of pixels in Video Data Period minus 2 (for Guard Band)

• H_TOTAL = number of pixels between two HSYNC active edges

• If any value HS_LEN, VIDEO_TO_HS, H_ACTIVE and H_TOTAL do not equal values for the selected video format then FAIL

Examine VSYNC/HSYNC relationship for two video fields.

If VSYNC active edge alternates from field to field between coincident with HSYNC and mid-point between two HSYNC active edges then SCAN = INTERLACED

• If VSYNC is coincident with HSYNC on every field then SCAN = PROGRESSIVE

For each VSYNC active edge, calculate following variables:

• VS_LEN = number of pixels that VSYNC remains active divided by H_TOTAL, rounded to nearest half-integer (i.e. 6 or 6.5).

• V_ACTIVE = number of Video Data Periods between each two VSYNC active edges

• V_TOTAL = number of pixels between VSYNC active edges divided by H_TOTAL, rounded to nearest half-integer

• If SCAN == PROGRESSIVE, examine all VSYNC, HSYNC and Video Data Periods to calculate following variables

- VS_TO_VIDEO = number of HSYNC pulses between VSYNC active edge and first subsequent Video Data Period, not including HSYNC pulse that is coincident (or nearly so) with VSYNC active edge

• If SCAN == INTERLACED, examine all VSYNC, HSYNC and Video Data Periods to calculate following variables:

- VS_TO_VIDEO = number of HSYNC pulses between VSYNC active edge and first subsequent Video Data Period, not including (for Field 1) HSYNC pulse that is coincident (or nearly so) with VSYNC active edge or (for Field 2) HSYNC pulse following VSYNC edge by ½ line

• If any value VS_LEN, VS_TO_VIDEO, V_ACTIVE and V_TOTAL do not equal values for the selected video format then FAIL

Determine CEA Video Code for the transmitted format. Note for subsequent tests.


1) For each format listed in CDF field Source_Video_Formats perform the following tests.

2) Perform Required Test Method using a Recommended Video Timing Analyzer.

With a frequency counter, measure the pixel clock rate and enter this value to the test equipment.

HDMI Analysis command: ’Full HDMI Compliance‘ or ’Video Format Timing’





Table 7-1 Video Format Timing – Horizontal and Clock Parameters

CEA Video Code

Format Pixel Clock (MHz)

H_ TOTAL Pixels

H_ ACTIVE Pixels

VID_ TO_HS clocks

HS_ POLR’Y

HS_LEN

clocks

1 640x480p @ 60 Hz 25.2 800 640 16 – 96 2,3 720x480p @ 60 Hz 27.027 858 720 16 – 62 4 1280x720p @ 60 Hz 74.25 1650 1280 110 + 40 5 1920x1080i @ 60 Hz 74.25 2200 1920 88 + 44

6,7 720(1440)x480i @ 60 Hz 27.027 1716 1440 38 – 124 8,9 720(1440)x240p @ 60 Hz 27.027 1716 1440 38 – 124

10,11 2880x480i @ 60 Hz 54.054 3432 2880 76 – 248 12,13 2880x240p @ 60 Hz 54.054 3432 2880 76 – 248 14,15 1440x480p @ 60 Hz 54.054 1716 1440 32 – 124

16 1920x1080p @ 60 Hz 148.5 2200 1920 88 + 44 17,18 720x576p @ 50 Hz 27.0 864 720 12 – 64

19 1280x720p @ 50 Hz 74.25 1980 1280 440 + 40 20 1920 x 1080i @ 50 Hz 74.25 2640 1920 528 + 44

21,22 720(1440)x576i @ 50 Hz 27.0 1728 1440 24 – 126 23,24 720(1440)x288p @ 50 Hz 27.0 1728 1440 24 – 126 25,26 2880x576i @ 50 Hz 54.0 3456 2880 48 – 252 27,28 2880x288p @ 50 Hz 54.0 3456 2880 48 – 252 29,30 1440x576p @ 50 Hz 54.0 1728 1440 44 – 128

31 1920x1080p @ 50 Hz 148.5 2640 1920 528 + 44 32 1920x1080p @ 24 Hz 74.25 2750 1920 638 + 44 33 1920x1080p @ 25 Hz 74.25 2640 1920 528 + 44 34 1920x1080p @ 30 Hz 74.25 2200 1920 88 + 44

35,36 2880x480p @ 60Hz 108.108 3432 2880 64 – 248 37,38 2880x576p @ 50Hz 108.0 3456 2880 48 - 256

39 1920x1080i/1250 total @ 50Hz 72.0 2304 1920 32 + 168 40 1920x1080i @ 100Hz 148.5 2640 1920 528 + 44 41 1280x720p @ 100Hz 148.5 1980 1280 440 + 40

42,43 720x576p @ 100Hz 54.0 864 720 12 – 64 44,45 720(1440)x576i @ 100Hz 54.0 1728 1440 24 – 126

46 1920x1080i @ 120Hz 148.5 2200 1920 88 + 44 47 1280x720p @ 120Hz 148.5 1650 1280 110 + 40

48,49 720x480p @ 120Hz 54.054 858 720 16 – 62 50,51 720(1440)x480i @ 120Hz 54.054 1716 1440 38 – 124 52,53 720X576p @ 200Hz 108.0 864 720 12 – 64 54,55 720(1440)x576i @ 200Hz 108.0 1728 1440 24 – 126 56,57 720x480p @ 240Hz 108.108 858 720 16 – 62 58,59 720(1440)x480i @ 240Hz 108.108 1716 1440 38 – 124

60 1280x720p @ 24Hz 59.4 3300 1280 1760 + 40 61 1280x720p @ 25Hz 74.25 3960 1280 2420 + 40 62 1280x720p @ 30Hz 74.25 3300 1280 1760 + 40 63 1920x1080p @ 120Hz 297.0 2200 1920 88 + 44 64 1920x1080p @ 100Hz 297.0 2640 1920 528 + 44




Table 7-2 Video Format Timing – Vertical Parameters

CEA Video Code

Format V_ TOTAL (lines)

V_ ACTIVE (lines)

VS_ TO_VID(lines)

VS_LEN

(lines)

VS_ POLR’Y

HV _OFFSET (pixels)

1 640x480p @ 60 Hz 525 480 35 2 – 0 2,3 720x480p @ 60 Hz 525 480 36 6 – 0 4 1280x720p @ 60 Hz 750 720 25 5 + 0 5 1920x1080i @ 60 Hz 562.5 540 20 5 + 0 / 1100

6,7 720(1440)x480i @ 60 Hz 262.5 240 18 3 – 0 / 858 8,9 720(1440)x240p @ 60 Hz 262 or 263 240 18 3 – 0

10,11 2880x480i @ 60 Hz 262.5 240 18 3 – 0 / 1716 12,13 2880x240p @ 60 Hz 262 or 263 240 18 3 – 0 14,15 1440x480p @ 60 Hz 525 480 36 6 – 0

16 1920x1080p @ 60 Hz 1125 1080 41 5 + 0 17,18 720x576p @ 50 Hz 625 576 44 5 – 0

19 1280x720p @ 50 Hz 750 720 25 5 + 0 20 1920 x 1080i @ 50 Hz 562.5 540 20 5 + 0 / 1320

21,22 720(1440)x576i @ 50 Hz 312.5 288 22 3 – 0 / 864 23,24 720(1440)x288p @ 50 Hz 312…314 288 22 3 – 0 25,26 2880x576i @ 50 Hz 312.5 288 22 3 – 0 / 1728 27,28 2880x288p @ 50 Hz 312…314 288 22 3 – 0 29,30 1440x576p @ 50 Hz 625 576 41 5 – 0

31 1920x1080p @ 50 Hz 1125 1080 41 5 + 0 32 1920x1080p @ 24 Hz 1125 1080 41 5 + 0 33 1920x1080p @ 25 Hz 1125 1080 41 5 + 0 34 1920x1080p @ 30Hz 1125 1080 41 5 + 0

35,36 2880x480p @ 60Hz 525 480 36 6 – 0 37,38 2880x576p @ 50Hz 625 576 44 5 - 0

39 1920x1080i/1250 total @ 50Hz 625 540 62 5 + 0 / 1152 40 1920x1080i @ 100Hz 562.5 540 20 5 + 0 / 1320 41 1280x720p @ 100Hz 750 720 25 5 + 0

42,43 720x576p @ 100Hz 625 576 44 5 – 0 44,45 720(1440)x576i @ 100Hz 312.5 288 22 3 – 0 / 864

46 1920x1080i @ 120Hz 562.5 540 20 5 + 0 / 1100 47 1280x720p @ 120Hz 750 720 25 5 + 0

48,49 720x480p @ 120Hz 525 480 36 6 – 0 50,51 720(1440)x480i @ 120Hz 262.5 240 18 3 – 0 / 858 52,53 720X576p @ 200Hz 625 576 44 5 – 0 54,55 720(1440)x576i @ 200Hz 312.5 288 22 3 – 0 / 864 56,57 720x480p @ 240Hz 525 480 36 6 – 0 58,59 720(1440)x480i @ 240Hz 262.5 240 18 3 – 0 / 858

60 1280x720p @ 24Hz 750 720 25 5 + 0 61 1280x720p @ 25Hz 750 720 25 5 + 0 62 1280x720p @ 30Hz 750 720 25 5 + 0 63 1920x1080p @ 120Hz 1125 1080 41 5 + 0 64 1920x1080p @ 100Hz 1125 1080 41 5 + 0




Regarding all 60Hz-class formats:

as per CEA-861-D, all non-HDTV formats must be listed in the EDID at a 59.94Hz vertical frequency while HDTV formats must be listed as 60Hz. Note that pixel clock frequencies shown here all correspond to 60Hz frame rates, for ease and consistency in testing.

Pixel clock may be +0.5%/-0.6% of the listed pixel rate to allow for lower vertical rates than those listed (59.94Hz vs. 60Hz, etc.).

Note: Interlaced formats alternate between HSYNC/VSYNC coincident and HSYNC/VSYNC offset by ½ line. The values in column HV_OFFSET above represent the HSYNC/VSYNC offset for each of the two repeating interlaced fields.

Note: Primary and secondary formats are indicated in the tables above as:

Primary Format Secondary Format

Test ID 7-26: Pixel Repetition



<See reference. For details, see Table 7-3, below.>

Test Objective

Verify that Source DUT indicates Pixel Repetition values in the AVI as required and that the pixels are actually repeated the indicated number of times.


Connect Source DUT to a Video Timing Analyzer. For each video format timing listed in CDF field Source_Video_Formats, perform the following tests. Only one aspect ratio for each of the dual-aspect ratio timings needs to be tested.

These verifications assume that the Video Format Timing test has been executed and passed for the transmitted format and that the CEA Video Code has been determined.

For the following, refer to the row in Table 7-3 corresponding to the transmitted video format timing.

If no AVI is transmitted:

• If column “No AVI Value” contains “illegal” then FAIL

• If column “No AVI Value” contains the value 1 (meaning that the pixel is sent twice):

- Examine each group of two video pixels (i.e. corresponding to two 10-bit TMDS characters) in each Video Data Period. For each group ( H_ACTIVE / 2 groups):




Verify that both video pixels in the group are identical. If they are different then FAIL

If AVI is transmitted, examine PR value (PR = PR3*8 + PR2*4 + PR1*2 + PR0):

• If PR value is not listed in column “Legal PR Values” then FAIL

• If PR != 0:

- Examine each group of PR+1 video pixels (i.e. corresponding to PR+1 10-bit TMDS characters) in each Video Data Period. For each group ( H_ACTIVE / (PR+1) ):

Verify that all PR+1 video pixels in the group are identical. If any are different from the others then FAIL


1) For each format listed in CDF fields Source_Video_Formats perform the following tests.

2) Setup Source DUT and video Timing Analyzer and operate Source DUT as described above.

HDMI Analysis command: ’Full HDMI Compliance‘ or ‘Pixel Repetition’





Table 7-3 Pixel Repeat Values

CEA Video Code Video Description No AVI Value Legal PR Values

1 640x480p @ 60Hz 0 0 2,3 720x480p @ 59.94/60Hz 0 0 4 1280x720p @ 59.94/60Hz 0 0 5 1920x1080i @ 59.94/60Hz 0 0

6,7 720(1440)x480i @ 59.94/60Hz 1 1 8,9 720(1440)x240p @ 59.94/60Hz 1 1

10,11 2880x480i @ 59.94/60Hz Illegal 0, 1,…9 12,13 2880x240p @ 59.94/60Hz Illegal 0, 1,…9 14,15 1440x480p @ 59.94/60Hz Illegal 0, 1

16 1920x1080p @ 59.94/60Hz 0 0 17,18 720x576p @ 50Hz 0 0

19 1280x720p @ 50Hz 0 0 20 1920x1080i @ 50Hz 0 0

21,22 720(1440)x576i @ 50Hz 1 1 23,24 720(1440)x288p @ 50Hz 1 1 25,26 2880x576i @ 50Hz Illegal 0, 1,…9 27,28 2880x288 @ 50Hz Illegal 0, 1,…9 29,30 1440x576p @ 50Hz Illegal 0, 1

31 1920x1080p @ 50Hz 0 0 32 1920x1080p @ 23.97/24Hz 0 0 33 1920x1080p @ 25Hz 0 0 34 1920x1080p @ 29.97/30Hz 0 0

35,36 2880x480p @ 60Hz Illegal 0, 1, 3 37,38 2880x576p @ 50Hz Illegal 0, 1, 3

39 1920x1080i (1250 total) @ 50Hz 0 0 40 1920x1080i @ 100Hz 0 0 41 1280x720p @ 100Hz 0 0

42,43 720x576p @ 100Hz 0 0 44,45 720(1440)x576i @ 100Hz 1 1

46 1920x1080i @ 120Hz 0 0 47 1280x720p @ 120Hz 0 0

48,49 720x480p @ 120Hz 0 0 50,51 720(1440)x480i @ 120Hz 1 1 52,53 720X576p @ 200Hz 0 0 54,55 720(1440)x576i @ 200Hz 1 1 56,57 720x480p @ 240Hz 0 0 58,59 720(1440)x480i @ 240Hz 1 1

60 1280x720p @ 23.98/24Hz 0 0 61 1280x720p @ 25Hz 0 0 62 1280x720p @ 29.97/30Hz 0 0 63 1920x1080p @ 119.88/120Hz 0 0 64 1920x1080p @ 100Hz 0 0




Test ID 7-27: AVI InfoFrame


[HDMI: 8.2.1] Auxiliary Video Information (AVI) InfoFrame


[861-D: 6.1] Auxiliary Video Information (AVI) InfoFrame

“If the source device supports the transmission of the Auxiliary Video Information (AVI) and if it determines that the DTV Monitor is capable of receiving that information, it shall send the AVI to the DTV Monitor once per frame.”

“The information on ‘Active Format Aspect Ratio,’ bar widths, overscan/underscan, non-uniform picture scaling, and colorimetry is information that can be used by the DTV Monitor…If this information is present at the source device and valid…it is required that this information be sent.”

[HDMI: Table 8-6] Content Type


Test Objective

Verify that at least one AVI InfoFrame is transmitted for every two video fields when required and that any AVI InfoFrame transmitted is accurate.


Note that, for any of the following tests that check the M1, M0 (picture aspect ratio) or VIC (Video Identification Code) fields of the AVI or the picture aspect ratio of the transmitted video, the check must be performed when the DUT is processing content that has an aspect ratio indication that is correctly indicated and that is known to the test operator. If this condition cannot be achieved then that test step should be skipped.

[Verify that CDF field Source_AVI_Required is set correctly]

If CDF field Source_AVI_Required is ‘N’:

• [AVI InfoFrame must be transmitted once per frame whenever Source supports the transmission of the AVI InfoFrame.]

- If CDF field Source_HDMI_YCBCR is ‘Y’ then FAIL

• [AVI shall be sent when 2880x240, 288, 480 or 576-line format is transmitted or 1440x480p or 1440x576p. That is, formats 10-15 and 25-30. If Source is capable of transmitting any of these formats, it is required to transmit AVI.]

- If CDF field Source_Video_Formats includes any of the following: 10, 11, 12, 13, 14, 15, 25, 26, 27, 28, 29, 30 then FAIL

• [AVI shall be sent when Source is transmitting any video format timing listed in EDID with multiple aspect ratios.]

- If CDF field Source_Video_Formats includes any of the following pairs: 2 and 3, 6 and 7, 8 and 9, 10 and 11, 12 and 13, 14 and 15, 17 and 18, 21 and 22, 23 and 24, 25 and 26, 27 and 28, or 29 and 30: then FAIL




• [AVI shall be transmitted whenever the Active Format, Bar, Overscan/Underscan, Scaling, or Colorimetry information is available and valid at the Source.]

- If CDF field Source_AVI_Info_Available is ‘Y’ then FAIL

• [AVI InfoFrame shall be transmitted whenever the Source uses alternate colorimetry.]

- If CDF field Source_Alt_Colorimetry is ‘Y’ then FAIL

• [AVI InfoFrame shall be transmitted if Source has no Aspect Ratio Converter.]

- If CDF field Source_AR_Converter is ‘N’ then FAIL

If CDF field Source_AVI_Required == ‘Y’ and Source_AVI_Supported == ‘N’ then FAIL

For each video format listed in CDF field Source_Video_Formats, perform the following tests.

• Connect Source DUT to a Video Picture Analyzer.

• [Verify that AVI InfoFrame is transmitted once per frame if Source is required to use AVI InfoFrame]

- If CDF field Source_AVI_Supported == ‘Y’:

If any two video fields occur with no AVI InfoFrame then FAIL

• [Verify that only AVI InfoFrame v2 is transmitted (no v1 or other) whenever AVI InfoFrame is transmitted at all.]

- If AVI is transmitted and InfoFrame_version field (byte HB1) is not 2 then FAIL

• [AVI M1, M0 bits (picture aspect ratio) must match transmitted video format.]

- Attempt to make Source DUT output video with each of its supported aspect ratios at both SD and HD video format timings (if supported).

- If AVI M0-M1 field indicates an aspect ratio not permitted for the transmitted video format timing then FAIL

- If content processed by DUT has a correctly indicated aspect ratio which is known to the operator and consists of an image which has an easily determined aspect ratio, perform the following:

View image to determine transmitted picture aspect ratio and compare to aspect ratio information in AVI.

If AVI is transmitted and AVI M0-M1 fields do not correspond to viewed image then FAIL

• [Whenever transmitting a CEA video format, any transmitted AVI InfoFrame, VIC field (Video Identification Code) must be non-zero and accurate.]

- If Source DUT is outputting a CEA format and the transmitted AVI VIC field does not correspond to one of the video identification codes corresponding to the transmitted video format timing then FAIL

- If AVI M1, M0 fields are 0, 1 (4:3) or 1, 0 (16:9) and do not match aspect ratio corresponding to transmitted VIC field then FAIL

• [All reserved fields in AVI InfoFrame shall be zero.]

- If PB1 bit 7 is non-zero then FAIL





- If any byte PB14 to PB27 is non-zero then FAIL

[Whenever transmitting a non-CEA format, any transmitted AVI InfoFrame, VIC field must be zero.]

• Attempt to make Source DUT output video using a non-CEA format.

• If CDF field Source_Non-CEA_Formats = “Y”:

- Attempt to make Source DUT output video using a non-CEA format.

- If AVI VIC field is not zero then FAIL

If CDF field Source_CN_Photo == “N”, CDF field Source_CN_Cinema == “N” and CDF field Source_CN_Game == “N”, then SKIP.

For any one of video format listed in CDF field Source_Video_Formats, perform the following tests.

• Connect Source DUT to a Video Picture Analyzer containing an HDMI VSDB CNC3…0 = 0,0,0,1.

• If CDF field Source_CN_Photo == “Y”,

- Operate Source DUT to output Photo content signal.

- If Content type is not “No Data” (field ITC = 0 and CN1,0 = 0,0) then FAIL.

• If CDF field Source_CN_Cinema == “Y”,

- Operate Source DUT to output Cinema content signal.


• If CDF field Source_CN_Game == “Y”,

- Operate Source DUT to output Game content signal.



Note: Panasonic UITA-1000 cannot be used when DUTs set Q, EC, CN or ITC fields

Except for checking on CN or ITC field, for each video format listed in CDF fields Source_Video_Formats, perform the following tests.

Using the Video Picture Analyzer, perform the steps in the Required Test Method above. For testing of DVD players, use the following test patterns from the “Digital Video Essentials (DVE)” disk, available from Joe Kane Productions:

• For 16:9 testing:

- Title 12 “Video Test Signals, Display Setup Patterns”, Chapter 19, “1.78 Aspect Ratio & Geometry Pattern”

• For 4:3 testing:

- Title 15 “Video Test Signals, 1.33 Patterns”, Chapter 2, “Convergence, 1.33:1 linear”




For checking on CN or ITC field, for any one of video format listed in CDF field Source_Video_Formats, perform the above tests.




7.6 Source – Audio

Test ID 7-28: IEC 60958/IEC 61937


[HDMI: 7.1] Relationship with IEC 60958/IEC 61937


[HDMI: 7.3] Audio Sample Rates and Support Requirements

“An HDMI audio stream shall only indicate values shown in Table 7-4.”

Test Objective

Verify that the behavior of all fields within the Audio Sample or High-Bitrate Audio Stream Subpackets follow the corresponding rules specified in the IEC 60958 or IEC 61937 specifications.


If CDF field Source_Basic_Audio == ‘N’ then

Examine DUT for any other audio output (analog RCA, S/PDIF, etc.).

If any other audio output present on DUT, then FAIL

Else (CDF field Source_Basic_Audio == ‘Y’)

Configure the Source to output 480p (or 576p if 480p is not supported) with 32kHz, 44.1kHz or 48kHz PCM 2-channel audio.

• For each Audio Sample packet, if Layout = 0, each audio sample is indicated by an SP bit. If Layout = 1, each Audio Sample packet represents one audio sample.

- Count audio samples between indicated B bit.

- If repetition period of B bit is not 192 “Frames” (2-channel samples) then FAIL

- Get nominal Frame Rate from the Channel/Status bits 24 to 27. Channel Status Bit Number

24 25 26 27

Sample Frequency or Frame Rate

1 1 0 0 32 kHz 0 0 0 0 44.1 kHz 0 0 0 1 88.2 kHz 0 0 1 1 176.4 kHz 0 1 0 0 48 kHz 0 1 0 1 96 kHz 0 1 1 1 192 kHz 1 0 0 1 768 kHz

- If the Frame Rate is not listed above then FAIL

- If the Frame Rate is > 192kHz then FAIL




If the Source supports >2 channel audio, configure the Source to output the highest available sampling rate with the greatest number of channels.

• For each Audio Sample packet, if Layout = 0, each audio sample is indicated by an SP bit. If Layout = 1, each Audio Sample packet represents one audio sample.

- Count audio samples between indicated B bit.

- If repetition period of B bit is not 192 “Frames” (2-channel samples) then FAIL

- Get nominal Frame Rate from the Channel/Status bits 24 to 27.


- If the Frame Rate is > 192kHz then FAIL

If the Source supports High-Bitrate audio (CDF field Source_HBRA), configure the Source to output such a format.

• For each High-Bitrate Audio Stream packet, each subpacket represents one IEC 60958 “frame”.

- Count frames between indicated B bit.

- If repetition period of B bit is not 192 Frames then FAIL

- Get nominal Frame Rate from the Channel/Status bits 24 to 27.


- If the Frame Rate is <= 192kHz then FAIL


Note: Panasonic UITA-1000 cannot be used for High-Bitrate Audio testing.

1) If CDF field Source_Basic_Audio == ‘N’ then

2) Examine DUT for any other audio output (analog RCA, S/PDIF, etc.).

3) If any other audio output present on DUT, then FAIL

4) Else (CDF field Source_Basic_Audio == ‘Y’):

5) Setup Source DUT and Audio Timing Analyzer

6) Power on DUT and configure to output audio.

7) Configure the Source to output 480p (or 576p if 480p is not supported) with 32kHz, 44.1kHz or 48kHz PCM 2-channel audio.

8) HDMI Analysis command: ‘Full HDMI Compliance‘ or ’Audio IEC Compliance’


10) If Source supports multi-channel audio, configure to output multi-channel audio.



13) If Source supports a High-Bitrate audio stream format (e.g. DTS-HD or Dolby MAT), configure to output one such format.






Test ID 7-29: ACR


[HDMI: 7.2] Audio Sample Clock Capture and Regeneration


Test Objective

Verify that the relationship between the parameters (N, CTS, audio sample rate) is correct with respect to the Audio Clock Regeneration mechanism.


If CDF field Source_Basic_Audio== ‘N’ then PASS


[Verify N parameter value.]

• Get nominal sampling frequency (Fs) from the Channel/Status bits 24 to 27.

• Get N parameter from ACR packet.

• If 128*Fs/1500 <= N <= 128*Fs/300 then continue test else then FAIL

[Verify CTS parameter value.]

• Monitor ACR Packets with “new” (non-zero) values of CTS

• [Measure the actual audio sample rate (Fs_actual).]

- Count the number of audio samples (n) over 2 seconds (Ts). Calculate Fs_actual using the following equation:

Fs_actual = n / Ts

• Average the CTS values (CTSaverage) over 2 seconds or more.

• Measure the TMDS clock (fTMDS_clock) with an accuracy of 1 ppm.

• Get the nominal audio clock accuracy from the Channel/Status bits 28 and 29.

• If clock accuracy == 50 ppm (bits 28, 29 == 1, 0)

- if CTSaverage is within (fTMDS_clock * N ) / (128 * Fs) ± 50 ppm then continue test, else then FAIL

• Else,

- if CTSaverage is within (fTMDS_clock * N ) / (128 * Fs_actual) ±100 ppm then continue test, else then FAIL

[Verify CTS transmitting interval]

• Monitor ACR Packets with “new” (non-zero) values of CTS

• Average new CTS transmitting interval (CTS interval) over 2 sec or more.

• If CTS interval is not within the range of (N / (128 * Fs)) ±2000ppm then FAIL




[Verify ACR for Deep Color]

• If Source supports Deep Color (CDF field Source_Deep_Color) then configure the Source to output a video format listed in CDF field Source_Video_Formats at 36 bits/pixel with 32kHz, 44.1kHz or 48kHz PCM 2-channel audio and repeat test.

Recommended Test Method Test ID 7-29: ACR

Note: Panasonic UITA-1000 cannot be used when testing Deep Color modes.

1) If CDF field Source_Basic_Audio== ‘N’ then PASS

2) Setup Source DUT and Audio Timing Analyzer and operate Source DUT as described above.


4) HDMI Analysis command: ‘Full HDMI Compliance’ or ‘ACR’


6) If Source supports Deep Color (CDF field Source_Deep_Color) then:

7) Configure the Source to output a Primary video format at 36 bits/pixel with 32kHz, 44.1kHz or 48kHz PCM 2-channel audio and repeat test. (If Source DUT does not support Deep Color on any Primary Video format then skip following steps.)

8) HDMI Analysis command: ‘Full HDMI Compliance’ or ‘ACR’


Test ID 7-30: Audio Sample Packet Jitter


[HDMI: 7.8.1] Audio Sample Packets


Test Objective

Verify that the source audio packet jitter is within the limits specified.



From the following tables of primary video formats, pick the single DUT-supported audio/video format combination with the highest value. This will be format combination #1.




861B Format 2-channel PCM or compressedCode Description 32 44.1 48 88.2 96 176.4 1921 640x480p, 60Hz (VGA) 2 3 3 6 7 12 14 2,3 720x480p, 60Hz 2 3 4 6 7 13 14 4 1280x720p, 60Hz 1 2 2 4 4 8 9 5 1920x1080i, 60Hz 2 3 3 6 6 12 13 6,7 1440x480i, 60Hz 4 6 7 12 13 25 27 17,18 720x576p, 50Hz 2 3 4 6 7 13 14 19 1280x720p, 50Hz 1 2 2 4 4 8 9 20 1920x1080i, 50Hz 2 3 3 6 6 12 13 21,22 1440x576i, 50Hz 4 6 7 12 13 25 27

861B Format 3 or more channel PCMCode Description 32 44.1 48 88.2 96 176.4 1921 640x480p, 60Hz (VGA) 9 12 14 - - - - 2,3 720x480p, 60Hz 9 13 14 - - - - 4 1280x720p, 60Hz 6 8 9 16 18 32 35 5 1920x1080i, 60Hz 9 12 13 24 26 47 52 6,7 1440x480i, 60Hz 18 25 27 49 54 - - 17,18 720x576p, 50Hz 9 13 14 - - - - 19 1280x720p, 50Hz 6 8 9 16 18 32 35 20 1920x1080i, 50Hz 9 12 13 24 26 47 52 21,22 1440x576i, 50Hz 18 25 27 49 54 - -




From the following table of mandatory video and basic audio formats, pick the audio/video combination with the highest value. This will be format combination #2.

For each of these two combinations do the following tests. If format combination #2 matches combination #1, do not repeat the test:

[Verify audio packet jitter]

• Measure actual audio sample rate (Fs_actual).

• n = number of audio samples over 2 seconds or more (= Ts).

• Calculate Fs_actual using the following equation:

• Fs_actual = n / Ts

• If audio packet jitter relative to actual sampling rate does not exceed one video horizontal line period plus a single audio sample period then PASS, else then FAIL


1) If CDF field Source_Basic_Audio== ‘N’ then PASS

2) Setup Source DUT and Audio Timing Analyzer.

3) Determine each of the two audio/video format combinations described in the Required Test Method above. For each of the two combinations do the following tests.

4) Configure the Source DUT to output audio and video format combination #1.

5) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio Packet Jitter’

6) If HDMI Analysis does not report ‘PASS’, then FAIL

7) Configure the Source DUT to output audio and video format combination #2. If format combination #2 matches combination #1, do not repeat the test:

8) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio Packet Jitter’


861B Format 2-channel PCM or compressedCode Description 32 44.1 481 640x480p, 60Hz (VGA) 2 4 6 2,3 720x480p, 60Hz 3 5 7 17,18 720x576p, 50Hz 3 5 7




Test ID 7-31: Audio InfoFrame


[861-D: 6.3] Audio InfoFrame

“If the source device supports the transmission of the Audio InfoFrame and if it determines that the DTV Monitor is capable of receiving…digital audio, then the Audio InfoFrame, with Data Bytes 1 through 3 set correctly, shall be sent once per video frame while digital audio is being sent across the interface.”

[861-D: 6.3.1] Audio Identification Information

“If the DTV and the source device support more than “basic audio,” as defined by the physical/link specification, then this information shall be sent and shall accurately identify the stream while digital audio is being sent.”

[HDMI: 8.2.2] Audio InfoFrame

<See reference for details on LFEPBL fields>

Test Objective

Verify that Source transmits an Audio InfoFrame whenever required and that contents are valid.




[Check Audio InfoFrame placement]

Examine the placement of the Audio InfoFrame Packet

If Audio InfoFrame Packet is detected at least once per two video fields then continue else then FAIL

[Check Packet Header]

If Packet Header has the following contents

- HB0: 0x84 (InfoFrame Type Code)

- HB1: 0x01

- HB2: 0x0A (InfoFrame_length)

• Then continue else then FAIL

[Check Packet Body]

Read Packet Body (PB0 to PB27)

[Check PB1 to PB5]

• If the value of Audio Coding Type (CT3~CT0) is 0x0 then continue else then FAIL

• If the value of PB1 bit 3 is zero then continue else then FAIL.

• If the value of the most significant three bits of PB2 is zero then continue else then FAIL.

• If the value of Sampling Frequency (SF2~ SF0) is zero then continue else then FAIL.




• If the value of Sample Size (SS1~ SS0) is zero then continue else then FAIL.

[Check for illegal CA]

• If CA >= 0x20 then FAIL

[Check for valid Combination of (CA7 ~ CA0) and (CC2 ~ CC0)]

• If indicator in Audio sample packet indicates layout 0

- If CA!= 0x00 then FAIL

- If CC!= 0,0,0 and CC != 0,0,1 then FAIL

• else [layout 1]

- FAIL if all of the following statements are false: CC== 0,0,0 and CA is in set 0x01, 0x02, 0x03,…, or 0x1F

CC== 0,1,0 and CA is in set 0x01, 0x02 or 0x04

CC== 0,1,1 and CA is in set 0x03, 0x05, 0x06, 0x08 or 0x14

CC== 1,0,0 and CA is in set 0x07, 0x09, 0x0A, 0x0C, 0x15, 0x16, or 0x18

CC== 1,0,1 and CA is in set 0x0B, 0x0D, 0x0E, 0x10, 0x17, 0x19, 0x1A , or 0x1C

CC== 1,1,0 and CA is in set 0x0F, 0x11, 0x12, 0x1B, 0x1D or 0x1E

CC== 1,1,1 and CA is in set 0x13 or 0x1F

[If LSV is non-zero, then only 2-channels allowed (downmix)]

• If LSV != 0x0 and CA != 0x00 then FAIL

[Check for valid combination of DM_INH and CA]

• If DM_INH ==1 and CA == 0x00 then FAIL

If value of the least significant three bits of PB5 is zero then continue else then FAIL

If value of PB6 through PB27 is 0x00. then continue else then FAIL

[Verify checksum]

Do a byte wide sum of HB0,HB1,HB2, PB0, PB1, PB2,…, PB10.

If sum != 0x00 then FAIL

If the Source can output >2-channel PCM audio, do the following;

Configure the Source to output >2-channel PCM audio.

[Check for valid combination of LFEPBL1 and LFEPBL0]

• If LFEPBL1==1 and LFEPBL0==1 then FAIL.

If the value of PB5 bit2 is not zero then FAIL.


Note: Panasonic UITA-1000 cannot be used when DUTs set LFEPBL fields.

1) Setup Source DUT and Protocol Analyzer.





3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio InfoFrame’

4) If HDMI Analysis does not report ‘PASS’, then FAIL

5) If the Source can output >2-channel PCM audio, do the following:

6) Configure the source to output >2-channel PCM audio.

7) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio InfoFrame’.

8) If HDMI Analysis reports ‘PASS’, then PASS, else FAIL.

Test ID 7-32: Audio Sample Packet Layout


[HDMI:5.3.4] Audio Sample Packet

See reference

[HDMI:7.6] Audio Data Packetization

See reference

[861-D: 6.3.1] Audio Identification Information

“If the DTV and the source device support more than “basic audio,” as defined by the physical/link specification, then this information shall be sent and shall accurately identify the stream while digital audio is being sent.”

Test Objective

Verify that Source only transmits audio using permitted Layout type.


Configure the Source to output 32kHz, 44.1kHz or 48kHz PCM 2-channel audio.

Read HB1 and HB2 from header

If Audio Sample Packet Layout == 0 (Bit 4 of HB1)

• [check for valid combinations of Sample Present and B]

• Use the following table to check for a valid combination of Sample present and B values contained within HB1 and HB2.

• If combination contained in HB1 & HB2 is not in this table then FAIL

Sample Present B

0000 0000 0001 000x 0011 00bb 0111 0bbb 1111 bbbb

Where: Sample Present is bits 3..0 of HB1

B is bits 7..4 of HB2

x is don’t care




b don’t care, but only 1 bit may be set

Configure the Source to output >2-channel PCM audio.

If Audio Sample Packet Layout = 1 (Bit 4 of HB1).

• [Check for valid combinations of Channel Allocation (CA), Sample Present and B]

• Read CA from PB4 of Audio Info Frame

• Use the following table to check for a valid combination of CA, Sample present and B values.

• If combination is not in this table then FAIL




CA Sample Present B

7 6 5 4 3 2 1 0 3 2 1 0 3 2 1 0 0 0 0 0 0 0 0 1 0 0 SP SP 0 0 x x 0 0 0 0 0 0 1 0 0 0 SP SP 0 0 x x 0 0 0 0 0 0 1 1 0 0 SP SP 0 0 x x 0 0 0 0 0 1 0 0 0 SP 0 SP 0 x 0 x 0 0 0 0 0 1 0 1 0 SP SP SP 0 x x x 0 0 0 0 0 1 1 0 0 SP SP SP 0 x x x 0 0 0 0 0 1 1 1 0 SP SP SP 0 x x x 0 0 0 0 1 0 0 0 0 SP 0 SP 0 x 0 x 0 0 0 0 1 0 0 1 0 SP SP SP 0 x x x 0 0 0 0 1 0 1 0 0 SP SP SP 0 x x x 0 0 0 0 1 0 1 1 0 SP SP SP 0 x x x 0 0 0 0 1 1 0 0 SP SP 0 SP x x 0 x 0 0 0 0 1 1 0 1 SP SP SP SP x x x x 0 0 0 0 1 1 1 0 SP SP SP SP x x x x 0 0 0 0 1 1 1 1 SP SP SP SP x x x x 0 0 0 1 0 0 0 0 SP SP 0 SP x x 0 x 0 0 0 1 0 0 0 1 SP SP SP SP x x x x 0 0 0 1 0 0 1 0 SP SP SP SP x x x x 0 0 0 1 0 0 1 1 SP SP SP SP x x x x 0 0 0 1 0 1 0 0 SP 0 0 SP x 0 0 x 0 0 0 1 0 1 0 1 SP 0 SP SP x 0 x x 0 0 0 1 0 1 1 0 SP 0 SP SP x 0 x x 0 0 0 1 0 1 1 1 SP 0 SP SP x 0 x x 0 0 0 1 1 0 0 0 SP SP 0 SP x x 0 x 0 0 0 1 1 0 0 1 SP SP SP SP x x x x 0 0 0 1 1 0 1 0 SP SP SP SP x x x x 0 0 0 1 1 0 1 1 SP SP SP SP x x x x 0 0 0 1 1 1 0 0 SP SP 0 SP x x 0 x 0 0 0 1 1 1 0 1 SP SP SP SP x x x x 0 0 0 1 1 1 1 0 SP SP SP SP x x x x 0 0 0 1 1 1 1 1 SP SP SP SP x x x x

Where:

x = any value

SP = any value, but all SP must be same


1) Setup Source DUT and Protocol Analyzer.

2) Configure the Source to output 32kHz, 44.1kHz or 48kHz PCM 2-channel audio.

3) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio Layout’

4) If HDMI Analysis reports ‘PASS’, then continue, else FAIL

5) If the Source can output >2-channel PCM audio, do the following:




6) Configure the source to output >2-channel PCM audio

7) HDMI Analysis command: ’Full HDMI Compliance‘ or ’Audio Layout’





7.7 Source – Interoperability With DVI

Test ID 7-33: Interoperability With DVI


[HDMI: App. C.1] Requirement for DVI Compatibility

“All HDMI Sources shall be compatible with DVI 1.0 compliant sink devices (i.e. “monitors” or “displays”) through the use of a passive cable converter.”

[HDMI: App. C.2] HDMI Source Requirements

“An HDMI Source, upon power-up, reset or detection of a new sink device, shall assume that the sink device operates under DVI 1.0 limitations. An HDMI Source shall determine if the sink device is an HDMI Sink by following the rule(s) described in Section 8.3.5. Upon detection of an HDMI Sink, the HDMI Source shall follow all of the HDMI Source-related requirements specified in this document.”

Test Objective

Verify that Source never outputs a Video Guard Band or Data Island to a device without an HDMI VSDB.


Connect Source DUT to Protocol Analyzer acting as a DVI sink (has EDID with no HDMI VSDB nor any other VSDB)

Configure Source DUT to output any video format timing.

If any Guard Bands transmitted then FAIL

If any Data Islands transmitted then FAIL

Configure Protocol Analyzer with EDID that has an HDMI VSDB of length 5.

If any Video Data Period has no Guard Bands then FAIL

If any Video Field has no Data Islands then FAIL

Configure Protocol Analyzer with EDID that has an HDMI VSDB of any length > 5.

If any Video Data Period has no Guard Bands then FAIL

If any Video Field has no Data Islands then FAIL


1) Connect Source DUT to Protocol Analyzer acting as a DVI sink (has EDID with no HDMI VSDB nor any other VSDB)..

2) Configure Protocol Analyzer to perform test “Source: DVI Interoperability”

3) Configure Source DUT to output any video format timing.

4) If Protocol Analyzer reports failure then FAIL

5) Configure Protocol Analyzer with EDID that has an HDMI VSDB of length 5.


7) Configure Protocol Analyzer with EDID that has an HDMI VSDB of any length > 5.



7.8 Source – Advanced Features

Test ID 7-34: Deep Color


[HDMI: 5.3.6] General Control Packet

<See reference for details on General Control Packet>

[HDMI: 6.5] Pixel Encodings and Color Depth

<See reference for details on Deep Color packing and signaling>

Test Objective

Verify that a Deep Color-capable Source DUT outputs correct Deep Color packing and signaling.


If CDF field Source_Deep_Color == “N” then SKIP.

Connect Source DUT to a Protocol Analyzer containing an EDID with the following:

• SVDs for 480p60Hz, 576p50Hz and for 1080i, 720p, and 1080p at 50Hz and 60Hz (and any other formats needing to be tested)

• Support for any DUT-supported High-Bitrate Audio format (in addition to typical formats)

• HDMI VSDB of any length > 6 with


- DC_36bit = 1

- Max_TMDS_Clock = 45 (225MHz)


For each of the video formats described in CDF field Source_Video_Formats that support any color depths other than 24 bits/pixel, do the following:

Operate Source DUT to output that video format at each of the supported color depths (other than 24 bits/pixel).

For all of the following, refer to the values listed in Table 7-1 and Table 7-2 for the tested format.

For every packet with packet type equal to 0x03 (General Control Packet) verify the following:

• If either byte HB1, HB2 does not equal 0x00 then FAIL

• Compare SB0…SB6 of subpacket 0 with SB0…SB6 of subpackets 1, 2 and 3. Likewise, compare subpacket 1 with subpacket 2 and 3 and compare subpacket 2 with subpacket 3.

• If any subpacket differs from any other then FAIL

• If SB0 of subpacket 0 does not equal 0x00, 0x01, or 0x10 then FAIL




• If any byte SB3…SB6 of subpacket 0 does not equal 0x00 then FAIL

• If SB1 field CD does not indicate 36-bit (0110) then FAIL

• Track TMDS clock and video format timing across several fields. For each GCP received during that period with CD field non-zero:

- Verify that PP field is updated corrected to indicate the packing phase of the last pixel in the most recent Video Data Period.

- Verify that the TMDS Clock is 40.5MHz (=1.5 * 27MHz). If not, then FAIL.

- If the Default_Phase bit is set, verify that:

The first pixel of each Video Data Period has a pixel packing phase of 0 (10P0, 12P0, 16P0).

The first pixel following each Video Data Period has a pixel packing phase of 0 (10C0, 12C0, 16C0).

The PP bits shall be constant for all GCPs is equal to the last packing phase (10P4, 12P2, 16P1).

The first pixel following every transition of HSYNC or VSYNC has a pixel packing phase of 0 (10C0, 12C0, 16C0).

- If any of these conditions is not true, FAIL, “Default_Phase is incorrectly set”.

• Verify that all Video Data Periods, after unpacking (per the pixel packing indicated by the PP field) have a correct length and that all HSYNC and VSYNC positions and lengths are accurate per the values listed in Table 7-1 and Table 7-2. If any values incorrect, then FAIL.

Repeat test for next video format and color depth (other than 24-bit) combination supported by DUT (see CDF field Source_Video_Formats).

Note that the ATC is not required to test Deep Color modes on video formats other than the following: 480p 59.94/60Hz, 576p 50Hz, 1080i 60Hz, 1080i 50Hz and is only required to test 36 bits/pixel mode.

Recommended Test Method Test ID 7-34: Deep Color

If CDF field Source_Deep_Color == “N” then SKIP.

1) Connect Source DUT to a Deep-Color-capable Protocol Analyzer

2) For each of the video formats described in CDF field Source_Video_Formats that support any color depths other than 24 bits/pixel, do the following:

3) Operate Source DUT to output that video format at each of the supported color depths (other than 24 bits/pixel):.

4) With a frequency counter, measure the pixel clock rate and enter this value to the test equipment.

5) Capture and process data with Protocol Analyzer for Deep Color test.

6) If Protocol Analyzer reports ‘PASS’, then PASS, else FAIL

7) Repeat for next supported color depth.

8) Repeat for next video format with >24-bit support.




Note that the ATC is not required to test Deep Color modes on video formats other than the following: 480p 59.94/60Hz, 576p 50Hz, 1080i 60Hz, 1080i 50Hz and is only required to test 36 bits/pixel mode.

Note: Panasonic UITA-1000 cannot be used for this test.

Test ID 7-35: Gamut Metadata Transmission


[HDMI: 5.3.12] Gamut Metadata Packet

<See reference for details on Gamut Metadata Packet>

[HDMI: Appendix E] Gamut-Related Metadata

<See reference for details on Gamut Metadata.>

Test Objective

Verify that an xvYCC-capable Source outputs valid Gamut Metadata Packets.


If Source_xvYCC == “N” then SKIP.

Connect Source DUT to a Protocol Analyzer containing an EDID with the following:

• Support for 1080p (in addition to typical formats)

• HDMI VSDB of any length > 6 with


- DC_36bit = 1

- Max_TMDS_Clock = 45 (225MHz)

• Colorimetry Data Block with

- xvYCC601 = 1

- xvYCC709 = 1

- MD0 = 1

Operate Source DUT to output an xvYCC-encoded video signal.

Examine all AVI InfoFrames transmitted from Source.

If no AVI InfoFrames indicate Extended Colorimetry in fields C1 and C0 (1, 1) then

• If any video field occurs with a Gamut Metadata packet then FAIL, “While transmitting xvYCC, no AVI indication of xvYCC occurs but Gamut Metdata packet does occur.”

For every video field containing an AVI InfoFrame with fields C1 and C0 indicating Extended Colorimetry (1, 1)

• If field EC0 through EC2 is not equal (0 or 1) then FAIL




• If no Gamut Metadata packet then FAIL, “Missing Gamut Metadata during xvYCC transmission”

• If Gamut Metadata packet field GBD_profile != 0 then FAIL

• If Gamut Metadata packet field Packet_Seq != 3 then FAIL

• If Gamut Metadata packet field Affected_Gamut_Seq_Num - Current_Gamut_Seq_Num != (0 or 1 or -15) then FAIL

Recommended Test Method Test ID 7-35: Gamut Metadata Transmission

If CDF field Source_xvYCC == “N” then SKIP.

Connect Source DUT to an xvYCC-capable Protocol Analyzer containing an EDID with the following:

Operate Source DUT to output an xvYCC-encoded video signal.

Capture and process data with Protocol Analyzer for Source xvYCC test.


Test ID 7-36: High-Bitrate Audio


[HDMI: 5.3.11] High-Bitrate (HBR) Audio Stream Packet

<See reference for details on High-Bitrate Audio Stream Packet.>

[HDMI: 7.6.2] High-Bitrate Audio Stream Packetization

<See reference for details on High-Bitrate Audio packetization.>

Test Objective

Verify that a High-Bitrate Audio-capable source is able to transmit High-Bitrate Audio Stream Packets with packet jitter limited to compliant values.


If CDF field Source_HBRA == “N” then SKIP.

Connect Source DUT to an Audio Timing Analyzer containing an EDID with the following:

• Support for 480p and 576p with 4x pixel repetition (2880x480p and 2880x576p) (in addition to typical formats)

• Support for any DUT-supported High-Bitrate Audio format (in addition to typical formats)

• HDMI VSDB of length = 6 with






Operate Source DUT to output an HBRA signal (e.g. Dolby TrueHD or DTS-HD Master Audio)

Monitoring packets:

• If any packet has type equal to 0x02 (Audio Sample Packet) then FAIL

• If any packet has type equal to 0x07 (One Bit Audio), 0x08 (DST), 0x0A (GMP) then FAIL

• If no packet type is equal to 0x09 (High-Bitrate Audio Stream Packet) then FAIL

• For each packet type equal to 0x09:

- Check following Reserved fields

HB1, all bits

HB2, bits 0 to 3


[Verify High-Bitrate Audio Stream packet jitter]

• Measure actual High-Bitrate Audio Stream packet rate (Fs_actual).

• n = number of High-Bitrate Audio Stream packets over 2 seconds or more (= Ts).



- If High-Bitrate Audio Stream packet jitter relative to actual High Bitrate Audio Stream packet rate ever exceeds one video horizontal line period plus a single packet period then FAIL

Recommended Test Method Test ID 7-36: High-Bitrate Audio

If CDF field Source_HBRA == “N” then SKIP.

Connect Source DUT to a High-Bitrate Audio-capable Audio Timing Analyzer:

Operate Source DUT to output a High-Bitrate Audio-encoded video signal.

Capture and process data with Audio Timing Analyzer for Source HBRA test.





Test ID 7-37: One Bit Audio


[HDMI: 5.3.9] One Bit Audio Sample Packet

<See reference for details on One Bit Audio Sample Packet.>

[HDMI: 7.9] One Bit Audio Usage Overview

<See reference for details on One Bit Audio.>

Test Objective

Verify that a One Bit Audio-capable source is able to transmit One Bit Audio Packets in a compliant manner.


If CDF field Source_One_Bit_Audio == “N” then SKIP.

Connect Source DUT to an Audio Timing Analyzer containing an EDID with the following:

• Support for 480p and 576p with 2x pixel repetition (1440x480p and 1440x576p) (in addition to typical formats)

• Short Audio Descriptor for One Bit Audio format with 6-channels and 44.1kHz sample rate.

• HDMI VSDB of length = 6 with



Operate Source DUT to output One Bit Audio on the HDMI output

Monitor packets:

If any packet has type equal to 0x02 (Audio Sample Packet) then FAIL

If any packet has type equal to 0x08 (DST), 0x09 (HBRA), 0x0A (GMP) then FAIL

If no packet type is equal to 0x07 (One Bit Audio Sample Packet) then FAIL

For each packet type equal to 0x07:

• Check following Reserved fields

- HB1, bits 5 to 7

- HB2, bits 4 to 7

• If these reserved fields are not zero then FAIL

[Check Audio InfoFrame]

Examine the placement of the Audio InfoFrame Packet




If Audio InfoFrame Packet (0x84) is not detected at least once per two video fields then FAIL

[Check Packet Header]

If Packet Header has the following contents

- HB0: 0x84 (InfoFrame Type Code)

- HB1: 0x01

- HB2: 0x0A (InfoFrame_length, reserved)

• Then continue else then FAIL

[Check PB1 to PB5]

• If the value of Audio Coding Type (CT3 ~ CT0) is not zero then FAIL

• If the value of PB1 bit 3 is not zero then FAIL.

• If the value of the most significant three bits of PB2 is not zero then FAIL

• If the value of Sampling Frequency (SF2 ~ SF0) is not 0b010 then FAIL

• If the value of Sample Size (SS1 ~ SS0) is not zero then FAIL

[Check for illegal CA]

• If CA >= 0x20 then FAIL

[Check for valid Combination of (CA7 ~ CA0) and (CC2 ~ CC0)]

• If indicator in Audio sample packet indicates layout 0

- If CA!= 0x00 then FAIL

- If CC!= 0,0,0 and CC != 0,0,1 then FAIL

• else [layout 1]

- FAIL if all of the following statements are false: CC== 0,0,0 and CA is in set 0x01, 0x02, 0x03,…, or 0x1F

CC== 0,1,0 and CA is in set 0x01, 0x02 or 0x04

CC== 0,1,1 and CA is in set 0x03, 0x05, 0x06, 0x08 or 0x14

CC== 1,0,0 and CA is in set 0x07, 0x09, 0x0A, 0x0C, 0x15, 0x16, or 0x18

CC== 1,0,1 and CA is in set 0x0B, 0x0D, 0x0E, 0x10, 0x17, 0x19, 0x1A , or 0x1C

CC== 1,1,0 and CA is in set 0x0F, 0x11, 0x12, 0x1B, 0x1D or 0x1E

CC== 1,1,1 and CA is in set 0x13 or 0x1F

[If LSV is non-zero, then only 2-channels allowed (downmix)]

• If LSV != 0x0 and CA != 0x00 then FAIL

[Check for valid combination of DM_INH and CA]

• If DM_INH ==1 and CA == 0x00 then FAIL

If value of the least significant three bits of PB5 is zero then continue else then FAIL

If value of PB6 through PB27 is 0x00. then continue else then FAIL

[Verify checksum]

Do a byte wide sum of HB0,HB1,HB2, PB0, PB1, PB2,…, PB10.




If sum == 0x00 then PASS else then FAIL

[Verify One Bit Audio Sample subpacket jitter]

• Measure actual One Bit Audio Sample subpacket rate (Fs_actual).

• n = number of One Bit Audio Sample subpackets over 2 seconds or more (= Ts).



- If One Bit Audio Sample subpacket jitter, relative to actual One Bit Audio Sample subpacket rate, ever exceeds one video horizontal line period plus a single subpacket period then FAIL

Recommended Test Method Test ID 7-37: One Bit Audio

If CDF field Source_One_Bit_Audio == “N” then SKIP.

Connect Source DUT to an Audio Timing Analyzer with an appropriate EDID.

Operate Source DUT to output One Bit Audio on the HDMI output

Capture and process data with Audio Timing Analyzer for Source One Bit Audio test.


Test ID 7-38: 3D Video Format Timing


[HDMI: 8.2.3.2] 3D video format structure


Test Objective

Verify that Source DUT, whenever transmitting any supported mandatory 3D video format or other primary 3D video format, complies with all required pixel and line counts and pixel clock frequency range.


If CDF field Source_3D == “N” then SKIP.

Check CDF field Source_Mandatory_3D_Video_Formats for any of the following video format timings

• 1920x1080p @ 23.98/24Hz (Format 32), 3D structure = Frame packing

• 1280x720p @ 59.94/60Hz (Format 4), 3D structure = Frame packing

• 1280x720p @ 50Hz (Format 19), 3D structure = Frame packing

• 1920x1080i @ 59.94/60Hz (Format 5), 3D structure = Side-by-Side (Half)

• 1920x1080i @ 50Hz (Format 20), 3D structure = Side-by-Side (Half)

mailto:1280x720p@50Hz




• 1920x1080p @ 23.98/24Hz (Format 32), 3D structure = Top-and-Bottom

• 1280x720p @ 59.94/60Hz (Format 4), 3D structure = Top-and-Bottom

• 1280x720p @ 50Hz (Format 19), 3D structure = Top-and-Bottom

If CDF field Source_Mandatory_3D_Video_Formats does not contain any of the above video format timings then FAIL.


Connect Source DUT to a Video Timing Analyzer containing an EDID with the following:

• SVDs for 480p@60Hz, 576p@50Hz, 1080p@24Hz, 30Hz, 50Hz and 60Hz, 720p at 24Hz, 30Hz, 50Hz and 60Hz, 1080i at 50Hz and 60Hz

• HDMI VSDB with

- HDMI_Video_present = 1

- 3D_present = 1

- HDMI_VIC_LEN = 0

- HDMI_3D_LEN != 0

- Indicate the support for all primary 3D video formats

For each video format timing listed in CDF field Source_Mandatory_3D_Video_Formats and Source_Other_Primary_3D_Video_Formats, perform the following.

Operate Source DUT to output the tested 3D format at a color depth of 24 bits/pixel. For all of the following, refer to the values listed in Table 7-4, Table 7-5, Table 7-6 and Table 7-7, Table 7-8, Table 7-9 for the tested format.

[Verify that at least one HDMI Vendor Specific InfoFrame (HB0, HB1, PB1, PB2, PB3 = 0x81, 0x01, 0x03, 0x0C 0x00) and at least one AVI InfoFrame are transmitted within every two video fields].

• If any two video fields occur with no HDMI Vendor Specific InfoFrame then FAIL.

• If any two video fields occur with no AVI InfoFrame then FAIL.

If HDMI Vendor Specific InfoFrame is transmitted,

• In the case PB5 equals 0b0000X000 or 0b0110X000, if byte HB2 (InfoFrame_Length) is less than 0x05 then FAIL.

• In the case PB5 equals 0b1000X000, if byte HB2 (InfoFrame_Length) is less than 0x06 then FAIL.

• [Check PB4 and PB5]

- If PB4, bit 7, bit 6 and bit5 (HDMI_Video_Format field) does not equal 0, 1, 0 then FAIL.

mailto:1280x720p@50Hz




- If PB4, bit4...0 are not 0 (reserved) then FAIL.

- If Source DUT is outputting a 3D video format in Frame packing as 3D Structure,

If PB5 does not equal 0b0000X000 then FAIL.

If byte HB2 (InfoFrame_Length) is more than 0x05,

If byte PB5 equals 0x00, then, if byte PB6 through InfoFrame_Length do not equal 0x00 then FAIL.

If byte PB5 equals 0x08, then, if byte PB7+M, whereas M is the value of bit4...0 of PB6, through InfoFrame_Length do not equal 0x00 then FAIL.

- If Source DUT is outputting a 3D video format in Side-by-Side (Half) as 3D Structure,


If PB6 does not equal 0x00, 0x10, 0x20 or 0x30 then FAIL.




- If Source DUT is outputting a 3D video format in Top-and Bottom as 3D Structure,





• [Verify checksum]

- Do a byte wide sum of HB0,HB1,HB2, PB0, PB1, PB2,…, PB5,…, PB[InfoFrame_Length].

- If sum != 0x00 then FAIL.

If AVI InfoFrame is transmitted,

• [Verify that only AVI InfoFrame v2 is transmitted (no v1 or other) whenever AVI InfoFrame is transmitted.]

- If AVI is transmitted and InfoFrame_version field (byte HB1) is not 0x02 then FAIL.


- If AVI M0-M1 field indicates an aspect ratio not permitted for the transmitted video format timing then FAIL.






If AVI is transmitted and AVI M0-M1 fields do not correspond to viewed image then FAIL.

• [Whenever transmitting a CEA video format, any transmitted AVI InfoFrame, VIC field (Video Identification Code) must be non-zero and accurate.]

- If Source DUT is outputting a CEA format and the transmitted AVI VIC field does not correspond to one of the video identification codes corresponding to the transmitted video format timing then FAIL.

- If AVI M1, M0 fields are 0, 1 (4:3) or 1, 0 (16:9) and do not match aspect ratio corresponding to transmitted VIC field then FAIL.


- If PB1 bit 7 is non-zero then FAIL.

- If PB4 bit 7 is non-zero then FAIL.

- If PB5 any bit 4-7 is non-zero then FAIL.

- If any byte PB14 to PB27 is non-zero then FAIL.


For any video format listed in Table 7-4, Table 7-5, Table 7-6 and Table 7-7, Table 7-8, Table 7-9 as 60Hz or 24Hz, pixel clock may be +0.5%/-0.6% of the listed pixel rate to allow for lower vertical rates than those listed (59.94Hz vs. 60Hz, etc.). Format listed as 50Hz must be +0.5%/-0.5% of the listed pixel rate.














• VS_LEN = number of pixels that VSYNC remains active divided by H_TOTAL, rounded to nearest half-integer (i.e. 6 or 6.5)






• VS_TO_VIDEO = number of HSYNC pulses between VSYNC active edge and first subsequent Video Data Period, not including HSYNC pulse that is coincident (or nearly so) with VSYNC active edge


If Source DUT is outputting a 3D video format in Frame packing as 3D structure, examine the area inserted between the two Active video regions “Active space”.

• Examine the first pixel value in “Active space”.

• Compare the first pixel value with other pixels value in “Active space”.

• If any pixel value differs from the first pixel value in “Active space” then FAIL

Change HDMI VSDB in Protocol Analyzer to length = 5.

For each video format timing listed in CDF field Source_Video_Formats perform the following.

Operate Source DUT to output the tested format.

If HDMI Vendor Specific InfoFrame (HB0, HB1, PB1, PB2, PB3 = 0x81, 0x01, 0x03, 0x0C 0x00) is not transmitted, then PASS.


• If any two video fields occur with no HDMI Vendor Specific InfoFrame then FAIL

• If byte HB2 (InfoFrame_Length) is less than 0x04 then FAIL

[Check PB4]

• If PB4 does not equal 0x00 then FAIL

• If byte HB2 (InfoFrame_Length) is more than 0x04, if byte PB5 through InfoFrame_Length do not equal 0x00 then FAIL.

[Verify checksum]

• Do a byte wide sum of HB0,HB1,HB2, PB0, PB1, PB2,…, PB[InfoFrame_Length].

• If sum == 0x00 then PASS else then FAIL


1) For each format listed in CDF field Source_Mandatory_3D_Video_Formats and Source_Other_Primary_3D_Video_Formats, perform the following tests.

2) Perform Required Test Method using a Recommended Video Timing Analyzer.

With a frequency counter, measure the pixel clock rate and enter this value to the test equipment.

HDMI Analysis command: ’3D Video Format Timing’





Table 7-4 3D Video Format Timing – Horizontal and Clock Parameters (3D Structure = Frame packing)

CEA Video Code


H_ TOTAL Pixels

H_ ACTIVE Pixels

VID_ TO_HS clocks

HS_ POLR’Y

HS_LEN

clocks


6,7 720(1440)x480i @ 60 Hz 54.054 1716 1440 38 – 124 8,9 720(1440)x240p @ 60 Hz 54.054 1716 1440 38 – 124

10,11 2880x480i @ 60 Hz 108.108 3432 2880 76 – 248 12,13 2880x240p @ 60 Hz 108.108 3432 2880 76 – 248 14,15 1440x480p @ 60 Hz 108.108 1716 1440 32 – 124

16 1920x1080p @ 60 Hz 297 2200 1920 88 + 44 17,18 720x576p @ 50 Hz 54.0 864 720 12 – 64

19 1280x720p @ 50 Hz 148.5 1980 1280 440 + 40 20 1920 x 1080i @ 50 Hz 148.5 2640 1920 528 + 44



35,36 2880x480p @ 60Hz 216.216 3432 2880 64 – 248 37,38 2880x576p @ 50Hz 216.0 3456 2880 48 - 256


42,43 720x576p @ 100Hz 108.0 864 720 12 – 64 44,45 720(1440)x576i @ 100Hz 108.0 1728 1440 24 – 126

46 1920x1080i @ 120Hz 297.0 2200 1920 88 + 44 47 1280x720p @ 120Hz 297.0 1650 1280 110 + 40


60 1280x720p @ 24Hz 118.8 3300 1280 1760 + 40 61 1280x720p @ 25Hz 148.5 3960 1280 2420 + 40 62 1280x720p @ 30Hz 148.5 3300 1280 1760 + 40




Table 7-5 3D Video Format Timing – Horizontal and Clock Parameters (3D Structure = Side-by-Side (Half))

CEA Video Code


H_ TOTAL Pixels

H_ ACTIVE Pixels

VID_ TO_HS clocks

HS_ POLR’Y

HS_LEN

clocks


6,7 720(1440)x480i @ 60 Hz 27.027 1716 1440 38 – 124 8,9 720(1440)x240p @ 60 Hz 27.027 1716 1440 38 – 124

10,11 2880x480i @ 60 Hz 54.054 3432 2880 76 – 248 12,13 2880x240p @ 60 Hz 54.054 3432 2880 76 – 248 14,15 1440x480p @ 60 Hz 54.054 1716 1440 32 – 124

16 1920x1080p @ 60 Hz 148.5 2200 1920 88 + 44 17,18 720x576p @ 50 Hz 27.0 864 720 12 – 64

19 1280x720p @ 50 Hz 74.25 1980 1280 440 + 40 20 1920 x 1080i @ 50 Hz 74.25 2640 1920 528 + 44



35,36 2880x480p @ 60Hz 108.108 3432 2880 64 – 248 37,38 2880x576p @ 50Hz 108.0 3456 2880 48 - 256


42,43 720x576p @ 100Hz 54.0 864 720 12 – 64 44,45 720(1440)x576i @ 100Hz 54.0 1728 1440 24 – 126

46 1920x1080i @ 120Hz 148.5 2200 1920 88 + 44 47 1280x720p @ 120Hz 148.5 1650 1280 110 + 40






Table 7-6 3D Video Format Timing – Horizontal and Clock Parameters (3D Structure = Top-and-Bottom)

CEA Video Code


H_ TOTAL Pixels

H_ ACTIVE Pixels

VID_ TO_HS clocks

HS_ POLR’Y

HS_LEN

clocks


6,7 720(1440)x480i @ 60 Hz 27.027 1716 1440 38 – 124 8,9 720(1440)x240p @ 60 Hz 27.027 1716 1440 38 – 124

10,11 2880x480i @ 60 Hz 54.054 3432 2880 76 – 248 12,13 2880x240p @ 60 Hz 54.054 3432 2880 76 – 248 14,15 1440x480p @ 60 Hz 54.054 1716 1440 32 – 124

16 1920x1080p @ 60 Hz 148.5 2200 1920 88 + 44 17,18 720x576p @ 50 Hz 27.0 864 720 12 – 64

19 1280x720p @ 50 Hz 74.25 1980 1280 440 + 40 20 1920 x 1080i @ 50 Hz 74.25 2640 1920 528 + 44



35,36 2880x480p @ 60Hz 108.108 3432 2880 64 – 248 37,38 2880x576p @ 50Hz 108.0 3456 2880 48 - 256


42,43 720x576p @ 100Hz 54.0 864 720 12 – 64 44,45 720(1440)x576i @ 100Hz 54.0 1728 1440 24 – 126

46 1920x1080i @ 120Hz 148.5 2200 1920 88 + 44 47 1280x720p @ 120Hz 148.5 1650 1280 110 + 40






Table 7-7 3D Video Format Timing – Vertical Parameters (3D Structure = Frame packing)

CEA Video Code


V_ ACTIVE (lines)

VS_ TO_VID(lines)

VS_LEN

(lines)

VS_ POLR’Y

HV _OFFSET (pixels)

1 640x480p @ 60 Hz 1050 1005 35 2 – 0 2,3 720x480p @ 60 Hz 1050 1005 36 6 – 0 4 1280x720p @ 60 Hz 1500 1470 25 5 + 0 5 1920x1080i @ 60 Hz 2250 2228 20 5 + 0

6,7 720(1440)x480i @ 60 Hz 1050 1028 18 3 – 0 8,9 720(1440)x240p @ 60 Hz 524 or 526 503 18 3 – 0

10,11 2880x480i @ 60 Hz 1050 1028 18 3 – 0 12,13 2880x240p @ 60 Hz 524 or 526 503 18 3 – 0 14,15 1440x480p @ 60 Hz 1050 1005 36 6 – 0

16 1920x1080p @ 60 Hz 2250 2205 41 5 + 0 17,18 720x576p @ 50 Hz 1250 1201 44 5 – 0

19 1280x720p @ 50 Hz 1500 1470 25 5 + 0 20 1920 x 1080i @ 50 Hz 2250 2228 20 5 + 0

21,22 720(1440)x576i @ 50 Hz 1250 1226 22 3 – 0 23,24 720(1440)x288p @ 50 Hz 624…628 602 22 3 – 0 25,26 2880x576i @ 50 Hz 1250 1226 22 3 – 0 27,28 2880x288p @ 50 Hz 624…628 602 22 3 – 0 29,30 1440x576p @ 50 Hz 1250 1201 41 5 – 0


35,36 2880x480p @ 60Hz 1050 1005 36 6 – 0 37,38 2880x576p @ 50Hz 1250 1201 44 5 - 0

39 1920x1080i/1250 total @ 50Hz 2500 2415 62 5 + 0 40 1920x1080i @ 100Hz 2250 2228 20 5 + 0 41 1280x720p @ 100Hz 1500 1470 25 5 + 0

42,43 720x576p @ 100Hz 1250 1201 44 5 – 0 44,45 720(1440)x576i @ 100Hz 1250 1226 22 3 – 0

46 1920x1080i @ 120Hz 2250 2228 20 5 + 0 47 1280x720p @ 120Hz 1500 1470 25 5 + 0

48,49 720x480p @ 120Hz 1050 1005 36 6 – 0 50,51 720(1440)x480i @ 120Hz 1050 1028 18 3 – 0 52,53 720X576p @ 200Hz 1250 1201 44 5 – 0 54,55 720(1440)x576i @ 200Hz 1250 1226 22 3 – 0 56,57 720x480p @ 240Hz 1050 1005 36 6 – 0 58,59 720(1440)x480i @ 240Hz 1050 1028 18 3 – 0

60 1280x720p @ 24Hz 1500 1470 25 5 + 0 61 1280x720p @ 25Hz 1500 1470 25 5 + 0 62 1280x720p @ 30Hz 1500 1470 25 5 + 0




Table 7-8 3D Video Format Timing – Vertical Parameters (3D Structure = Side-by-Side (Half))

CEA Video Code


V_ ACTIVE (lines)

VS_ TO_VID(lines)

VS_LEN

(lines)

VS_ POLR’Y

HV _OFFSET (pixels)


6,7 720(1440)x480i @ 60 Hz 262.5 240 18 3 – 0 / 858 8,9 720(1440)x240p @ 60 Hz 262 or 263 240 18 3 – 0

10,11 2880x480i @ 60 Hz 262.5 240 18 3 – 0 / 1716 12,13 2880x240p @ 60 Hz 262 or 263 240 18 3 – 0 14,15 1440x480p @ 60 Hz 525 480 36 6 – 0

16 1920x1080p @ 60 Hz 1125 1080 41 5 + 0 17,18 720x576p @ 50 Hz 625 576 44 5 – 0

19 1280x720p @ 50 Hz 750 720 25 5 + 0 20 1920 x 1080i @ 50 Hz 562.5 540 20 5 + 0 / 1320



35,36 2880x480p @ 60Hz 525 480 36 6 – 0 37,38 2880x576p @ 50Hz 625 576 44 5 - 0


42,43 720x576p @ 100Hz 625 576 44 5 – 0 44,45 720(1440)x576i @ 100Hz 312.5 288 22 3 – 0 / 864

46 1920x1080i @ 120Hz 562.5 540 20 5 + 0 / 1100 47 1280x720p @ 120Hz 750 720 25 5 + 0






Table 7-9 3D Video Format Timing – Vertical Parameters (3D Structure = Top-and-Bottom)

CEA Video Code


V_ ACTIVE (lines)

VS_ TO_VID(lines)

VS_LEN

(lines)

VS_ POLR’Y

HV _OFFSET (pixels)


6,7 720(1440)x480i @ 60 Hz 262.5 240 18 3 – 0 / 858 8,9 720(1440)x240p @ 60 Hz 262 or 263 240 18 3 – 0

10,11 2880x480i @ 60 Hz 262.5 240 18 3 – 0 / 1716 12,13 2880x240p @ 60 Hz 262 or 263 240 18 3 – 0 14,15 1440x480p @ 60 Hz 525 480 36 6 – 0

16 1920x1080p @ 60 Hz 1125 1080 41 5 + 0 17,18 720x576p @ 50 Hz 625 576 44 5 – 0

19 1280x720p @ 50 Hz 750 720 25 5 + 0 20 1920 x 1080i @ 50 Hz 562.5 540 20 5 + 0 / 1320



35,36 2880x480p @ 60Hz 525 480 36 6 – 0 37,38 2880x576p @ 50Hz 625 576 44 5 - 0


42,43 720x576p @ 100Hz 625 576 44 5 – 0 44,45 720(1440)x576i @ 100Hz 312.5 288 22 3 – 0 / 864

46 1920x1080i @ 120Hz 562.5 540 20 5 + 0 / 1100 47 1280x720p @ 120Hz 750 720 25 5 + 0






Regarding 60Hz-class and 24Hz-class formats:

Note that pixel clock frequencies shown here all correspond to 60Hz/24Hz frame rates, for ease and consistency in testing.



Note: Primary and secondary 3D Video formats are indicated in the tables above as:

Primary 3D Video Format Secondary 3D Video Format – Not required for ATC testing

Note: Each parameter which is indicated in the tables above equals to the parameter which is indicated in HDMI section 8 as follows:

H_TOTAL = Hactive + Hblank H_ACTIVE = Hactive VID_TO_HS = Hfront HS_LEN = Hsync V_TOTAL = [all Vactive]

+ Vblank( - 0.5, if Frame packing for interlaced format) + [all Vact_space(if Frame packing)]

V_ACTIVE = [all Vactive] + [all Vact_space(if Frame packing)] VS_TO_VID = Vsync + Vback VS_LEN = Vsync


Test ID 7-39: 4K x 2K Video Format Timing


[HDMI: 8.2.3.1] HDMI Video format Identification Code


Test Objective

Verify that Source DUT, whenever transmitting any 4K x 2K video format, complies with all required pixel and line counts and pixel clock frequency range.


If CDF field Source_4Kx2K == “N” then SKIP.





Connect Source DUT to a Video Timing Analyzer containing an EDID with the following:

• SVDs for 480p60Hz, 576p50Hz and for 1080p at 50Hz and 60Hz

• HDMI VSDB of any length >= 14 with

- HDMI_Video_present = 1

- 3D_present = 0

- HDMI_VIC_LEN = 4

- HDMI_3D_LEN = 0

- HDMI_VIC includes 0x01, 0x02, 0x03 and 0x04

For each video format timing listed in CDF field Source_4Kx2K_Video_Formats perform the following.

Operate Source DUT to output the tested format at a color depth of 24 bits/pixel. For all of the following, refer to the values listed in Table 7-10 and Table 7-11 for the tested format.

[Verify that at least one HDMI Vendor Specific InfoFrame (HB0, HB1, PB1, PB2, PB3 = 0x81, 0x01, 0x03, 0x0C 0x00) and at least one AVI InfoFrame are transmitted within every two video fields].

• If any two video fields occur with no HDMI Vendor Specific InfoFrame then FAIL

• If any two video fields occur with no AVI InfoFrame then FAIL.


• If byte HB2 (InfoFrame_Length) is less than 0x05 then FAIL

• [Check PB4 and PB5]

- If PB4, bit 7, bit 6 and bit5 (HDMI_Video_Format field) does not equal 0, 0, 1 then FAIL.

- If PB4, bit4...0 are not 0 (reserved) then FAIL.

- If PB5 does not equal either of 0x01, 0x02, 0x03 or 0x04 then FAIL.

- If byte HB2 (InfoFrame_Length) is more than 0x05, if byte PB6 through InfoFrame_Length do not equal 0x00 then FAIL.

• [Verify checksum]

- Do a byte wide sum of HB0,HB1,HB2, PB0, PB1, PB2,…, PB[InfoFrame_Length].

- If sum != 0x00 then FAIL.

If AVI InfoFrame is transmitted,




• [Verify that only AVI InfoFrame v2 is transmitted (no v1 or other) whenever AVI InfoFrame is transmitted.]

- If AVI is transmitted and InfoFrame_version field (byte HB1) is not 0x02 then FAIL


- If AVI M0-M1 field is not 1, 0 (16:9) then FAIL.



If AVI is transmitted and AVI M0-M1 fields do not correspond to viewed image then FAIL.

• [any transmitted AVI InfoFrame, VIC field (Video Identification Code) must be zero.]

- The transmitted AVI VIC field (byte PB4) is not 0x00 then FAIL




- If PB5 any bit 4-7 is non-zero then FAIL

- If any byte PB14 to PB27 is non-zero then FAIL


For any video format listed in Table 7-10 and Table 7-11 as 30Hz or 24Hz, except SMPTE format, pixel clock may be +0.5%/-0.6% of the listed pixel rate to allow for lower vertical rates than those listed (29.97Hz vs. 30Hz, etc.). SMPTE format listed as 24Hz must be +0.5%/-0.5% of the listed pixel rate. Format listed as 25Hz must be +0.5%/-0.5% of the listed pixel rate.

















• VS_LEN = number of pixels that VSYNC remains active divided by H_TOTAL, rounded to nearest half-integer (i.e. 6 or 6.5).



• VS_TO_VIDEO = number of HSYNC pulses between VSYNC active edge and first subsequent Video Data Period, not including HSYNC pulse that is coincident (or nearly so) with VSYNC active edge


Table 7-10 4K x 2K Video Format Timing – Horizontal and Clock Parameters

HDMI VIC Code


H_ TOTAL Pixels

H_ ACTIVE Pixels

VID_ TO_HS clocks

HS_ POLR’Y

HS_LEN

clocks

1 4K x 2K 30 Hz 297 4400 3840 176 + 88 2 4K x 2K 25 Hz 297 5280 3840 1056 + 88 3 4K x 2K 24 Hz 297 5500 3840 1276 + 88 4 4K x 2K 24Hz (SMPTE) 297 4500 4096 1020 + 88

Table 7-11 4K x 2K Video Format Timing – Vertical Parameters

HDMI_VIC Code


V_ ACTIVE (lines)

VS_ TO_VID(lines)

VS_LEN

(lines)

VS_ POLR’Y

HV _OFFSET (pixels)

1 4K x 2K 30 Hz 2250 2160 82 10 + 0 2 4K x 2K 25 Hz 2250 2160 82 10 + 0 3 4K x 2K 24 Hz 2250 2160 82 10 + 0 4 4K x 2K 24Hz (SMPTE) 2250 2160 82 10 + 0

Regarding 30Hz-class and 24Hz-class formats:

Note that pixel clock frequencies shown here all correspond to 30Hz/24Hz frame rates, for ease and consistency in testing.







Note: Recommended Test Method is TBD.

Test ID 7-40: Extended Colorimetry Transmission (without xvYCC)


[HDMI: 6.7.2] Applicable Colorimetry Standards

<See reference for details on Extended Colorimetry.>



[HDMI: Table 8-3] Extended Colorimetry


Test Objective

Verify that (a) Source has a capability to adequately output sYCC601 and/or AdobeYCC601 and/or AdobeRGB.


If CDF field Source_sYCC601 == “N”, Source_AdobeYCC601== “N” and Source_AdobeRGB == “N”, then SKIP.

For any one of video format listed in CDF field Source_Video_Formats, perform the following tests.

• Connect Source DUT to a Protocol Analyzer containing an EDID with the following:

- Support for 1080p (in addition to typical formats)

- HDMI VSDB of any length > 6 with

Supports_AI bit = 1

DC_36bit = 1

Max_TMDS_Clock =45 (225MHz)

- Colorimetry Data Block with

Byte #3 = 0

• If CDF field Source_sYCC601 == “Y” then,

- Operate Source DUT to output sYCC601 content signal.

- If every video field containing an AVI InfoFrame with fields C1 and C0 indicating Extended Colorimetry (1,1) then FAIL.




• If CDF field Source_AdobeYCC601 == “Y” then,

- Operate Source DUT to output AdobeYCC601 content signal.


• If CDF field Source_AdobeRGB == “Y” then,

- Operate Source DUT to output AdobeRGB content signal.



If CDF field Source_sYCC601 == “N”, Source_AdobeYCC601== “N” and Source_AdobeRGB == “N”, then SKIP

1) Connect Source DUT to a Protocol Analyzer with the specified EDID

2) For any one of the video formats described in CDF field Source_Video_Formats, do the following:

3) Operate Source DUT to output that video format at each of the supported Extended Colorimetry.

4) Capture and process data with Protocol Analyzer for Extended Colorimetry test.

5) If Protocol Analyzer reports ‘FAIL’, then FAIL

6) Repeat for next supported Extended Colorimetry.




8 Tests – Sink 8.1 Sink Products Overview 8.1.1 Television and Other Display Products

Display products are defined to “adequately support” a particular video format if they display that format, legibly and correctly placed (e.g. centered) horizontally and vertically in the expected aspect ratio and over/underscan amount.

For overscanned formats, horizontally and vertically, at least some portion of the active portion of the image must not be visible due to border obstruction or clipping. For underscanned images, 100% of the active portion must be visible.

8.1.2 Audio Rendering Products

Displays, audio amplifiers or other products designed to “render” the audio (convert to actual sound) are defined to “adequately support” a particular audio format if they reproduce the audio at approximately the same level of fidelity as any other audio input on that device.

8.1.3 Non-Display Devices

If the Sink product has no display but does have an analog or other video output that can be attached to a display thereby providing the same function, this output/display may be used to determine support of the received HDMI signal.


Section 8 Tests – Sink


8.2 Sink – EDID / E-DDC

Test ID 8-1: EDID Readable


[HDMI: 8.3] E-EDID Data Structure

“All Sinks shall contain a CEA-861-D compliant E-EDID data structure accessible through the DDC.”

<See reference for additional details.>

Test Objective

Verify that the entire EDID can be read.


Connect an EDID Reader/Analyzer to the Sink DUT.

Power on the Sink DUT.

Apply +5.0V to +5V Power pin.

Operate the EDID Reader/Analyzer to perform the following:

• Read Block 0 (128 bytes) of the Sink’s EDID.

• EXTENSION_COUNT = Extension Flag (block 0, byte 0x7E)

• If EXTENSION_COUNT == 0x00 then:

- FAIL then “Missing EDID Extension”

• If EXTENSION_COUNT >= 0x01 then:

- Use any sequence of legal DDC reads to read the second 128 bytes of the EDID.

- If any read NACKs inappropriately then FAIL, “DDC NACK”

• If EXTENSION_COUNT > 0x01 then:

- Use any sequence of legal segment register-based E-DDC reads to read block 2 through block EXTENSION_COUNT+1

- If any read NACKs inappropriately then FAIL, “E-DDC NACK”

Store the EDID image for analysis on subsequent Sink tests.

Power off the Sink DUT, continue applying +5.0V to +5V Power

If HPD is asserted by Sink perform the following:

• Read the entire EDID (as above)

• If EDID image read error then FAIL

• Compare to previously stored EDID image

• If EDID images do not match then FAIL




Recommended Test Method Test ID 8-1: EDID Readable

Note that the Recommended Test Equipment (Quantum Data 882CA) can be used to perform all EDID-checking tests simultaneously. This includes all tests in section 8.2 and several tests in 8.5.

1) Connect Sink DUT to Quantum Data 882CA and perform EDID analysis.

2) If any errors are reported during EDID read then FAIL, <error comment>

3) Else, then PASS

Test ID 8-2: EDID VESA Structure



“The first 128 bytes of the E-EDID shall contain an EDID 1.3 structure. The contents of this structure shall also meet the requirements of CEA-861-D.”


[861-D: 7] EDID Data Structure


Test Objective

Verify that the data in the base EDID 1.3 block and basic EDID Extension handling is correct and meets all aspects of the relevant specifications.


Use the EDID Reader/Analyzer to analyze the EDID image that was captured in the “EDID Readable” above, as follows:

EXTENSION_COUNT = Extension Flag (block 0, byte 0x7E)

If EXTENSION_COUNT == 1

- BLOCK_COUNT = 2

Else, (EXTENSION_COUNT > 1)

- BLOCK_COUNT = EXTENSION_COUNT+1

Perform the following tests on Block 0:

• [Verify valid EDID Block 0 header]

- Examine block 0: bytes 0x00 through 0x07. Values shall be 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00.

- If any values different then FAIL, “Incorrect Block 0 header”

• [Verify EDID Version]

- Examine bytes 0x12 and 0x13. Values shall be 0x01, 03h.

- If any values different then FAIL, “Incorrect EDID version”

• [Verify Video Information Byte] (This indicates that the interface is digital.)




- Examine byte 0x14. Value shall be either 0x80 or 0x81.

- If value is not 0x80 or 0x81 then FAIL, “Incorrect Video Information Byte”

• [Verify Preferred Timing bit is set]

- If byte 0x18, bit # 1 != 1then FAIL, “Incorrect Preferred Timing bit”

• [Verify that Detailed Timing Description (DTD) #1 contains a timing descriptor]

- Examine 16-bits at bytes 0x36 and 0x37. (Pixel clock / 10,000). Combined word shall be non-zero.

- If value is 0x0000 then FAIL, “Missing Preferred Timing descriptor”

• [Verify that DTD #1-#4 contains one Monitor Range Limits descriptor and one Monitor Name descriptor]. [EDID 1.3: 3.10.3]

- Examine 4 byte values at locations 0x36…0x39, 0x48…0x4B, 0x5A…0x5D and 0x6C…0x6F, looking for following values:

0x00, 0x00, 0x00, 0xFD [= Monitor Range Limits header]

0x00, 0x00, 0x00, 0xFC [= Monitor Name header]

- If Monitor Range Limits header not present in examined bytes then FAIL, “Missing Monitor Range Limits”

- If Monitor Name header not present in examined bytes then FAIL, “Missing Monitor Name”

- If monitor name terminating byte != 0x0A then FAIL.

- If monitor name length is less than 13 bytes and padding bytes (following 0x0A) != 0x20 then FAIL.

• [Verify that DTD #2, #3, or #4 appear in correct order]

- If bytes 0x6C…0x6D != 0 or 0x5A…0x5B != 0 then FAIL, “DTD follows Monitor Descriptor”

- If bytes 0x48…0x49 != 0 :

If bytes 0x36…0x37 == 0 then FAIL, “DTD follows Monitor Descriptor”

[Verify that Block 1 contains either a CEA Timing Extension or a valid block map]

• If EXTENSION_COUNT == 1

- If block 1: byte 0 != 0x02 then FAIL, “Missing CEA Extension in block 1”

• Else, (EXTENSION_COUNT > 1)

- If block 1: byte 0 != 0xF0 then FAIL, “Missing Block Map in block 1”

- If block 2: byte 0 != 0x02 then FAIL, “Missing CEA Extension in block 2”

- For every byte <N> from byte 1 through byte EXTENSION_COUNT-1:

If block 1, byte N != block N+1, byte 0 then FAIL, “Block Map/Extension mis-match”

- For every byte <N> from byte EXTENSION_COUNT through byte 0x7E (126):

If block 1, byte N != 0 then FAIL, “Block Map byte <N> incorrect”

Perform the following for each block <N> in the EDID, from block 0 to block BLOCK_COUNT:

• [Verify Block Checksum]




- Sum all of the bytes in block from byte 0x00 to 0x7F. Result is the lower 8 bits of the sum. Sum result shall be 0x00.

- If checksum != 0x00 then FAIL, “Incorrect checksum, block <N>”

Recommended Test Method Test ID 8-2: EDID VESA Structure



2) If any errors are reported then FAIL, <error comment>

3) Else, then PASS

Test ID 8-3: CEA Timing Extension Structure


[HDMI: 8.3.1] CEA Extension

“The first E-EDID ‘extension’ shall contain a CEA version 3, defined in CEA-861-D section 7.5. Additional CEA Extensions may also be present.”


[HDMI:8.3.2] HDMI Vendor-Specific Data Block (HDMI VSDB)


[HDMI:8.3.3] Colorimetory Data Block


[HDMI:8.3.4] Video Capability Data Block


Test Objective

Verify that the data in any CEA Timing Extension present in EDID is formatted properly and meets all aspects of the relevant specifications. [Note: The accuracy of the video and audio-related EDID information is tested in the Video and Audio test sections.]


Use the EDID Reader/Analyzer to analyze the EDID image that was captured in the “EDID Readable” above, as follows:

EXTENSION_COUNT = Extension Flag (block 0, byte 0x7E)

If EXTENSION_COUNT == 1

• BLOCK_COUNT = 2

Else, (EXTENSION_COUNT > 1)




• BLOCK_COUNT = EXTENSION_COUNT+1

Perform following tests for each CEA Extension found, including the first:

[Verify Revision Number]

• Check byte #1 (Revision Number) of this CEA Timing Extension

• If byte #1 != 3 then FAIL, “Incorrect CEA Extension version”

[Verify Basic Audio requirement]

• If 1st CEA Timing Extension byte #3, bit #6 is 0 and CDF field Sink_Basic_Audio =”Y”then FAIL, “Basic Audio claimed in CDF but not indicated in EDID.”

• If 1st CEA Timing Extension byte #3, bit #6 is 1 and CDF field Sink_Basic_Audio =”N”then FAIL, “No Basic Audio claimed in CDF but is indicated in EDID.”

[Verify data structure of CEA Extension] Scan through all Data Blocks checking the following:

• If Data Block Tag Code (bits #7…5 of Data Block’s 1st byte) has a value of 0, or 6 then FAIL, “Illegal Data Block type”

• If Tag Code == 1 [Audio Data Block]

- If 1st CEA Timing Extension byte #3, bit #6 is 0 then FAIL, “No Basic Audio but Audio Data Block found”

- If Data Block Length (bits #4…0 of 1st byte) isn’t a multiple of 3 (3, 6, 9…) then FAIL, “Illegal Audio Block length”

- For each Short Audio Descriptor (3 bytes long) in Audio Data Block

If 1st byte, bit #7==1 or 2nd byte, bit #7==1 then FAIL, “Short Audio Descr. Rsvd bits set”

If Audio Format Code (1st byte, bits #6…3) == 0001 (PCM)

If 3rd byte, bits #7…3 != 0 then FAIL, “Short Audio Descr, Rsvd bits set”

If 2nd byte, bits #0, 1, 2 (32, 44.1, 48kHz) do not equal 1, 1, 1 then FAIL, “PCM descriptor missing Basic Audio frequencies”.

If 1st byte, bits #2…0 (Max Num channels) > 1 (more than 2 channels) then:

Determine if a Speaker Allocation Data Block is present. [861-D: 7.5.3]

If no Speaker Allocation Data Block is present then FAIL.

• If Tag Code == 4 [Speaker Allocation Data Block]

If Data Block Length (bits #4…0 of 1st byte) != 3 then FAIL, “Illegal Speaker Alloc Block length”

If 1st byte of Speaker Allocation Data Block Payload, bit #7==1 then FAIL, “Speaker Alloc Descr. rsvd bits set”

If 2nd byte!=0 or 3rd byte!=0 then FAIL, “Speaker Alloc. rsvd bytes set”

Verify that no more than 1 Speaker Allocation Data Block is present and if present, is in 1st CEA Extension

If more than one Speaker Alloc. Data Block found then FAIL, “More than one Speaker Alloc Block”




• If Tag Code == 7 [Extended Tag Data Blocks]

- If Extended Tag Code (1st byte following Tag Code byte) == 0 (Video Capability Data Block)

[Check S_CE bits]

If data block byte #3 bits 1 and 0 are equal 00 then FAIL, “Video Capability Data Block indicates no CE formats supported.”

[Check S_IT bits]

If data block byte #3 bits 2 and 3 are equal 00 then FAIL, “Video Capability Data Block indicates no VGA or other IT formats supported.”

- If Extended Tag Code (1st byte following Tag Code byte) == 5 (Colorimetry Data Block)

If data block byte #3 (1st byte following Extended Tag Code byte) bits 0 and 1 are not equal 00 then:

If data block byte #4 bit 0 !=1 then FAIL, “Metadata P0 required if xvYCC supported.”

If data block byte #3 (1st byte following Extended Tag Code byte) bits 0 and 1 are equal 00 then:

If data block byte #4 any bits 0…7 are set then FAIL, “Illegal gamut metadata indication”

If data block byte #3 any bits 5…7 are set then FAIL, “Illegal extended colorimetry indicated.”

If data block byte #4 any bits 1…7 are set then FAIL, “Illegal gamut metadata indication”

• If location of next Data Block (current location + 1 + length) < d, continue scanning of Data Blocks

• If location of next Data Block > d then FAIL, “d points into Data Block”

• If location of next Data Block == d, stop scanning and continue tests

Perform the following for the 1st CEA Timing Extension in EDID:

• [Verify presence of HDMI Vendor-Specific Data block in first CEA Extension]

- Find first Data block with the values 0b011xxxxx, 0x03, 0x0C, 0x00 in the first 4 bytes (where ‘xxxxx’ can be any 5 bit value).

- If no Data Block in 1st CEA Extensions has signature above then FAIL, “Missing HDMI VSDB”

• For following, VSDB_length = lower 5 bits of byte 0 of HDMI VSDB

• [HDMI VSDB: Verify length field of HDMI VSDB]

- If VSDB_length < 5 then FAIL, “HDMI VSDB too short”

• [HDMI VSDB: Verify Physical Address in HDMI VSDB is P.0.0.0 for CEC root device, where P is equal to the number of the port, starting at 1 for the first port]

- If CDF field HDMI_output_count == 0 and CDF field CEC_root_device = “N” then FAIL

- If CDF field HDMI_output_count == 0 or CDF field CEC_root_device = “Y” or if testing Sink function as part of Repeater Test ID 9-4 then:




Set P to the port number of the tested port. If the DUT only has a single HDMI port, P=1 (physical address = 1.0.0.0). If two ports, P=1 for first port, P=2 for second port etc.

If bytes 4 and 5 of HDMI VSDB are not 0xP0 and 0x00 (i.e. Source physical address = 1.0.0.0 or 2.0.0.0, or…) then FAIL, “Bad Physical Address”

• [HDMI VSDB: Verify Extension Fields]

If CDF field Sink_Supports_AI is “Y”

If HDMI VSDB byte 0 <= 0x65 or HDMI VSDB Supports_AI bit is 0 then FAIL, “Incorrect Supports_AI field”

Else (if the CDF field Sink_Supports_AI is “N”)

If HDMI VSDB byte 0 > 0x65 and HDMI VSDB Supports_AI bit is 1 then FAIL, “Incorrect Supports_AI field”

If CDF field Sink_3D is “Y” or if CDF field Sink_4Kx2K is “Y”

If HDMI VSDB byte 0 <= 0x69 or HDMI_Video_present bit is 0 then FAIL, “Incorrect additional video format capabilities”

- If VSDB_length >= 6 then

If byte 6, bits 2, 1 do not equal 0 then FAIL

If byte 6, bit 3 equals 1 and byte 6, bits 4, 5 and 6 all equal 0 then FAIL, “DC_Y444 set but no Deep Color depth indicated.”

If byte 6, bits 4 or 6 (DC_48bit or DC_30bit) equals 1 and bit 5 (DC_36bit) equals 0 then FAIL, “DC_30bit or DC_48bit supported without default DC_36bit supported.”

If VSDB_length = 6 then

If byte 6, bits 4, 5, or 6 (DC_48…30bit) equals 1 then FAIL, “Max_TMDS_Clock field not present despite Deep Color support indicated.”

If byte 6, bit 0 (DVI_Dual) equals 1 then FAIL, “Max_TMDS_Clock field not present despite DVI_Dual support indicated.”


If byte 7 equals 0 then

If byte 6, bits 4, 5, or 6 (DC_48…30bit) equals 1 then FAIL, “Max_TMDS_Clock field zero despite Deep Color support indicated.”

If byte 6, bit 0 (DVI_Dual) equals 1 then FAIL, “Max_TMDS_Clock field zero despite DVI_Dual support indicated.”


If byte 8, bit 4 does not equal 0 then FAIL

If byte 8, bit 7, bit 6 and bit 5 equal 0, 0, 0 (Latency_Fields_Present=0, I_Latency_Fields_Present=0 and HDMI_Video_present = 0) then

If CDF field Sink_3D is “Y” or CDF field Sink_4Kx2K is “Y” then FAIL, “3D/4Kx2K video formats support not indicated despite 3D/4Kx2K video formats support applied.”

If byte 8, bit 7, bit 6 and bit 5 equal 0, 0, 1 (Latency_Fields_Present=0, I_Latency_Fields_Present=0 and HDMI_Video_present = 1),




If VSDB_length < 10 then FAIL, “HDMI_Video_Present is set but VSDB is too short.”

If CDF field Sink_3D is “N” and CDF field Sink_4Kx2K is “N” then FAIL, “3D/4Kx2K video formats support indicated despite 3D and 4Kx2K video formats support not applied.”

If CDF field Sink_3D is “Y” and byte 9, bit 7 (3D_present) equals 0 then FAIL, “3D video formats support not indicated despite 3D video formats support applied.”

If CDF field Sink_3D is “N” and byte 9, bit 7 (3D_present) does not equal 0 then FAIL, “3D video formats support indicated despite 3D video formats support not applied.”

If CDF field Sink_3D_Additional is “N” and byte 9, bits 6…5 (3D_Multi_present) do not equal 0 then FAIL, “additional 3D capability indicated despite additional 3D video formats support not applied.”

If CDF field Sink_Image_Size is “N” and byte 9, bit 4 (Image_Size[1]) equals 1 then FAIL, “image size correctness indicated despite not applied.”

If CDF field Sink_Image_Size is “Y” and byte 9, bit 4 (Image_Size[1]) equals 0 then FAIL, “image size correctness not indicated despite applied.”

If CDF field Sink_Image_Size is “Y” then measure horizontal image size (x) and vertical image size (y). If byte 9, bits 4,3 (Image_Size) equal 1,0 or 1,1, and if the ‘Max Horizontal Image Size’ and ‘Max Vertical Image Size’ fields that are assigned on address 0x15 and 0x16 in VESA E-EDID specification in E-EDID do not follow the specified rule, then FAIL, “the size of 3D image are not correctly described.”

NOTE: Measure the height and width of display area of the DUT when it displays blue back, white noise or equivalent signal.

If CDF field Sink_3D_Additional is “Y” and byte 10, bits 4…0 (HDMI_3D_LEN) equal 0 then FAIL, “additional 3D video formats support not indicated despite additional 3D video formats support applied.”

If CDF field Sink_3D_Additional is “N” and byte 10, bits 4…0 (HDMI_3D_LEN) do not equal 0 then FAIL, “additional 3D video formats support indicated despite additional 3D video formats support not applied.”

If CDF field Sink_4Kx2K is “Y” and byte 10, bits 7…5 (HDMI_VIC_LEN) equal 0 then FAIL, “4K x 2K video formats support not indicated despite 4K x 2K video formats support applied.”

If CDF field Sink_4Kx2K is “Y”, Examine bytes 11 through 11+ HDMI_VIC_LEN (byte 10, bits 7…5 value) length.

If any of these bytes are not 0x01, 0x02, 0x03 or 0x04 then FAIL, “Not Valid HDMI_VIC”

If CDF field Sink_4Kx2K is “N” and byte 10, bits 7…5 (HDMI_VIC_LEN) do not equal 0 then FAIL, “4K x 2K video formats support indicated despite 4K x 2K video formats support not applied.”




If byte 8, bit 7 and bit 6 equal 0, 1 (Latency_Fields_Present=0, I_Latency_Fields_Present=1) then FAIL, “I_Latency_Fields_Present cannot be set unless Latency_Fields_Present is set.”

If byte 8, bit 5 equals 0 (HDMI_Video_present = 0) then


If byte 8, bit 5 does not equal 0 (HDMI_Video_present = 1) then



If VSDB_length < 10 then FAIL, “Latency_Fields_Present is set but VSDB is too short.”



If VSDB_length < 12 then FAIL, “Latency_Fields_Present and HDMI_Video_present are set but VSDB is too short.”















If CDF field Sink_4Kx2K is “Y”, Examine bytes 13 through 13+ HDMI_VIC_LEN (byte 12, bits 7…5 value) length.




If VSDB_length < 12 then FAIL, “Latency_Fields_Present and I_Latency_Fields_Present are set but VSDB is too short.”



If VSDB_length < 14 then FAIL, “Latency_Fields_Present and I_Latency_Fields_Present are set but VSDB is too short.”
















If CDF field Sink_4Kx2K is “Y” , Examine bytes 15 through 15+ HDMI_VIC_LEN (byte 14, bits 7…5 value) length.



• [HDMI VSDB: Verify Reserved bytes at end]


Examine HDMI VSDB bytes M through VSDB_length, where M is 9, 11 or more than 11 depending upon the values of Latency_Fields_Present, I_Latency_Fields_Present and HDMI_Video_present.

If any of these bytes are non-zero then FAIL, “Non-zero Reserved Extension Fields”

• [HDMI VSDB: Verify that no HDMI VSDB exists in this or subsequent data block]

- Search for a 2nd Data block with the values 0b011xxxxx, 0x03, 0x0C, 0x00 in the first 4 bytes anywhere in any CEA Extension.

- If any other Data Block has signature above then FAIL, “Extra HDMI VSDB”

Perform the following for all CEA Extension except the 1st CEA Extension in EDID:

• [Verify consistency of byte 3 (number of native timings plus flags) among all CEA Timing Extensions]




- Compare byte #3 of this CEA Timing Extension with byte #3 of first CEA Timing Extension.

- If byte 3 != byte 3 of 1st CEA Extension then FAIL, “Unmatched byte 3 in CEA Extension”

• [Verify that no HDMI VSDB exists in subsequent Extension]

- Search for a Data block with the values 0b011xxxxx, 0x03, 0x0C, 0x00 in the first 4 bytes.

- If any Data Block in this CEA Extension has signature above then FAIL, “Extra HDMI VSDB”

[Verify that number of native DTDs is ≤ number of DTDs in EDID]

• If lower 4 bits of byte 3 of 1st CEA Extension > number of DTDs in EDID then FAIL, “Native DTD count larger than number of DTDs”

Recommended Test Method Test ID 8-3: CEA Timing Extension Structure




3) Else, then PASS




8.3 Sink – Electrical

Sink tests may be performed at test points CTP2 shown in Figure 8-1 (corresponding to TP2 as used in the HDMI Specification).

Figure 8-1 Sink Test Points

Test ID 8-4: TMDS – Termination Voltage

Reference Requirement [HDMI: Table 4-26] Sink DC Characteristics When Source Disabled or Disconnected at TP2

With Source disabled or disconnected, the differential voltage level on each TMDS pair must be AVCC±10mV.

Test Objective

Confirm that the differential voltage level on each TMDS pair is within specified limits.


Connect TPA-P to HDMI input connector of Sink DUT.

Turn on the power to the Sink DUT and verify that the HDMI input is active (e.g. correct input is selected, etc.).

Connect the multi-meter probes to the TMDS_DATA0+ and TMDS_DATA0_Shield.

VTERM = measured voltage level

If (VTERM < 3.125V) OR (VTERM > 3.475V) then FAIL.

Repeat for all remaining TMDS_DATA and TMDS_CLOCK, + and - signals, measuring between the signal and its shield.




Recommended Test Method Test ID 8-4: TMDS – Termination Voltage

Setup 38. Test ID 8-4: TMDS – Termination Voltage

No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.15 1 3 TPA-P Fixture Any TPA-P with access to

+5V_Power, DDC/CEC Ground and all TMDS signals.

4.2.1.1.6 1

1) Connect TPA-P to HDMI input connector of Sink DUT.

2) Verify that TPA-P has no termination resistors attached.

3) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P

4) Turn on the power to the Sink DUT and verify that the HDMI input is active (e.g. correct input is selected, etc.).

5) Connect the multi-meter probes to the TMDS_DATA0+ and TMDS_DATA0_Shield.

6) VTERM = measured voltage level

7) If (VTERM < 3.125V) OR (VTERM > 3.475V) then FAIL.

8) Repeat for all remaining TMDS_DATA and TMDS_CLOCK, + and - signals, measuring between the signal and its shield.




Test ID 8-5: TMDS – Min/Max Differential Swing Tolerance

Reference Requirement [HDMI: Table 4-27] Sink AC Input Characteristics at TP2

Minimum differential sensitivity (peak-to-peak) is 150mV.

Test Objective

Confirm that the Sink properly supports TMDS differential voltages at minimum levels.


1) Connect TMDS Signal Generator to Sink DUT.

2) Turn on the power to the Sink DUT and verify that the HDMI input is active.

3) Connect and configure DC Power Supply to drive +5V between +5V Power and DDC/CEC Ground on TPA-P.

4) Configure the TMDS Signal Generator to output any video format at the highest supported frequency with a pattern consisting of a repeating RGB gray ramp (Ex. 0, 1, 2…254, 255, 0, 1, 2…) during each video period.

5) Add TTCs to the outputs, as needed, to create a TMDS rise/fall time between 75pS and 110pS.

6) Adjust the common mode voltage (VICM) to:

• 2.9V if the Sink supports TMDS clock rates >165MHz.

• 3.0V if the Sink supports only TMDS clock rates <=165MHz.

[Search for and record the minimum differential swing voltage that the Sink DUT supports without error]:

7) Set common mode voltage as required for this test case

8) Starting with a differential swing of 170mV or more, gradually reduce the swing on all TMDS pairs until the Sink DUT fails to support the signal without errors.

9) Record the minimum differential swing voltage that the Sink DUT supports without error (VDIFF_MIN_DC).

10) If VDIFF_MIN_DC >= 150mV then FAIL, “Min diff swing unsupported at Vicm1 range”.

11) Return swing to 170mV and set VICM = 3.3V. Repeat search for min supported differential swing (VDIFF_MIN_AC).

12) If VDIFF_MIN_AC >= 150mV then FAIL, “Min diff swing unsupported at Vicm2 range”.

13) Change the differential swing to 1.2V (600mV/single-ended signal = max swing) while maintaining VICM = 3.3V.

14) Verify that the DUT continues to support the signal without errors.

15) If DUT fails to support the signal then FAIL, “Max diff swing unsupported at Vicm2 range”.




Recommended Test Method – Tektronix

Setup 39. Test ID 8-5: TMDS – Min/Max Differential Swing Tolerance – Tektronix

No. Description Recommended TE Reference Qty.1 TMDS Signal Generator Tektronix DTG5274 or

Tektronix DTG5334 4.2.1.9 1

2 DC Power Supply <See reference> 4.2.1.15 1 3 SMA Cables <See reference> 4.2.1.7 8 4 TPA-P-SMA Fixture Tektronix TPA-P-TDR or

EFF-HDMI-TPA-P with EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.6 1

1) Connect DTG to TPA-P using eight 2‘ SMA cables.

- Module A, Channel 1+, 1-: connect to TMDS_CLOCK +,–

- Module A, Channel 2+, 2-: No connect

- Module B, Channel 1+, 1-: connect to TMDS_DATA0+,– (DATA0_P, DATA0_N)

- Module B, Channel 2+, 2-: connect to TMDS_DATA1+,–

- Module C, Channel 1+, 1-: connect to TMDS_DATA2+,–

- Module C, Channel 2+, 2-: No connect


3) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) on the TPA-P.

Perform the Required Test Method with this setup. For adjustments required during the test sequence, do the following:

To adjust the differential swing: VDIFF_SWING




• Use the Tektronix DTG “Level” window and select “Amplitude and Offset” mode. In this mode, “Amplitude” should be set to half of the differential swing, for instance, 0.085Vpp to correspond to a 170mV differential swing.

To adjust the common mode voltage: VICM

• Use the Tektronix DTG “Level” window and select “Amplitude and Offset” mode.

Recommended Test Method – Agilent

Setup 40. Test ID 8-5: TMDS – Min/Max Differential Swing Tolerance - Agilent

No. Description Recommended TE Reference Qty.1 TMDS Signal Generator Agilent E4887A 4.2.1.9 1 2 Bias-T <See reference> 4.2.1.9 8 3 DC Power Supply <See reference> 4.2.1.15 2 4 SMA Cables Agilent N4871A 4.2.1.7 8 5 TPA-P Test Assembly Agilent N1080A H01 4.2.1.1.6 1 6 TPA-Control Agilent N1080A H03 4.2.1.1.6 1

1) Connect TMDS Signal Generator to TPA-P using eight Agilent N4871A SMA cables.

• Using Bias-Tees on each Agilent E4887A output, connect Agilent E4887A as follows:

- Clockgroup A, Channel 1+, 1–: connect to TMDS_CLOCK+, –

- Clockgroup B Channel 1+, 1–: connect to TMDS_DATA0+, – (“DATA0_P”, “DATA0_N”)

- Clockgroup B, Channel 2+, 2–: connect to TMDS_DATA1+, –





- Clockgroup B Channel 4+, 4–: No connect

• Add “60psec” TTC to each output.

2) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) through TPA-Control (N1080A-H03).

Perform the Required Test Method with this setup. For adjustments required during the test sequence, do the following:

To adjust the differential swing: VDIFF_SWING

• Set the single ended signal levels to half of the differential swing, for instance, 85mV to correspond to a 170mV differential swing.

To adjust the common mode voltage: VICM

• Set the VICM by adjusting the power supply to the Agilent E4887A -connected Bias-Tees. VICM = (3.3V + Bias-T voltage)/2:

- VICM = 2.9V : set Bias-T voltage = 2.5V



Test ID 8-6: TMDS – Intra-Pair Skew


Allowable Intra-Pair Skew at Sink Connector is 0.4*TBIT

Test Objective

Confirm that the maximum allowed timing skew within each TMDS pair is supported by the Sink DUT.


Configure the TMDS Signal Generator to output any Sink-supported video format and pixel size with the maximum Sink-supported TMDS clock frequency.

For all TMDS signals, set the common mode voltage (VICM) to 3.05V and the single-ended swing to 500mV. Add TTCs to the outputs, as needed, to create a TMDS rise/fall time between 75pS and 110pS.


For each of the TMDS clock and data pairs acting as the tested pair:

• Configure the TMDS Signal Generator to support adding skew between + and – signals of the tested pair.

• Increase the skew (Differential Timing Offset) by steps of less than or equal to 0.1*TBIT, until the Sink DUT outputs errors or until reaching either 0.6*TBIT or 1nsec.

• If errors seen on DUT:

- Reduce the skew one step, so that Sink DUT outputs no errors.




- If TMDS clock frequency is <=222.75MHz:

If intra-pair skew < 0.4*TBIT, then FAIL.

- Else (TMDS clock frequency is >222.75MHz):

If intra-pair skew < 112psecs + 0.15*TBIT, then FAIL.

• Repeat the test but add the skew in the opposite direction

Repeat the test for each of the remaining untested pairs.

Recommended Test Method – Tektronix Test ID 8-6: TMDS – Intra-Pair Skew

Setup 41. Test ID 8-6: TMDS – Intra-Pair Skew

No. Description Recommended TE Reference Qty.1 TMDS Signal Generator Tektronix DTG5274 or


2 DC Power Supply <See reference> 4.2.1.15 1 3 SMA Cables <See reference> 4.2.1.7 8 4 TPA-P-SMA Fixture Tektronix TPA-P-TDR or

EFF-HDMI-TPA-P with EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.6 1

1) Setup and configure the Tektronix DTG and DUT:

• Connect the DTG to the TPA-P using eight 2’ SMA cables:





- Module C, Channel 1+, 1-: connect to TMDS_DATA2+,–




- Module C, Channel 2+, 2-: connect to TMDS_CLOCK+,–


3) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P.

4) Configure the TMDS Signal Generator to output any Sink-supported video format and pixel size that uses the maximum Sink-supported TMDS clock frequency. If multiple formats are available, a native format is preferred. Note the tested format on the results form.

• Repeating RGB gray ramp (Ex. 0, 1, 2…254, 255, 0, 1, 2…) during each active video period.

5) For each of the TMDS clock and data pairs acting as the tested pair

• Configure the TE to support adding skew between + and – signals of the tested pair:

6) Set the delay for all outputs to 0nS with delay offset of 2.5nS and disable “Differential Timing Offset” if previously enabled.

7) Move the TMDS ‘+’ signal of the tested pair to DTG output module A, 1+

8) Move the TMDS ‘–‘ signal of the tested pair to DTG output module A, 2+

9) Change DTG configuration to output the pattern for the tested TMDS channel on module A, 1

10) In the DTG “Timing” screen, select the tested channel (i.e. connected to 1A1). From the “Edit” menu, enable “Differential Timing Offset”.

11) Click on the delay value in the Differential Timing Offset column and set to approximately 0.1*TBIT. This corresponds to the initial intra-pair skew value.

12) Increase the intra-pair skew (e.g. “Differential Timing Offset”) by steps of less than or equal to 0.1*TBIT, until the Sink DUT outputs errors or until reaching 0.6*TBIT or 1nsec.

13) If errors seen on DUT:

14) Reduce the skew one step, so that Sink DUT outputs no errors.

15) If TMDS clock frequency <= 222.75MHz:


16) Else (TMDS clock frequency > 222.75MHz):


17) Repeat the test for each of the remaining untested pairs.




Recommended Test Method – Agilent Test ID 8-6: TMDS – Intra-Pair Skew

Setup 42. Test ID 8-6: TMDS – Intra-Pair Skew - Agilent

No. Description Recommended TE Reference Qty.1 TMDS Signal Generator Agilent E4887A 4.2.1.9 1 2 Bias-T <See reference> 4.2.1.9 8 3 DC Power Supply <See reference> 4.2.1.15 2 4 SMA Cables Agilent N4871A 4.2.1.7 8 5 TPA-P Test Assembly Agilent N1080A H01 4.2.1.1.6 1 6 TPA-Control Agilent N1080A H03 4.2.1.1.6 1

1) Setup and configure the TMDS Signal Generator and DUT:

• Using Bias-Tees on each Agilent E4887A output, connect Agilent E4887A as follows:






• Add “60psec” TTC to each output.


3) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) through TPA-Control (N1080A-H03).




4) Configure the Agilent E4887A to output any Sink-supported video format and pixel size that uses the maximum Sink-supported TMDS clock frequency. If multiple formats are available, a native format is preferred. Note the tested format on the results form.

• Repeating RGB gray ramp 0, 1, 2…254, 255, 0, 1, 2…during each active video period.

5) For each of the TMDS clock and data pairs acting as the tested pair, configure the TE to support adding skew between + and – signals of the tested pair.

6) Set the delay for all outputs to 2.5nS in the “Timing Tab” of all outputs “Parameter Editor” of the Agilent ParBERT user software.

7) Move the TMDS ‘-’ signal of the tested pair to Agilent E4887A Clockgroup B Channel 4-. (Leave the TMDS ‘+ signal in the original position described in step 1 above)

8) Change Agilent E4887A configuration to output the pattern for the intra-pair skew test of TMDS channel under test.

9) Increase the intra-pair skew (e.g. “Delay” in the “Timing Tab” of the Clockgroup B Channel 4’s “Parameter editor”) by steps of less than or equal to 0.1*TBIT, until the Sink DUT outputs errors or until reaching 0.6*TBIT or 1nsec.

10) If errors seen on DUT:

11) Reduce the skew one step, so that Sink DUT outputs no errors.

12) If TMDS clock frequency <= 222.75MHz:


13) Else (TMDS clock frequency > 222.75MHz):


14) Repeat the test for each of the remaining untested pairs.

Test ID 8-7: TMDS – Jitter Tolerance


TMDS Clock jitter : 0.30 TBIT (relative to Ideal Recovery Clock)

[HDMI: Figure 4-32] Absolute Eye Diagram Mask at TP2 for Sink Requirements


Test Objective

Confirm that the maximum allowed TMDS clock jitter is supported by the Sink DUT.


Note that all jitter amounts described below (e.g. 0.3*TBIT) are relative to a recovered clock as measured with a Clock Recovery Unit (see Section 4.2.1.2).

Note: This test method injects two jitter components (C_JITTER, D_JITTER) simultaneously into the TMDS signals. The test uses two different jitter injection techniques and in both cases, the C_JITTER component is added to the TMDS_CLOCK signal. The D_JITTER component




however, is either added to the TMDS_DATA signals or to the TMDS_CLOCK signal. For each of these cases, there are two combinations of jitter frequency.

It is required that the test be performed with D_JITTER added to the TMDS_CLOCK signal. In addition, it is optional to additionally test with the D_JITTER component instead added to the TMDS_DATA lines. This optional sequence will result in better test coverage.

The following is performed for each of the following pixel clock rates supported by the Sink: 27MHz, 74.25MHz, 148.5MHz, 222.75MHz, 297MHz. Optionally, if not already tested and if supported by the test equipment, the highest-supported rate may be tested (CDF field Sink_Max_TMDS_Clock).

For each tested TMDS clock rate:

Operate the Sink DUT to support the HDMI input signal.

Configure the TMDS Signal Generator as follows:

• Output any Sink-supported video format that uses the TMDS clock rate being tested.

- Set the common mode (average) output voltage of each TMDS signal to 3.1V

- Set the single-ended swing of each TMDS signal to 0.4Vp-p

• For each of the following test cases…

Required: D_JITTER = 500kHz (on TMDS_CLOCK), C_JITTER = 10MHz

Required: D_JITTER = 1MHz (on TMDS_CLOCK), C_JITTER = 7MHz

Optional: D_JITTER = 500kHz (on TMDS_DATA), C_JITTER = 10MHz

Optional: D_JITTER = 1MHz (on TMDS_DATA), C_JITTER = 7MHz

• …do the following:

[Make TP1 worst condition]

• Set slew rate of the six + and – TMDS_DATA signals to TP1 mask using six TTCs as specified in table below.

• Set C_JITTER component to 0.25*TBIT at TP1

• Set D_JITTER component 0.3*TBIT at TP1

If Sink DUT has a receptacle other than Type E, connect TMDS Signal Generator to Sink DUT using the 1st Cable Emulator specified for the tested TMDS clock rate, according to the following table. Else, connect TMDS Signal Generator to Sink DUT using the Automotive Cable Emulator specified for the tested TMDS clock rate, according to the following table.

• Set C_JITTER component such that there is 0.3*TBIT of jitter at TP2.




Typical (MHz)

Low (MHz)

High (MHz)

TTC (MHz) 1 1st Cable Emulator 2nd Cable Emulator

27 >= 25 <=27.1 74.25 Type 1 Cat1+Cat2 (Agilent) 2 Type 2 27MHz (JAE) 74.25 >= 27.1 <=74.25 74.25 Type 1 Cat1 (Agilent) Type 2 75MHz (JAE) 148.5 >74.25 <=165 148.5 Type 1 Cat2 (Agilent) Type 3 (Agilent)

222.75 >165 <=222.75 222.75 Type 1 Cat2 (Agilent) Type 3 (Agilent) 340 >222.75 <=340 340 Type 1 Cat2 (Agilent) Type 3 (Agilent)

Typical (MHz)

Low (MHz)

High (MHz)

TTC (MHz) 1 Automotive Cable Emulator

27 >= 25 <=27.1 74.25 Type 1 Automotive1+Automotive2 (Agilent) 2 74.25 >= 27.1 <=74.25 74.25 Type 1 Automotive1 (Agilent)

Note 1: TTC values correspond to the slew rate of the leading edges of the TP1 eye diagram (shown in the HDMI specification) for the indicated TMDS_CLOCK frequency.

Note 2: The two Type 1 cable emulators are combined for a single test, resulting in higher ISI than provided by the Cat1 ISI emulator alone.

[Verify that DUT supports the signal]

• Scan through a range of TMDS_CLOCK to TMDS_DATA skew conditions: Test skew points at least every 0.1TBIT: e.g. 0.0TBIT, 0.1TBIT…1.0TBIT. If Sink fails to adequately support signal at any point, then FAIL

Repeat for next test case (D_JITTER/C_JITTER frequencies and location of D_JITTER)

Remove the 1st cable emulator(s) and replace with the 2nd cable emulator (according to the entry in table above) and repeat test cases at the same test frequency.

Repeat for next test frequency, using each of the cable emulators specified for the test frequency in the table above.




Recommended Test Setup - Tektronix Up to 75MHz only

This setup cannot be used for the optional case of injecting D_JITTER on the TMDS_DATA lines.

Setup 43. Test ID 8-7: TMDS – Jitter Tolerance: Tektronix 75MHz

No. Description Recommended TE Reference Qty. 1 TMDS Signal Generator Tektronix DTG5274 or


2 Arbitrary Waveform Generator Tektronix AWG710 4.2.1.9 1 3 DC Power Supply <See reference> 4.2.1.15 1 4 SMA Cables and adapters <See reference> 4.2.1.7 as needed5 Bias-Tees Mini-Circuits ZFBT-

4R2GW 4.2.1.9 2

6 Cable Emulator <See reference> 4.2.1.17 1 7 TPA-R-SMA Tektronix TPA-R-TDR or

EFF-HDMI-TPA-R with EFF-E-EDID-TPA or EFF-HDMIC-TPA-R with EFF-E-EDID-TPA

4.2.1.1.7 1

8 Transition Time Converter (TTC) <see reference> 4.2.1.18 <see reference>

The following must be performed for each TMDS clock rate supported by the Sink. A particular rate does not need to be tested if another rate within +/-10% of that rate has already been tested.

1) Operate the Sink DUT to support the HDMI input signal.

2) Connect the test equipment and DUT:




• Connect the DTG, AWG, Bias-Tees, TTC and TPA-R- as follows and as shown in Setup 43 above:

- AWG Marker 1+ output to DTG Ext.Clock input

- AWG Marker 2+ output to DTG Trigger In

- AWG Ch. 1+ output to Bias-Tee #1 signal input (RF)

Bias-Tee #1 signal output to TMDS_CLOCK+ (RF & DC)

DTG DC_OUT (1) to Bias-Tee #1 DC-level input (DC)

- AWG Ch. 1– output to Bias-Tee #2 signal input (RF)

Bias-Tee #2 signal output to TMDS_CLOCK- (RF & DC)

DTG DC_OUT (2) to Bias-Tee #2 DC-level input (DC)

- DTG Module A, Channel 1+, 1–: No connect

- DTG Module A, Channel 2+, 2–: No connect

- DTG Module B, Channel 1+, 1–: connect to TMDS_DATA0+,–

- DTG Module B, Channel 2+, 2–: connect to TMDS_DATA1+,–

- DTG Module C, Channel 1+, 1–: connect to TMDS_DATA2+,–

- DTG Module C, Channel 2+, 2–: No connect

• Configure AWG as follows: Under “Vertical” menu, set the following:

- Filter-through

- Amplitude = 0.4Vp-p

- Offset = 0V

- Marker 1 = 0.00V to 1.00V

- Marker 2 = 0.00V to 2.00V

3) Set the voltage of the DTG’s DC_OUT (connected to the “DC” input of all Bias-Tees) to 3.1V.

4) Connect TPA-R to Sink DUT using a Cable Emulator and TTC module specified for tested TMDS clock rate.


6) Configure the DTG as follows:

6.1) Output any Sink-supported video format that uses the TMDS clock rate being tested.

6.2) Video data pattern: repeating RGB gray ramp (Ex. 0, 1, 2…254, 255, 0, 1, 2…) during each active video period.

6.3) Set the voltage of the DTG’s DC_OUT to 3.1V

6.4) Make the TTC output signal (without the Cable Emulator) matches to the TP1 worst signal including the jitter value (0.3*TBIT) and the slew rate.

6.5) Connect the adequate cable emulator after the TTC.

Perform the Required Test Method with this setup.




Recommended Test Setup – Tektronix All Frequencies

This setup cannot be used for the optional case of injecting D_JITTER on the TMDS_DATA lines.

Setup 44. Test ID 8-7: TMDS – Jitter Tolerance: Tektronix All Frequencies

No. Description Recommended TE Reference Qty. 1 TMDS Signal Generator Tektronix DTG5274 or

Tektronix DTG5334 including DTGM32

4.2.1.9 1

2 Jitter Source Tektronix AWG7102 or Tektronix AFG3102 or Tektronix AWG710/B

4.2.1.9 1

3 DC Power Supply <See reference> 4.2.1.15 1 4 SMA Cables and adapters, as

needed <See reference> 4.2.1.7 --

5 Cable Emulator <See reference> 4.2.1.17 1 6 TPA-P-SMA EFF-HDMI-TPA-P with

EFF-E-EDID-TPA or EFF-HDMIC-TPA-P with EFF-E-EDID-TPA

4.2.1.1.7 1

7 Transition Time Converter (TTC) <see reference> 4.2.1.18 <see reference>

Note that all jitter amounts described below (e.g. 0.3*TBIT) are relative to a recovered clock as measured with a Clock Recovery Unit (see Section 4.2.1.2).





2) Connect and configure the DTG, AFG (or AWG), TTCs, and EFF-HDMI-TPA-R / EFF-HDMIC-TPA-R as follows and as shown above in setup 44

• Place M32 module in D slot of DTG.

• For AWG based setup

- AWG Ch. 1+ output to 50ohm 20dB Attenuator input

- DTG Module D, Jitter Control In A: 50ohm 20dB Attenuator output

- DTG Module D, Jitter Control In B: No connect

- AWG Ch. 1– output : No connect

- Configure AWG as follows: Under “Vertical” menu, set the following

Filter-through

Amplitude = 1.0Vp-p

Offset = 0V

Marker 1 = 0.00V to 1.00V

Marker 2 = 0.00V to 2.00V

• For AFG based setup

- AFG Ch.1 output to 50ohm 20dB Attenuator #1 input

- DTG Module D, Jitter Control In A: 50ohm 20dB Attenuator #1 output

- AFG Ch.2 output to 50ohm 20dB Attenuator #2 input

- DTG Module D, Jitter Control In B: 50ohm 20dB Attenuator #2 output

- Configure AFG as follows

DTG Module A, Channel 1+, 1–: No connect

DTG Module A, Channel 2+, 2–: No connect

DTG Module B, Channel 1+, 1–: connect to TMDS_DATA0+,–

DTG Module B, Channel 2+, 2–: connect to TMDS_DATA1+,–

DTG Module C, Channel 1+, 1–: connect to TMDS_DATA2+,–

DTG Module C, Channel 2+, 2–: No connect

DTG Module D, Channel 1+, 1–: connect to TMDS_CLOCK+,–

3) Connect TPA-R to Sink DUT using a Cable Emulator and TTC specified for tested TMDS clock rate.


5) Configure the DTG as follows:

5.1) Output any Sink-supported video format that uses the TMDS clock rate being tested.

5.2) Video data pattern: repeating RGB gray ramp (Ex. 0, 1, 2…254, 255, 0, 1, 2…) during each active video period.

5.3) Set the signal outputs to 3.1V average, 0.4Vp-p.





Recommended Test Setup - Agilent All Frequencies

Setup 45. Test ID 8-7: TMDS – Jitter Tolerance - Agilent

No. Description Recommended TE Reference Qty.1 TMDS Signal Generator Agilent E4887A 4.2.1.9 1 2 Jitter Clock Source Agilent E4438C Signal

Generators 4.2.1.9 2

3 DC Power Supply <See reference> 4.2.1.15 2 4 SMA Cable Agilent N4871A 4.2.1.7 8 5 Bias-Tees <See reference> 4.2.1.9 8 6 Cable Emulator Agilent E4887A-10x 4.2.1.17 1 7 TPA-P Test Assembly Agilent N1080A H01 4.2.1.1.6 1 8 TPA-R Test Assembly Agilent N1080A H02 4.2.1.1.7 1 9 TPA-Control Agilent N1080A H03 4.2.1.1.6 1 10 Transition Time Converters <See reference> 4.2.1.18 8

1) Operate the Sink DUT to support the HDMI input signal.





• For the Agilent E4887A, use Bias-Tees on each ParBERT output and connect E4887A as follows:






- Connect the RF output of the two Jitter Clock Sources (E4438Cs) to the two clock modules of the E4887A ParBERT

- Connect Bias-Tees to each E4887A output for each of the TMDS_DATA and TMDS_CLOCK signals (total of 8).

- Connect appropriate Transition Time Converters to each signal (see reference). As far the TMDS_CLOCK outputs, “60psec” TTC should be added.

3) Set the voltage of the power supply (connected to the “DC” input of all Bias-Tees) to 2.9V. [Vicm=3.1V]

4) Connect TPA-R to Sink DUT using a Cable Emulator specified for tested TMDS clock rate

5) Connect and configure DC Power Supply to drive +5V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) through TPA-Control.





Recommended Test Setup – Tektronix Direct Synthesis, All Frequencies and all Cable Emulator Effects

In this Test Setup, all combinations of Cable Emulator in Required Test Method are included in AWG7102 TMDS Signal Generator.

Setup 46. Test ID 8-7: TMDS – Jitter Tolerance: Tektronix Direct Synthesis

Test Setup: Tektronix Direct Synthesis setup using GPIB-HS Connection/NI-GPIB-USB Connection/GPIB-ENET Connectiom. The above DS setup illustrates the connection using either GPIB connection or GPIB-ENET connection.




Note: No Hardware Cable Emulators nor TTC filters are required for each resolution as the Direct Synthesis setup emulates these elements in the software.

Determine the required TPA-P and TPA-R

• If the test is for Type A then

- Use EFF-HDMI-TPA-P as TPA-P

- Use EFF-HDMI-TPA-R as TPA-R

• Else, if the test is for Type E then

- Use TF-HDMIE-TPA-P as TPA-P

- Use TF-HDMIE-TPA-R as TPA-R

The following must be performed for each TMDS clock rate supported by the Sink.

1) Ensure that the Sink DUT port on which you perform the test is selected.

2) Connect the test equipment and DUT.

3) Connect the two AWGs, Bias-Tees, AFG, DPO/DSA70804, and TPA-P as follows and as shown in the setup diagram. One AWG is used as the MASTER and the other AWG is used as the SLAVE (called AWG1 and AWG2 respectively).

• AWG1 Marker1+ output to oscilloscope Ch3 input with SMA cable and TCA-292MM adapter(an accessory of DPO/DSA70804).


1 TMDS Signal Generator Tektronix AWG7102 w opt 01 and 06 or AWG7122B w opt 01,06 & 08 or superior series AWG7000 series

4.2.1.9 2

2 Arbitrary Function Generator Tektronix AFG3102 or superior AFG 3K series.

4.2.1.9 1

3 Digital Oscilloscope Tektronix DPO/DSA70000 series with BW >/= 8GHz

4.2.1.3 1

4 TDSHT3 Software Tektronix HDMI Compliance Test Software with Direct Synthesis capability version 5.0 or equivalent

4.2.1.9 1

5 DC Power Supply < See Reference> 4.2.1.15 1 6 SMA/BNC Cables and adapters < See Reference> 4.2.1.7 As

needed7 Bias -Tees Mini-Circuits ZX85-12G-S+ 4.2.1.14 8 8 HDMI Test Fixture set Tektronix ET-HDMI-TPA-S/TF-

HDMIE-TPA-KIT 4.2.1.1.7 1 set

9 120PS filters Picosecond Pulse Labs 5915-100-120PS

4.2.1.18 8

10 Differential Probes Tektronix P7313SMA probes for Jitter Calibration procedure

4.2.1.5 2




• AWG2 Marker1+ output to oscilloscope Ch4 input with SMA cable and TCA-292MM adapter(an accessory of DPO/DSA70804)


- 120 PS TTC filter output to Bias-Tee #1 signal input (RF) - Bias-Tee #1 signal output (RF and DC) to TMDS_CLOCK+



- Bias-Tee #2 signal output (RF and DC) output to TMDS_CLOCK–























• AFG3102 Ch1 using BNC-T adapter to trigger input of AWG1 and AWG2 with BNC cables

4) Connect TPA-P to Sink DUT.

5) Connect and configure the DC Power Supply to drive +5 V between +5 V Power (P_5V) and DDC/CEC Ground (P_GND) on the TPA-P.

6) Configure the setup as follows:




• Run the TDSHT3 software (with the Direct Synthesis capability version 5.0) on the digital oscilloscope.

• Select the DDS method in the configuration panel of the Sink Jitter Tolerance Test.

• Select the resolution of the DUT to be tested.( 27MHz, 74.25MHz, 148MHz, 222.25MHz,27MHz Type E and 74.25MHz Type E) and the relevant pattern for 60Hz/50Hz refresh rate.

• Select the cable emulator ( 1st Cable emulator , 2nd Cable Emulator or Both) to be used for the test (Direct Synthesis method emulates the TTC filters and cable emulators).

• In the Signal Source dialog box, check the GPIB connection of the two AWGs and the AFG to ensure proper connection.

• Run the Sink Jitter Tolerance test.

• If Jitter Calibration is enabled then….

- Connect the TPA-R Clock signal to #1 Tektronix P7313SMA probe connected t the Ch1 and TPA-R Data 0 signal to #2 Tektronix P7313SMA probe connected to the Ch2 of the Tektronix Oscilloscope DPO/DSA70000 series ( Bandwidth greater/equal to 8GHz)

- Remove TPA-P from Sink DUT and then connect it to TPA-R.

- The TDSHT3 software performs closed loop calibration of the jitter at TP1 and TP2 as per CTS .

- Once the Jitter calibration is completed the software prompts the user to connect the signals back to the Sink DUT using the TPA-P boards.

• The TDSHT3 software will also change the skew in 0.1 TBit steps automatically, for example, 0.0TBIT, 0.1TBIT, ... 1.0TBIT. In each step, you will be prompted to confirm if the DUT adequately supports the signal.

• Once the test completes, you can view the result.

Note: The setup drawings above show the testing configuration for the output measurement steps. For the Jitter calibration steps, use a TPA-P to connect the Clock and D0 signals to the oscilloscope with 2 # Tektronix P7313SMA probes, connected directly to the “input” TPA-R from the TMDS Signal Generator.

Test ID 8-8: TMDS – Differential Impedance

Reference Requirement [HDMI: Table 4-28] HDMI Sink Impedance at TP2

Through-connection impedance : 100Ω ± 15%* * A single excursion is permitted out to a max/min of 100 ohms ±25% and of a duration less than 250psecs. At Termination impedance (when Vicm is within Vicm1 range) 100 ohms ±10%

Test Objective

Confirm that the TMDS input impedance of the Sink DUT is within the specified limits.





Turn off the power to the Sink DUT.

Connect the TDR oscilloscope to cables and TPA board but do not connect TPA to the Sink DUT.

Setup the TDR oscilloscope

• Normalize each scope channel at the open end of the Test Line, and set an effective rise time of as close to 200ps as possible without exceeding 200ps.

[Determine the measurement distance to DUT input connector]

• Measure the impedance value along the tested signal path. Note point where impedance hits sharp rise toward high impedance (>200Ω). This is the distance to the Sink DUT connector.

Connect the TPA-P fixture to the Sink DUT HDMI input connector.

For each of the TMDS clock and data differential pairs:

• If CDF field Sink_Diff_PowerOn is Y:

- Measure the impedance value along the tested signal path, from the Sink DUT HDMI input connector to the input pins of the HDMI receiver, ZDIFF_THROUGH. This is indicated in CDF field Sink_Term_Distance.

- If (ZDIFF_LOW < 75Ω) OR (ZDIFF_HI > 125Ω) then FAIL.

- If (ZDIFF_LOW < 85Ω) OR (ZDIFF_HI > 115Ω) then

If the duration of violation is 250psec or longer or there is more than one excursion then FAIL

• Else, if CDF field Sink_Diff_PowerOn is N, perform the following:

- Measure the impedance value (ZDIFF_THROUGH) along the signal path, from the HDMI input connector until just before the termination impedance (where the impedance stabilizes).

- If (ZDIFF_LOW < 75Ω) OR (ZDIFF_HI > 125Ω) then FAIL.

- If (ZDIFF_LOW < 85Ω) OR (ZDIFF_HI > 115Ω) then

If the duration of violation is 250psec or longer or there is more than one excursion then FAIL

- Measure the impedance value (ZDIFF_TERM) of the termination impedance (where the impedance stabilizes).

- If (ZDIFF_LO < 85Ω) OR (ZDIFF_HI > 115Ω) then FAIL.

Repeat this measurement for each of the TMDS differential pairs.

If CDF field Sink_Diff_PowerOn is Y, note that TDR usage under power-on conditions can lead to damage to the TDR oscilloscope. Consequently, the ATC may skip power on testing.




Recommended Test Method Test ID 8-8: TMDS – Differential Impedance

Setup 47. Test ID 8-8: TMDS – Differential Impedance

No. Description Recommended TE Reference Qty. 1 TDR/TDT Oscilloscope Tektronix TDS8200B 4.2.1.11 1 2 DC Power Supply <See reference> 4.2.1.15 1 3 50Ω SMA Terminators <See reference> 4.2.1.8 6 4 SMA cables <See reference> 4.2.1.7 2 5 TPA-P-TDR Fixture EFF-HDMI-TPA-P or EFF-

HDMIC-TPA-P 4.2.1.1.6 1

Note that the following should be performed in accordance with the instructions found in “Tektronix HDMI Sink Instruments Differential Measurement Procedures Guide”, available from Tektronix.

1) Turn off the power to the Sink DUT.

2) Connect the TPA-P-TDR fixture to the Sink DUT HDMI input connector. Note that SMA cables which can support a very fast rise time should be used.

3) Terminate all non-tested TMDS differential pairs with 50Ω terminators.

3) Adjust the skew between the two measurement channels to less than 5ps, following the manufacturer’s instruction (Refer to the section labeled “Calibration” in the Procedures Guide).

4) Set an effective rise time of as close to 200ps as possible without exceeding 200ps by using the digital filter of the TDR (Refer to the section labeled “Setting the Rise Time” in the Procedures Guide).

5) Set vertical scale to 5Ω/division, and horizontal scale to 100ps/division.

Perform the steps in the Required Test Method. (Refer to the section labeled “Measuring the Impedance” in the Procedures Guide).




Test ID 8-9: DDC/CEC Line Capacitance and Voltage


[HDMI: 4.2.8] DDC

“The Display Data Channel (DDC) I/Os and wires … shall meet the requirements specified in the I2C-bus Specification, version 2.1, Section 15 for ‘Standard Mode’ devices.”

[HDMI: Table 4-35] Maximum Capacitance of DDC line




Maximum (CEC line) capacitance load of a Sink or of a CEC root device: 200pF.

Test Objective

Confirm that the capacitance load on the DDC and CEC lines does not exceed the limit in the specification.


NOTE for Repeater DUTs: This test only needs to be performed once per connector. If test has already been performed on this port, then SKIP.






3) Verify that the test equipment, including fixtures, is disconnected from the DUT.

4) Drive +5.0V between +5V Power signal and DDC/CEC Ground signal on the TPA.

5) Connect the DDC/CEC Ground signal to the frame ground of the TPA.

6) Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1.

7) Attach the test equipment to the DUT and measure the capacitance of the SDA line. This is the total capacitance, C2.

8) DUT capacitance, CDUT = C2 – C1.

9) If CDUT > 50pF, then FAIL.

10) Repeat the C1 and C2 measurements and the CDUT calculation for the SCL pin.

11) If CDUT > 50pF, then FAIL.








13) Disconnect the TPA from the DUT.

14) Perform the C1 measurement for the CEC pin on the TPA.

15) Turn off power to the DUT.

16) If DUT is being tested as a Repeater under Test ID 9-3, disconnect all test Sink(s) (HDMI Monitor and Speaker).

17) Repeat the C2 measurement and the CDUT calculation for the CEC pin (CDUT_ OFF ).


19) Repeat the C2 measurement and the CDUT calculation for the CEC pin (CDUT_ ON).

20) If DUT has no output ports (CDF field HDMI_output_count == 0) or if DUT is CEC root device (CDF field CEC_root_device = “Y”) then:

21) If CDUT_ON > 200pF, then FAIL.

22) If CDUT_OFF > 200pF, then FAIL.

Else (DUT is a Repeater but not a CEC root device)

23) If CDUT_ON > 150pF, then FAIL.

24) If CDUT_OFF > 150pF, then FAIL.

25) Disconnect the LCR meter from the TPA.

26) Drive +5.0V between +5V Power signal and DDC/CEC Ground signal on the TPA.


28) Attach the oscilloscope to the DUT and measure the voltage (VSCL) of the SCL line when not being driven low.

29) If VSCL < 4.5V or VSCL > 5.5V then FAIL

30) Measure the voltage (VCEC) of the CEC line when not being driven low.

31) If VCEC > 0.6V and (VCEC < 2.5V or VCEC > 3.6V) then FAIL

32) If DUT is being tested as a Repeater, reconnect test Sink(s) before proceeding.





Setup 48. Test ID 8-9: DDC/CEC Line Capacitance and Voltage

No. Description Recommended TE Reference Qty. 1 Digital LCR Meter HIOKI 3522-50 4.2.1.16 1 2 LCR Meter Probe HIOKI 9143 4.2.1.16 1 3 LCR DC-Bias Unit HIOKI 9268-01 4.2.1.16 1 4 Digital Multi-Meter <See reference> 4.2.1.13 1 5 DC Power Supply 3.3V <See reference> 4.2.1.15 1 6 TPA-P Any unterminated TPA giving


4.2.1.1 TPA-P

7 General Oscilloscope <Any> 4.2.3.4 1

Perform the steps in the Required Test Method using the Test Equipment listed above. In all capacitance measurements, connect the Hioki DC-Bias Unit in an inverted configuration:

• Supply the DC bias voltage in the direction opposite from a typical configuration.

• As shown in setup above, probe polarity should also be connected in an inverted direction.(i.e. GND line is connected to H port of the probe, and Signal line to L port.) Note that, for accurate measurement, the earth line (3rd pin) of the AC plug should be disconnected for both the HIOKI-3522-50 and DC-power supply.




Test ID 8-10: HPD Output Voltage



The high voltage level must be within 2.4V to 5.3V. The low voltage level must be within 0.0V to 0.4V.

Test Objective

Confirm that the Hot Plug Detect signal returned from the Sink conforms to the specified voltage levels, and that it is not asserted when the +5V Power signal is not asserted.


Note: Use 0.1 Volt resolution for the comparison (i.e. 0.0 means 2 significant digits).

1) Connect TPA to HDMI input connector of Sink DUT.

2) Connect DC power supply to +5V pin on TPA.

[Verify that HPD is FALSE when +5V Power Signal is 0V]

3) Set the +5V Power pin to 0.0V

4) Put the Sink DUT in a power-on and active condition

5) Measure voltage on the HPD pin of TPA (VHPD_L1),

6) If (VHPD_L1 < 0.0V OR VHPD_L1 > 0.4V) then FAIL.

7) If a standby mode is available on the DUT, then:

8) Put the Sink DUT in standby

9) Measure voltage on the HPD pin of TPA-P-TDR (VHPD_L2),


11) Put the Sink DUT in power off condition

12) Measure voltage on the HPD pin of TPA-P-TDR (VHPD_L2),


[Verify that HPD TRUE is in proper voltage range]

14) If CDF field Sink_HPD_True does not equal “None”, perform any actions specified in CDF field Sink_HPD_True.

15) For +5V Power voltages of 4.8V and 5.3V, perform the following:

16) Measure voltage on the HPD pin of TPA (VHPD_H)

17) If (VHPD_H < 2.4V OR VHPD_H > 5.3V) then FAIL




Recommended Test Method Test ID 8-10: HPD Output Voltage

Setup 49. Test ID 8-10: HPD Output Voltage

No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.15 1 3 TPA-P Any unterminated TPA giving


4.2.1.1 1

Perform the steps in the Required Test Method using the Test Equipment shown above.

Note: Use 0.1 Volt resolution for all voltage comparisons. (i.e. 0.0 means 2 significant digits)

Test ID 8-11: HPD Output Resistance

Reference Requirement [HDMI: Table 4-38] Required Output Characteristics of Hot Plug Detect Signal

The output resistance of the HPD pin must be 1000Ω ±20%.

Test Objective

Confirm that the HPD pin on the Sink DUT presents the proper impedance to the source device.





Connect TPA-P to Sink DUT.

Drive +5.0V between +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P.

If CDF field Sink_HPD_True does not equal “None”, perform any actions specified in CDF field Sink_HPD_True.

Measure the voltage of the HPD pin on the TPA-P (VA).

Connect a 10kΩ resistor between HPD pin and DDC/CEC Ground.

Measure the HPD pin voltage (VB).

Calculate output resistance on HPD pin as:

• ZHPD = (VA/VB – 1) * 10,000

If (ZHPD < 800Ω) OR (ZHPD > 1200Ω) then FAIL

Recommended Test Method Test ID 8-11: HPD Output Resistance

Setup 50. Test ID 8-11: HPD Output Resistance

No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 3 DC Power Supply <See reference> 4.2.1.15 1 3 10kΩ resistor <any> 4 TPA-P Any unterminated TPA giving

access to DDC & CEC signals4.2.1.1 1

1) Connect TPA-P to Sink DUT.

2) Connect DC Power Supply between +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P.




3) Set DC Power Supply to output +5.0V.

4) If CDF field Sink_HPD_True does not equal “None”, perform any actions specified in CDF field Sink_HPD_True.

5) Measure the voltage of the HPD pin on the TPA-P (VA).

6) Connect a 10kΩ resistor between HPD (HOT_PLUG) pin and DDC/CEC Ground (P_GND).

7) Measure the HPD pin voltage (VB).

8) Calculate output resistance on HPD pin as:

• ZHPD = (VA/VB – 1) * 10,000

9) If (ZHPD < 800Ω) OR (ZHPD > 1200Ω) then FAIL

Test ID 8-12: +5V Power Max Current

Reference Requirement [HDMI: 4.2.7] +5V Power Signal

“A Sink shall not draw more than 50mA of current from the +5V Power pin. When the Sink is powered on, it can draw no more than 10mA of current from the +5V Power signal.”

Test Objective

Confirm that the Sink DUT does not consume more power than allowed when in either the ON or OFF state, from the +5V Power pin.



For the three cases, Sink DUT powered ON, Sink DUT powered OFF, and Sink DUT disconnected from AC power source, do the following:

Set current limit of power supply to 65mA

For the two voltages at the +5V pin of 4.9V and 5.1V, do the following:

• Measure the current drawn through the +5V Power pin by the Sink, ISINK

• If (Sink DUT is in power on state) AND (ISINK ≥ 10mA) then FAIL.

• If (Sink DUT is in power off state or disconnected from AC) AND (ISINK ≥ 50mA) then FAIL.




Recommended Test Method Test ID 8-12: +5V Power Max Current

Setup 51. Test ID 8-12: +5V Power Max Current

No. Description Recommended TE Reference Qty. 1 DC Source/Meter and Probe ADVANTEST R6240A 4.2.1.12 1 2 TPA-P Any unterminated TPA giving

access to control signals 4.2.1.1 1

1) Connect TPA-P-TDR to HDMI input connector of Sink DUT.

2) For the three cases, Sink DUT powered ON, Sink DUT powered OFF, and Sink DUT disconnected from AC power source, do the following:

3) Set current limit of power supply to 65mA

4) For the two voltages at the +5V pin of 4.9V and 5.1V, do the following:

5) Measure the current drawn through the +5V Power pin by the Sink, ISINK

6) If (Sink DUT is in power on state) AND (ISINK ≥ 10mA) then FAIL.

7) If (Sink DUT is in power off state or disconnected from AC) AND (ISINK ≥ 50mA) then FAIL.




Test ID 8-13: CEC Line Connectivity


[HDMI: Table 4-40] CEC Line Electrical Specifications for all Configurations - Line Connectivity


Test Objective

Ensure that CEC lines on all inputs and outputs are connected as specified in following description:

CEC lines from all HDMI inputs (if present) and a single HDMI output (if present) shall be interconnected.

Except :

- A device which has no HDMI output is allowed to have separate CEC lines for each HDMI connector if that device takes a logical address of 0 on each CEC line.

- A device that is acting as the CEC root device shall not connect the CEC line to any HDMI output.


NOTE: This test only needs to be performed once per product, not once per connector as with all of the other tests in this document. If test has already been performed on product, then SKIP.

[Verify correct CDF fields: Independent CEC may be set only if DUT has no HDMI output and only if DUT is performing CEC operations at logical address 0]



• If CDF field CEC_protocol <> “Y” then FAIL


Turn DUT off

For every combination of two HDMI input connectors on the DUT:

• Measure the resistance between the CEC pins of the two connectors.

• If any resistance measurement > 5Ω then:

- If CDF field Independent_CEC = “N” then FAIL

- If resistance < 48kΩ then FAIL



• Measure the resistance between the CEC pin of that output connector and the CEC pin of every other output connector

• If resistance is less than 1MΩ then FAIL




[Verify that DUT has CEC connected to only 1 output]


• Measure the resistance between the CEC pin of that output connector and the CEC pin of each input connector.

• If resistance is between 5Ω and 1MΩ then FAIL

• If resistance is less than 5Ω then note the output connection ID.

If more than one output connection ID noted then FAIL

If no output connection ID noted,

• If CDF field CEC_root_device = “N” then FAIL

If one output connection ID noted,

• If CDF field CEC_root_device = “Y” then FAIL


No. Description Recommended TE Reference Qty. 1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 TPA-P Any unterminated TPA

giving access to DDC & CEC signals

4.2.1.1 2

NOTE: This test only needs to be performed once per product, not once per connector as with all of the other tests in this document. If test has already been performed on product then SKIP.

[Verify correct CDF fields]

1) If CDF field Independent_CEC = “Y” then:

2) If CDF field HDMI_output_count > 0 then FAIL

3) If CDF field CEC_protocol <> “Y” then FAIL


4) Turn DUT off

5) Set Digital Multi-Meter to measure resistance using auto scale mode.

6) Connect one probe of the meter to the CEC pin on the first TPA-P

7) Connect the other probe of the meter to the CEC pin on the second TPA-P

8) For every combination of two HDMI input connectors on the DUT

9) Connect first TPA-P to first selected HDMI connector

10) Connect second TPA-P to second selected HDMI connector


12) If reading is greater than 5Ω then:




13) If CDF field Independent_CEC = “N” then FAIL

14) If resistance < 48kΩ then FAIL




17) For every other HDMI output connector (on which the resistance with selected HDMI output connecor has not been measured):

18) Connect second TPA-P to selected HDMI output connector


20) If resistance is less than 1MΩ then FAIL



[Verify that DUT has CEC connected to at most 1 output]

23) For every HDMI output connector:


25) For every HDMI input connector:

26) Connect second TPA-P to selected HDMI input connector


28) If resistance is between 5Ω and 1MΩ then FAIL

29) If resistance is less than 5Ω then note the output connection ID.

30) Continue to next input connector


32) If more than one output connection ID noted then FAIL, “CEC line connected to > 1 output”

33) If no output connection ID noted,

34) If CDF field CEC_root_device = “N” then FAIL, “CEC line not connected to any output”

35) If one output connection ID noted,

36) If CDF field CEC_root_device = “Y” then FAIL, “CEC line is connected to one output”




Test ID 8-14: CEC Line Degradation



A device with power removed (from the CEC circuitry) shall not degrade communication between other CEC devices (e.g. the line shall not be pulled down by the powered off device).

Maximum CEC line leakage current must be ≤1.8μA

Test Objective

Ensure that the DUT does not degrade communication between other CEC devices when power is applied, when power is removed and, if supported, in standby mode (the line must not be pulled down by the powered off device).



If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Source(s) and Sink(s).


Remove power (mains) from DUT

Disconnect CEC line from both resistors going to DDC/CEC Ground and 3.3V

Connect CEC line to 3.63V via 27kΩ ±5% resistor with ammeter in series

Measure the CEC line leakage current. If current > 1.8μA then → FAIL

If CDF field CEC_protocol is N, do the following. Else if the DUT is being tested as a Repeater under Test ID 9-1 and has additional output ports other than indicated in CDF field Repeater_CEC_Output, then, do the following on all ports that are not indicated in CDF field Repeater_CEC_Output.

• Connect the CEC line on DUT to DDC/CEC Ground via a 1MΩ ±5% resistor

• Power on DUT

[Measure voltage when “disconnected”]

- Measure CEC line voltage on DUT and record as VCEC1.

- If VCEC1 is in the range 0V to 0.1V [no connect] or is in the range > 2.88V to 3.63V then continue else then FAIL

• Disconnect the CEC line from DDC/CEC Ground

[Measure voltage when “pulled-up externally”]

• Connect the CEC line to 3.3V via a 27kΩ ±5% resistor

- Measure CEC line voltage.




- If voltage not 3.3V ±10% then → FAIL

[Measure voltage when “pulled-down externally”]

• Connect the CEC line on the DUT to DDC/CEC Ground via 1kΩ ±5% load resistor (as well as the previously connected 3.3V via 27kΩ±5%)

- Measure CEC line voltage on the DUT output connector and record as VCEC2

- If VCEC1 is in the range 0V to 0.1V and VCEC2 is not in the range 0.12V ±12% then → FAIL

- If VCEC1 is in the range 2.88V to 3.63V and VCEC2 is not in the range 0.196V to 0.274V then → FAIL

• Repeat tests with DUT in power off state

• If standby power mode exists on DUT, repeat test in that state

If DUT is being tested as a Repeater, reconnect test Source(s)/Sink(s) before proceeding.


No. Description Recommended TE Reference Qty.1 Digital Multi-Meter <See reference> 4.2.1.13 1 2 DC Power Supply <See reference> 4.2.1.14 1 3 27kΩ±5% resistor <any> 1

4 1kΩ±5% Resistor <any> 1

5 1MΩ±5% Resistor <any> 1

6 TPA-P Any TPA giving access to CEC signals

4.2.1.1 1

TPA-CEC-R incorporates the resistances shown above and so may be used instead of other TPA-P and discrete resistors.


1) If DUT is being tested as a Repeater under Test ID 9-1, disconnect all test Sources and Sink(s).


2) Remove power (mains) from DUT

3) Disconnect CEC line from both resistors going to DDC/CEC Ground and 3.3V


5) Connect the CEC line on the TPA input connector to one end of 27kΩ resistor

6) Set Multi-Meter to current measurement and connect between free end of 27kΩ resistor and DC power supply.

7) From multi-meter, record leakage current. If measured current > 1.8μA then → FAIL




8) If CDF field CEC_protocol is N, do the following. Else if the DUT is being tested as a Repeater under Test ID 9-1 and has additional output ports other than indicated in CDF field Repeater_CEC_Output, then, do the following on all ports that are not indicated in CDF field Repeater_CEC_Output.

9) Connect TPA to DUT


11) Connect the CEC line to DDC/CEC Ground on the TPA-P via a 1MΩ ±5% resistor

12) Set Multi-Meter to voltage measurement and connect between CEC pin and DDC/CEC Ground on TPA

13) Power on DUT

14) Measure voltage with Multi-Meter, record as VCEC1

15) if (VCEC1 is in the range 0V to 0.1V) or (VCEC1 is in the range 2.88V to 3.63V) then continue else then FAIL

16) Disconnect the CEC line from DDC/CEC Ground

17) Connect the CEC line on TPA to DC Power Supply (3.3V) via the 27kΩ ±5% resistor

18) Measure voltage; if voltage is not 3.3V ±10% then → FAIL

19) Connect the CEC line on the TPA to DDC/CEC Ground on TPA via 1kΩ ±5% load resistor (as well as the previously connected 3.3V via 27kΩ)

20) Measure voltage, record as VCEC2

21) If VCEC1 in the range 0V to 0.1V and VCEC2 is not in the range 0.12V ±12% then → FAIL

22) If VCEC1 >= 2.88V and <= 3.63V and VCEC2 is not in the range 0.196V to 0.274V then → FAIL

23) Repeat tests with DUT in power off state

24) If standby power mode exists on DUT, repeat test in that state

25) If DUT is being tested as a Repeater, reconnect test Source(s)/Sink(s) before proceeding.




8.4 Sink – Protocol The Sink DUT must be turned on and configured to accept signals via the HDMI input. Some mechanism must be in place to determine if Sink DUT is adequately supporting the transmitted audio and video signals.

The conditions in the following tests will be generated by the TE to verify the Sink DUT’s support. The Sink must continually support the transmitted signal during the entire sequence of test conditions.

Test ID 8-15: Character Synchronization


[HDMI: 5.2.1.2] Character Synchronization

The Sink is required to establish synchronization with the data stream during any Control Period greater than or equal to tS,min (12) characters in length.

Test Objective

Verify that the Sink establishes synchronization with the data when it receives only minimum-length Control Periods.


Connect the Sink DUT to a TMDS Signal Generator

Begin with no TMDS clock.

TMDS Signal Generator starts transmission of valid 640x480p video frame with every horizontal and vertical blanking interval completely filled with one or more Data Islands and with all Control Periods either 12 or 13 characters in length. Note: 640x480p has 160 pixels in HBLANK low. Best arrangement is: 13+2+32+32+32+32+2+13 = 158 (plus two Video Guardband characters). There are 7200 pixels in VBLANK so multiple arrangements may be possible.

If Sink DUT does not support the transmitted signal then FAIL



Connect TMDS Signal Generator to all TMDS differential pairs.

Configure the TMDS Signal Generator to output above required test signal pattern but with outputs disabled.

Enable outputs.

If Sink adequately supports signal then PASS, else then FAIL




Test ID 8-16: Acceptance of All Valid Packet Types


[HDMI: 5.3] Data Island Packet Definitions

Sink shall support reception of any valid packet type.

Test Objective

Verify that Sink supports reception of all valid packet types.


Configure protocol generator to transmit 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”), 2 channel 48kHz audio HDMI signal with following characteristics:


- Null Packet (0x00)

- General Control Packet (0x03)

with Set_AVMUTE and Clear_AVMUTE clear (0).

- Vendor-specific InfoFrame Packet (0x81)

with a length of 3 and a 24-bit IEEE registration identifier belonging to the HDMI Licensing, LLC (0x000C03).

- AVI InfoFrame Packet (0x82)

- Source Product Description Packet (0x83)

- Audio InfoFrame Packet (0x84)

- MPEG Source InfoFrame Packet (0x85).

• If Sink DUT does not adequately support the signal then FAIL

• If CDF field Sink_Supports_AI is Y:

- Configure protocol generator to also transmit, during VBLANK, one or more Data Islands containing a valid

ACP Packet (0x04)

ISRC1 Packet (0x05)

ISRC2 Packet (0x06)

- If Sink DUT does not adequately support the signal then FAIL

• If CDF field Sink_xvYCC is Y:

- Configure protocol generator to also transmit valid xvYCC-encoded video and, during VBLANK, one or more Data Islands containing a valid

Gamut Metadata Packet (0x0A) with P0 transmission profile

- If Sink DUT does not adequately support the signal then FAIL






2) Connect A/V Protocol Generator to all TMDS differential pairs.

3) Configure the A/V Protocol Generator to output above required Test signal pattern..

4) If Sink adequately supports signal then PASS, else FAIL




8.5 Sink – Video

Test ID 8-17: Basic Format Support Requirements


[861-D: 7.2.2] Full 861-D Implementation

If a CEA-861-D video format is supported by the Sink, it shall be indicated in an SVD and optionally, by a DTD.

All 240 and 480 line 861-D formats described in DTD shall be listed as 59.94Hz.

All 720 and 1080 line 861-D formats described in DTD, near 59.94/60Hz shall be listed as 60Hz.

Test Objective

Verify that no CEA video format is declared only in a DTD.


Note that aspect ratios (AR) for DTDs are calculated using the horizontal and vertical size parameters in bytes 12, 13 and 14, as:

ar = Horizontal_Size / Vertical_Size

if 1.2667 < ar < 1.4 then AR = 4:3 [1.33 ± 5%]

else if 1.6889 < ar < 1.8667 then AR = 16:9 [1.78 ± 5%]

else, AR = unknown.

[If an CEA video format is supported by the Sink, it shall be indicated by an SVD and optionally, by a DTD.]

• For each DTD in EDID:

- Examine DTD for match with any CEA format. Such a DTD will have:

All fields in the DTD for horizontal and vertical active and total correspond to the values shown in CEA-861-D Table 4, for a specific format. Note that the vertical active value in the DTD will have half the value in Table 4 if the format is interlaced.

Pixel clock frequency in bytes 0 and 1 within ±1% of CEA-specified frequency for the format.

Aspect ratio (calculated as H/V) within ±5% of either 16:9 or 4:3.

- If DTD matches any CEA format, search SVDs for that same video format at same aspect ratio.

- If no matching SVD then FAIL




- If DTD resolution exactly matches one of the following 59.94/60Hz formats, and pixel clock is within ±1% of specified…

Format ID Resolution Pixel Clock 1 640x480p 25.175MHz [=0x09D6] 2 or 3 720x480p 27.00MHz [=0x0A8C] 14 or 15 1440x480p 54.00MHz [=0x1518] 6 or 7 1440x480i 27.00MHz 10 or 11 2880x480i 54.00MHz 8 or 9 1440x240p 27.00MHz 12 or 13 2880x240p 54.00MHz 4 1280x720p 74.25MHz [=0x1D01] 5 1920x1080i 74.25MHz 16 1920x1080p 148.5MHz [=0x3A02] 35 or 36 2880x480p 108.00MHz [=0x2A30]

- …then pixel clock frequency of DTD shall be exactly value shown above.

- If pixel clock frequency of DTD does not exactly match then FAIL


Note that the Recommended Test Equipment (Quantum Data 882CA) can be used to perform all EDID-checking tests simultaneously. This includes all tests in section 8.2 and several tests in 8.5, including this test.

1) If the EDID image has not yet been captured from the Sink:

2) Connect Sink DUT to Quantum Data 882CA and execute commands to perform HDMI EDID analysis.

3) If any errors are reported during EDID read then FAIL, “DDC read”.

4) Launch EDID Analysis tool and open the EDID image.

5) Execute EDID Analysis command “HDMI Analysis”.


7) Perform steps in Required Test Method against viewed EDID image

8) PASS/FAIL criteria defined above




Test ID 8-18: HDMI Format Support Requirements


[HDMI: 6.2.1] [Video] Format Support Requirements

“An HDMI Sink that accepts 60Hz video formats shall support the 640x480p @ 59.94/60Hz and 720x480p @ 59.94/60Hz video format timings.”

“An HDMI Sink that accepts 60Hz video formats, and that supports HDTV capability, shall support 1280x720p @ 59.94/60Hz or 1920x1080i @ 59.94/60Hz video format timings.”

“An HDMI Sink that accepts 50Hz video formats shall support the 640x480p @ 59.94/60Hz and 720x576p @ 50Hz video format timings.”

“An HDMI Sink that accepts 50Hz video formats, and that supports HDTV capability, shall support 1280x720p @ 50Hz or 1920x1080i @ 50Hz video format timings.”

“An HDMI Sink that is capable of receiving any of the following video format timings using any other component analog or uncompressed digital video input, shall be capable of receiving that format across the HDMI interface.1280x720p @ 59.94/60Hz, 1920x1080i @ 59.94/60Hz, 1280x720p @ 50Hz, 1920x1080i @ 50Hz”

[861-D: Annex A] Example EDID 18-Byte Detailed Timing Descriptors


Test Objective

Verify that Sink DUT indicates support for all required Video Formats in its EDID.


Note that the following steps simply examine the EDID for indicated support of the required formats.

Perform the following:

If the CDF field Sink_60Hz is ’Y‘, then perform the following:

• Examine EDID for an SVD containing video format code 2 or 3.

• If no SVD contains 2 or 3 then FAIL

• If the CDF field Sink_HDTV is ’Y‘, then perform the following:

- Examine EDID for an SVD containing video format code 4 or 5.

- If no SVD contains 4 or 5 then FAIL

If the CDF field Sink_50Hz is ‘Y’, then perform the following:

• Examine EDID for SVD containing video format code 17 or 18 (720x576p @ 50Hz).

• If no SVD contains 17 or 18 then FAIL

• If the CDF field Sink_HDTV is “Y”, then perform the following:




- Examine EDID for an SVD containing video format code 19 or 20.

- If no SVD contains 19 or 20 then FAIL

[Tested Format: 1280x720p @ 59.94/60Hz]

• If CDF field Sink_720p60_Other == ‘Y’ then:

- If no SVD contains 4 then FAIL

[Tested Format: 1920x1080i @ 59.94/60Hz]

• If CDF field Sink_1080i60_Other == ‘Y’ then:


[Tested Format: 1280x720p @ 50Hz]

• If CDF field Sink_720p50_Other == ‘Y’ then:


[Tested Format: 1920x1080i @ 50Hz]

• If CDF field Sink_1080i50_Other == ‘Y’ then:



Note that the Recommended Test Equipment (Quantum Data 882CA) can be used to perform all EDID-checking tests simultaneously. This includes all tests in section 8.2 and several tests in 8.5, including this test.



3) If any errors are reported during EDID read then FAIL, “DDC read”.




7) Perform steps in Required Test Method against viewed EDID image

8) PASS/FAIL criteria defined above




Test ID 8-19: Pixel Encoding Requirements


HDMI: 6.2.3] Pixel Encoding Requirements

“All HDMI Sinks shall be capable of supporting both YCBCR 4:4:4 and YCBCR 4:2:2 pixel encoding when that device is capable of supporting a color-difference color space from any other component analog or digital video input.”

“If an HDMI Sink supports either YCBCR 4:2:2 or YCBCR 4:4:4 then both shall be supported.”

[HDMI: 8.3.6] Audio and Video Details

“A Sink may indicate support for YCBCR pixel encodings. To indicate support, bits 4 and 5 of byte 3 of the CEA Extension shall both be set to one (see Table 27 of CEA-861-D). To indicate no support, bits 4 and 5 shall both be zero.”

Test Objective

Verify that Sink supports YCBCR pixel encoding when required.


[If an HDMI Sink supports either YCBCR 4:2:2 or YCBCR 4:4:4 then both shall be supported.]

• Check bits #4 and #5 of byte #3 of the CEA EDID Timing Extension. [861-D: Table 27]

• If bit # 4 == 1 and bit #5 == 0 then FAIL

• If bit # 4 == 0 and bit #5 == 1 then FAIL

[All HDMI Sinks shall be capable of supporting both YCBCR 4:4:4 and YCBCR 4:2:2 pixel encoding when that device is capable of supporting a color-difference color space from any other component analog or digital video input.]

• If CDF field Sink_YUV_On_Other == ‘Y’:

- Check bits #4 and #5 of byte #3 of the EDID Timing Extension.

- If either bit is clear (0) then FAIL

[All HDMI Sinks shall be capable of supporting RGB 4:4:4 pixel encoding.]

• Transmit 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”) video signal with RGB pixel encoding to Sink DUT.

• If Sink DUT does not adequately support transmitted video then FAIL

[If bits #4 or #5 of byte #3 of the EDID Timing Extension are set to one then Sink shall be capable of supporting a YCBCR pixel-encoded signal.]

• Transmit a 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”) signal to Sink DUT using YCBCR 4:2:2 pixel-encoding.

• If DUT does not adequately support transmitted video then FAIL

• Transmit a 720x480p or 720x576p (depending upon 60Hz/50Hz capability) signal to Sink DUT using YCBCR 4:4:4 pixel-encoding.

• If DUT does not adequately support transmitted video then FAIL





Note that the Recommended Test Equipment (Quantum Data 882CA) can be used to perform all EDID-checking tests simultaneously. This includes all tests in section 8.2 and several tests in 8.5, including the first half of this test.



3) If any errors are reported during EDID read then FAIL (DDC read).



6) If any errors are reported then FAIL

7) For EDID based tests perform steps in Required Test Method against captured EDID image.(PASS/FAIL criteria is defined above).

8) Connect Sink DUT to TMDS Signal Generator

9) Transmit 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”) video signal with RGB pixel encoding to Sink DUT.

10) If Sink DUT does not adequately support transmitted video then FAIL

11) If bits #4 or #5 of byte #3 of the EDID Timing Extension are set to one then:

12) Transmit a 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”) signal to Sink DUT using YCBCR 4:2:2 pixel-encoding.

13) If Sink DUT does not adequately support the transmitted video then FAIL

14) Transmit a 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”) signal to Sink DUT using YCBCR 4:4:4 pixel-encoding.

15) If Sink DUT does not adequately support the transmitted video then FAIL

Test ID 8-20: Video Format Timing


[861-D: 4] Video Formats and Waveform Timings




Test Objective

Verify that Sink supports required variations on mandatory video formats and CEA video formats indicated in EDID.





Connect the TMDS Signal Generator to the Sink DUT.

For each tested format and pixel clock frequency, configure the TMDS Signal Generator to generate a test pattern in the given format at the tested pixel clock frequency. The test pattern should permit the operator to determine if the Sink displays the image with no significant distortions (spurious dots, horizontal or vertical jitter, incorrect colors) and in the expected aspect ratio and position.

All CEA video formats listed in the EDID must be tested at two different pixel clock frequencies. The two different frequencies are the minimum and maximum permitted for a Source. For 50Hz formats, these values are 49.75Hz and 50.25Hz (50Hz ± 0.5%). For 59.94Hz or 60Hz formats, these frequencies are 59.64Hz (59.94Hz – 0.5%) and 60.3Hz (60Hz + 0.5%). The tested pixel clock frequency accuracy must be ±0.05%.

[Verify that Sink DUT supports 640x480p. Note that 640x480p is never required to be listed in any EDID structure but the Sink is required to support reception.]

1) Configure the TMDS Signal Generator to transmit 640x480p @ 60Hz to the Sink DUT at the minimum allowable pixel clock frequency.

2) If the Sink DUT does not adequately support format then FAIL, “640x480p, Min”

3) Configure TMDS Signal Generator to transmit 640x480p @ 60Hz to Sink DUT at the maximum allowable pixel clock frequency.

4) If the Sink DUT does not adequately support format then FAIL, “640x480p, Max”

5) For each SVD in the EDID:

6) If the SVD is 128 or 0 (VIC field is 0) then FAIL, “Illegal SVD”.

7) If the VIC>64 then WARNING, “SVD beyond the specified range.”.

[An HDMI Sink DUT which indicates support for CEA Format 8 or 9 (1440x240p), shall support both variations of the format (22 and 23 vertical blanking lines).]

8) If tested SVD indicates video formats 8 or 9:

9) For each of the two timing variations (22 and 23 lines in vertical blanking) of the 1440x240p @ 59.94Hz video format:

10) Configure the TMDS Signal Generator to transmit the timing variation to the Sink DUT at the minimum allowable pixel clock frequency.

11) If the Sink DUT does not adequately support format then FAIL

12) Configure the TMDS Signal Generator to transmit the timing variation to the Sink DUT at the maximum allowable pixel clock frequency.


[An HDMI Sink DUT which indicates support for CEA Format 12 or 13 (2880x240p) shall support both variations of this format (22 and 23 vertical blanking lines).]


15) For each of the two timing variations (22 and 23 lines in vertical blanking) of the 2880x240p @ 59.94Hz video format:








[An HDMI Sink DUT which indicates support for CEA Format 23 or 24 (1440x288p) shall support all variations of this format (24, 25 and 26 vertical blanking lines).]


21) For each of the three timing variations (24, 25, and 26 lines in vertical blanking) of the 1440x288p @ 50Hz video format:





[An HDMI Sink DUT which indicates support for CEA Format 27 or 28 (2880x288p) shall support all variations of this format (24, 25 and 26 vertical blanking lines).]


27) For each of the three timing variations (24, 25, and 26 lines in vertical blanking) of the 2880x288p @ 50Hz video format:





32) If tested SVD indicates any format other than 1, 8, 9, 12, 13, 23, 24, 27, or 28, perform the following tests:

33) Configure TMDS Signal Generator to transmit that video format to Sink DUT at the minimum allowable pixel clock frequency.


35) Configure TMDS Signal Generator to transmit that video format to Sink DUT at the maximum allowable pixel clock frequency.



Perform Required Test Sequence above using a Recommended TMDS Signal Generator.

PASS/FAIL criteria given above.




8.6 Sink – Audio

Test ID 8-21: Audio Clock Regeneration


[HDMI: 7.2] Audio Sample Clock Capture and Regeneration


Test Objective

Verify proper Sink operation with respect to Audio Clock Regeneration.


[Verify CDF fields.]

If CDF field Sink_Audio_Input == “N” then

• Examine DUT for any other analog or digital audio input (e.g. analog RCA jacks, S/PDIF, etc.).

• If any other audio input is present on DUT, then FAIL

• Else, PASS (end test)

If CDF field Sink_Basic_Audio == “N” and CDF field Sink_Audio_Input == “Y” then FAIL

[Verify audio clock regeneration using minimum N parameter.]

• Configure the Audio/Video Protocol Generator to transmit a 480p video format (or 576p if 480p is not supported by DUT) with a 48kHz audio sample rate and ACR packets data with minimum N parameter which is minimum integer value no less than 128*Fs / 1500 and audio sample. A sine wave signal at a frequency of 1kHz with amplitude of –20dBs as the audio test signal should be used. Check produced sound with speakers.

• Perform listening test

• If no sound, extraneous sound (e.g. popping or cracking sound), or unnecessary mute (e.g. short term mute, etc) then FAIL

[Verify audio clock regeneration using maximum N parameter.]

• Configure the Audio/Video Protocol Generator to transmit a 480p video format (or 576p if 480p is not supported by DUT) with a 48kHz audio sample rate and ACR packets with maximum N parameter which is maximum integer value no more than 128*Fs / 300 and audio sample data. A sine wave signal at a frequency of 1kHz with amplitude of –20dBs as the audio test signal should be used.

• Perform listening test

• If no sound, extraneous sound (e.g. pop or crack sound), or unnecessary mute (e.g. short term mute, etc) then FAIL


[Verify CDF fields.]

1) If CDF field Sink_Audio_Input == “N” then




2) Examine DUT for any other analog or digital audio input (e.g. analog RCA jacks, S/PDIF, etc.).

3) If any other audio input is present on DUT, then FAIL

4) Else, PASS (end test)

5) If CDF field Sink_Basic_Audio == “N” and CDF field Sink_Audio_Input == “Y” then FAIL


7) Connect Protocol Generator to all TMDS differential pairs on the TPA-P.

8) Configure the Protocol Generator to output the “Minimum N” test signal pattern described above.

9) Power on Sink DUT and verify that tested HDMI input is active.

10) If Sink does not adequately support signal then FAIL

11) Configure the Protocol Generator to output the “Maximum N” test signal pattern described above.


13) If Sink adequately supports signal then PASS

Test ID 8-22: Audio Sample Packet Jitter


[HDMI: 7.8.1] Packet Delivery Rules: Audio Sample Packets

“Relative to an ideal constant-frequency clock, the jitter present in the Audio Sample Packet transmission timing shall not exceed one horizontal line period plus a single audio sample period.”

Test Objective

Verify that Sink supports Audio Sample Packets with maximum jitter.


If CDF field Sink_Basic_Audio == “N” then PASS (end test)

[Verify reception of Audio Sample Packets with maximum jitter.]

Transmit HDMI audio/video stream containing the following:

• Either 480p, 576p, or VGA (640x480p @ 60Hz) with a 48kHz audio sample rate

• ACR packets contain the recommended N and CTS values per [HDMI: 7.2.3].

• Audio Sample packet transmission timing has jitter of one horizontal video (total) line time plus the period of 1 audio sample (i.e. 1/Fs).

Perform listening test

If no sound, extraneous sound (e.g. clacking sound), or unnecessary mute (e.g. short term mute, etc) then FAIL





1) If CDF field Sink_Basic_Audio == “N” then PASS (end test)


3) Connect TMDS Signal Generator to all TMDS differential pairs on the TPA-P.

4) Configure the TMDS Signal Generator to output test signals described above.


6) If Sink adequately supports all tested signals then PASS

Test ID 8-23: Audio Formats


[861-D: 7.5] CEA EDID Timing Extension Version 3

“If audio is supported in the DTV Monitor, as indicated by the basic audio support bit in the Version 3 CEA EDID Timing Descriptor, then CEA short audio descriptors shall be used to declare which (if any) audio formats are supported in addition to basic audio.”

“If only basic audio is supported, no Short Audio Descriptors are necessary.”


“…it is permitted for a Source to transmit Basic Audio (see Section 7.3) to a Sink that does not indicate support for Basic Audio.”

Test Objective

Verify that Sink supports every audio format specified in EDID.


If CDF field Sink_Basic_Audio == “N” then PASS (end test)

Transmit HDMI signal with any DUT-supported video format and 2-channel 32kHz PCM signal to Sink DUT. The ATC is not required to test non-PCM formats.

If Sink DUT does not adequately support the audio format then FAIL

Transmit HDMI signal with 2-channel 44.1kHz PCM signal to Sink DUT


Transmit HDMI signal with 2-channel 48kHz PCM signal to Sink DUT



1) If CDF field Sink_Basic_Audio == “N” then PASS (end test)


3) Connect Protocol Generator to all TMDS differential pairs on the TPA-P-TDR.




4) Configure the Protocol Generator to output 640x480p with 2-channel 32kHz PCM signal to Sink DUT

5) If Sink DUT does not adequately support the audio format then FAIL

6) Configure the Protocol Generator to output 640x480p with 2-channel 44.1kHz PCM signal to Sink DUT


8) Configure the Protocol Generator to output 640x480p with 2-channel 48kHz PCM signal to Sink DUT





8.7 Sink – Interoperability With DVI

Test ID 8-24: Interoperability With DVI


[HDMI: App. C.1] Requirement for DVI Compatibility

“…all HDMI Sinks shall be compatible with DVI 1.0 compliant sources (i.e. “systems” or “hosts”) through the use of a similar cable converter.”

[HDMI: App. C.3] HDMI Sink Requirements

“An HDMI Sink, upon power-up, reset or detection of a new source device, shall assume that the source device is limited to the above behavior. Upon the detection of an indication that the source is HDMI-capable, the HDMI Sink shall follow all of the HDMI Sink-related requirements specified in this document.”

Test Objective

Verify that Sink DUT can handle required transition from DVI to HDMI mode.


Connect Sink DUT to Audio/Video Protocol Generator

Transmit 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”), RGB pixel encoding, no Guard Bands, no Data Islands

If Sink does not adequately support signal then FAIL


1) Connect Sink DUT to Audio/Video Protocol Generator

2) Configure Audio/Video Protocol Generator to transmit stream with 720x480p (if Sink_60Hz = “Y”) or 720x576p (if Sink_60Hz = “N”), RGB pixel encoding, no Guard Bands, no Data Islands.

3) Turn on Sink DUT and verify that HDMI port is active.

4) Verify that Sink DUT supports signal with correct pixel encoding and no audio.

5) If Sink does not adequately support signal then FAIL




8.8 Sink – Advanced Features

Test ID 8-25: Deep Color


[HDMI: 6.5] Pixel Encoding and Color Depth


Test Objective

Verify that a Deep Color-capable Sink DUT supports Deep Color packing and signaling.


1) If CDF field Sink_Deep_Color == “N” then SKIP.

2) If CDF field Sink_Max_TMDS_Clock is zero then FAIL

3) For each video format indicated in CDF field Sink_Video_Formats:

4) If CDF field Sink_DC_36bit is “N” then FAIL, else

5) Calculate TMDS clock by multiplying base clock rate of video format (27MHz, 74.25MHz or 148.5MHz) by 1.5.

6) If CDF field Sink_Max_TMDS_Clock is zero or is greater than calculated required clock then:

7) Configure Audio/Video Protocol Generator to transmit that video format to Sink DUT using 36-bit pixel depth and RGB pixel encoding.


9) If CDF field Sink_DC_Y444 is “Y” then configure Audio/Video Protocol Generator to transmit that video format to Sink DUT using 36-bit pixel depth and YCBCR 4:4:4 pixel encoding.


11) If CDF field Sink_DC_30bit then

12) Calculate TMDS clock by multiplying base clock rate of video format (27MHz, 74.25MHz or 148.5MHz) by 1.25.






18) If CDF field Sink_DC_48bit then




19) Calculate TMDS clock by multiplying base clock rate of video format (27MHz, 74.25MHz or 148.5MHz) by 2.






25) Repeat for next format


For each video format indicated in CDF field Sink_Video_Formats:

• For each color depth indicated in CDF fields Sink_DC_36bit, Sink_DC_30bit, Sink_DC_48bit:

- For RGB pixel encoding and, if Sink_DC_Y444 then also for YCBCR 4:4:4 pixel encoding:

Configure Audio/Video Protocol Generator to transmit that video format, that pixel encoding and that color depth to the Sink DUT.

Peform Required Test Method using an Audio/Video Protocol Generator that is capable of supporting the tested Deep Color formats and modes.

- Repeat for next pixel encoding.

• Repeat for next color depth

Repeat for next video format





Test ID 8-27: High Bitrate Audio


[HDMI: 5.3.11] High-Bitrate (HBR) Audio Stream Packet

<See reference for details on High-Bitrate Audio Stream Packet.>

[HDMI: 7.6.2] High-Bitrate Audio Stream Packetization

<See reference for details on High-Bitrate Audio packetization.>

Test Objective

Verify that a High-Bitrate Audio-capable sink is able to supports High Bitrate Audio Stream Packets and signaling.


If CDF field Sink_HBRA == “N”, then SKIP.

Transmit HDMI signal with 480p or 576p with 4x pixel repetition (2880x480p or 2880x576p) video format or DUT-supported video format , and High-Bitrate Audio (DTS-HD or Dolby TrueHD, see CDF field Sink_HBRA_Format) Stream Packets to Sink DUT.

Perform listening test.

If no sound, extraneous sound (e.g. clacking sound), or unnecessary mute (e.g. short term mute, etc) then FAIL.


Configure Audio/Video Protocol Generator to transmit the HDMI signal.

Perform Requird Test Method using an Audio/Video Protocol Generator that supports High-Bitrate Audio Stream Packets.

Note: Only ASTRODESIGN VG-849C-A may be used for this test as Audio/Video Protocol Generator.




Test ID 8-28: One Bit Audio


[HDMI: 5.3.9] One Bit Audio Sample Packet

<See reference for details on One Bit Audio Sample Packet.>

[HDMI: 7.9] One Bit Audio Usage Overview

<See reference for details on One Bit Audio.>

Test Objective

Verify that a One Bit Audio-capable sink is able to supports One Bit Audio Sample Packets and signaling.


If CDF field Sink_One_Bit_Audio == “N”, then SKIP.

Transmit HDMI signal with 480p or 576p with 2x pixel repetition (1440x480p or 1440x576p) video format or DUT-supported video format, and One Bit Audio Sample Packets to Sink DUT.

Perform listening test.

If no sound, extraneous sound (e.g. clacking sound), or unnecessary mute (e.g. short term mute, etc) then FAIL.


Configure Audio/Video Protocol Generator to transmit the HDMI signal.

Perform Requird Test Method using an Audio/Video Protocol Generator that supports One Bit Audio Sample Packets.

Note: Only ASTRODESIGN VG-849C-A may be used for this test as Audio/Video Protocol Generator.

Test ID 8-29: 3D Video Format Timing


[HDMI: 8.2.3.2] 3D video format structure


Test Objective

Verify that a 3D-capable Sink DUT supports required variations on mandatory 3D video formats and other primary 3D video formats listed in the EDID.





1) If CDF field Sink_3D == “N” then SKIP.

2) Connect the Audio/Video Protocol Generator to the Sink DUT.

For each tested format and pixel clock frequency, configure the Audio/Video Protocol Generator to generate a test pattern in the given format at the tested pixel clock frequency. The test pattern should permit the operator to determine if the Sink displays the image with no significant distortions (spurious dots, horizontal or vertical jitter, incorrect colors) and in the expected aspect ratio and position.

The mandatory 3D video formats must be tested at two different pixel clock frequencies for each 3D_Structure. The two different frequencies are the minimum and maximum permitted for a Source. The tested pixel clock frequency accuracy must be ±0.05%. For 23.98Hz or 24Hz formats, these frequencies are 23.86Hz (23.98Hz – 0.5%) and 24.12Hz (24Hz + 0.5%). For 50Hz formats, these values are 49.75Hz and 50.25Hz (50Hz ± 0.5%). For 59.94Hz or 60Hz formats, these frequencies are 59.64Hz (59.94Hz – 0.5%) and 60.3Hz (60Hz + 0.5%).

In addition, all primary 3D video formats listed in the EDID must be tested at two different pixel clock frequencies for each 3D_Structure.The two different frequencies are the minimum and maximum permitted for a Source. The tested pixel clock frequency accuracy must be ±0.05%. For 23.98Hz or 24Hz formats, these frequencies are 23.86Hz (23.98Hz – 0.5%) and 24.12Hz (24Hz + 0.5%). For 50Hz formats, these values are 49.75Hz and 50.25Hz (50Hz ± 0.5%). For 59.94Hz or 60Hz formats, these frequencies are 59.64Hz (59.94Hz – 0.5%) and 60.3Hz (60Hz + 0.5%).

[Verify that Sink DUT supports 1920x1080p @ 23.98/24Hz (Frame packing).]

3) Configure the Audio/Video Protocol Generator to transmit 1920x1080p @ 23.98Hz (Frame packing) to the Sink DUT at the minimum allowable pixel clock frequency.

4) If the Sink DUT does not adequately support format then FAIL, “1920x1080p (Frame packing), Min”

5) Configure Audio/Video Protocol Generator to transmit 1920x1080p @ 24Hz (Frame packing) to Sink DUT at the maximum allowable pixel clock frequency.

6) If the Sink DUT does not adequately support format then FAIL, “1920x1080p (Frame packing), Max”

[Verify that Sink DUT supports 1920x1080p @ 23.98/24Hz (Top-and-Bottom).]

7) Configure the Audio/Video Protocol Generator to transmit 1920x1080p @ 23.98Hz (Top-and-Bottom) to the Sink DUT at the minimum allowable pixel clock frequency.

8) If the Sink DUT does not adequately support format then FAIL, “1920x1080p (Top-and-Bottom), Min”

9) Configure Audio/Video Protocol Generator to transmit 1920x1080p @ 24Hz (Top-and-Bottom) to Sink DUT at the maximum allowable pixel clock frequency.

10) If the Sink DUT does not adequately support format then FAIL, “1920x1080p (Top-and-Bottom), Max”




11) If CDF field Sink_60Hz is “Y”

[A 3D-capable HDMI Sink DUT which indicates support for 60Hz video formats, shall support 1280x720p @ 59.94/60Hz (Frame packing).]

12) Configure the Audio/Video Protocol Generator to transmit 1280x720p @ 59.94Hz (Frame packing) to the Sink DUT at the minimum allowable pixel clock frequency.



15) If the Sink DUT does not adequately support format then FAIL, “1280x720p (Frame packing) Max”

[A 3D-capable HDMI Sink DUT which indicates support for 60Hz video formats, shall support 1920x1080i @ 59.94/60Hz (Side-by-Side (Half)).]

16) Configure the Audio/Video Protocol Generator to transmit 1920x1080i @ 59.94Hz (Side-by-Side (Half)) to the Sink DUT at the minimum allowable pixel clock frequency.

17) If the Sink DUT does not adequately support format then FAIL, “1920x1080i (Side-by-Side (Half)), Min”

18) Configure Audio/Video Protocol Generator to transmit 1920x1080i @ 60Hz (Side-by-Side (Half)) to Sink DUT at the maximum allowable pixel clock frequency.

19) If the Sink DUT does not adequately support format then FAIL, “1920x1080i (Side-by-Side (Half)), Max”

[A 3D-capable HDMI Sink DUT which indicates support for 60Hz video formats, shall support 1280x720p @ 59.94/60Hz (Top-and-Bottom).]

20) Configure the Audio/Video Protocol Generator to transmit 1280x720p @ 59.94Hz (Top-and-Bottom) to the Sink DUT at the minimum allowable pixel clock frequency.



23) If the Sink DUT does not adequately support format then FAIL, “1280x720p (Top-and-Bottom) Max”

24) If CDF field Sink_50Hz is “Y”

[A 3D-capable HDMI Sink DUT which indicates support for 50Hz video formats, shall support 1280x720p @ 50Hz (Frame packing).]

25) Configure the Audio/Video Protocol Generator to transmit 1280x720p @ 50Hz (Frame packing) to the Sink DUT at the minimum allowable pixel clock frequency.



28) If the Sink DUT does not adequately support format then FAIL, “1280x720p (Frame packing), Max”




[A 3D-capable HDMI Sink DUT which indicates support for 50Hz video formats, shall support 1920x1080i @ 50Hz (Side-by-Side (Half)).]

29) Configure the Audio/Video Protocol Generator to transmit 1920x1080i @ 50Hz (Side-by-Side (Half)) to the Sink DUT at the minimum allowable pixel clock frequency.

30) If the Sink DUT does not adequately support format then FAIL, “1920x1080i (Side-by-Side (Half)), Min”

31) Configure Audio/Video Protocol Generator to transmit 1920x1080i @ 50Hz (Side-by-Side) to Sink DUT at the maximum allowable pixel clock frequency.

32) If the Sink DUT does not adequately support format then FAIL, “1920x1080i (Side-by-Side (Half)), Max”

[A 3D-capable HDMI Sink DUT which indicates support for 50Hz video formats, shall support 1280x720p @ 50Hz (Top-and-Bottom).]

33) Configure the Audio/Video Protocol Generator to transmit 1280x720p @ 50Hz (Top-and-Bottom) to the Sink DUT at the minimum allowable pixel clock frequency.



36) If the Sink DUT does not adequately support format then FAIL, “1280x720p (Top-and-Bottom) Max”

37) If tested EDID indicate any primary 3D video format other than the above, perform the following tests:

38) Configure the Audio/Video Protocol Generator to transmit that 3D video format to the Sink DUT at the minimum allowable pixel clock frequency.

39) If the Sink DUT does not adequately support format then FAIL.

40) Configure Audio/Video Protocol Generator to transmit that 3D video format to Sink DUT at the maximum allowable pixel clock frequency.



Perform Required Test Sequence above using a Recommended Audio/Video Protocol Generator.





Test ID 8-30: 4K x 2K Video Format Timing


[HDMI: 8.2.3.1] HDMI Video format Identification Code


Test Objective

Verify that a 4K x 2K-capable Sink DUT supports 4K x 2K video formats indicated in EDID.


1) If CDF field Sink_4Kx2K == “N” then SKIP.

2) Connect the Audio/Video Protocol Generator to the Sink DUT.

For each tested format and pixel clock frequency, configure the Audio/Video Protocol Generator to generate a test pattern in the given format at the tested pixel clock frequency. The test pattern should permit the operator to determine if the Sink displays the image with no significant distortions (spurious dots, horizontal or vertical jitter, incorrect colors) and in the expected aspect ratio and position.

4K x 2K video formats listed in the EDID must be tested at two different pixel clock frequencies. The two different frequencies are the minimum and maximum permitted by a Source. For 24Hz SMPTE formats, these values are 23.88Hz and 24.12Hz (24Hz ± 0.5%). For 23.98Hz or 24Hz formats, these frequencies are 23.86Hz (23.98Hz – 0.5%) and 24.12Hz (24Hz + 0.5%). For 25Hz formats, these values are 24.88Hz and 25.12Hz (25Hz ± 0.5%). For 29.97Hz or 30Hz formats, these frequencies are29.82Hz (29.97Hz – 0.5%) and 30.15Hz (30Hz + 0.5%). The tested pixel clock frequency accuracy must be ±0.05%.

3) For each HDMI_VIC_X in the EDID;

4) If tested HDMI_VIC_X indicates HDMI video formats 0x01 of 4Kx2K 29.97/30Hz

5) Configure the Audio/Video Protocol Generator to transmit, during VBLANK, one or more Data Islands containing a valid

HDMI Vendor Specific Packet (0x081)

which has

PB4 = 0x20 (HDMI_Video_Format)

PB5 = 0x01 (HDMI_VIC)

6) Configure the Audio/Video Protocol Generator to also transmit the timing variation to the Sink DUT at the minimum allowable pixel clock frequency.


8) Configure the Audio/Video Protocol Generator to transmit the timing variation to the Sink DUT at the maximum allowable pixel clock frequency.


10) If tested HDMI_VIC_X indicates HDMI video formats 0x02 of 4Kx2K 25Hz,






which has







16) If tested HDMI_VIC_X indicates HDMI video formats 0x03 of 4Kx2K 23.98/24Hz



which has







22) If tested HDMI_VIC_X indicates HDMI video formats 0x04 of 4Kx2K24Hz (SMPTE)



which has













Test ID 8-31: AVI InfoFrame supporting Extended Colorimetry, Content Type and Selectable YCC Quantization Range




Test Objective

Verify that Sink supports reception of particular AVI InfoFrame packets supporting Extended Colorimetry, Content Type and Selectable YCC Quantization Range settings, and if the Sink displays the image with no significant distortions (spurious dots, horizontal or vertical jitter, incorrect colors).


Connect SinkDUT to the Audio/Video Protocol Generator.

Configure the Audio/Video Protocol Generator to transmit 720x480p (if CDF fileld Sink_60Hz == “Y”) or 720x576p (if CDF fileld Sink_60Hz == “N”).

[Extended Colorimetry support checking]

If bit #3 of byte #3 of the Colorimetry Data Block in the EDID of Sink DUT is set to one,

• Configure the Audio/Video Protocol Generator to transmit video signal with the following AVI InfoFrame which has:

- sYCC601= 1

• If Sink DUT does not adequately support the signal then FAIL.



- AdobeYCC601= 1




- AdobeRGB= 1





[Selectable YCC Quantization Range support checking]

If bit #7 of byte #3 of the Video Capability Data Block in the EDID of Sink DUT is set to one,


- YQ1,YQ0 = 0,1 (Full Range)


[Content Type support checking]

If bit #0 of byte #8 of the HDMI Vendor Specific Data Block in the EDID of Sink DUT is set to one,


- ITC = 1 and CN1,CN0 = 0,0 (Graphics)




- CN1,CN0 = 0,1 (Photo)




- CN1,CN0 = 1,0 (Cinema)




- CN1,CN0 = 1,1 (Game)







9 Tests – Repeater 9.1 Repeater Products Overview Repeaters consist of some number of HDMI input ports and some number of HDMI output ports. Typical HDMI Sink functionality is associated with the input ports and typical Source functionality is associated with the output ports. All input ports shall be fully compliant Sinks and all output ports shall be fully compliant Sources.

Figure 9-1 Repeater Products Overview

A compliant Repeater will consist of a product where each of the Source functional blocks is compliant with all of the HDMI Source requirements and each of the Sink functional blocks is compliant with all of the HDMI Sink requirements.

9.2 Internal Functional Block Categorization Within the Repeater product, several functional blocks will be interacting during the transport of the A/V stream from the input port or ports to the output port or ports.

In order to more efficiently test Repeater products, it is useful to understand how these functional blocks interact within the tested product.

9.2.1 Input/Output Categories

Figure 9-2 Input/Output Categories

Products will fall into several I/O categories:

a) 1 1 Content arriving on one input will be delivered to one output

b) N 1 Content arriving on more than one inputs will be combined in some manner and delivered to one output

c) 1 N Content arriving on one input will be delivered simultaneously to more than one output


Section 9 Tests – Repeater


d) M N Content arriving on more than one input will be combined in some manner and delivered simultaneously to more than one output

9.2.2 Processing Categories

Internally the A/V stream may undergo one or more of the following types of processing:

a) Through A/V signal passes unmodified from Source to Sink. EDID passes unmodified from Sink to Source.

b) Convert A/V signal is converted from format X to format Y. This could be, for instance, a video format conversion from HD to SD. EDID corresponding to format Y would be present on the Sink and the EDID presented to the Source would include format X.

c) Switch A single A/V signal is selected from multiple Sources. EDID from the Sink passes unmodified from Sink to Source.

d) Mix Multiple A/V signals are mixed. Example: a picture-in-picture function. EDID from Sink is used for output processing and, depending upon capabilities of the main picture and the sub-picture processing, different EDIDs may be presented to different Sources.

e) Distribute Single A/V signal is sent, unmodified, to a single selected Sink. EDID from single Sink passes unmodified to Source.

f) Duplicate Single A/V signal is passed unmodified to multiple Sinks. EDID presented to Source may be the intersection of the sets of formats in each of the EDIDs in the multiple Sinks.

g) Exchange Multiple A/V signals pass from different Sources to different Sinks without any interaction between the streams. EDIDs presented to Source correspond to Sink destination of that input’s stream.

9.2.3 Combinations

The following combinations of functional blocks are possible on each of the different I/O categories.

Through Convert Switch Mix Distribute Duplicate Exchange1 1 Y Y N 1 Y Y Y Y 1 N Y Y Y Y M N Y Y Y Y Y Y Y

9.2.4 Non-HDMI I/O

In addition to HDMI input retransmitting to HDMI output functionality, many Repeater products include the ability to source an A/V stream that was delivered to the Repeater on a non-HDMI (analog, DVI or other) input. Likewise, many such products include the ability to forward an A/V stream from an HDMI input to a non-HDMI output.




Such functionality is regarded as a Source function or Sink function, respectively. For testing, the normal Source or Sink CDF form shall be completed indicating the characteristics of that Source or Sink function.

9.2.5 Source / Sink / Repeater Functionality

Basic Repeater functionality associated with carrying an A/V stream from an HDMI input to an HDMI output is described above.

In addition, many such products also incorporate functions that require them to be tested more extensively.

Figure 9-3 Source vs. Sink vs. Repeater Functionality

An example is a Repeater product that effectively acts as a Source product, where the HDMI stream has been “generated” through an internal function such as a DVD player or STB. Likewise, many products act as HDMI Sinks and “consume” the HDMI input stream by displaying it or routing to an audio amplifier for rendering.

HDMI Repeater functionality is tested below. For these tests, the Repeater CDF must be completed to describe the capabilities of the product. In addition, a mini (Source/Sink) CDF is required that describes a subset of the Source and Sink functionality of the product that is related to the Repeater function. This mini-CDF consists of the Source CDF and Sink CDF with many fields already filled-in.

The “generation” and “consuming” functions of a Repeater are tested as a Source and Sink device. For these tests, the normal Source or Sink CDF form shall be completed indicating the characteristics of that Source or Sink function.




9.3 Tests of Output Ports

Test ID 9-1: Repeated Output Port

Test Objective

Verify that the HDMI output of an A/V stream from an HDMI input is compliant.


Figure 9-4 Testing of Source Functionality

Perform the following using the “Mini-CDF” form:

1) For each HDMI output port on DUT, do the following:

2) Determine which HDMI inputs may impact the behavior of the tested HDMI output based on the I/O categorization in CDF field Repeater_IO_Category and the processing categorization indicated in CDF fields Repeater_Through through Repeater_Exchange.

3) Attach an Audio/Video Protocol Generator that is capable of supporting the highest-TMDS clock rate supported by the DUT to each of the relevant HDMI input ports through a an appropriate cable emulator or long cable to produce an input signal at the highest rate that is close to (but better than) worst-case Sink input eye with data jitter >0.3Tbit.

4) If a cable emulator is used for the connection between the Audio/Video Protocol Generator and the relevant HDMI input port of the DUT, add a >50pF capacitor to each of the SCL and SDA signals on this TPA.

5) Configure the Audio/Video Protocol Generator to generate the “RGB” data pattern (includes 48kHz, 2-channel PCM audio) at the following video format timing:

Either 720x480p @ 59.94Hz (if Source_60Hz = “Y”) or 720x576p @ 50Hz (if Source_60Hz = “N”).

6) Perform each test case in Section 7, Tests – Source, using the tested port as the HDMI Source DUT. For those tests where the EDID Emulator changes its EDID and pulses the HPD signal during the test (Test ID 7-1, 7-19 and 7-33), an HDMI compliant Source may be used instead of the Audio/Video Protocol Generator and EDID checker.

7) If any test item FAILs then FAIL




8) Configure the Audio/Video Protocol Generator to generate the “RGB” data pattern (includes 48kHz, 2-channel PCM audio) at the following video format timing:

One of the HDTV formats supported by the product (if any – see CDF field Sink_Video_Formats).

9) Perform each test case in Section 7, Tests – Source, using the tested port as the HDMI Source DUT. For those tests where the EDID Emulator changes its EDID and pulses the HPD signal during the test (Test ID 7-1, 7-19 and 7-33), an HDMI compliant Source may be used instead of the Audio/Video Protocol Generator and EDID checker.


11) Repeat for each of the HDMI output ports (total count equals CDF field HDMI_output_count)

Test ID 9-2: Source Functionality

Test Objective

Verify that the Source “generator” functionality contained within a Repeater product is compliant.


If the product contains a “generating” function (described above), then Adopter must complete a full Source CDF describing that function. In addition to the Repeated Port tests above, the following tests are required:

Perform the following using the full Source CDF form describing the tested Source (“generating”) function:

1) If CDF field Repeater_Source_Fn is ‘Y’ then do the following:

2) For each HDMI output port on DUT, do the following:

3) Disconnect any upstream HDMI device to ensure that the source function and not the repeater function is being tested.

4) Perform each test case in Section 7, Tests – Source, using the selected port as the HDMI Source DUT and using the full Source CDF. Do not perform the tests in section 7.3 if they have already been performed under Test ID 9-1.


6) Repeat for each of the HDMI output ports




9.4 Tests of Input Ports

Test ID 9-3: Repeated Input Port

Test Objective

Verify that the HDMI input of a stream that is transported to an HDMI output is compliant.


Figure 9-5 Testing of Sink Functionality

Perform the following using the “Mini-CDF” form:

1) For each HDMI input port on DUT, do the following:

2) Determine which HDMI outputs may be impacted by the tested HDMI input based on the I/O categorization in CDF field Repeater_IO_Category and the processing categorization indicated in CDF fields Repeater_Through through Repeater_Exchange.

3) Attach a fully-compliant reference HDMI Monitor and Speaker to each relevant HDMI output using an appropriate cable emulator or long cable.

4) Perform each test case in Section8, Tests – Sink, using the tested port as the HDMI Sink DUT.

5) Connect and operate required test equipment (analyzers, etc.) to tested port, as specified in each test case.


7) Repeat for each of the HDMI input ports (total count equals CDF field HDMI_input_count)

Test ID 9-4: Sink Functionality

Test Objective

Verify that the Sink “consumer” functionality contained within a Repeater product is compliant.





If the product contains a “consuming” function (described above), then Adopter must complete a full Sink CDF describing that function. In addition to the Repeated Port tests above, the following tests are required:

Perform the following using the full Sink CDF form describing the tested Sink (“consuming”) function:

1) If CDF field Repeater_Sink_Fn is ‘Y’ then do the following:

2) For each HDMI input port on DUT, do the following:

3) Disconnect any downstream HDMI device to ensure that the sink function and not the repeater function is being tested.

4) Perform each test case in Section8, Tests – Sink, using the selected port as the HDMI Sink DUT and using the full Sink CDF. Do not perform the tests in section 8.3 if they have already been performed under Test ID 9-3.


6) Repeat for each of the HDMI input ports




9.5 Tests for Physical Address Handling

Test ID 9-5: Physical Address


[HDMI: 8.7] Physical Address


Test Objective

Verify that Repeater DUT supplies correct Physical Addresses to each of the attached Source devices.


Figure 9-6 Testing of Physical Address Handling

1) If CDF field CEC_root_device = “Y” then skip this test.

2) If CDF fields Repeater_PA_Copy and Repeater_PA_Increment are both “Y” then FAIL.

3) If CDF fields Repeater_PA_Copy and Repeater_PA_Increment are both “N” then FAIL.

4) Connect the EDID Emulator to the output port which is connected to the CEC signal, specified in CDF field Repeater_CEC_Output.

5) Power on the DUT and verify that all relevant output ports are active.

6) For each (M) of the HDMI input ports (1…N) on the Repeater DUT:

7) Configure the DUT to select the tested input port (M).

8) If CDF field Repeater_PA_Copy = “Y” then:

9) For each of the non-selected HDMI inputs (1 to M-1 and M+1 to N)

10) Supply +5V Power to the non-selected input port

11) Check the state of the HPD signal from the non-selected input

12) If HPD is TRUE then FAIL, “Repeater_PA_Increment used illegally.”

13) Repeat for next non-selected input

14) Connect the EDID Reader/Analyzer to the selected input port (M).

15) For each of the entries in Table 9-1, do the following:




16) Configure EDID Emulator to supply an EDID image indicating the “Sink Physical Address” shown in the table.

17) Check the state of the HPD signal on the selected input

18) If HPD is FALSE then FAIL

19) Using the EDID Reader/Analyzer, read and analyze the EDID image from the selected input port.

20) Compare the Physical Address read against the appropriate “Source Physical Address” value (based on the CDF fields Repeater_PA_Copy and Repeater_PA_Increment).

21) If the read Source Physical Address does not equal expected value then FAIL

22) Repeat for each of the remaining entries in the table.

23) Repeat for each of the remaining input ports on the DUT.

Table 9-1 Physical Address Test

Source Physical Address Sink Physical Address Repeater_PA_Copy Repeater_PA_Increment

1.0.0.0 1.0.0.0 1.M.0.0 2.0.0.0 2.0.0.0 2.M.0.0 2.3.0.0 2.3.0.0 2.3.M.0 3.4.5.0 3.4.5.0 3.4.5.M 1.1.1.1 1.1.1.1 F.F.F.F F.F.F.F F.F.F.F F.F.F.F



10 Tests – HDCP 10.1 Overview All devices capable of performing HDCP operations (CDF field HDCP_Supported) shall be tested for HDCP compliance.

10.2 Test method HDCP test shall be done according to the HDCP Compliance Test Specification, Revision 1.2, by using the test tool designated by Digital Content Protection, LLC.



Appendix 1 – Authorized Testing Center – Test Equipment List

The following is the equipment used in the Authorized Testing Centers.

Standard ATC Configurations: TPA Fixtures (1 set)

(1) Tektronix TPA-P-DI, available as one component in Tektronix 013-A013-50

(1) Tektronix TPA-P-SE, available as one component in Tektronix 013-A013-50

• For DC characteristics testing of Sources with Type-C Plugs, Tektronix TPA-R-SE with JAE Type A to Type C jig cable DC1DC2ST2020A are used instead of Tektronix TPA-P-SE

(1) Tektronix TPA-P-TDR, available as one component in Tektronix 013-A013-50

(1) Tektronix TPA-R-DI, available as one component in Tektronix 013-A012-50

(1) Tektronix TPA-R-SE, available as one component in Tektronix 013-A012-50

(2) Tektronix TPA-R-TDR, available as one component in Tektronix 013-A012-50

(2) ADVANTEST TPA-R-NA, part number CAX-ATI013

Digital Oscilloscope (1 set) (1) Tektronix TDS7404 4GHz Digital Oscilloscope with:

• Large memory option (#4M)

- 32 mega-samples total (16 mega-samples on each of two active channels).

• Serial pattern trigger option (#ST)

Differential Probe (2 sets) (1) Tektronix P7330 Differential Probe

(1) Tektronix 016-1884-00 Square Pin Adapter

(1) Tektronix 196-3469-00 Ground Lead

Differential SMA Probe (2 sets) (1) Tektronix P7350SMA Differential Probe

(1) Tektronix 196-3469-00 Ground Lead

Single-Ended Probe (2 sets) (1) Tektronix P7240 Single-Ended Probe



(1) Tektronix 016-1773-00 Square pin socket

SMA Cables (1 set) (10) Tektronix 174-1428-00 (1.5 meter)

(4) Tektronix 174-1341-00 (1 meter)

50Ω SMA Terminators (1 set) (14) 50Ω SMA Terminators

Network Analyzer (1 set) (1) ADVANTEST R3860A

• (1) ADVANTEST R17051 (Auto Cal Kit)

Agilent E5071C : ENA Series Network Analyzer

• Agilent E5071C option 480 : 4-port Test Set, 9 kHz to 8.5 GHz

• Agilent N4431B : 4-port RF E-Cal module

The following test equipment is currently being used in the ATC under evaluation:

ADVANTEST R3768-0400-1010

TDR/TDT Oscilloscope (1 set) (1) Tektronix TDS8200B

(1) Tektronix 80E04 TDR-module

(1) Tektronix 80E03 Sampling module

DC Source/Meter and Probe (1 set) (1) ADVANTEST R6240A

Digital Multi-Meter (1 set) (1) ADVANTEST R6552

Resistor for HPD Test (1 set) (1) For Sink Testing; 10kΩ

(1) For Source Testing; 1.2kΩ



DC power supply (1 set) (1) KENWOOD PW18-1.8AQ

Digital LCR Meter (1 set) (1) HIOKI 3522-50 Digital LCR Meter

(1) HIOKI 9143 Probe

(1) HIOKI 9268 DC Bias unit

HDMI Cable Emulator (1 set) Type 1




• Automotive EA: Agilent E4887A-107

Type 2



EDID Reader/Analyzer + EDID Emulator (1 set) Quantum Data 882CA with latest evaluation software

I2C Analyzer (1 set) (1) Yokogawa DL1640/F5 Oscilloscope (includes I2C Analyzer option)

Jitter/Eye Analyzer (1 set) (1) Digital Oscilloscope

(2) Differential Probes

Tektronix TDSHT3 software

TMDS Signal Generator (1 set) (1) Tektronix DTG5274 2.7GHz Digital Timing Generator (DTG)

• (3) Tektronix DTGM30 output modules for DTG5274

• (2) Tektronix 012-1503-00 Pin Header SMB 51cm (20in.)

• (2) Tektronix 015-0671-00 SMB-BNC adapter



(1) Tektronix AWG710 Arbitrary Waveform Generator

(2) Mini-circuits ZFBT-4R2GW Bias-Tee

• (2) SMA (female)-SMA (female) adapters (1 for each Bias-Tee)

• (2) BNC (female)-SMA (male) adapters (1 for each Bias-Tee)

(1) TPA-P-TDR (in some test configurations, where driving a Sink directly, see above)

(1) TPA-R-TDR (in some test configurations, where driving a cable, see above)

(10 or 12) SMA Cables: either Tektronix 174-1428-00 (1.5 meters) or Tektronix 174-1341-00 (1 meter), as needed to connect output of equipment to TPA boards and to deliver synchronization signal(s) between AWG and DTG

• (2, optional) SMA (male)-SMA (male) adapters (1 for each Bias-Tee) may be used in place of an SMA cable to directly connect Bias-Tee to AWG front panel

(1) SMA (female)-BNC (male) adapter

Transition Time Converter (1 set)

For use with the Agilent E4887A-007 ParBERT


• assorted: 60ps PIcosecond Pulse Labs 5915-110-60PS

For use with the Tektronix DTG5274

• Tektronix 250ps 015-0711-00

- 74.25MHz 250ps+250ps+250ps

Encoding Analyzer (1 set) (1) Panasonic UITA-1000-based setup, described in section 4.2.4.1

Protocol Analyzer

Use same Encoding Analyzer described above

Video Timing Analyzer


Video Picture Analyzer


Audio Timing Analyzer


Audio/Video Protocol Generator (1 set)

Use same TMDS Signal Generator (above).



High-Speed Configurations: In addition to the test equipment above, ATCs that are configured to perform testing at TMDS clock frequencies above 74.25MHz have the following equipment.

TPA Fixtures • Agilent N1080A Opt H01 TPA-Plug & Opt H03 TPA-Control

- Agilent N5380A TPA-SMA termination and probe head

• Agilent N1080A Opt H02 TPA-Receptacle & Opt H03 TPA-Control

- Agilent N5380A TPA-SMA termination and probe head

• EFF-HDMI-TPA-P available from Efficere Technologies as part of set ET-HDMI-TPA-S

• EFF-HDMIC-TPA-P available from Efficere Technologies as part of set ET-HDMIC-TPA-S

• EFF-HDMI-TPA-R / EFF-HDMI-TPA-R-CAL available from Efficere Technologies as part of set ET-HDMI-TPA-S

• EFF-HDMIC-TPA-R / EFF-HDMI-TPA-R-CAL available from Efficere Technologies as part of set ET-HDMIC-TPA-S

Digital Oscilloscope (1 set) • Agilent DSO 80000B >=8GHz Digital Oscilloscope

- DSO80000-001 1-2M memory

• Tektronix DPO70000 >=8 GHz Oscilloscope (e.g. DPO70804) with option 2XL or Tektronix DSA70000 >=8 GHz Oscilloscope (e.g. DSA70804) (equivalent)

Differential Probe (4 sets) • Agilent 1169A (12GHz) probe amplifier

- Agilent N5380A probe head

• Tektronix P7313SMA (13GHz)

Differential SMA Probe (2 sets)

Differential Probe (above) is used.

Single-Ended Probe (2 sets) • Agilent 1169A

- Agilent N5380A probe head

• Tektronix P7313SMA (13GHz), configured to perform single-ended measurements.



Jitter/Eye Analyzer (1 set) • Recommended Digital Oscilloscope #2 (see section 4.2.1.3)

- Agilent DSO 80000B >8GHz Digital Oscilloscope

DSO80000-001 1-2M memory

- Agilent N5380A probe head + Agilent 1169A

- Agilent HDMI compliance test software N5399A

• Recommended Digital Oscilloscope #3 (see section 4.2.1.3)

- Tektronix DPO70804 with option 2XL or Tektronix DSA70804 (equivalent)

- Tektronix P7313SMA

- Tektronix TDSHT3 software version 3.3.0

TMDS Signal Generator (1 set) Agilent Configuration:

• (1) Agilent E4887A-007 TMDS Signal Generator

• (1) Agilent E4887A-307 Accessory and Cable Kit for E4887A-007 TMDS Signal Generator

• (2) Agilent E4438 series Signal Generators bandwidth >4GHz

- Option 504 250kHz - 4GHz

- Option 601 Internal baseband generator, 8Msa memory with digital bus

• (8) Picosecond Pulse Labs 5542 Bias-Tee

- available as part of (1) BIT-HDMI-BTK-0001 Bias-Tee Kit for E4887A-007

• (1) Agilent E4887A-207 HDMI Frame Generator Software for E4887A-007

• (1) Agilent Test Automation Software Platform N5990A

- Option 150 HDMI Electrical High-Speed Sink Test Library

- Option 250 Interface to N5399A Electrical Source Tests

Tekrtronix Configuration:

• (1) Tektronix DTG5334, 3.4GHz Digital Timing Generator

- (3) Tektronix DTGM30 output modules

- (1) Tektronix DTGM32 clock output module

• (1) AFG or AWG jitter source, either:

- Tektronix AFG3102 Arbitrary Function Generator (AFG), or,

- Tektronix AWG710 Arbitrary Waveform Generator (AWG)

(10 or 12) SMA Cables: either Tektronix 174-1428-00 (1.5 meters) or Tektronix 174-1341-00 (1 meter), as needed to connect output of equipment to TPA boards and to deliver signal(s) between AWG, AFG and DTG

Tekrtronix Configuration:



• (2) Tektronix AWG7102 Arbitrary Waveform Generators (AWG) with Opt 01 and 06 or

• (2) Tektronix AWG7122B Arbitrary Waveform Generators ( AWG) with Opt 01,06 and 08 or upgraded AWG7000B series.

• (1) Tektronix AFG3102/3252 Arbitrary Function Generator ( AFG)

• (8) Mini Circuits Bias Tee model number ZX-85 12G+ needed to connect to the output of the AWG analog ports

• (10 or 12) SMA Cables: Tektronix 174-4944-01 ( 1.5 meters), as needed to connect output of Bias Tees to Efficere TPA boards

• (1) DC Power Supply: To Connect 5V to the +5V Power (P_5V) and DDC/CEC Ground (P_GND) on TPA-P

• (1) Tektronix HDMI Fixture Set ET-HDMI-TPA-S or ET-HDMIC-TPA-S or TF-HDMID-TPA-KIT or TF-HDMIE-TPA-KIT

• (1) HT3 software version with Direct Synthesis capability version 5.0 or equivalent.

• (8) Picosecond filter 5915-110-120PS

• (8) 6dB Attenuators ( for intra Pair skew test only). Pico Second Pulse labs 5510-110-6dB

• (8) 0-6400MHz Low Pass filter ( for intra Pair skew test only).Mini Circuits VLF-6400+

Transition Time Converter (1 set)

For use with the Agilent E4887A-007 ParBERT



• 165MHz: 200ps Picosecond Pulse Labs 5915-110-200PS


• 340MHz: 60ps PIcosecond Pulse Labs 5915-110-60PS

For use with the Tektronix DTG5334

• Tektronix 150ps 015-0710-00

• Tektronix 250ps 015-0711-00

• These devices can be configured for configuring the eye to meet the following:

- 74.25MHz 250ps+250ps+250ps

- 148.5MHz 250ps

- 165MHz 150ps+150ps

- 222.75MHz 150ps

- 340MHz 0ps



HDMI Cable Emulators Type 1



Type 2



Type 3


Protocol Analyzer (1) Agilent N5998A -based setup

Video Timing Analyzer

Use same Protocol Analyzer described above

Video Picture Analyzers


Audio Timing Analyzer


Audio/Video Protocol Generator (1 set)


And

ASTRODESIGN VG-849-C-A Unit



Appendix 2 – Software CRU Technology (Informative)

The HDMI specification mandates the Clock Recovery Unit (CRU) utilizing a Phase Locked Loop (PLL) with first order transfer function characteristics, in the measurement of the jitter and the eye diagram3. The use of a PLL based CRU implemented in hardware has the drawback that correlation of measurement results is difficult due to differences in vendor specific implementations. There are software PLL techniques that exist to extract clock and timing data from a serial data stream. One such technique uses a time domain convolution integral technique that can address the requirement, however this technique demands very high performance digital processing. The method proposed in this paper shows a more practical and affordable way to satisfy the requirement.

4

PLL Characteristics

PhaseDetector

Kp

LPFA(s)

VCOKv

G(s)

Divider1/N

In Out

G(s) = Out/In

In Out

Fig.1 PLL Functional Block

Fig. 1 shows a simplified block diagram of generic phase locked loop (PLL). A PLL consists of the Phase Detector (PD), Low Pass Filter (LPF), Voltage Controlled Oscillator (VCO) and Frequency Divider (FD).

3 Refer to section 4.2.3 of HDMI Specification Version 1.0 4 This Technology is provided by Tektronix Inc..



The phase of the input signal is compared to the phase of FD output. The input of the FD is the output of VCO, whose frequency is controlled by the LPF output, which is a filtered form of the PD output. When the phase of FD output is leading compared to the input phase, the PD output changes to decrease the VCO frequency, thus the FD output will lag. Due to the effect of this feedback mechanism, the frequency of VCO is locked to N-times of the input frequency.

As the LPF restricts the quick variation of the incoming signal, high frequency changes in the input phase will be attenuated before being transferred to consecutive functional blocks. Therefore the VCO output represents the average phase of input signal even if the input signal does not have the constant phase rotation i.e. frequency. Using this approach, the PLL circuitry is able to recover the clock information from the modulated input signal.

The transfer function from the input phase to the output phase is represented by following equation:

)(

)()(1

)(

)(sHKvKpNs

sHKvKpN

NssHKvKp

ssHKvKp

sG⋅⋅+⋅

⋅⋅⋅=

⋅⋅⋅

+

⋅⋅

=

where Kp and Kv are the sensitivity coefficients of PD and VCO respectively, and N is the division factor of FD. H(s) is the transfer function of LPF in the frequency domain.

Assuming N, Kp and Kv are constant, the function G(s) can be simplified as follows:

)(

)()(1

2

sHKssHKsG

⋅+⋅

=

It should be noted that G(s) becomes the first order low-pass filter only when H(s) is constant, namely when H(s) is non-dependent on the frequency. This means that H(s) is no longer a low-pass filter in this case. On the contrary, it is well known that the PLL will not be stable without low-pass filter in place of H(s). Therefore, the first order transfer function which is required by the HDMI CRU may not be realized by the PLL circuitry shown in Fig.1.



Conventional Method

ExtractEdge

PLLG(t)

ClockJitter

EyeDiagram

A to D

A to DDataW aveform

Clock W aveform

X(t):Raw TIE Y(t) : Recovered TIE(Recovered Clock)

Wc(t)

Wd(t)

Fig.2 Conventional Clock Recovery Method

Fig. 2 shows a simple PLL design for CRU, measuring clock jitter and eye diagram within a digital oscilloscope. The input signal is first converted to digital information with an A/D converter. The phase of the input signal is extracted by finding the rising (or falling) edges of the digitized signal. A digital simulation of an actual hardware PLL circuit may be realized because the input and output signals exist as just digital information. In this case, the voltage values at several points in the PLL circuit are expressed in the time domain, and are repetitively calculated to derive their time variation. The time interval of the calculation must be sufficiently small in order to retain the high precision of the simulation. Hence, it requires a significant amount of digital processing capability to simulate the actual PLL within a reasonable amount of time.

In this method, the phase transfer function of the PLL is determined by the characteristics of the simulated components. As long as the simulation observes the law of physics, the resultant transfer function does not differ from that of the actual hardware PLL circuit. Given the time to process the data in the simulation, using this method is not advisable. Hence, the first order transfer function to be realized by this method may not be useful too.

Another method to simulate a PLL in software is to use its time domain transfer function from the input phase error to output timing information. The impulse response is used as the time domain transfer function. In this case, given the input signal X(t), the integral operation shown below gives the output signal Y(t).

∫∞

−∞=

−⋅=τ

ττ dtGtXtY )()()(



Where G(t) is the time domain representation of G(s) mentioned in the previous section. This is so-called convolution integral. In this case, the input signal is represented as discrete-time samples. The integration above should also be performed in discrete fashion as follows.

∑ ∑∞

−∞=

∞

−∞=

⋅−=−⋅=m m

mxmngmnxmgny )()()()()(

There are two disadvantages in time domain convolution method. One is that it still requires a huge number of multiplications and additions to calculate the values of all time points, as easily seen from the form of the equation above. Another is that it is not always practical to express the time domain transfer function as an explicit mathematical representation. In many cases, the human interpretation of the transfer function is made in frequency domain. Some means of conversion is required to derive the time domain response from the frequency domain characteristics. This requirement will complicate the design of the user interface.

It is important to mention that the first order transfer function characteristics can be realized by this convolution method, while it has the difficulties described above. Also important is that this method is inherently stable as far as an appropriate impulse response is adopted, because it does not include any feedback loop.

Proposed Method

E xtractE d ge F F T X (s) x G (s) IF F T

C lockJ itter

E yeD iagram

A to D

A to DD ataW aveform

C lock W aveform

G enerateG (s)

P L LP aram eters

G (s)

X (t):R aw T IE X (s) Y (s)

Y (t) : R ecovered T IE(R ecovered C lock )

W c(t)

W d(t)

Fig.3 Proposed Clock Recovery Method

The PLL circuitry acts in whole as a low pass filter for incoming time information. In the frequency domain the filter function is simply realized by multiplication of the frequency response coefficients to the input spectrum. The convolution integral in the time domain is equivalent to simple multiplication between frequency-domain functions derived by the well-known Fourier Transform. If the time information and the PLL characteristics are transformed to frequency domain, the PLL processing becomes much easier than in the time domain.

)()()( sXsGsY ⋅=

As seen in the above equation, the calculation becomes one multiplication (though between complex numbers) per sample point. Hence, it keeps the demand for digital processing performance very low.

After filter function is performed, the time information of the output signal may be derived with inverse transformation. Using FFT algorithm the forward and inverse transformation can be



executed in relatively short time compared to simulation in time domain. Thus, the total time to calculate the recovered clock can be significantly reduced.

Jitter Measurement

The jitter of the incoming clock signal is measured by statistically analyzing the time difference between the incoming and recovered clocks. As the timing information of both signals is already retained in digital form, the jitter calculation is simple and straightforward. Usually the peak-to-peak jitter value and the standard deviation (i.e. RMS) jitter value are used for evaluating the signal quality.

( )N

TTJ

TTJpp

n∑ Δ−Δ=

Δ−Δ=2

minmax

σ

Appropriate sample points should be chosen to measure the jitter for specific case such as the clock-to-data jitter at the first bit. Such a requirement is addressed by specifying a rectangular area with time range of [–T..+T] and voltage range of [-V..+V]. To obtain an accurate measurement, a large number of samples are required. As the area restriction above reduces the number of measured samples, the capability to process more and more samples is desired. Using the proposed method, it becomes realistic to gather huge amount of statistical information for more precise measurement.

Eye Diagram

An eye diagram is the incoming data waveform repeatedly drawn with the recovered clock used as the time reference. The recovered clock is represented as time information hence it may be used to derive the position where the input data waveform should be drawn. The resulting diagram will precisely indicate the true marginal area with which the reliability of data transmission is determined.

The vertical coordinate to draw the incoming waveform is determined by using the data value itself. To draw the horizontal coordinate (x) is determined by the following equation.

TrefTnXcoord −=

Where, Tn is the time of incoming waveform, and Tref is the time of the reference signal, i.e. the recovered clock signal.



Appendix 3 – Capabilities Declaration Form (CDF) The following declaration must be completed prior to testing. The options that are supported will be used to determine which groups of tests are performed.

Source/Sink/Repeater Characteristics Product Category and Info Field Name Field Definition Choices Manufacturer What is the product manufacturer’s name? <any> Model Name/Number What is the model name/number of the product? <any> HDMI_output_count How many HDMI output ports are on product? 0…X HDMI_input_count How many HDMI input ports are on product? 0…X HDCP_Supported Is HDCP supported on this DUT? Y/N

CEC Characteristics Field Name Field Definition Choices CEC_protocol Is CEC protocol supported? If this field is "Y", then CEC

CDF shall be submitted. Y/N

Independent_CEC Are the CEC signals on input connectors independent? (Meaning: no physical connection between inputs and DUT has a logical address of 0 for all inputs). [Note: If device has no HDMI inputs, answer “N”.]

Y/N

CEC_root_device Does the device act as a CEC root device? (Meaning: DUT is a Sink or Repeater and DUT’s Physical Address is 0.0.0.0 and DUT’s EDID(s) [if present] contain Source Physical Address of P.0.0.0). [Note: If device has no HDMI inputs, answer “N”.]

Y/N

HEAC Characteristics Field Name Field Definition Choices HEC_supported Is HEC supported? If this field is "Y", then HEAC CDF

shall be submitted. Y/N

ARC_supported

Is ARC supported? If this field is "Y", then HEAC CDF shall be submitted.

Y/N



Source Characteristics A copy of the following table must be completed for each of the HDMI output ports on the product (field HDMI_output_count, above). If several ports have identical characteristics, only one of the following needs to be completed for that group or ports. Please indicate which ports are covered by this section.

Which HDMI output ports are covered by this section?

Is this section part of a mini-CDF meant for Repeater functionality testing?

Connector Vendor Name: Connector Model Name/ID:

Field Name Field Definition Choices Repeater Mini-CDF

Electrical Source_DDC_cap_power-on

Should the DDC capacitance be measured with DUT powered on? (Note: HPD will be false during measurement.)

Y/N <Adopter fills in field>




Video Source_HDMI_YCBCR

Will the product transmit an HDMI video signal using YCBCR (4:4:4 or 4:2:2) pixel encoding under some conditions (user selection, EDID indication etc.)?

Y/N <Fill in>

Source_AVI_Required

Is the product ever required to transmit an AVI InfoFrame?

Y/N <Fill in>

Source_AVI_Supported

Does the product support the transmission of the AVI InfoFrame under some conditions?

Y/N <Fill in>

Source_AVI_Info_Available

Is any of the following information available and valid at the Source?: Active Format Aspect Ratio, bar widths, overscan vs. underscan, non-uniform picture scaling, or the colorimetry of the video.

Y/N N

Source_Alt_Colorimetry

Will the product ever transmit video using a non-default (i.e. alternate) colorimetry under some condition? (e.g. using BT.709 for 480p or BT.601 for 1080i).

Y/N N

Source_xvYCC

Will the product ever transmit video using xvYCC colorimetry under some condition?

Y/N <Fill in>

Source_AR_Converter

Does the product have the ability to convert between aspect ratios of 4:3 and 16:9 (and vice versa)?

Y/N N

Source_60Hz

Does the product output standard, enhanced or high-definition 60Hz video formats on any video output in addition to 640x480p @ 60Hz?

Y/N <Fill in>

Source_50Hz

Does the product output standard, enhanced or high-definition 50Hz video formats on any video output?

Y/N <Fill in>

Source_Above_165 Does the product support any video format/color mode with a TMDS clock frequency above 165MHz?

Y/N <Fill in>

Source_Deep_Color Does the product support any Deep Color modes?

Y/N <Fill in>




Source_Video_Formats

Which HDMI video formats are supported by product and at which color depths? (Select supported items below.)

1: 640x480p/60Hz 4:3 not supported (N), 24 bit, 30 bit, 36 bit, and/or 48 bit

<Fill in>

2: 720x480p/60Hz 4:3 not supported (N), 24, 30, 36, and/or 48

<Fill in>


<Fill in>


<Fill in>

5: 1920x1080i/60Hz 16:9 not supported (N), 24, 30, 36, and/or 48

<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>


<Fill in>

Source_Additional Formats

Which other CEA video formats (not listed above) are supported by product?

CEA video format numbers or “none”

None

Source_Non-CEA_Formats

Can the product support formats that are not described in [HDMI 6.3]?

Y/N N




Source_720p60_Other

1280x720p @ 59.94/60Hz on non-HDMI output?

Is DUT capable of transmitting timing above using any component analog or uncompressed digital video output OTHER than the tested port?

Y/N N

Source_1080i60_Other

1920x1080i @ 59.94/60Hz on non-HDMI output?

…supported on output other than tested port?

Y/N N

Source_480p60_Other

720x480p @ 59.94/60Hz on non-HDMI output?


Y/N N

Source_720p50_Other

1280x720p @ 50Hz on non-HDMI output?


Y/N N

Source_1080i50_Other

1920x1080i @ 50Hz on non-HDMI output?


Y/N N

Source_576p50_Other

720x576p @ 50Hz on non-HDMI output?


Y/N N

Source_3D Does DUT support 3D formats?

Y/N <Fill in>

Source_Mandatory_3D_Video_Formats Which HDMI mandatory 3D video format timings are supported by product?

32: [email protected]/24Hz (Frame packing)

Y/N <Fill in>


Y/N <Fill in>

19: 1280x720p@50Hz (Frame packing)

Y/N <Fill in>




5: [email protected]/60Hz (Side-by-Side (Half))

Y/N <Fill in>

20: 1920x1080i@50Hz (Side-by-Side (Half))

Y/N <Fill in>

32: [email protected]/24Hz (Top-and-Bottom)

Y/N <Fill in>


Y/N <Fill in>

19: 1280x720p@50Hz (Top-and-Bottom)

Y/N <Fill in>

Source_Other_Primary_3D_Video_Formats Which HDMI other Primary 3D video format timings are supported by product?

5: 1920x1080i@ 59.94/60Hz (Frame packing)

Y/N <Fill in>

20: 1920x1080i@50Hz (Frame packing)

Y/N <Fill in>

34: 1920x1080p@30Hz (Frame packing)

Y/N <Fill in>


Y/N <Fill in>


Y/N <Fill in>


Y/N <Fill in>

19: 1280x720p@50Hz (Side-by-Side (Half))

Y/N <Fill in>


Y/N <Fill in>


Y/N <Fill in>

31: 1920x1080p@50Hz (Top-and-Bottom)

Y/N <Fill in>


Y/N <Fill in>




Source_4Kx2K Does DUT support 4K x 2K formats?

Y/N <Fill in>

Source_4Kx2K_Video_Formats Which HDMI 4K x 2K video format timings are supported by product?

1: 4K x 2K 29.97, 30Hz Y/N <Fill in>

2: 4K x 2K 25Hz Y/N <Fill in>

3: 4K x 2K 23.98, 24Hz Y/N <Fill in>

4: 4K x 2K 24Hz (SMPTE) Y/N <Fill in>

Source_Q_FullRange Is the product capable of transmitting video using RGB “Full” quantization range under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_YQ_FullRange Is the product capable of transmitting video using YCC “Full” quantization range under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_CN_Photo Is the product capable of transmitting video using Content Type of Photo under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_CN_Cinema Is the product capable of transmitting video using Content Type of Cinema under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_CN_Game Is the product capable of transmitting video using Content Type of Game under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_sYCC601 Is the product capable of transmitting video using sYCC601 colorimetry under

Y/N <Fill in>




EDID indication? If “Yes”, the appropriate content must be supplied.

Source_AdobeYCC601 Is the product capable of transmitting video using AdobeYCC601 colorimetry under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>

Source_AdobeRGB Is the product capable of transmitting video using AdobeRGB colorimetry under EDID indication? If “Yes”, the appropriate content must be supplied.

Y/N <Fill in>




Audio Source_Basic_Audio

“Basic Audio” supported?

Y/N Y

Source_PCM_Channels

Max supported L-PCM Channel Count

0, 2…8 channels 2 channels

Source_ Max_Fs_2Ch

L-PCM Maximum Freq for 2-channel audio.

32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, or 192kHz

48kHz

Source_ Max_Fs_Multi-Ch

L-PCM Maximum Freq for multi-channel audio.

32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, or 192kHz

48kHz

Under what conditions can above occur

<Media required, signal input required, UI actions, etc.>

Always

Source_NonPCM_Types

Additional audio Coding Types supported

‘None’ or 861-D Table 19 CT values: 0…8

None

2: AC-3 (Dolby Digital) Y/N <Fill in> 3: MPEG1 (Layers 1 &

2) Y/N N

4: MP3: MPEG1 Layer 3

Y/N N

5: MPEG2 (multichannel)

Y/N N

6: AAC Y/N N 7: DTS Y/N <Fill in> 8: ATRAC Y/N N 9: One Bit Audio Y/N N 10: Dolby Digital + Y/N N 11: DTS-HD Y/N N 12: MAT (e.g. MLP,

Dolby TrueHD) Y/N N

13: DST Audio Y/N N 14: WMA Pro Y/N N



Field Name Field Definition Choices RepeaterMini-CDF

Source_NonPCM_MaxFs

Maximum fS for non-PCM formats (where fS = ACR rate)

N/A, 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, or 192kHz

N/A

Source_HBRA Does DUT support any High Bitrate Audio formats such as Dolby TrueHD (MAT/MLP) or DTS-HD Master Audio?

Y/N <Fill in>

Source_HBRA_Formats If Y, then which formats are supported?

Dolby TrueHD, DTS-HD MA, other (enter a specific name)

<Fill in>

Source_One_Bit_Audio Does DUT support One Bit Audio (e.g. SuperAudio CD) transmission across this HDMI output?

Y/N <Fill in>



Sink Characteristics A copy of the following must be completed for each of the HDMI input ports on the product (field HDMI_input_count, above). If several ports have identical characteristics, only one of the following needs to be completed for that group of ports. Please indicate which ports are covered by this section.

Which HDMI input ports are covered by this section?

Is this section part of a mini-CDF meant for Repeater functionality testing?

Connector Vendor Name: Connector Model Name/ID:


Electrical Sink_Diff_PowerOn

Does the product require that power be applied when termination impedance is measured?

Y/N <Adopter fills in field>

Sink_Term_Distance

If Sink_Diff_PowerOn is ‘Y’ then: For an impedance measurement, what is the length that can be correctly measured with power off? The length is defined as the number of nsecs it takes for a pulse to travel from the input connector, begin to reflect from the termination impedance, and travel back to the input connector.

<any number>

<Fill in>

Sink_HPD_True

Besides an active ‘+5V Power’ signal, what additional conditions are required for the HPD signal to be TRUE? E.g. If the HPD signal is asserted whenever the +5V Power signal is detected, answer “None”. If the DUT must be powered-on, answer “Power-On”.

<Required condition for HPD to be TRUE>

<Fill in>




Video < For video format support, refer to EDID > Sink_Display

Does the device display video? Y/N <Fill in>

Sink_Deep_Color

Does the device support Deep Color? Y/N <Fill in>

Sink_DC_30bit

Does the device support Deep Color at 30 bits per pixel?

Y/N <Fill in>

Sink_DC_36bit


Y/N <Fill in>

Sink_DC_48bit


Y/N <Fill in>

Sink_DC_Y444

Does the device support Deep Color in YCbCr 4:4:4?

Y/N <Fill in>

Sink_xvYCC

Does the device support xvYCC601 or xvYCC709?

Y/N <Fill in>

Sink_Above_165 Does the product support any video format/color mode with a TMDS clock frequency above 165MHz?

Y/N <Fill in>

Sink_PrimaryAR

If the device displays video, what is the primary aspect ratio of display?

4:3, 16:9, other

<Unused, leave blank>

Sink_HDTV

Does the device support HDTV capability?

Y/N <Fill in>

Sink_YUV_On_Other

Is the product capable of receiving a color-difference color space across any other component analog or digital video interface?

Y/N <Fill in>

Sink_60Hz

Does the product support standard, enhanced or high-definition 60Hz video formats on any video input in addition to 640x480p @ 60Hz?

Y/N <Fill in>

Sink_50Hz

Does the product support standard, enhanced or high-definition 50Hz video formats on any video input?

Y/N <Fill in>

Sink_Video_Formats

Which HDMI “Primary” video format timings are supported by product? (Select supported items below.)

1: 640x480p/60Hz 4:3 Y/N N 2: 720x480p/60Hz 4:3 Y/N Y(60Hz) 3: 720x480p/60Hz 16:9 Y/N N 4: 1280x720p/60Hz 16:9 Y/N N 5: 1920x1080i/60Hz 16:9 Y/N <Fill in> 6: 1440x480i/60Hz 4:3 Y/N N



7: 1440x480i/60Hz 16:9 Y/N N 16: 1920x1080p/60Hz 16:9 Y/N <Fill in> 17: 720x576p/50Hz 4:3 Y/N Y(50Hz) 18: 720x576p/50Hz 16:9 Y/N N 19: 1280x720p/50Hz 16:9 Y/N N 20: 1920x1080i/50Hz 16:9 Y/N <Fill in> 21: 1440x576i/50Hz 4:3 Y/N N 22: 1440x576i/50Hz 16:9 Y/N N 31: 1920x1080p/50Hz 16:9 Y/N <Fill in> Sink_Additional_Formats

Which other CEA video formats (not listed above) are supported by product?

CEA video format #s or “none”

None

Sink_720p60_Other

1280x720p @ 59.94/60Hz on non-HDMI?

Is DUT capable of supporting above timing using any component analog or uncompressed digital video output OTHER than the tested HDMI output?

Y/N N

Sink_1080i60_Other

1920x1080i @ 59.94/60Hz on non-HDMI?

Is DUT capable of supporting …on output OTHER than the tested HDMI output?

Y/N N

Sink_480p60_Other

720x480p @ 59.94/60Hz on non-HDMI?


Y/N N

Sink_720p50_Other

1280x720p @ 50Hz on non-HDMI?


Y/N N

Sink_1080i50_Other

1920x1080i @ 50Hz on non-HDMI?


Y/N N

Sink_576p50_Other

720x576p @ 50Hz on non-HDMI?


Y/N N

Sink_3D Does DUT support 3D formats? Y/N <Fill in>

Sink_3D_Additional Does DUT support 3D additional formats in addition to mandatory 3D formats?

Y/N <Fill in>



Sink_Image_Size Does DUT indicate correct size at Image Size area in EDID?

Y/N N

Sink_4Kx2K Does DUT support 4K x 2K formats? Y/N <Fill in>




Audio < For audio format support, refer to EDID > Sink_Audio_Input

Can analog or digital audio be carried on any non-HDMI input on the device?

Y/N Y

Sink_Supports_AI

Does Sink support ACP, ISRC1 or ISRC2 packets?

Y/N Y

Sink_Basic_Audio

Does Sink support Basic Audio? Y/N Y

Sink_HBRA Does Sink support High-Bitrate Audio Stream Packets?

Y/N <Fill in>

Sink_HBRA_Format Which High-Bitrate Audio format is supported by Sink?

Dolby TrueHD Y/N <Fill in> DTS-HD Master Audio Y/N <Fill in> Sink_One_Bit_Audio Does Sink support One Bit Audio

sample Packets? Y/N <Fill in>

Other Sink_Dual_Link_DVI

Does the product also support dual-link DVI?

Y/N <Fill in>

Sink_Max_TMDS_Clock

What is the maximum TMDS clock frequency supported by the product?

Any value, e.g. 74.25, 148.5, 222.75, etc.

<Fill in>

If max frequency is other than 27 and 74.25MHz, what video format and color depth are supported at this max frequency?

e.g. 1600x1200 60Hz, 24-bit


Sink_Lipsync_Indicated

Are lipsync latency values indicated in the EDID?

Y/N <Unused, leave blank>

Sink_Dual_Latencies Is audio or video latency substantially different when handling interlaced video formats than when handling progressive video formats?

Y/N (N if above field is N)


Sink_Video_Latency What is the “progressive video” video latency indicated in the EDID, in milliseconds?

Any number <Unused, leave blank>

Sink_Audio_Latency What is the “progressive video” audio latency indicated in the EDID, in milliseconds?


Sink_Video_I_Latency What is the “interlaced video” video latency indicated in the EDID, in milliseconds?




Sink_Audio_I_Latency What is the “interlaced video” audio latency indicated in the EDID, in milliseconds?




Repeater Characteristics If the Repeater product is capable of carrying an audio or video stream from an input port to an output port, it is required to submit a Source “Mini-CDF” and a Sink “Mini-CDF” for the product as well as the Repeater CDF below. In addition, if the device contains an A/V generating function (such as STB or DVD player) or an A/V consuming function, it is required to complete a Source CDF or a Sink CDF describing those characteristics.

Field Name Field Definition Choices Categories Repeater_Source_Fn

Does the product contain an A/V generating function (such as STB or DVD player)?

Y/N

Repeater_Sink_Fn

Does the product contain an audio or video consuming function, such as a display or an audio amplifier?

Y/N

Repeater_IO_Category

Which I/O category applies to the product? a, b, c, d

Repeater_Through

Does product include a ‘Through’ processing block? Y/N

Repeater_Convert

Does product include a ‘Convert’ processing block? Y/N

Repeater_Switch

Does product include a ‘Switch’ processing block? Y/N

Repeater_Mix

Does product include a ‘Mix’ processing block?

Y/N

Repeater_Distribute

Does product include a ‘Distribute’ processing block? Y/N

Repeater_Duplicate

Does product include a ‘Duplicate’ processing block? Y/N

Repeater_Exchange

Does product include an ‘Exchange’ processing block? Y/N



Field Name Field Definition Choices Audio Repeater_AudioPass

Audio passed-through Repeater? Y/N

Repeater_AudioRender

Audio rendered on Repeater? (If Yes, fill out Sink audio handling section above for rendered audio formats)

Y/N

CEC Repeater_CEC

Is CEC supported? Y/N

Repeater_CEC_Output

Which output port is connected to CEC? <port name or number>

Repeater_PA_Copy

Does Physical Address simply get copied from the Sink to the internal EDID (simple repeater case)?

Y/N

Repeater_PA_Increment

Does Physical Address get incremented for each input port?

Y/N



Cable Assembly Characteristics Connector Vendor Name: Connector Model Name/ID:

Field Name Field Definition Choices Cable_Type

Which of the following best describes the cable type: (Plain) Wire: Wire-only construction with no circuit components (neither active nor passive). Passive (Equalized): Wire plus passive circuit components. No active circuit components. Active: Contains active circuit components with equalizer function. Does not have Tx or Rx function. Converter: Contains Rx and Tx function. Any Transmission media like wireless, optical fiber etc. may be used between Rx and Tx function. Acts as 1to1 repeater where both ends are cable plug.

Wire, Passive, Active Converter

HDCP_Supported Is HDCP supported by this cable? . If the Cable_Type is not Converter, then this value must be “N”

Y/N

Cable_Category

Which HDMI 1.3-defined Cable Category does the cable fall into? Category 1 (supports all frequencies up to 74.25MHz, or, Category 2 (supports all frequencies up to 340MHz).

1, 2

Cable_Unidirectional

For proper operation, does cable require specific end to be connected to Source device?

Y/N

Cable_CEC_Connection Valid connection exists between CEC pins at both cable ends. In other words, there is a direct electrical connection between CEC pins on both connectors. In case of “Wire”, this value must be “Y”

Y/N

Cable_DDC_Connection Valid connection exists between SCL/SDA pins at both cable ends. In other words, there is a direct electrical connection between SDA/SCL pins on both connectors. In case of “Wire”, this value must be “Y”

Y/N



Cable_+5V_Connection Valid connection exists between +5V Power pins at both cable ends. In other words, there is a direct electrical connection between +5V pins on both connectors.In case of “Wire”, this value must be “Y”

Y/N

Cable_HPD_Connection Valid connection exists between +5V Power pins at both cable ends. In other words, there is a direct electrical connection between HPD pins on both connectors.In case of “Wire”, this value must be “Y”

Y/N

Cable_Utility_Connection Valid connection exists between Utility pins at both cable ends. In other words, there is a direct electrical connection between Utility pins on both connectors.In case of “Wire”, this value must be “Y”

Y/N

Cable_Ground_Connection Valid connection exists between CEC/DDC Ground pins at both cable ends. In other words, there is a direct electrical connection between Ground pins on both connectors. In case of “Wire”, this value must be “Y”

Y/N

Cable_Diff_PowerOn

Does the cable require that power be applied when termination impedance is measured? In case of “Wire” or “Passive”, this value must be “N”

Y/N

Cable_Term_Distance

If Cable_Diff_PowerOn is ‘Y’ then: For an impedance measurement, what is the length that can be correctly measured with power off? The length is defined as the number of nsecs it takes for a pulse to travel from the input connector, begin to reflect from the termination impedance, and travel back to the input connector.

<any number>

Cable_DDC_Conv_cap If the Cable_Type is “Converter” Then: Specify the condition that DDC capacitance can be measured with DUT powered on under the test ID 7-13? (Note: HPD will be false during measurement.)

<Adopter fills in field>



Cable_Configuration Which of the following best describes the cable configuration: Home: The cables described in the first four rows of Table 4-1 in the HDMI specification. Automotive_EE: Automotive Cable which has Type E connector on one end and Type E on other end. Automotive_AA:. Automotive CE Relay Cable which has Type A connector on one end and Type A on other end. Automotive_EA: Automotive Relay Cable which has Type A connector on one end and Type E on other end.

Home, Automotive_EE, Automotive_AA, Automotive_EA



Appendix 4 – Test Results Form All Source DUT tests are performed for each output connector on a device therefore, a product with multiple output connectors will require the completion and submission of multiple Source DUT Test Results Forms. This holds true for input connectors on Sink products as well.

The testing of the ”Repeater” functionality of Repeater products requires the completion of a Source results form for each output connector and a Sink results form for each input as well as one Sink form for each port tested for “Consumer” and one Source form for “Generator” functionality (See Section 9, Tests – Repeater for details). In addition a Repeater results form is required.



Test Results Form – Source DUT [Output Port: ]

ID Pass/Fail Comment

7-1: EDID-Related Behavior

7-2: TMDS –VL

VL_MAX = V

D0+ = V, D0- = V

D1+ = V, D1- = V

D2+ = V, D2- = V

CK+ = V, CK- = V

7-3: TMDS – VOFF

VOFF (mV) when power disconnected

D0+ = D0- =

D1+ = D1- =

D2+ = D2- =

CK+ = CK- =

VOFF (mV) in standby

D0+ = D0- =

D1+ = D1- =

D2+ = D2- =

CK+ = CK- =

VOFF (mV) in power off state

D0+ = D0- =

D1+ = D1- =

D2+ = D2- =

CK+ = CK- =

7-4: TMDS – TRISE, TFALL

TRISE TFALL

D0: psec ( TBIT ), psec ( TBIT )

D1: psec ( TBIT ), psec ( TBIT )

D2 : psec ( TBIT ), psec ( TBIT )

CK : psec ( TBIT ), psec ( TBIT )

7-5: <Reserved> - - - - Reserved - - -




7-6: TMDS – Inter-Pair Skew

TIPSKEW_MAX = TCHARACTER

D0-D1:

D0-D2:

D1-D2:

7-7: TMDS – Intra-Pair Skew

TXPSKEW_MAX = TBIT

D0:

D1:

D2:

CK:

7-8: TMDS – Clock Duty Cycle

Clock Duty: Min = %

Max = %

7-9: TMDS – Clock Jitter

Clock Jitter = TBIT

7-10: TMDS – Eye Diagram

D Jitter = TBIT

7-11: +5V Power

55mA: V5V = V

0mA: V5V = V

7-12: Hot Plug Detect

VHPD(LOW) = V

VHPD(HIGH) = V

7-13: DDC/CEC Capacitance

SDA: C1= pF, C2= pF

CDUT = pF

VSDA =

SCL: C1= pF, C2= pF

CDUT = pF

VSCL =

CEC: C1= pF, C2= pF

CDUT_ON = pF

VCEC =

CEC: C1= pF, C2= pF

CDUT_OFF = pF




7-14: CEC Line Connectivity

7-15: CEC Line Degradation

7-16: Legal Codes

7-17: Basic Protocol

7-18: Extended Control Period

7-19: Packet Types

7-20: Reserved

7-21: Min Format Support

7-22: Add’l Format Support

7-23: RGB to RGB-only Sink

7-24: YCBCR to YCBCR Sink

7-25: Video Format Timing

7-26: Pixel Repetition

7-27: AVI InfoFrame

<Audio Tests> Tested A/V Format Combinations:

1) Video = Audio =

2) Video = Audio =

3) Video = Audio =

7-28: IEC 60958/IEC 61937

7-29: ACR




7-30: Audio Packet Jitter

7-31: Audio InfoFrame

7-32: Audio Packet Layout

7-33: Interoperability With DVI

7-34: Deep Color

7-35: Gamut Metadata

7-36: High Bitrate Audio

7-37: One Bit Audio

7-38: 3D Video Format Timing

7-39: 4K x 2K Video Format Timing

7-40: Extended Colorimetry Transmission (without xvYCC)



Test Results Form – Sink DUT [Input Port: ]

The Test Results Form for each Sink DUT port tester also includes an EDID image in both of the following formats:

Text file or human-readable format in hexadecimal with 16 bytes per line. Preferably this file will be interpreted, in-line, with a software tool such as the Silicon Image EDID Analyzer.

Binary file in Intel Hex format

ID Pass/Fail Comment or Value

8-1: EDID Readable

8-2: EDID VESA Structure

8-3 CEA Timing Extension Structure

8-4 TMDS – Termination Voltage

D0+ = V, D0- = V

D1+ = V, D1- = V

D2+ = V, D2- = V

CK+ = V, CK- = V

8-5: TMDS – Minimum Differential Sensitivity

VICM=2.9/2.7V : VDIFF (minimum) = mV

VICM=3.3V : VDIFF (minimum) = mV

8-6: TMDS – Intra-Pair Skew

Video Format:

TMDS clock: MHz

D0: TBIT

D1: TBIT

D2: TBIT

CK: TBIT

TXPSKEW_MAX:




8-7: TMDS – Jitter Tolerance

Case 1 (D_Jitter, C_Jitter) = (0.5MHz, 10MHz)

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

Case 2 (D_Jitter, C_Jitter) = (1.0MHz, 7.0MHz)

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

TMDS clock: MHz

Max D_JITTER: TBIT

Max C_JITTER: TBIT

8-8: TMDS – Differential Impedance

ZDIFF_THROUGH ZDIFF_TERM

D0: min = Ω, max = Ω, Term = Ω



CK: min = Ω, max = Ω, Term = Ω




8-9: DDC/CEC Line Capacitance

SDA: C1= pF, C2= pF

CDUT = pF

SCL: C1= pF, C2= pF

CDUT = pF

VSCL =

CEC: C1= pF, C2= pF

CDUT_ON = pF

VCEC =

C1= pF, C2= pF

CDUT_OFF = pF

8-10: HPD Output Voltage

+5VP=0.0V : VHPD = V



8-11: HPD Output Resistance

VA = , VB = ,

ZHPD = Ω

8-12: +5V Power Max Current

Powered On : A

Powered Off : A

Unplugged from AC: A

8-13: CEC Line Connectivity

8-14: CEC Line Degradation

8-15: Character Synchronization

8-16: Acceptance of All Valid Packet Types




8-17: Basic Format Support Requirements

8-18: HDMI Format Support Requirements

8-19: Pixel Encoding Requirements

8-20: Video Format Timing

Failed format: x @ Hz,

Failed Min or Max frequency (circle)





8-21: Audio Clock Regen.

8-22: Sample Packet Jitter

8-23: Audio Formats

8-24: Interoperability With DVI




8-25: Deep Color

8-27: High Bitrate Audio

8-28: One Bit Audio

8-29: 3D Video Format Timing

8-30: 4K x 2K Video Format Timing

8-31: AVI InfoFrame supporting Extended Colorimetry, Content Type and Selectable YCC Quantization Range



Test Results Form – Repeater DUT


9-1: Repeated Output Port

9-2: Source Functionality

9-3: Repeated Input Port

9-4: Sink Functionality

9-5: Physical Address



Test Results Form – Cable Assembly DUT


5-1: Connector Minimum Envelope

5-2: Wire Assignment

5-3: TMDS Data Eye Diagram

5-4: Intra-Pair Skew

TXPSKEW_MAX = nS = TBIT

5-5: Inter-Pair Skew

TIPSKEW_MAX = nS = TBIT

5-6: Far End Crosstalk

XFE

D0-D1: dB, D1-D2: dB

D0-D2: dB, D1-CK: dB

D0-CK: dB, D2-CK: dB

5-7: Attenuation

ALOW AMID AHIGH

D0: dB, dB, dB

D1: dB, dB, dB

D2: dB, dB, dB

CK: dB, dB, dB

5-8: Differential Impedance

D0: ZDIFF_HI = Ω, ZDIFF_LO = Ω



CK: ZDIFF_HI = Ω, ZDIFF_LO = Ω

5-9: Reserved




5-10: DDC/CEC Line Capacitance and voltage

Result of one side of connector

SDA: C1con= pF, C2con= pF

CDUT_CON = pF

SDA: C1dis= pF, C2dis= pF

CDUT_DIS = pF

SCL: C1con= pF, C2con= pF

CDUT_CON = pF

SCL: C1dis= pF, C2dis= pF

CDUT_DIS = pF

VSCL =

CEC: C1con= pF, C2con= pF

CDUT_CON = pF

CEC: C1dis= pF, C2dis= pF

CDUT_DIS = pF

VCEC =

Result of the other side of connector

SDA: C1con= pF, C2con= pF

CDUT_CON = pF

SDA: C1dis= pF, C2dis= pF

CDUT_DIS = pF

SCL: C1con= pF, C2con= pF

CDUT_CON = pF

SCL: C1dis= pF, C2dis= pF

CDUT_DIS = pF

VSCL =

CEC: C1con= pF, C2con= pF

CDUT_CON = pF

CEC: C1dis= pF, C2dis= pF

CDUT_DIS = pF

VCEC =




5-11: +5V Power +5V Line = 4.8V, drawing 50mA

ISOURCE = mA

+5V Line = 5.3V, drawing 50mA

ISOURCE = mA


VSINK(HIGH) = V

If CDF field Cable_+5V_Connection == “N”


VSINK(HIGH) = V


VSINK(HIGH) = V

5-12: HPD Detect signal +5V Line = 5V

2.4 V to HPD VHPD(HIGH) = V

5.3 V to HPD VHPD(HIGH) = V

0 V to HPD VHPD(LOW) = V

0.4 V to HPD VHPD(LOW) = V

+5V Line = 0V

0 V to HPD VHPD(LOW) = V

0.4 V to HPD VHPD(LOW) = V

Test ID 5-13: DDC communication

Test ID 5-14: CEC communication

Test ID 5-15: Utility Line impedance

D0: ZSINGLE_HI = Ω, ZSINGLE_LO = Ω

Test ID 5-16: Type E Cable Wire Thermal Deformation (ISO 6722)



Test Results Form – Plug & Receptacle


6-1: Connector Mechanical

6-2: GROUP1 Environmental

6-3: GROUP2 Mated Mechanical

6-4: GROUP 3 Insulator Integrity

6-5: GROUP4 Cable Flexing

6-6: GROUP 5 Electrostatic

6-7: GROUP 1: Environmental Performance

6-8: GROUP 2: Mated Mechanical

6-9: GROUP 3: Insulator Integrity

6-10: GROUP 4: Cable Flexing

6-11: GROUP 5: Electrostatic Discharge

6-12: GROUP 6: Drop


HDMI Licensing, LLC. Confidential Page CEC-i

HDMI Compliance Test Specification

Supplement 1

Consumer Electronics Control


HDMI Licensing, LLC. Confidential Page CEC-ii

Document Revision History 1.4 2009/11/09 Clarification of requirements of CEC logical test equipment (CECT 4.1.3)

Addition of Simplay CEC Explorer as Recommended Test Equipment (through out) Addition of clarifications of handling response messages during tests (CECT 6.1, CECT 11.2.4 and CECT 11.2.5) Clarification of ignoring messages rule (CECT 6.2) Addition of test equipments behavior of reporting missing or incorrect CEC messages during tests (CECT 6.5) Updates of load capacitance value (CECT 7 - 2) Clarification to apply the test to pure CEC Switch as well (CECT 8.1) Addition of frame validation test using incorrect EOM (CECT 9.4 - 2) Update line error handling test to apply various corrupt bits (CECT 9.5 -1) Updates Logical Address name Free Use to Specific Use (throughout). Addition to check [Device Type] in the <Report Physical Address> message (CECT 10.1.1.1, CECT 10.2.1.2, CECT 10.2.2, CECT 10.2.3, CECT 10.2.4, CECT 10.2.5 and CECT 10.2.6) Updates of the second TV test (CECT 10.2.1.2) Addition of tests at new Video Processor Device Type (CECT 10.2.6) Clarification of TE’s physical address during the test (CECT 11.1.4 - 1 through -4) Clarification as the DUT supports both <Record On> [“Own Source”] and <Record Off> message (CECT 11.1.4 – 7), Removal of ignoring <Record TV Screen> test (CECT 11.1.4 – 12) Addition the test as the DUT supports <Record Off> but does not support <Record On> [“Own source”]. Clarification of menu language tests (CECT 11.1.6 and CECT 11.2.6) Addition of the test which ensure that the Non-TV DUT does not send <Set Menu Language> (CECT 11.2.6 – 7) Clarification of <CEC Version> tests (CECT 11.1.6, CECT 11.2.6) Removal of the test that the DUT ignores <Report Physical Address> and <Active Source> (CECT 11.1.6 – 3 and CECT 11.2.1 - 2). Clarification of the test method in Device OSD Name Transfer (CECT 11.1.11 - 1). Addition of Press and Hold Operation test (CECT 11.1.13, CECT 11.2.13) Addition of mute / unmute behavior during System Audio Mode change (CECT 11.1.15 and CECT 11.2.15) Addition of tests for new discovering Audio Format Support. (CECT 11.1.15 - 6 and CECT 11.2.15 -13 through -15). Addition of new Audio Return Channel Control tests (CECT 11.1.17 and CECT 11.2.17) Addition of test to check the DUT does not broadcast <Standby> (CECT 11.2.3) Update reference to CDF regarding Timer Programming Tests (CECT 11.1.5 and CECT 11.2.5) Addition of test to check the DUT waits appropriate time after it sends directly addressed <Set System Audio Mode> (CECT 11.2.5 – 18 and -19) Addition of Audio Rate Control initiator test for Non-TV devices (CECT 11.2.16 – 2) Editorial corrections (throughout). CDF updated.


HDMI Licensing, LLC. Confidential Page CEC-iii

1.3c 2008/07/25 Remove 11.1.1-6 and 11.1.1-7 as announced in HDMI Corrigendum 1.3.1.

1.3b 2007/03/05 Added Document Revision History. Fixed typo: “zero” “one”, “one” “zero” (1.1 - 1)

1.3a 2006/11/10 Updated Logical Address names for tuner and playback device (throughout). Updated “preset” to “service” (throughout). Editorial corrections (throughout). Removed unused requirement for programmable timing for Signal Free time (4.1.3.1). Added explanation concerning the use of CEC Device Bridge TPA-CEC-4R (4.1.3.2). Added clarification that DUT should only be connected to other devices when indicated (5.1). Added clarification for testing CEC Switches which are part of a device with other functionality (6.2). Added negative overshoot allowance on the falling edge of CEC line (7-1). Removed the duplicated checks for nominal bit periods (8.2-2, -4. –6). Removed requirement to perform duplicate Framing tests on all HDMI connectors (9). Removal of duplicated test for Signal Free Time when retrying (9.7). Clarification that test 9.7-3 only applies if the DUT can send 2 consecutive messages. Removal of erroneous tests for <Report Physical Address> when DUT has address 15 (10.2.1.2-1 and –2). Addition of tests at new Playback Device Logical Address (10.2.3-3). Addition of tests at new Tuner Device Logical Address (10.2.4-4). Test only one HDMI output (11.1). Removal of Amplifier Logical Address from these tests; and wait more than 200ms before sending <Active Source> (11.1.1-1, -2). Update to new <Image View On> and <Text View On> behaviour (11.1.1-3, -4) and removal of tests concerning menu behaviour with <Image View On> and <Text View On> (11.1.1 -5, -6). Removal of tests with messages coming from address 15 (11.1.1-7 and -8). Removal of tests to check the TV’s response to <Routing Change> and <Routing Information> (11.1.2) (this is now optional). <Inactive Source> added (11.1.2-8 and 11.2.2-4). Standby tests now allow some devices to ignore the messages (11.1.3-2, -3 and 11.2.3-2, -3). Identification of recording tests with a digital tuner (11.1.4-1, -7 and 11.2.4-2). Addition of Analogue and External recording tests (11.1.4-2, -3, -4, -10, -11 and 11.2.4-3, -4, -5). Record On [Own Source] now optional (11.1.4-5, -9 and 11.2.4-6, -7, -8). Timer Programming added (11.1.5 and 11.2.5). <Get CEC Version> and <CEC Version> added (11.1.6 and 11.2.6). Changed parameters in <Tuner Device Status> (11.1.8-1, -2, -3 and 11.2.7-1 to –4, -10 to -14). Updates to Vendor Specific Commands (11.1.9-2, -3 and 11.2.9-2, -3). Update to new name for OSD Display feature (11.1.10). Addition of testing other keys during Device Menu Control (11.1.12-1). Removal of incorrect address in RC Passthrough (11.1.13-5).


HDMI Licensing, LLC. Confidential Page CEC-iv

<Give Device Power Status> becomes mandatory (11.1.4-1, -2 and 11.2.14-1, -2). System Audio Control tests added (11.1.15 and 11.2.15). Audio Rate Control tests added (11.1.16 and 11.2.16). Clarification that tests need only be performed if device can become a source (11.2.1-1, -2). Deck Control parameter names updated (11.2.7). Missing [Status Request] parameter added (11.2.7-14 to –17). Missing [Eject] test added (11.2.7-18). <Select Digital Service> now optional (11.2.8-1, -2, -3). <Select Analogue Service> added (11.2.8-4, -5, -6). Missing [Status Request] parameter added (11.2.8-12, -13). Only test valid user codes for that DUT (11.2.12-7). Now allowed to react to a <User Control Pressed> even if the <User Control Released> was not received (11.2.12-2). Clarifications to CEC Switches (11.3). Updates and clarifications to Invalid Messages (12). CDF updated.


HDMI Licensing, LLC. Confidential Page CEC-v

CECT Table of Contents CEC Page

CECT 1 INTRODUCTION ........................................................................................................ 1

CECT 1.1 Purpose and Scope ..................................................................................................1

CECT 1.2 Normative references ...............................................................................................1

CECT 2 DEFINITIONS ............................................................................................................. 2

CECT 2.1 Glossary of Terms ....................................................................................................2

CECT 2.2 Acronyms and Abbreviations..................................................................................2

CECT 2.3 General Terminology ................................................................................................2

CECT 3 OVERVIEW................................................................................................................. 3

CECT 4 TEST EQUIPMENT .................................................................................................... 4

CECT 4.1 Test Equipment .........................................................................................................4

CECT 5 TEST CONFIGURATIONS......................................................................................... 7

CECT 5.1 Basic Configuration..................................................................................................7

CECT 5.2 HDMI Signal Configuration ......................................................................................7

CECT 5.3 Child Connection Configuration .............................................................................8

CECT 5.4 Source Device to TV Configuration ........................................................................8

CECT 6 GENERAL CONSTRAINTS ....................................................................................... 9

CECT 6.1 Ignoring Messages ...................................................................................................9

CECT 6.2 CEC Switches............................................................................................................9

CECT 6.3 Handling Flow Control............................................................................................10

CECT 7 ELECTRICAL SPECIFICATION .............................................................................. 11

CECT 8 SIGNALING AND BIT TIMINGS .............................................................................. 21

CECT 8.1 Bit Transmission.....................................................................................................21


HDMI Licensing, LLC. Confidential Page CEC-vi

CECT 8.2 Bit Reception...........................................................................................................23

CECT 9 FRAME COMMUNICATION..................................................................................... 26

CECT 9.1 ACK (Acknowledge)................................................................................................27

CECT 9.2 Header Block ...........................................................................................................28

CECT 9.3 Retries (Frame Retransmission) ...........................................................................29

CECT 9.4 Frame Validation .....................................................................................................32

CECT 9.5 CEC Line Error Handling........................................................................................33

CECT 9.6 Control Signal Line Arbitration .............................................................................34

CECT 9.7 Signal Free Time .....................................................................................................35

CECT 10 DEVICE INSTALLATION AND ADDRESSING ....................................................... 37

CECT 10.1 Physical Address Allocation..................................................................................37

CECT 10.2 Logical Address Allocation....................................................................................40

CECT 11 FEATURE TESTS .................................................................................................... 52

CECT 11.1 TV / Display..............................................................................................................52

CECT 11.2 Non TV Device.........................................................................................................92

CECT 11.3 CEC Switch............................................................................................................146

CECT 12 INVALID MESSAGE TESTS.................................................................................. 149

APPENDIX 1 CEC CAPABILITIES DECLARATION FORM .................................................. 151


HDMI Licensing, LLC. Confidential Page CEC-vii

CECT Figures

CECT Figure 1 Basic Configuration.......................................................................................... 7

CECT Figure 2 HDMI Signal Configuration .............................................................................. 8

CECT Figure 3 Child Connection Configuration....................................................................... 8

CECT Figure 4 Source Device to TV Configuration ................................................................. 8

CECT Figure 5 Rise Time and Fall Time in CEC waveform ................................................... 17

CECT Figure 6 Example of how the DUT loses arbitration to the TE..................................... 35


HDMI Licensing, LLC. Confidential Page CEC-viii

CECT Tables

CECT Table 1 Example of frame validation tests ................................................................... 32

CECT Table 2 Procedure for sending two consecutive CEC messages ................................ 36


HDMI Licensing, LLC. Confidential Page CEC-1 of 164

CECT 1 Introduction CECT 1.1 Purpose and Scope This document constitutes the specification of procedures, tools and criteria for testing the compliance of devices with the High-Definition Multimedia Interface Specification Version 1.4 Supplement 1 – Consumer Electronics Control.

CECT 1.2 Normative references HDMI Licensing, LLC. “High-Definition Multimedia Interface, Specification Version 1.4 Supplement 1 - Consumer Electronics Control”, June 5th, 2009.



CECT 2 Definitions CECT 2.1 Glossary of Terms <Abort> message A message with opcode FF, which a device shall always respond with a

<Feature Abort> message when received as a directly addressed message. The message is ignored when received as a broadcast.

CECT 2.2 Acronyms and Abbreviations DUT Device Under Test

TE Test Equipment

CECT 2.3 General Terminology The word “send” is used throughout the test specification to indicate a message that shall be sent directly addressed. Where a message shall be broadcast it is explicitly stated.

The term “TV” is used throughout the document and is used to represent any HDMI display device (typically such a device will be a Television).



CECT 3 Overview The CEC Compliance Test Specification is broken down into the low level protocol tests which every device must adhere to and a set of feature based tests which apply only to devices that support that particular feature. A device that fails any low level tests shall not claim to be CEC compliant. A device that fails a feature test shall not claim to support that feature.

Each set of tests has a reference, in the form of [CEC x.y.z], to the corresponding section within the CEC specification that is being tested



CECT 4 Test Equipment CECT 4.1 Test Equipment Much of the test equipment used to test the CEC operation is the same as that defined in the main sections of the HDMI compliance test specification. This section defines only the extra equipment needed for testing the CEC line and protocol.

CECT 4.1.1 Required Capabilities versus Recommended Equipment

As with the rest of the Compliance test specification, each piece of test equipment referenced by the individual test cases is listed below. For each of these, the “Required Test Equipment Capabilities” are described. All equipment used for testing the related attributes shall comply with the requirements listed for that equipment.

In addition, for each of the defined pieces of equipment, specific commercial or custom “Recommended Test Equipment" is described. This is the equipment that is used in the initial HDMI Authorized Test Center and should also, if possible, be used for any self-testing of the related functions. Other configurations and equipment may be used for self-testing, as long as that equipment and the processes used meet all of the stated and implied requirements and permit an equivalent level of testing. It is the Adopter’s responsibility to verify that the substituted equipment and processes are sufficient.

CECT 4.1.2 CEC Electrical Test Equipment

For some tests, a signal generator/analyzer is used to cause a DUT to send messages while an oscilloscope measures electrical characteristics of CEC bus waveforms generated by the DUT. For other tests, a voltmeter measures DC potentials under quiescent conditions - while the breakout box applies various static test loads.

The signal generator/analyzer may have a nominal fixed internal pull-up. Some tests require the strength of this pull-up and (or) the load capacitance to be varied. These tests may be conducted with additional parallel-connected components attached to the CEC bus.

CECT 4.1.2.1 Required Test Equipment

• It shall have modifiable load characteristics.

• It shall have the ability to measure voltage levels under no-load and full-load conditions.

• Test equipment accuracy shall be within ±10% of the maximum limiting value of the pass criteria. Test equipment loads shall never exceed the ranges given in CEC Table 1 under "Measurement Method". Tests are carried out at 25˚C ± 5˚C.

• It shall have the ability to measure the quiescent current when not receiving a message, which is drawn by a DUT's CEC line driver, with power completely removed (i.e. while the DUT is not ON or in Standby mode).

• It shall have modifiable bus high and low voltage levels from 0 - 3.7V.

CECT 4.1.2.2 Recommended Test Equipment

• YOKOGAWA DL1640 Digital Oscilloscope



• ADVANTEST R6552 Digital Multi-Meter

• Quantum Data TPA-CEC-R Quiescent Electrical Test Fixture

• Quantum Data TPA-CEC-RR Dynamic Electrical Test Fixture

• Simplay CEC Explorer SL-309

CECT 4.1.3 CEC Logical Test Equipment

A CEC logical test equipment acts as a sink or a source device for the test configurations detailed in section CECT 5.

The Logical test equipment accepts Capabilities Declaration Form (CDF) values and automatically compiles the suite of tests necessary to certify a particular product model. The logical test equipment then guides the user through all of the test steps in the suite, collects data, and produces a summary report.

CECT 4.1.3.1 Required Test Equipment

• It shall be able to mimic an HDMI device at any Logical Address 0-15.

• It shall be capable of sending all opcodes (both valid and invalid).

• It shall be capable of sending and receiving all valid frames defined within the CEC specification. Besides, it shall be capable of sending invalid frames, as specified in particular tests in this document.

• It shall be capable of measuring the timing of: start bits, data bits (low and high periods), response times to messages, inter-frame gaps and ACK bits. Timing accuracy shall be better than 100 µs.

• It shall have programmable timing for start bits (low and high periods), data bits and ACK bits.

• It shall be capable of sending a message synchronized with an incoming message or event (e.g. in order to win arbitration over the incoming message).

• It shall be capable of taking over individual bits on the bus when a device is transmitting a message.

• It shall have the ability to emulate both root and non-root devices.

• It shall have the ability to emulate multiple devices simultaneously, as specified in particular tests in this document.

• It shall be able to send a directly addressed message to a DUT and monitor bus activity - recording the number of retry attempts and time delays (in nominal bit times) between retries, while withholding either header or data block ACK as the DUT attempts to respond.

• It shall handle messages from a DUT appropriately in the test sequence. For example, the DUT may send <Polling Message> message and / or <Give Device Power Status> message before sending expected message.



CECT 4.1.3.2 Recommended Test Equipment

The CEC Compliance Test Tool (CEC-CTT), recommended throughout this document, consists of a Quantum Data model 882CA (or equivalent) or a Simplay CEC Explorer SL-309(or equivalent).

Quantum Data model 882CA (or equivalent) instrument provides a network connection to a host computer running Quantum Data Compliance Controller software. A CEC compliance test module (CEC-CT module) within the Compliance Controller accepts Capabilities Declaration Form (CDF) values and automatically compiles the suite of tests necessary to certify a particular product model. CEC-CT module then guides the user through all of the test steps in the suite, collects data, and produces a summary report. CEC Device Bridge TPA-CEC-4R (or equivalent) is used in some parts of test with the above mentioned CEC-CTT.

The Simplay CEC Explorer SL-309 (or equivalent) tool provides an Ethernet network connection to a host computer running the Simplay CEC Explorer Application. The CDF/CTS module within the CEC Explorer Application accepts Capabilities Declaration Form (CDF) values and automatically compiles the suite of tests necessary to certify a particular product. The CDF/CTS module lists all required tests which need to be performed and produces a summary report.



CECT 5 Test Configurations This section describes a set of test configurations used throughout the test specification. In each configuration, it is assumed the following (except where explicitly testing that property):

• A source DUT has been allocated a valid Physical Address by the test equipment. The TE shall allocate address 1.0.0.0 for all source devices except where otherwise defined.

• The DUT has been allocated an appropriate Logical Address.

• The DUT is powered on and in an appropriate state to accept the message(s) being tested.

Prior to running any of the recommended tests the CEC Compliance Test Tool instrument should be powered on and communicating with the software running on the host PC. It is assumed that the CEC Test Tool instrument is in idle mode waiting for a command to be issued from the software.

CECT 5.1 Basic Configuration The basic configuration consists of one connection between the DUT and the TE. If the DUT has any inputs, then connect the HDMI output of the TE to any input of the DUT. If the device has no inputs, then connect the HDMI input of the test equipment to any output of the DUT.

Source DUTTest

EquipmentHDMI

Sink/Repeater DUT

Test Equipment

HDMI

CECT Figure 1 Basic Configuration

The basic configuration is commonly used throughout the specification. Where no configuration is defined, all tests within that section shall use the basic configuration.

Note: The DUT shall be not connected with a device other than TE if it is not described especially.

CECT 5.2 HDMI Signal Configuration This configuration adds an HDMI signal source to the basic configuration. The TE adds CEC communication to the TMDS signals generated by the HDMI signal source. This configuration is used for testing sink devices only.

Sink DUTTest

EquipmentHDMI HDMI Signal

SourceHDMI



CECT Figure 2 HDMI Signal Configuration

The HDMI signal source may reside in the TE. In this case, the basic configuration of CECT section 5.1 is used.

CECT 5.3 Child Connection Configuration This configuration is used to test a repeater device. The DUT is connected to the TE via an HDMI input and an HDMI output connector. Note that while this configuration shows two conceptual test equipment devices, it may be realized in a single physical device.

Repeater DUT

Test Equipment

HDMITest Equipment

HDMI

CECT Figure 3 Child Connection Configuration

CECT 5.4 Source Device to TV Configuration This configuration connects a source DUT to a TV via the TE. The TV is used to enable the source device to be easily manipulated, for example to invoke a certain feature via a menu. The TV does not need to support CEC and shall be configured so that it is displaying the DUT. All CEC communication occurs between the DUT and the TE. CEC communication should not be passed through to the TV.

Test Equipment

TVHDMISource DUT HDMI

No CEC

CECT Figure 4 Source Device to TV Configuration

The TE may have an internal or external display, which is not directly attached to the DUT, but that allows the video from the DUT to be monitored. In this case, the basic configuration of CECT section 5.1 is used. Furthermore, some TEs such as the Simplay CEC Explorer disrupt the CEC line to the TV internally so that a standard HDMI cable is sufficient.



CECT 6 General Constraints CECT 6.1 Handling Response Messages The CEC Specification allows a device to send CEC messages at any time. In some tests it is a requirement that the DUT responds to a message sent by the TE. If the required response is a message sent by the DUT, then the TE is required to correctly handle such a response:

• If any unexpected CEC or CDC messages are received before the expected response, then the test shall not fail because of the unexpected message(s), except where specifically described.

• A test shall fail if the expected response is not received within the Required Maximum Response Time [CEC: 9.2] except where specifically described.

CECT 6.2 Ignoring Messages In some tests it is a requirement that the DUT ignores an incoming message. In order to pass such a test, the DUT shall not:

• Send any CEC message (including <Feature Abort>) in response (note that at any time the DUT might send CDC or CEC messages that are not a response to the message to be ignored).

• Invoke any detectable change in its existing mode of operation (e.g. switching play mode).

• Invoke any change in what it is currently displaying (e.g. display an OSD String).

Note that the DUT should still set low-level acknowledgement bits in individual header/data blocks where appropriate.

CECT 6.3 CEC Switches Devices that act only as CEC Switches shall be treated as a special case within this test specification. The set of tests specified in sections CECT 7, CECT 8 and CECT 9 shall be applied with a minor alteration as detailed below.

Note: These conditions are necessary only for pure CEC Switches. If the DUT has other functionality such as the TV or the Audio System, it isn’t necessary to test as CEC Switch in sections CECT 7, CECT 8 and CECT 9.

Since a Pure CEC Switch will use Logical Address 15 as Initiator, it is not possible to send it an <Abort> message and receive a <Feature Abort> in response. Where a test specifies that this procedure should be carried out it should be replaced with the following:

• Ensure that the DUT has been allocated a Physical Address of 1.0.0.0.

• Broadcast a <Routing Information> [1.0.0.0] message.

This will invoke the DUT to send a <Routing Information> message, which can then be observed and measured against the relevant test criteria.



A specific section for CEC Switch tests has been created (see CECT 11.3). Devices that combine the functionality of a CEC switch with another device type, shall apply this set of tests in addition to any relevant feature tests.

CECT 6.4 Handling Flow Control Because CEC provides a mechanism to enable flow control [CEC 7.2], it is possible that a device may justifiably reject a message at any time. In the case where a device (unexpectedly) negatively acknowledges a header or data block, the test should be repeated up to 5 times, after allowing a period of at least one second between re-transmissions.

If the DUT continues to negatively acknowledge the message for all retransmission attempts, the test should be logged as a failure.

CECT 6.5 Reporting Missing or incorrect CEC messages During the CEC feature tests described in CECT 11, the messages that the DUT sends as received by TE might contain “low-level” errors, including:

• Incomplete messages, i.e. part of Header or Data Block is missing

• Timing violations of Start and Data Bits

• EOM or ACK bits not set to the correct level

• Appropriate Signal Free Time not observed

Whenever the TE is receiving such messages from the DUT that have one or more such low-level errors during the CEC feature tests described in CECT 11, it shall log the test as a FAIL, and shall indicate that a low-level error (with indication which type of low-level error, optionally with more details) has occurred. The presence of such low-level errors should be made available to the test operator during and after the test session, and included in the test log.



CECT 7 Electrical Specification

Test ID: CEC7-1 CEC Bus Logic ‘0’ and ‘1’ Voltage Level


[CEC: Table 2]

CEC Electrical Specifications

A logic ‘0’ output voltage level must be ≥ 0V and ≤ 600mV.

[CEC: Table 2]


A logic ‘1’ output voltage level must be ≥ 2.5V and ≤ 3.63V

Test Objective

Ensure the DUT CEC line driver Logic '0' and '1' output voltage level is within the limits of the specification.


• Connect the DUT to the TE.

• Connect CEC line to +3.3V via a 27kΩ±5% resistor.

• Send the DUT an <Abort> message. The DUT should respond with a <Feature Abort> message

• Measure the waveform that the DUT creates.

• If logic ‘0’ is < 0V or is > 600mV or If logic ‘1’ is < 2.5V or is > 3.63V then → FAIL

• Repeat test with the CEC line connected to +3.3V via a 3kΩ±5% resistor.

• Repeat test with the CEC line connected to ground via a 150kΩ+5%-0% resistor.

• Execute the test procedure to at least one of the DUT's HDMI inputs/outputs which support CEC. If the device has more than one independent CEC line, driven by independent CEC driving circuitry and logical processing (see CDF), the tests shall be repeated for at least one HDMI input/output belonging to each of these independent CEC lines.



Recommended Test Method – Quantum Data Test ID: CEC7-1 CEC Bus Logic ‘0’ and ‘1’ Voltage

If the DUT is a sink, then instead connect the HDMI cable to the port marked "HDMI OUT 1" on the 882CA.

Setup 1 Test ID 7-1: CEC Bus Logic ‘0’ and ‘1’ Voltage Level


1 CEC Compliance Test Tool Quantum Data 882CA with a host computer

CECT 4.1.3.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 (*1) 1

3 75ohm BNC-to-BNC Cable <any> 1

4 75-to-50ohm 5.7dB Loss Pad <any> 1

5 Dynamic Electrical Test Fixture Quantum Data TPA-CEC-RR CECT 4.1.2.2 1

6 HDMI Cable <any> 2

7 Y Lead Adapter <any> 1

*1: Tektronix TDS7404 can also be used for the test.

• Set-up the CEC Compliance Test Tool as detailed in section CECT 4.1.3.2

• Power on DUT

• Connect the DUT to the TPA-CEC-RR Dynamic Electrical Test Fixture and the CEC-CTT as detailed in Setup 1.

Source DUT

DL1640

882CA

Y Lead Adapter

BNC Cable

HDMI IN

SPECIAL

TPA-CEC-RR



• Measure the Logic '0' and '1' voltage by following the directions provided by the CEC-CTT for CEC Test ID: 7-1

• The CEC-CTT will indicate if Logic '0' and '1' output voltage levels of CEC driver of DUT is within specifications

• Set the TPA-CEC-RR Dynamic Electrical Test Fixture "LOAD" switch to the position1 (Connect CEC line to +3.3V via a 27kΩ±5% resistor).

• Setup the special signal output of the 882CA

• Setup the CEC-CTT to emulate either a set-top-box (Tuner) or a DTV.

• If the DUT is a sink device, then setup the CEC-CTT to emulate a set-top-box

• Otherwise, if the DUT is a source, then send the CEC-CTT

• Clear the CEC-CTT 's error queue

• Command CEC-CTT to send an <Abort> message to the DUT.

• Query the CEC-CTT to see if any CEC errors occurred

• If errors occurred, then see if they are related to CEC

• If any CEC errors occurred (record them and) -> FAIL

• Record the low and high amplitude displayed on the oscilloscope.

• If the high amplitude is < 2.5V -> FAIL

• If the high amplitude is > 3.63V -> FAIL

• If the low amplitude is < 0V -> FAIL

• If the low amplitude is > 600mV -> FAIL

• Repeat test procedure with the TPA-CEC-RR fixture "LOAD" switch in the position 2 (Connect CEC line to +3. 3V via a 3kΩ±5% resistor).

• Repeat test procedure with the TPA-CEC-RR fixture "LOAD" switch in the position 3 (Connect CEC line to ground via a 150kΩ+5%-0% resistor)

• Return TPA-CEC-RR Dynamic Electrical Test Fixture's LOAD switch to the "OFF" position (to save battery).

Note: During transition from Logic ‘1’ to Logic ‘0’ a negative overshoot with maximum 300mV and up to 150μs duration is allowed



Recommended Test Method - Simplay CEC Explorer Test ID: CEC7-1 CEC Bus Logic ‘0’ and ‘1’ Voltage

Out 3 Out 2 Out 1 In 10 / 100

LAN USB COM 1 COM 2 Power

On

CEC / DDC / HPD / 5V

TMDS

DUT SinkDUT

Repeater or Source

Simplay CECExplorer SL-309

COM 2

Out 2

Out 1

In

Oscilloscope

HDMI

BNC-to-COM2

Trigger signal +/- 15V

HDMI-to-BNC Cable

If the DUT is a TV, then connect HDMI Cable to the port marked “OUT 1” on the Simplay CEC Explorer SL-309. Else, if the DUT is a non-TV, then connect HDMI Cable to the port marked “IN” on the Simplay CEC Explorer SL-309.

Setup 2 Test ID 7-1: CEC Bus Logic ‘0’ and ‘1’ Voltage Level


1 CEC Compliance Test Tool Simplay CEC Explorer SL-309 CECT 4.1.3.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 (*1) 1

3 HDMI-to-BNC Cable Simplay CEC Explorer Cable, S-HtB-01

1

4 BNC-to-COM2 Simplay CEC Explorer Cable, S-CtB-01

1

5 HDMI Cable Simplay CEC Explorer Cable, PL-HDMI-01

1

*1: Tektronix TDS7404 can also be used for the test.

• Set-up the CEC Compliance Test Tool as detailed in section CECT 4.1.3.2

• Power on DUT

• Connect the DUT to the Simplay CEC Explorer as detailed in Setup 2.



• Measure the Logic '0' and '1' voltage by following the directions provided by the Simplay CEC Explorer for CEC Test ID: 7-1

• The Simplay CEC Explorer will indicate if Logic '0' and '1' output voltage levels of CEC driver of DUT is within specifications

• Set-up the Digital Oscilloscope to record the low and high amplitude

• Start the 7-1 test and enter the measured values

• If the high amplitude is < 2.5V -> FAIL

• If the high amplitude is > 3.63V -> FAIL

• If the low amplitude is < 0V -> FAIL

• If the low amplitude is > 600mV -> FAIL

• The test will re-run with the CEC line connected to 3.3 V via a 3kΩ±5% resistor

• The test will re-run with the CEC line connected to ground via a 150kΩ±5% resistor connected to the CEC line

Note: During transition from Logic ‘1’ to Logic ‘0’ a negative overshoot with maximum 300mV and up to 150μs duration is allowed



Test ID: CEC7-2 CEC Maximum Rise Time and Fall Time


[CEC: Table 2]


The rise time from 10% to 90% of the bus pull-up voltage must be ≤ 250μs

[CEC: Table 2]


The fall time from 90% to 10% of the bus pull-up voltage must be ≤ 50μs

Test Objective

Ensure the maximum rise time and fall time of the CEC line driver on the DUT is within the limits of the specification.


• Connect TE to CEC line on DUT

• Connect CEC line to +3.3V via a 27kΩ±5% resistor

• Apply total parasitic capacitance, with value near (but not exceeding) the maximum of 1600pF, from the CEC line to ground

• Measure CEC line voltage, VHIGH

• Send the DUT an <Abort> message. The DUT should respond with a <Feature Abort> message


• If rise time from 10% to 90% of VHIGH > 250μs and If fall time from 90% to 10% of VHIGH > 50μs then → FAIL

• Repeat test with the CEC line connected to +3.3V via a 3kΩ±5% resistor and also apply a total parasitic capacitance near the maximum value of 7700pF, from the CEC line to ground.

• Execute the test procedure to at least one of the DUT's HDMI inputs/outputs which support CEC. If the device has more than one independent CEC line, driven by independent CEC driving circuitry and logical processing (see CDF), the tests shall be repeated for at least one HDMI input/output belonging to each of these independent CEC lines.

90% of VHIGH

10% of VHIGH

rise time

fall time

VHIGH



CECT Figure 5 Rise Time and Fall Time in CEC waveform

Recommended Test Method – Quantum Data Test ID: CEC7-2 CEC Maximum Rise Time and Fall Time

If the DUT is a sink, then instead connect the HDMI cable to the port marked "HDMI OUT 1" on the 882CA.

Setup 3.Test ID 7-2: CEC Maximum Rise Time and Fall Time


1 CEC Compliance Test Tool Quantum Data 882CA with a host computer

CECT 4.1.3.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 1

3 75ohm BNC-to-BNC Cable <any> 1

4 75-to-50ohm 5.7dB Loss Pad <any> 1

5 Dynamic Electrical Test Fixture Quantum Data TPA-CEC-RR CECT 4.1.2.2 1

6 HDMI Cable <any> 2

7 Y Lead Adapter <any> 1

*1: Tektronix TDS7404 can also be used for the test

• Set-up the CEC Compliance Test Tool as detailed in section CECT 4.1.3.2.

• Power on DUT.

Source DUT

DL1640

882CA

Y Lead Adapter

BNC Cable

HDMI IN TPA-CEC-RR



• Connect the DUT to the TPA-CEC-RR Dynamic Electrical Test Fixture and the CEC-CT T as detailed in Setup 3.

• Measure CEC rise time by following the directions provided by the CEC-CTT for CEC Test ID: 7-2.

• Set the TPA-CEC-RR Dynamic Electrical Test Fixture "LOAD" switch to the position 1.

• Setup the special signal output of the 882CA analyzer.

• Setup the CEC-CTT to emulate either a set-top-box (Tuner) or a DTV.

• If the DUT is a sink device, then setup the CEC-CTT to emulate a set-top-box.

• Otherwise, if the DUT is a source, then setup the CEC-CTT to emulate a DTV.

• Clear the CEC-CTT's error queue.

• Command the CEC-CTT to send an <Abort> message to the DUT.

• Query the CEC-CTT to see if any CEC errors occurred.

• If errors occurred, then see if they are related to CEC.

• If any CEC errors occurred -> FAIL

• Record the rise time and fall time displayed on the oscilloscope.

• If the rise time is > 250μs -> FAIL

• If the fall time is > 50μs -> FAIL

• Repeat test with the TPA-CEC-RR Dynamic Electrical Test Fixture's "LOAD" switch in the position 2.

• Repeat test with the TPA-CEC-RR Dynamic Electrical Test Fixture's "LOAD" switch in the OFF position.

• The CEC-CTT will indicate if the rise time and fall time of CEC driver of DUT is within specifications.



Recommended Test Method – Simplay CEC Explorer Test ID: CEC7-2 CEC Maximum Rise Time and Fall Time

Out 3 Out 2 Out 1 In 10 / 100


On


TMDS

DUT SinkDUT

Repeater or Source


COM 2

Out 2

Out 1

In

Oscilloscope

HDMI

HDMI-to-BNC Cable

BNC-to-COM2


If the DUT is a TV, then connect HDMI Cable to the port marked “OUT 1” on the Simplay CEC Explorer SL-309. Else, if the DUT is a non-TV, then connect HDMI Cable to the port marked “IN” on the Simplay CEC Explorer SL-309.

Setup 4.Test ID 7-2: CEC Maximum Rise Time and Fall Time


1 CEC Compliance Test Tool Simplay CEC Explorer SL-309 CECT 4.1.3.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 1


1


1


1

*1: Tektronix TDS7404 can also be used for the test

• Set-up the CEC Compliance Test Tool as detailed in section CECT 4.1.3.2.

• Power on the DUT.

• Connect the DUT to the Simplay CEC Explorer SL-309 as detailed in Setup 4.



• Measure CEC rise time by following the directions provided by the Simplay CEC Explorer for CEC Test ID:7-2

• Set up the Digital Oscilloscope to record the rise and fall time

• If the rise time is > 250μs -> FAIL

• If the fall time is > 50μs -> FAIL

• The test will re-run with CEC line connected to +3.3V via a 3kΩ±5% resistor and also apply a total parasitic capacitance near the maximum value of 7700pF, from the CEC line to ground.

•



CECT 8 Signaling and Bit Timings CECT 8.1 Bit Transmission Reference Requirement

[CEC: 5] Signaling and Bit Timings The DUT can correctly transmit the individual bits of a CEC message

Configuration

This set of tests shall use the Basic Configuration (see CECT Figure 1). For the Simplay CEC Explorer, use the HDMI Signal Configuration (see CECT Figure 2) for sink DUT, or the Source Device to TV Configuration (see CECT Figure 4) for source DUT.

If the DUT has any HDMI inputs, then connect an HDMI output of the test equipment to each input of the DUT referring "Number of HDMI Inputs" in CDF.

If the DUT has any HDMI outputs, then connect an HDMI input of the test equipment to each output of the DUT referring "Number of HDMI Outputs" in CDF.

Execute the test procedure to at least one of the DUT's HDMI inputs/outputs which support CEC. If the device has more than one independent CEC line, driven by independent CEC driving circuitry and logical processing (see CDF), the tests shall be repeated for at least one HDMI input/output belonging to each of these independent CEC lines.

The test equipment can send CEC message. The test equipment monitors the CEC line at the same time.




Test ID Test Objective Required Test Method Pass Criteria

8.1 - 1 Ensure the bit timings of a start bit are within the values specified by CEC.

For all devices except pure CEC Switches:

Send the DUT the <Abort> message. The DUT should respond with a <Feature Abort> message.

For pure CEC Switches:

Ensure that the DUT has been allocated a Physical Address of 1.0.0.0. Broadcast a <Routing Information> [1.0.0.0] message. The DUT broadcasts a <Routing Information> message.

Measure the timing of the ‘start’ bit.

Repeat the test at least 3 times.

The start bits low time period is from 3.5ms to 3.9ms.

The start bits total time period is from 4.3ms to 4.7ms.

8.1 - 2 Ensure the bit timings of a logical 1 data bit are within the values specified by CEC.





Measure the timing of a logical 1 data bit.


The logical 1 data bits low time period is from 0.4ms to 0.8ms.

The logical 1 data bits total time period is from 2.05ms to 2.75ms.




8.1 - 3 Ensure the bit timings of a logical 0 data bit are within the values specified by CEC.





Measure the timing of a logical 0 data bit.


The logical 0 data bits low time period is from 1.3ms to 1.7ms.

The logical 0 data bits total time period is from 2.05 to 2.75ms.


Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 8.1.

CECT 8.2 Bit Reception Reference Requirement

[CEC: 5] Signaling and Bit Timings The DUT can correctly receive the individual bits of a CEC message

Configuration

This test shall use the same configuration as CECT 8.1.





8.2 - 1 Ensure that the low period receiving tolerances of the start bit are within the values specified.

On the TE set the low interval time of the start bit to 3.5ms and set the total start bit time to 4.5ms.


Repeat the test for low interval values of 3.7ms and 3.9ms.

The DUT must acknowledge and <Feature Abort> ALL messages within the low interval time range ≥ 3.5 ms and ≤ 3.9 ms.

8.2 - 2 Ensure that the receiving tolerances of the total start bit fall within the values specified.

On the TE set the low interval time of the start bit to 3.7ms and set the high interval time of the start bit to 0.6ms (4.3ms total).


Repeat the test for high interval values of 1.0ms. (4.7ms total times respectively)

The DUT must acknowledge and <Feature Abort> ALL messages within the total bit time range ≥ 4.3 ms and ≤ 4.7 ms.

8.2 - 3 Ensure that the low period receiving tolerances of a logical 1 data bit fall within the values specified.

On the TE set the low interval time of the logical 1 bit to 0.4ms and set the total logical 1 bit time to 2.4ms.



The DUT must acknowledge and <Feature Abort> ALL messages within the low interval time range ≥ 0.4 ms and ≤ 0.8 ms.




8.2 - 4 Ensure that the receiving tolerances of the total logical 1 data bit fall within the values specified.

On the TE set the low interval time of the logical 1 bit to 0.6ms and set the high interval time of the logical 1 bit to 1.45ms (2.05ms total).




8.2 - 5 Ensure that the low period receiving tolerances of a logical 0 data bit fall within the values specified.

On the TE set the low interval time of the logical 0 bit to 1.3ms and set the total logical 0 bit time to 2.4ms.



The DUT must acknowledge and <Feature Abort> ALL messages within the low interval time range ≥ 1.3 and to ≤ 1.7 ms.

8.2 - 6 Ensure that the receiving tolerances of the logical 0 data bit fall within the values specified.

On the TE set the low interval time of the logical 0 bit to 1.5ms and set the high interval time of the logical 0 bit to 0.55ms (2.05ms total).








CECT 9 Frame Communication For all tests in this section, the CEC line shall be monitored. A test automatically fails if a device attempts to transmit when it should not or creates any signals on the CEC line that are not expected (as detailed in section CECT 6.1). For every test where the DUT reacts by sending a CEC message, the test fails if the DUT does not respond with the appropriate message within 1 second. [CEC: 9.2]


[CEC: 6] Frame Description

[CEC: 7] Reliable Communication Mechanisms

[CEC: 8] Protocol Extensions

[CEC: 9] CEC Arbitration

The DUT can correctly receive and send a CEC Frame.

Configuration


Execute the test procedure to one of the DUT's HDMI inputs/outputs which supports CEC. If the device has more than one independent CEC line, driven by independent CEC driving circuitry and logical processing (see CDF), the tests shall be repeated for one HDMI input/output belonging to each of these independent CEC lines.



CECT 9.1 ACK (Acknowledge) [CEC: 6.1.2]



9.1 - 1 Ensure that the DUT acknowledges with a ’0‘ ACK bit for every message block when receiving a message that is directly addressed to it.

(Does not apply to pure CEC Switches, as TE cannot send directly addressed messages to LA=15)

Send an <Abort> message directly addressed to the DUT.

If the DUT negatively ACKnowledges any message blocks with a ‘1’ ACK bit (Flow Control) then re-send the message to the DUT after a delay of between 7.2ms and 12ms. Re-send the message up to 5 times.

Every block within the message is acknowledged with a ‘0’ ACK bit.

If the DUT does not negatively ACKnowledges any message blocks, then pass the test.

9.1 - 2 Ensure that the DUT acknowledges with a ‘1’ ACK bit for every message block when receiving a message that is directly addressed to another device.


Send an <Abort> message on the bus directly addressed to another device address.

Every block within the message is acknowledged with a ‘1’ ACK bit. (i.e. it does nothing)

9.1 - 3 Ensure that the DUT acknowledges with a ‘1’ ACK bit for every message block when receiving a valid broadcast message.

Broadcast an <Abort> message.

If the DUT negatively ACKnowledges any message blocks with a ‘0’ ACK bit (Flow Control) then re-send the message to the DUT after a delay of between 7.2ms and 12ms. Re-send the message up to 5 times.






CECT 9.2 Header Block [CEC: 6.1.3]



9.2 - 1 Ensure that the DUT writes the correct Initiator and destination addresses when sending a message.

(Does not apply to pure CEC Switches, as they cannot send directly addressed messages)


The DUT writes its correct Logical Address in the Initiator address field of the <Feature Abort> message.

The DUT writes the value of the previous message’s Initiator address (defined by the TE's Logical Address) in the destination address field of the <Feature Abort> message.

9.2 - 2 Ensure that the DUT writes the correct destination address when broadcasting a message.


Invoke the DUT to send a broadcast message by sending it a <Give Physical Address> message.


Ensure that the DUT has been allocated a Physical Address of 1.0.0.0. Broadcast a <Routing Information> [1.0.0.0] message to invoke the DUT to broadcast its own <Routing Information> message.

The DUT sends a message in response and writes the value 15 as the destination address to indicate that the message is broadcast.





CECT 9.3 Retries (Frame Retransmission) [CEC: 7.1]



9.3 - 1 Ensure that the DUT handles a no acknowledge response to a directly addressed message where the header is not acknowledged, and tries to re-transmit the message up to 5 times.



Do not acknowledge the header.

The DUT responds to the message with a <Feature Abort>.

The DUT tries to re-send the <Feature Abort> message 1-5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.

9.3 - 2 Ensure that the DUT handles a no acknowledge response to a directly addressed message where the data block is not acknowledged, and tries to re-transmit the message up to 5 times.



Do not acknowledge a data block within all retransmission attempts.

The DUT responds to the message with a <Feature Abort>.

The DUT tries to re-send the <Feature Abort> message 1-5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.




9.3 - 3 Ensure that the DUT will accept a negatively acknowledged response to a broadcast message and tries to re-transmit the message up to 5 times.

Invoke the DUT to broadcast a message as described below:


Send a <Give Physical Address> message to the DUT.


Ensure that the DUT has been allocated a Physical Address of 1.1.0.0. Broadcast a <Routing Information> [1.1.0.0] message.

Negatively acknowledge the header block within the message that the DUT broadcasts.

Negatively acknowledge a message block within all retransmission attempts.

The DUT tries to re-send the message between 1-5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.




9.3 - 4 Ensure the DUT can detect low impedance on the CEC line when it is transmitting high impedance and is not expecting a follower asserted bit.



While the DUT is transmitting high impedance during the course of sending the message, modify the bus to low impedance during a non-follower asserted bit.


Ensure that the DUT has been allocated a Physical Address of 1.0.0.0. Broadcast a <Routing Information> [1.0.0.0] message.

While the DUT is transmitting high impedance during the course of sending the message, modify the bus to low impedance during a non-follower asserted bit.

The DUT tries to re-send the message between 1-5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.





CECT 9.4 Frame Validation [CEC: 7.3]



9.4 - 1 Ensure that for every message that the DUT supports as a follower it ignores the message if it is missing any parameters. (i.e. the message does not contain all operands specified in the relevant CEC specification).

For every message that the DUT supports as a follower and has at least one parameter:

Send the message to the DUT missing its final operand of 1 byte or greater.

See CECT Table 1 for an example of the messages to be sent.

The DUT ignores the message.

9.4 - 2 Ensure that the DUT ignores additional data blocks after EOM = 1 in a message where the block containing EOM = 1 is not the last data block of the message

Send the DUT an <Abort> (or <Routing Information> for a pure CEC switch) message with an additional Data Block at the end, where EOM=1 on both the last and the next to last Data Block of the total message.

The DUT ignores data in the additional data blocks after the (first) data block with EOM = 1, so answers normally with a <Feature Abort> (or <Routing Information> for a pure CEC switch).

CECT Table 1 Example of frame validation tests

Message Required Test Method Pass Criteria

<Active Source> Send an <Active Source> message to the DUT without the [Physical Address] parameter.



Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 9.4



CECT 9.5 CEC Line Error Handling [CEC: 7.4]



9.5 - 1 Ensure that when the DUT discovers a corrupted bit it generates a bit error notification.

Send the DUT the <Abort> message. Ensure that Information bit 3 in Figure 6 of CEC6.1 of the data block contains a corrupted bit. (a period between falling edges that is less than the minimum bit period).

Repeat the test method by corrupting information bit 0 of the data block.




For every corrupted <Abort> message, the DUT generates a low bit period on the control signal line of 1.4-1.6 times the nominal data bit period. (A value of ≥ 3.4ms and ≤ 3.8ms is acceptable).

The DUT does not respond to the message. (It does not send a <Feature Abort> message).





CECT 9.6 Control Signal Line Arbitration [CEC: 9]



9.6 - 1 Ensure that if the DUT sees that the bus is low while it is outputting a high level during the start bit, it loses arbitration and stops transmitting.


3.5ms after the DUT begins transmitting its start bit, transmit a low bit period of 0.8ms, to ensure that the DUT detects the low impedance.

The DUT detects the bus is low, loses arbitration and stops transmitting its current message.

When the DUT re-sends its message, it sends after the signal free time of ≥ 5 nominal data bit. (It will be PASS if the DUT won’t re-send.)

9.6 - 2 Ensure that if the DUT sees that the bus is low while it is outputting a high level during the source address bits, it must lose arbitration, and try to re-transmit after the given signal free time.

This test cannot be applied on a TV which has taken Logical Address 0 since it never lose arbitration to another Initiator address.

If the DUT is a TV with an HDMI output connection then connect it to the TE via its HDMI output connection.


While the DUT is transmitting a ‘1’ in the source address bits, transmit a ‘0’ on the bus.

For example Recording Device 1 is address 0b0001 so the TE will take over the final bit of the source address in this case. See CECT Figure 6 for more information.

The DUT detects the bus is low for the taken over source address bit, loses arbitration and stops transmitting its current message.

When the DUT re-sends its message, it sends after the signal free time of ≥ 5 nominal data bit periods. (It will be PASS if the DUT won’t re-send.)

CECT Figure 6 shows how the DUT loses arbitration in the source address bits. The TE transmits a 0 while the DUT is transmitting a 1.



0 0 0 1

Low impedance

High impedance

When DUT is transmittinga ‘1’ the TE will transmit ‘0’

Initiator Address

DUT Initiator address

0

CECT Figure 6 Example of how the DUT loses arbitration to the TE.



CECT 9.7 Signal Free Time [CEC: 9.1]



9.7 - 1 Ensure that the DUT waits for at least 5 bit periods before transmitting a new message.


The DUT waits for a signal free time of ≥ 5 nominal data bit periods before attempting to transmit the message.




9.7 - 2 Ensure that the DUT waits for at least 7 bit periods before transmitting a message directly after transmitting a previous message (Where applicable).

This test only applies if the DUT can send two consecutive messages.

If possible invoke the DUT to send a CEC message and a second CEC message directly afterwards.

See CECT Table 2 for the procedure depending upon the device type and features supported. If no device type/feature combinations match the DUT, then this test should be ignored.

The DUT waits for a signal free time of ≥ 7 nominal data bit periods before attempting to transmit the next message.

CECT Table 2 Procedure for sending two consecutive CEC messages

Device Type Feature Supported Procedure

Playback Device One Touch Play Activate the One Touch Play feature. The device should send an <Image View On> (or <Text View On>) message followed by an <Active Source> message.

Any Remote Control Pass Through Activate the Remote Control Pass Through feature. The device should send an <User Control Pressed> message followed by an <User Control Released> message.





CECT 10 Device Installation and Addressing The set of tests for device installation and addressing shall be run on all CEC devices that try to allocate one of the Logical Address 0 to 14.

CECT 10.1 Physical Address Allocation


[HDMI: 8.7] Physical Address

[CEC: 10.1] Physical Address Discovery

A <Report Physical Address> message is sent when required, and that the message indicates the devices correct Physical Address.

CECT 10.1.1 TV

CECT 10.1.1.1 All TVs

Configuration

This test shall use the Basic Configuration (see CECT Figure 1) and each HDMI input of the DUT shall be connected to an HDMI output of the TE referring "Number of HDMI Inputs" in CDF. For the Simplay CEC Explorer, use the HDMI Signal Configuration (see CECT Figure 2) for sink DUT.

This test only applies if a DUT wants to advertise being a TV. (See CDF).

The TV must always take address 0.0.0.0 when it is the only TV in the system.





10.1.1.1 - 1 Ensure that the DUT broadcasts the address 0.0.0.0 in a <Report Physical Address> message.

Send a <Give Physical Address> message to the DUT at Logical Address 0.

The DUT responds by broadcasting a <Report Physical Address> message indicating its address as 0.0.0.0 with "TV" as the [Device Type]

CECT 10.1.1.2 TVs with an HDMI Output

Configuration

This test shall use the Basic Configuration (see CECT Figure 1). For the Simplay CEC Explorer, use the HDMI Signal Configuration (see CECT Figure 2) for sink DUT, or the Source Device to TV Configuration (see CECT Figure 4) for source DUT.

Connect the HDMI input of the TE to each output of the DUT (TV) referring "Number of HDMI Outputs" in CDF.

The DUT should take an address allocated by its parent when it is added to a system that already contains a TV as the root device.





10.1.1.2 - 1 Ensure the DUT broadcasts the correct Physical Address when connected to a system via its HDMI output.

Set the TE to allocate a Physical Address of 2.0.0.0 to the DUT.

Connect the DUT to the TE via its HDMI Output and disconnect (or HPD is asserted from the TE).

Set the TE to allocate the DUT a new Physical Address of 1.0.0.0 to the DUT.

Connect the DUT to the TE (or HPD is asserted from the TE).

The DUT broadcasts a <Report Physical Address> [1.0.0.0] message.


Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 10.1.1.1.

CECT 10.1.2 All other devices

Configuration

This set of tests shall use the Basic Configuration (see CECT Figure 1) and each output of the DUT shall be connected to an HDMI input of the TE referring "Number of HDMI Outputs" in CDF.





10.1.2 - 1 Ensure that the DUT broadcasts the correct Physical Address when connected directly to the TV.




Connect the DUT to the TE.


10.1.2 - 2 Ensure that the DUT broadcasts the correct Physical Address when connected at the bottom of the device network.







Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 10.1.2.

CECT 10.2 Logical Address Allocation




[CEC: 10.2] Logical Addressing The DUT can correctly set its Logical Address

CECT 10.2.1 TV

CECT 10.2.1.1 All TVs

Configuration

This test shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT shall be connected to an HDMI output of the TE. For the Simplay CEC Explorer, use the HDMI Signal Configuration (see CECT Figure 2) for sink DUT.



10.2.1.1 - 1 Ensure that the DUT takes the Logical Address 0 when connected as the root device.

Send a <Polling Message> message to Logical Address 0.

The DUT ACKs the <Polling Message> message.

CECT 10.2.1.2 TV with an HDMI Output

Configuration

This test shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of the DUT shall be connected to an HDMI input of the TE. For the Simplay CEC Explorer, use the Source Device to TV Configuration (see CECT Figure 4) for source DUT.





10.2.1.2 - 1 Ensure that the DUT takes the Specific Use address (14) when connected at a Physical Address other than 0.0.0.0. or when the DUT wants to advertise being a second TV. (see CDF)

Set the TE with a Logical Address of 0 to allocate a Physical Address of 2.0.0.0 to the DUT.


Set the TE to allocate the DUT a Physical Address of 1.0.0.0.

Connect the DUT to the TE (or HPD is asserted from the TE).

The DUT broadcasts a <Report Physical Address> [1.0.0.0] message with "TV" as the [Device Type] from Logical Address 14.



CECT 10.2.2 Recording Device

Configuration

This set of tests shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of the DUT shall be connected to an HDMI input the TE. For the Simplay CEC Explorer, use the Source Device to TV Configuration (see CECT Figure 4) for source DUT.

This set of tests only applies if a DUT wants to advertise being a Recording Device. (See CDF).

The Recording Device addresses are allocated as follows: 1, 2, 9





10.2.2 - 1 Ensure that the DUT takes the first Recording Device Logical Address it queries, when no other Recording Devices are connected.

Connect the DUT to the TE so that it is allocated a new Physical Address.

The DUT sends a <Polling Message> message to a Recording Device Logical Address.

The DUT receives no reply so takes that Logical Address and broadcasts a <Report Physical Address> message with "Recording Device" as the [Device Type].

10.2.2 - 2 Ensure that the DUT takes the second Recording Device Logical Address it queries, when one other Recording Device is connected.


Acknowledge the <Polling Message> message sent by the DUT.


The message is acknowledged, so the DUT sends a second <Polling Message> message to the next Recording Device Logical Address.





10.2.2 - 3 Ensure that the DUT takes the third Recording Device Logical Address it queries, when two other Recording Devices are connected.


Acknowledge the first <Polling Message> message sent by the DUT.

Acknowledge the second <Polling Message> message sent by the DUT.


The message is acknowledged, so the DUT sends a second <Polling Message> message to the next Recording Device Logical Address.

The second message is acknowledged, so the DUT sends a third <Polling Message> message to the next Recording Device Logical Address.




CECT 10.2.3 Playback Device

Configuration

This set of tests shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of DUT shall be connected to an HDMI input the TE. For the Simplay CEC Explorer, use the Source Device to TV Configuration (see CECT Figure 4) for source DUT.

This set of tests only applies if a DUT wants to advertise being a Playback Device. (See CDF).

The Playback Device addresses are allocated as follows: 4, 8, 11





10.2.3 - 1 Ensure that the DUT takes the first Playback Device Logical Address it queries, when no other Playback Devices are connected.


The DUT sends a <Polling Message> message to a Playback Device Logical Address.

The DUT receives no reply so takes that Logical Address and broadcasts a <Report Physical Address> message with "Playback Device" as the [Device Type].

10.2.3 - 2 Ensure that the DUT takes the second Playback Device Logical Address it queries, when one Playback Device is connected.




The message is acknowledged, so the DUT sends a second <Polling Message> message to the next Playback Device Logical Address.





10.2.3 - 3 Ensure that the DUT takes the third Playback Device Logical Address it queries, when two other Playback Devices are connected.





The message is acknowledged, so the DUT sends a second <Polling Message> message to the next Playback Device Logical Address.

The message is acknowledged, so the DUT sends a third <Polling Message> message to the next Playback Device Logical Address.




CECT 10.2.4 Tuner

Configuration

This set of tests shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of the DUT shall be connected to an HDMI input of the TE. For the Simplay CEC Explorer, use the Source Device to TV Configuration (see CECT Figure 4) for source DUT.

This set of tests only applies if a DUT wants to advertise being a Tuner (See CDF).

The Tuner addresses are allocated as follows: 3, 6, 7, 10





10.2.4 - 1 Ensure that the DUT takes the first Tuner Logical Address it queries, when no other Tuners are connected.


The DUT sends a <Polling Message> message to a Tuner Logical Address.

The DUT receives no reply so takes that Logical Address and broadcasts a <Report Physical Address> message with "Tuner" as the [Device Type].

10.2.4 - 2 Ensure that the DUT takes the second Tuner Logical Address it queries, when one other Tuner is connected.




The message is acknowledged, so the DUT sends a second <Polling Message> message to the next Tuner Logical Address.





10.2.4 - 3 Ensure that the DUT takes the third Tuner Logical Address it queries, when two other Tuners are connected.






The second message is acknowledged, so the DUT sends a third <Polling Message> message to the next Tuner Logical Address.





10.2.4 - 4 Ensure that the DUT takes the fourth Tuner Logical Address it queries, when three other Tuners are connected.




Acknowledge the third <Polling Message> message sent by the DUT.



The second message is acknowledged, so the DUT sends a third <Polling Message> message to the next Tuner Logical Address.

The third message is acknowledged, so the DUT sends a fourth <Polling Message> message to the next Tuner Logical Address.




CECT 10.2.5 Audio System

Configuration




This test only applies if a DUT wants to advertise being an Audio System. (See CDF).

The Audio System address is allocated Logical Address 5.



10.2.5 - 1 Ensure that the DUT takes Logical Address 5, when no other Audio System is connected.


The DUT sends a <Polling Message> message to address 5.

The DUT receives no reply so takes Logical Address 5 and broadcasts a <Report Physical Address> message with "Audio System" as the [Device Type].



CECT 10.2.6 Video Processor

Configuration


The Video Processor address is allocated Logical Address 14.





10.2.6 - 1 Ensure that the DUT takes Logical Address 14, when no other devices which take Logical Address 14 are connected.

This test only applies if a DUT wants to advertise being a Video Processor. (See CDF)


The DUT sends a <Polling Message> message to address 14.

The DUT receives no reply so takes Logical Address 14 and broadcasts a <Report Physical Address> message with "Video Processor" as the [Device Type].





CECT 11 Feature Tests Each feature test described below shall only be run for a CEC device that supports that feature.

CDF values are referred to know what device type is being tested also for each feature


[CEC: 12] High Level Protocol

[CEC: 13] CEC Features Description

[CEC: 15] Message Descriptions

[CEC: 16] Message Dependencies

[CEC: 17] Operand Descriptions

The DUT correctly supports Mandatory or declared Features and Messages.

CECT 11.1 TV / Display

Configuration

For testing a TV the HDMI Signal Configuration (see CECT 5.2) shall be used, except where explicitly stated otherwise. The test equipment shall by default simulate a device at Logical Address 1 and send all messages from this address (except where explicitly stated). If the test equipment simulates an Initiator, it shall support retry to send failed message.

Connect the HDMI output of the test equipment to an HDMI input of the DUT (TV).



CECT 11.1.1 One Touch Play [CEC: 13.1]



11.1.1 - 1 Ensure that the DUT responds to an <Image View On> message coming from various Logical Addresses.

The following procedure should be repeated with the TE simulating a device at Logical Addresses 1, 3 and 4.

Ensure the DUT is displaying an internal tuner or some other external source.

Send the DUT an <Image View On> message.

After more than 200msec, Send the DUT an <Active Source> message.

The DUT displays the new source.

11.1.1 - 2 Ensure that the DUT responds to a <Text View On> message coming from various Logical Addresses.

The following procedure should be repeated with the TE simulating a device at Logical Addresses 1, 3 and 4.

Ensure the DUT is displaying an internal tuner or some other external source.

Send the DUT a <Text View On> message.

After more than 200msec, Send the DUT an <Active Source> message.

The DUT displays the new source.




11.1.1 - 3 Ensure that the DUT responds to an <Image View On> message when in standby.

Test only applies if DUT can be brought out of Standby when receiving an <Image View On> message. See CDF.

Ensure the DUT is in standby.

Send the DUT an <Image View On> message.

The DUT powers up.

11.1.1 - 4 Ensure that the DUT responds to a <Text View On> message when in standby.

Test only applies if DUT can be brought out of Standby when receiving a <Text View On> message. See CDF.


Send the DUT a <Text View On> message.

The DUT powers up.

11.1.1 - 5 Ensure that the DUT broadcasts an <Active Source> message when changing to an internal source from previously displaying an external source.

Test only applies if the DUT has an internal source.

Broadcast an <Active Source> [1.0.0.0] message to display external source.

Set the DUT to display an internal source (e.g. an internal tuner).

DUT broadcasts an <Active Source> message. (Physical Address 0.0.0.0)

11.1.1 - 6 <Reserved>

11.1.1 - 7 <Reserved>





CECT 11.1.2 Routing Control [CEC: 13.2]



11.1.2 - 1 Ensure that the DUT sends a <Set Stream Path> message if the user selects another source device.

This test only applies if it is possible to select a source device via the DUT’s menu.

Broadcast a <Report Physical Address> [1.1.0.0] message from Logical Address 3.


If possible, use the DUT menu to select one of the above registered devices (See CDF for instruction).

The DUT sends a <Set Stream Path> message to the appropriate Logical Address.

11.1.2 - 2 Ensure that the DUT responds correctly to a <Request Active Source> message when it is not the current active source.

This test only applies if the DUT supports <Request Active Source> as Follower (See CDF).

Ensure the DUT is displaying an internal source (e.g. a tuner).

Broadcast an <Active Source> message, indicating that another device is the active source.

Broadcast a <Request Active Source> message.

The DUT does not respond to the <Request Active Source> message.

11.1.2 - 3 Ensure that the DUT responds correctly to a <Request Active Source> message when it is the current active source.

This test only applies if the DUT supports <Request Active Source> as Follower (See CDF).

Ensure the DUT is displaying an internal source (e.g. a tuner).


The DUT responds to the <Request Active Source> message by broadcasting an <Active Source> message.




11.1.2 - 4 Ensure that the DUT accepts <Inactive Source> message.

This test only applies if the DUT supports <Inactive Source> messages as Follower.(See CDF)

Broadcast a <Active Source> [1.0.0.0] message.

Send an <Inactive Source> [1.0.0.0] message to the DUT.

The DUT does not send a <Feature Abort> message as a response.

(It is manufacturer decision to decide the TV’s response.)

11.1.2 - 5 Ensure that the DUT broadcasts a <Routing Change> message when it is manually switched.

This test only applies if the DUT has several HDMI inputs that are not independent.

Ensure the DUT is currently switched to child position 1.(i.e. “HDMI Input Port 1”)(See CDF for how to switch to child position 1)

Switch the DUT manually to child position 2. (i.e. “HDMI Input Port 2”)(See CDF for how to switch to child position 2)

The DUT broadcasts a <Routing Change> [1.0.0.0] [2.0.0.0] message



CECT 11.1.3 System Standby [CEC: 13.3]



11.1.3 - 1 Ensure that the DUT broadcasts a correctly formatted <Standby> message when the System Standby feature is initiated.

Invoke the System Standby feature on the DUT. (See CDF for instruction)

The DUT broadcasts a <Standby> message, and switching into standby itself.




11.1.3 - 2 Ensure that the DUT handles a broadcast <Standby> message coming from various Logical Addresses including the unregistered address.

This test only applies if the DUT supports broadcast <Standby> messages as Follower.

The following procedure should be repeated with the TE simulating a device at Logical Addresses 1, 3, 4, 5, 13, 14 and 15.

Ensure that the DUT is in a state where going into standby is permitted. (See CDF for its condition)

Broadcast a <Standby> message.

The DUT switches to standby.

11.1.3 - 3 Ensure that the DUT handles a directly addressed <Standby> message coming from various Logical Addresses including the unregistered address.

This test only applies if the DUT supports directly addressed <Standby> messages as Follower.

The following procedure should be repeated with the TE simulating a device at Logical Addresses 1, 3, 4, 5, 13, 14 and 15.

Ensure that the DUT is in a state where going into standby is permitted. (See CDF for its condition)

Send a <Standby> message to the DUT.






CECT 11.1.4 One Touch Record [CEC: 13.4]



11.1.4 - 1 Ensure that the DUT sends a <Record On> [“Digital Service”] [Digital Service Identification] message when the user activates One Touch Record while displaying an internal tuner, for all valid Recording Device’s Logical Addresses.

This test only applies if the DUT has an internal tuner and supports <Record On> [“Digital Service”] as Initiator (see CDF).

The following procedure shall be repeated with the TE simulating a device at logical addresses 1, 2 and 9. (The TE should allocate a unique Physical Address corresponding to each Logical Address.)

Broadcast a <Report Physical Address> message from a Recording Device.

Ensure that the DUT is displaying an internal digital tuner.

Activate the DUT’s One Touch Record feature.

The DUT sends a <Record On> [“Digital Service”] [Digital Service Identification] message with the appropriate [Digital Service Identification] parameters.

11.1.4 - 2 Ensure that the DUT sends a <Record On> ["Analogue Service"] message when the user activates One Touch Record while displaying an internal analogue tuner, for all valid Recording Device’s Logical Addresses.

This test only applies if the DUT supports <Record On> [“Analogue Service”] message as Initiator.(See CDF)

The following procedure shall be repeated with the TE simulating a device at Logical Addresses 1, 2 and 9. (The TE should allocate a unique Physical Address corresponding to each Logical Address.)

Broadcast a <Report Physical Address> from Recording Devices,

Ensure that the DUT is displaying an internal analogue tuner.

Activate the DUT's one touch record feature

The DUT sends a <Record On> [“Analogue Service”] [Analogue Broadcast Type] [Analogue Frequency] [Broadcast System] message with the appropriate Analogue Frequency and Broadcast System parameters.




11.1.4 - 3 Ensure that the DUT sends a <Record On> ["External Plug"] [External Plug] message when the user activates One Touch Record while displaying an external plug, for all valid Recording Device’s Logical Addresses.

This test only applies if the DUT supports <Record On> [“External Plug”] message as Initiator.(See CDF)



Ensure that the DUT is displaying an External Plug.

Activate the DUT's one touch record feature.

The DUT sends a <Record On> [“External plug”] [External Plug] message with the appropriate [External Plug] parameters.

11.1.4 - 4 Ensure that the DUT sends a <Record On> ["External Physical Address"] [External Physical Address] message when the user activates One Touch Record while displaying an external plug, for all valid Recording Device’s Logical Addresses.

This test only applies if the DUT supports <Record On> [“External Physical Address”] message as Initiator.(See CDF)



Ensure that the DUT is displaying an External Plug.

Activate the DUT's one touch record feature

The DUT sends a <Record On> [“External Physical Address”] [External Physical Address] message

11.1.4 - 5 Ensure that the DUT sends a <Record On> [“Own Source”] message when the user activates One Touch Record while displaying the Recording Devices source for all valid Recording Device’s logical addresses.

Test only applies if the DUT supports <Record On> [“Own Source”] as Initiator (see CDF).

The following procedure shall be repeated with the TE simulating a device at Logical Addresses 1, 2 and 9.

Send an <Image View On> message to the DUT.

Broadcast an <Active Source> message.

Activate the DUT’s One Touch Record feature. (See CDF for instruction)

The DUT sends a <Record On> [“Own Source”] message.




11.1.4 - 6 Ensure that the DUT does not send a <Record On> message when the user activates One Touch Record while displaying another external source.

Test only applies if the DUT supports <Record On> [“Own Source”] as Initiator and does not support <Record On> [“External Plug”] or <Record On> [“External Physical Address”] as Initiator. (See CDF).

Set the TE to simulate a device at Logical Address 1, so the DUT discovers a connected Recording Device.

Select another external source. (ex: Analog Input 1) (See CDF for instruction).

Activate the DUT’s One Touch Record feature (from the TE’s Logical Address) (See CDF for instruction).

The DUT does not send a <Record On> message.

11.1.4 - 7 Ensure that that the DUT handles a <Record Status> message correctly and sends a <Record Off> message when the user stops the recording.

Test only applies if the DUT supports <Record On> [“Own Source”] and <Record Off> as Initiator (see CDF).



Activate the DUT’s One Touch Record feature (See CDF for instruction).

Send the DUT a <Record Status> [“Recording currently selected source”] message.

Stop the recording via the DUT’s UI / Remote Control.

The DUT sends a <Record Off> message after selecting to stop the recording.

11.1.4 - 8 Ensure that the DUT handles a <Record TV Screen> message coming from a valid Recording Device address when displaying an internal digital tuner.

This test only applies if the DUT supports <Record TV Screen> as Follower and supports <Record On> [“Digital Service”] as Initiator. (See CDF).


Broadcast a <Report Physical Address> message from a Logical Address of the Recording Device.

Ensure that the DUT is displaying an internal digital tuner.

Send the DUT a <Record TV Screen> message.

The DUT sends a <Record On> [“Digital Service”] [Digital Service Identification] message with the appropriate [Digital Service Identification] parameters.




11.1.4 - 9 Ensure that the DUT handles a <Record TV Screen> message coming from a valid Recording Device address when displaying the Recording Device’s source.

This test only applies if the DUT supports <Record TV Screen> as Follower and supports <Record On> [“Own Source”] as Initiator. (See CDF).






The DUT sends a <Record On> [“Own Source”] message.

11.1.4 - 10 Ensure that the DUT handles a <Record TV Screen> message coming from a valid Recording Device address when displaying an internal analogue tuner.

This test only applies if the DUT supports <Record TV Screen> as Follower and supports <Record On> [“Analogue Service”] as Initiator. (See CDF).



Ensure that the DUT is displaying an internal analogue tuner.


The DUT sends a <Record On> [“Analogue Service”] [Analogue Broadcast Type] [Analogue Frequency] [Broadcast System] message with the appropriate [Analogue Broadcast Type], [Analogue Frequency] and [Broadcast System] parameters.

11.1.4 - 11 Ensure that the DUT handles a <Record TV Screen> message coming from a valid Recording Device address when displaying an external source.

This test only applies if the DUT supports <Record TV Screen> as Follower and supports <Record On> [“External Plug”] or <Record On> [“External Physical Address”] as Initiator. (See CDF).


Send an <Image View On> message to the DUT from Logical Address 4.

Broadcast an <Active Source> message from Logical Address 4.


The DUT sends a <Record On> [“External Plug”] or a <Record On> [“External Physical Address”] message with the appropriate parameters.




11.1.4 - 12 <Reserved>

11.1.4 - 13 Ensure that the DUT handles a <Record TV Screen> message coming from a valid Recording Device address when displaying some other source that cannot be recorded.

This test only applies if the DUT supports <Record TV Screen> as Follower and does not support <Record On> [“External Physical Address”] or <Record On> [“External Plug”] as Initiator. (See CDF).





Send the DUT a <Record TV Screen> message (from the TE logical address).

The DUT sends a <Feature Abort> [“Cannot Provide Source”] message to the Recording Device.

11.1.4 - 14 Ensure that that the DUT handles a <Record Status> message correctly and sends a <Record Off> message when the user stops the recording.

Test only applies if the DUT supports <Record Off> and any of <Record On> [“Analogue Service”], <Record On> [“Digital Service”], <Record On> [“External Plug”] or <Record On> “External Physical Address”] as Initiator (see CDF).

Set the TE to simulate a device at Logical Address 1, so the DUT discovers a connected Recording Device.

Ensure that the DUT is in a state ready to initiate the One Touch Record Feature, e.g. it is displaying an internal tuner or an external input

Activate the DUT’s One Touch Record feature (See CDF for instruction).

Send the DUT a <Record Status> message with a [Record Status Info] indicating that it is successfully recording the source identified in the [Record Source] which was sent by the DUT when it initiated the One Touch Record feature.

Stop the recording via the DUT’s UI / Remote Control.

The DUT sends a <Record Off> message.





CECT 11.1.5 Timer Programming [CEC: 13.5]



11.1.5 - 1 If the DUT can set timer blocks via an EPG, ensure that it sends a correctly formatted <Set Digital Timer> message for all valid Recording Device addresses.

This test only applies if the DUT supports <Set Digital Timer> messages as Initiator and can set timer blocks via an EPG.

The following procedure shall be repeated with the TE simulating a device at logical addresses 1, 2 and 9.

Set a timer recording via the EPG.

Send the DUT a <Timer Status> message indicating that the recording has been programmed and that enough media is available.

The DUT sends a correctly formatted <Set Digital Timer> message with all parameters corresponding to the program that was selected.

11.1.5 - 2 If the DUT can set timer blocks via an EPG, ensure that it sends a correctly formatted <Set Analogue Timer> message for all valid Recording Device addresses.

This test only applies if the DUT supports <Set Analogue Timer> messages as Initiator and can set timer blocks via an EPG.




The DUT sends a correctly formatted <Set Analogue Timer> message with all parameters corresponding to the program that was selected.




11.1.5 - 3 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set Digital Timer> message for all valid Recording Device addresses.

This test only applies if the DUT supports <Set Digital Timer> messages as Initiator and can set timer blocks via its menu.


Set a timer recording via the menu.

Send the DUT a <Timer Status> message indicating that the timer has been programmed and that enough media is available.

The DUT sends a correctly formatted <Set Digital Timer> message with all parameters corresponding to the timer that was set.

11.1.5 - 4 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set Analogue Timer> message for all valid Recording Device addresses.

This test only applies if the DUT supports <Set Analogue Timer> messages as Initiator and can set timer blocks via its menu.




The DUT sends a correctly formatted <Set Analogue Timer> message with all parameters corresponding to the timer that was set.

11.1.5 - 5 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set External Timer> message for all valid Recording Device addresses.

This test only applies if the DUT supports <Set External Timer> messages as Initiator and can set timer blocks via its menu.




The DUT sends a correctly formatted <Set External Timer> message with all parameters corresponding to the timer that was set.




11.1.5 - 6 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set Digital Timer> message.

This test only applies if the DUT supports <Set Digital Timer> messages as Initiator and can set or clear individual timer blocks via its menu or via an EPG.

Invoke the DUT to send a <Set Digital Timer> message.

Reply to the DUT with a <Timer Status> message indicating that the device was not programmed.

If the DUT provides a local list of record blocks for the device, it does not add the record block to it.

The DUT may indicate on screen that the Recording Device was not programmed. (This is desirable – it is NOT a Requirement)

11.1.5 - 7 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set Analogue Timer> message.

This test only applies if the DUT supports <Set Analogue Timer> messages as Initiator and can set or clear individual timer blocks via its menu or via an EPG.

Invoke the DUT to send a <Set Analogue Timer> message.




11.1.5 - 8 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set External Timer> message.

This test only applies if the DUT supports <Set Analogue Timer> messages as Initiator and can set or clear individual timer blocks via its menu or via an EPG.

Invoke the DUT to send a <Set External Timer> message.







11.1.5 - 9 If the DUT can set and clear timer blocks via an EPG, ensure that it sends a correctly formatted <Clear Digital Timer> message and clears the timer from its display when receiving a <Timer Cleared Status> message.

This test only applies if the DUT supports <Clear Digital Timer> messages as Initiator and can clear timer blocks via an EPG.



Clear that timer recording via the EPG.

Send the DUT a <Timer Cleared Status> message indicating that the timer has been successfully cleared.

The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the program that was cleared.

The DUT removes the timer program from its display.

11.1.5 - 10 If the DUT can set and clear timer blocks via an EPG, ensure that it sends a correctly formatted <Clear Analogue Timer> message and clears the timer from its display when receiving a <Timer Cleared Status> message.

This test only applies if the DUT supports <Clear Analogue Timer> messages as Initiator and can clear timer blocks via an EPG.





The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the program that was cleared.


11.1.5 - 11 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Digital Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.

This test only applies if the DUT supports <Clear Digital Timer> messages as Initiator and can clear timer blocks via its menu.



Clear that timer recording via the menu.


The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the timer that was cleared.

The DUT removes the timer program from its menu.




11.1.5 - 12 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Analogue Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.

This test only applies if the DUT supports <Clear Analogue Timer> messages as Initiator and can clear timer blocks via its menu.





The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the timer that was cleared.


11.1.5 - 13 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear External Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.

This test only applies if the DUT supports <Clear External Timer> messages as Initiator and can clear timer blocks via its menu.





The DUT sends a correctly formatted <Clear External Timer> message with all parameters corresponding to the timer that was cleared.


11.1.5 - 14 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Digital Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device

This test only applies if the DUT supports <Clear Digital Timer> messages as Initiator and can clear timer blocks via its menu.




Send the DUT a <Timer Cleared Status> message indicating that the timer could not be cleared from the device as there is no matching entry.

The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the timer that was not cleared.





11.1.5 - 15 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Analogue Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device

This test only applies if the DUT supports <Clear Analogue Timer> messages as Initiator and can clear timer blocks via its menu.





The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the timer that was not cleared.

The DUT removes the timer program from its menu

11.1.5 - 16 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear External Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device

This test only applies if the DUT supports <Clear External Timer> messages as Initiator and can clear timer blocks via its menu.





The DUT sends a correctly formatted <Clear External Timer> message with all parameters corresponding to the timer that was not cleared.






CECT 11.1.6 System Information [CEC: 13.6]



11.1.6 - 1 Ensure that the DUT acknowledges a <Polling Message> message.

Send the DUT a <Polling Message> message. The DUT acknowledges the <Polling Message> message.

11.1.6 - 2 Ensure that the DUT responds correctly to a <Give Physical Address> message coming from various logical addresses including the unregistered address.

The following procedure shall be repeated with the TE simulating a device at logical addresses 1, 3, 4, 5, 13, 14 and 15.

Send the DUT a <Give Physical Address> message.

The DUT should respond by broadcasting a <Report Physical Address> message indicating the correct Physical Address of the device.

11.1.6 - 3 <Reserved>

11.1.6 - 4 Ensure that the DUT sends the correct messages when modifying its menu language setting.

This test only applies If the DUT has a modifiable language setting (See CDF).

Set the DUT to another one of its supported menu languages (See CDF for instructions and supported languages).

The DUT broadcasts a <Set Menu Language> message with the correct Bibliographic code (using lower case characters) for the selected language. In the case of Chinese, the DUT broadcasts the relevant Bibliographic or Terminology code (using lower case characters).

11.1.6 - 5 Ensure that the DUT responds correctly to a <Get Menu Language> message coming from various logical addresses including the unregistered address.

This test only applies if the DUT supports a <Get Menu Language> as a Follower. (See CDF)


Send the DUT a <Get Menu Language> message.

The DUT broadcasts a <Set Menu Language> message with the correct Bibliographic code (using lower case characters) for the selected language. In the case of Chinese, the DUT broadcasts the relevant Bibliographic or Terminology code (using lower case characters).




11.1.6 - 6 Ensure that the DUT responds correctly to a <Get CEC Version> message.

This test only applies if the DUT supports <Get CEC Version> messages as Follower or the DUT can send or receive <Vendor Command>, messages to or from devices having another Vendor ID.(See CDF)

Send a <Get CEC Version> message to the DUT. The DUT sends a correctly formatted <CEC Version> message with a [CEC Version] indicating the version number of the CEC Supplement 1 specification which was used to design the device (See CDF for the CEC version number).



CECT 11.1.7 Deck Control [CEC: 13.7]



11.1.7 - 1 Ensure that the DUT sends the correct <Deck Control> and <Play> messages when controlling a deck.

This test only applies if the DUT supports <Deck Control> and <Play> as Initiator (See CDF).

The following procedure shall be repeated with the TE simulating a device at logical addresses 1 and 4.

Invoke the DUT to send every possible <Deck Control> and <Play> message that its menu allows. (See CDF for its condition)

Send the DUT an appropriate <Deck Status> message after each request, to indicate that the request succeeded.

The DUT sends the appropriate <Deck Control> or <Play> message for the option that was selected.

If the DUT is monitoring deck status it should update its display to indicate that the request was successful (This is desirable but is NOT a requirement).




11.1.7 - 2 Ensure that the DUT handles a <Deck Status> message indicating that a request was successful.

This test only applies if the DUT supports <Deck Control> and <Play> [“Play Forward”] as Initiator and <Deck Status> as Follower (See CDF).

Invoke the DUT to send a <Play> [“Play Forward”] message. (See CDF for instruction)

Send the DUT a <Deck Status> [“Play”] message.

The DUT accepts the <Deck Status> message.

If the DUT is monitoring deck status it should indicate that the deck is playing. (This is desirable but is NOT a requirement).

11.1.7 - 3 Ensure that the DUT handles a <Deck Status> message indicating that a request was not successful.

This test only applies if the DUT supports <Deck Control> and <Play> [“Play Forward”] as Initiator and <Deck Status> as Follower (See CDF).

Invoke the DUT to send a <Play> [“Play Forward”] message. (See CDF for instruction)

Send the DUT a <Deck Status> message indicating that the deck is stopped.

The DUT accepts the <Deck Status> message.

If the DUT is monitoring deck status it should indicate that the deck is not playing. (This is desirable but is NOT a requirement).





CECT 11.1.8 Tuner Control [CEC: 13.8]



11.1.8 - 1 Ensure that the DUT can send a <Tuner Step Increment> message when controlling a Recording Device or STB tuner.

This test only applies if the DUT supports <Tuner Step Increment> as Initiator (See CDF).


Invoke the tuner control feature on the DUT (See CDF for instruction). If the DUT sends a <Give Tuner Device Status> message, respond with a <Tuner Device Status> [“Not Being used for recording”] [“Displaying Digital Tuner”] [“Service Identified Digital IDs”] ["ARIB-T "] [0x7D70 0xA000 0x7D70] (or more suitable Digital Service Identification) message.

Increment the channel that is being shown on the external device via the DUT.

The DUT sends a <Tuner Step Increment> message.

11.1.8 - 2 Ensure that the DUT can send a <Tuner Step Decrement> message when controlling a Recording Device or STB tuner.

This test only applies if the DUT supports <Tuner Step Decrement> as Initiator (See CDF).


Invoke the tuner control feature on the DUT (See CDF for instruction). If the DUT sends a <Give Tuner Device Status> message, respond with a <Tuner Device Status> [“Not Being used for recording”] [“Displaying Digital Tuner”] [“Service Identified Digital IDs”] ["ARIB-T "] [0x7D70 0xA000 0x7D70] (or more suitable Digital Service Identification) message.

Decrement the channel that is being shown on the external device via the DUT.

The DUT sends a <Tuner Step Decrement> message.




11.1.8 - 3 Ensure that the DUT accepts a valid <Tuner Device Status> message.

This test only applies if the DUT supports <Tuner Device Status> as Follower (See CDF).

Send a <Tuner Device Status> [“Not Being used for recording”] [“Not Displaying Tuner”] [“Service Identified Digital IDs”] ["ARIB-T "] [0x7D70 0xA000 0x7D70] (or more suitable Digital Service Identification) message to the DUT.

The DUT should not respond with a <Feature Abort> message.



CECT 11.1.9 Vendor Specific Commands [CEC: 13.9]



11.1.9 - 1 Ensure that the DUT accepts a <Give Device Vendor ID> message from various logical addresses including the unregistered Logical Address (15).

This test only applies if the DUT supports <Give Device Vendor ID> as Follower (See CDF).


Send a <Give Device Vendor ID> message to the DUT.

The DUT responds by broadcasting a <Device Vendor ID> message with the correct ID depending upon the vendor.




11.1.9 - 2 If the DUT can attempt to send a <Vendor Command> to another vendor's device, ensure the DUT does not send a Vendor Specific Commands to a device that it does not recognize.

This test only applies if the DUT supports <Vendor Command> messages as Initiator and can try to send a <Vendor Command> message to a device with a Vendor ID that is different from the DUT.

The TE shall simulate a device that has a Vendor ID that is different from the DUT, and simulates a device at Logical Address that the DUT tries to send the Vendor Specific Commands. (See CDF for Vendor ID that is different from the DUT’s, and Logical Address to send the Vendor Specific Commands.)

Broadcast a <Report Physical Address> message from the TE

Broadcast a <Device Vendor ID> message from the TE.

Invoke the DUT to send a <Vendor Command> message. (See CDF for instruction to initiate the Vendor Specific function.)

The DUT does not send any <Vendor Command> message.





CECT 11.1.10 OSD Display [CEC: 13.10]



11.1.10 - 1 Check that the DUT accepts a <Set OSD String> message and is capable of displaying the message for a default time from various logical addresses.

This test only applies if the DUT supports <Set OSD String> as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at logical addresses 1, 3, 4, 5, 13 and 14.

Ensure the DUT is in a state where displaying OSD Strings is allowed. (See CDF for its condition)

Send the DUT a <Set OSD String> [“Display For Default Time”] [‘Test String’].

The DUT displays the message for a default time period and then clears the message. (The time period is locally specified - a typical value is 5 seconds).

11.1.10 - 2 Check that the DUT accepts a <Set OSD String> message and is capable of displaying the message until it receives a clear message.



Send the DUT a <Set OSD String> [“Display Until Cleared”] [‘Test String’].

Wait for a period in excess of the devices default display time. (It is recommended to wait for 20s or more).

Send a <Set OSD String> containing a [Display Control] parameter of [“Clear Previous Message”] only (i.e. not containing any [OSD String] parameter).

The DUT displays the message ‘Test String’ on receipt of the first message.

The DUT clears the OSD text on receipt of the second message.

Note: It is possible that the DUT may overwrite the message with an internally generated message, which could be blank. This is acceptable behavior.




11.1.10 - 3 Check that the DUT accepts a <Set OSD String> message and is capable of overwriting an OSD string with a new OSD string from another initiator.



Set the TE to simulate a device at Logical Address 1.

Send the DUT a <Set OSD String> [“Display Until Cleared”] [‘Test String’] message.


Send a <Set OSD String> [“Display For Default Time”] [‘Second String’].

The DUT displays the message ‘Test String’ on receipt of the first message.

The DUT removes the previous message and displays the message ‘Second String’ on receipt of the second message.


Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 11.1.10



CECT 11.1.11 Device OSD Name Transfer [CEC: 13.11]



11.1.11 - 1 Ensure that the DUT sends a <Give OSD Name> message whenever it discovers a new device at any Logical Address and ensure that it accepts a <Set OSD Name> message in response.

This test only applies if the DUT supports <Give OSD Name> as Initiator (See CDF).

For addresses corresponding to the device types supported in the CDF, the following procedure shall be repeated with the TE simulating a device at logical addresses 1, 3, 4, 5, 13 and 14.

Broadcast a <Report Physical Address> message.

After the DUT sends a <Give OSD Name> message, send a <Set OSD Name> [‘Test Device’] to the DUT.

Go to the menu indicated in the CDF to see where this OSD name is displayed

The DUT shall send a <Give OSD Name> message to the appropriate address.

The DUT shall accept the <Set OSD Name> message and refer to the device as ‘Test Device’ in the menu indicated in the CDF.

11.1.11 - 2 Ensure that the DUT does not send a <Give OSD Name> message when it discovers a new device at the unregistered logical address.

This test only applies if the DUT supports <Give OSD Name> as Initiator (See CDF).


Broadcast a <Report Physical Address> [1.0.0.0] message.

The DUT does NOT send a <Give OSD Name> message.





CECT 11.1.12 Device Menu Control [CEC: 13.12]



11.1.12 - 1 Ensure that the DUT reacts correctly to a <Menu Status> [“Activated”] message from the current active source at various logical addresses, when the TV is not controlling a menu.

This test only applies if the DUT supports <Menu Status> as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at logical addresses that can be accepted device types by the DUT on the Device Menu Activated. (See CDF)

Ensure that the DUT is in a state where forwarding the remote control key press is allowed. (See CDF for its condition)



Send a <Menu Status> [“Activated”] message to the DUT.

Press a remote control key that the DUT will forward. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward.

The DUT sends a <User Control Pressed> message when the remote control key is pressed.

The DUT does not handle the remote control key press locally




11.1.12 - 2 Ensure that the DUT ignores a <Menu Status> message coming from the unregistered Logical Address (15).







Press the ‘UP’ key on the DUT’s remote control.

The DUT ignores the <Menu Status> message.

The DUT handles the remote control press locally. No <User Control Pressed> message is sent.

11.1.12 - 3 Ensure that the DUT reacts correctly to a <Menu Status> [“Deactivated”] message from the current active source when the TV is controlling a menu.






Send a <Menu Status> [“Deactivated”] message to the DUT from the current source device.






11.1.12 - 4 Ensure that the DUT sends a <Menu Request> [“Activate”] message to the current active source when the Device Menu Control feature is invoked and the source device is not currently displaying a menu.

This test only applies if the DUT supports <Menu Request> as Initiator (See CDF).




Invoke the Device Menu Control Feature on the DUT.

The DUT sends a <Menu Request> [“Activate”] message to the current active source device.

11.1.12 - 5 Ensure that the DUT sends a <Menu Request> [“Deactivate”] message when the Device Menu Control Feature is deactivated and the source device is currently displaying a menu.

This test only applies if the DUT supports <Menu Request> as Initiator (See CDF).





Deactivate the Device Menu Control Feature on the DUT. (See CDF for its instruction)

The DUT sends a <Menu Request> [“Deactivate”] message to the current source device.

11.1.12 - 6 Ensure that the DUT ignores a <Menu Status> message when it is not displaying a CEC source device.


Ensure that the DUT is displaying its internal tuner or a non-CEC external source and is in a state where forwarding the remote control key press is allowed. (See CDF for its condition)


Press the ‘UP’ key on the DUT’s remote control






11.1.12 - 7 Ensure that the DUT correctly handles a <Menu Status> message that does not come from the current source device.





Send a <Menu Status> [“Activated”] message to the DUT from Logical Address 2.


The DUT ignores the <Menu Status> message.






CECT 11.1.13 Remote Control Pass Through [CEC: 13.13]



11.1.13 - 1 Ensure that the DUT sends the appropriate messages for remote control pass through to a Recording Device.

This test only applies if the DUT supports <User Control Pressed> as Initiator and has the "Recording Device" setting (i.e. Select the Recording Device as a target device. See condition/instruction for Initiator of <User Control Pressed> of CDF).

Set the TE to simulate a device at address 1.

Ensure the DUT's remote control is set to the “Recording Device” setting. (See CDF for instruction)

Press a remote control key that the DUT will forward to the Recording Device. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward to the Recording Device.

The DUT sends a <User Control Pressed> message with the correct key code for the button pressed.

The DUT sends a <User Control Released> message when the button is released.

11.1.13 - 2 Ensure that the DUT sends the appropriate messages for remote control pass through to a Playback Device.

This test only applies if the DUT supports <User Control Pressed> as Initiator and has the "Playback Device" setting (i.e. Select the Playback Device as a target device. See condition/instruction for Initiator of <User Control Pressed> of CDF).


Ensure the DUT's remote control is set to the “Playback Device” setting. (See CDF for instruction)

Press a remote control key that the DUT will forward to the Playback Device. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward to the Playback Device.






11.1.13 - 3 Ensure that the DUT sends the appropriate messages for remote control pass through to a Tuner.

This test only applies if the DUT supports <User Control Pressed> as Initiator and has the "Tuner" setting (i.e. Select the Tuner as a target device. See condition/instruction for Initiator of <User Control Pressed> of CDF).


Ensure the TVs remote control is set to the “Tuner” setting. (See CDF for instruction)

Press a remote control key that the DUT will forward to the Tuner. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward to the Tuner.



11.1.13 - 4 Ensure that the DUT sends the appropriate messages for remote control pass through to an Audio System.

This test only applies if the DUT supports <User Control Pressed> as Initiator and has the "Audio System" setting (i.e. Select the Audio System as a target device. See condition/instruction for Initiator of <User Control Pressed> of CDF).


Ensure the TVs remote control is set to the “Audio System” setting. (See CDF for instruction)

Press a remote control key that the DUT will forward to the Audio System. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward to the Audio System.






11.1.13 - 5 Ensure that the DUT behaves sensibly when the remote control pass through feature is invoked in a system with multiple devices of the same type.

This test only applies if the DUT supports <User Control Pressed> message as Initiator (See CDF).

This procedure assumes that the DUT supports Remote Control Pass Through for Record Devices. If it doesn’t, adjust the addresses as appropriate for multiple Playback Devices or Tuners.




Ensure the TVs remote control is set to the “Recording Device” setting. (See CDF for instruction)

Press a remote control key that the DUT will forward to the Recording Device. (See CDF)

Repeat the procedure for several other remote control keys that the DUT will forward to the Recording Device.

The DUT should select a single device to forward the remote control command to.

The DUT should not send multiple messages to multiple record devices.




11.1.13 – 6 Ensure that the DUT sends repeated messages using an appropriate Initiator Repetition time for remote control pass through.

This test only applies if a DUT supports <User Control Pressed> message and Press and Hold Operation (see CEC 13.13.3) as Initiator. (See CDF)

Set the TE to simulate a device at one of the Logical Addresses that the DUT supports for Remote Control Pass Through (See CDF).

On the TV, select the TE as the destination for Remote Control Pass through messages (see CDF).

Press and hold a key on the DUT’s remote or local controller that will result in <User Control Pressed> messages being sent to the TE for several seconds. (See CDF for which keys are implemented as this behavior).

The TE shall monitor the repeated <User Control Pressed> messages that are sent by the DUT.

Measure the time between the repeated messages (The time is measured at same point of the repeated messages. e.g. at the first falling edge of the Start Bit).

The time between <User Control Pressed> messages is between 200ms and 500ms.

The DUT sends a <User Control Released> message after the last <User Control Pressed> message.



CECT 11.1.14 Give Device Power Status [CEC: 13.14]



11.1.14 - 1 Ensure that the DUT responds correctly to a <Give Device Power Status> message.

Ensure the DUT is power on.

Send the DUT a <Give Device Power Status> message.

The DUT responds by sending a <Report Power Status> [“On”] message.




11.1.14 - 2 Ensure that the DUT responds correctly to a <Give Device Power Status> message. This test only applies if the DUT supports <Report Power Status> [“Standby”] as Initiator (See CDF).

Ensure the DUT is standby.


The DUT responds by sending a <Report Power Status> [“Standby”] message.



CECT 11.1.15 System Audio Control [CEC: 13.15]



11.1.15 - 1 Ensure that the DUT sends a correctly formatted <System Audio Mode Request> message.

This test only applies if the DUT supports <System Audio Mode Request> messages as Initiator.(See CDF)

Ensure that the TE simulates devices at Logical Address 5 and 1.



Broadcast an <Image View On> message and an <Active Source> [1.1.0.0] message from Logical Address 1.

Invoke the DUT to the System Audio Mode to become On.

The DUT sends a <System Audio Mode Request> [1.1.0.0] message to the device at Logical Address 5.




11.1.15 - 2 Ensure that the DUT issues correctly a <User Control Pressed> [“Volume Up” | “Volume Down”] message when the System Audio Control is On.

This test only applies if the DUT supports <Set System Audio Mode> messages as Follower.(See CDF)

Send a <Set System Audio Mode> [“On”] message to the DUT from Logical Address 5.

Invoke the DUT to change volume control by the DUT’s local or remote control. ( e.g. pressing volume up / down key on its control )

The DUT issues a <User Control Pressed> [“Volume Up” | “Volume Down”] message. And the DUT doesn't change its volume level.

11.1.15 - 3 Ensure that the DUT issues correctly a <User Control Pressed> [“Mute”] message when the System Audio Control is On.



Invoke the DUT to change volume control to mute or unmute by the DUT’s local or remote control. (e.g. pressing mute / unmute key on its control )

The DUT issues a <User Control Pressed> [“Mute”] message. And the DUT doesn't change its volume level.

11.1.15 - 4 Ensure that the DUT issues correctly a <Give System Audio Mode Status> when it is brought out of standby.

This test only applies if the DUT supports <Give System Audio Mode Status> messages as Initiator.(See CDF)

Ensure that the TE simulates a device at Logical Address 5.



Power on the DUT.

The DUT issues a <Give System Audio Mode Status> message to the amplifier.

11.1.15 - 5 Ensure that the DUT issues a correctly formatted <System Audio Mode Request> message when becoming the System Audio Mode to be Off.

This test only applies if the DUT supports <System Audio Mode Request> messages as Initiator.(See CDF)

Broadcast a <Set System Audio Mode> [“On”] message from Logical Address 5

Invoke the DUT to turn off the System Audio Control.

The DUT sends a <System Audio Mode Request> message with no operands to the amplifier.




11.1.15 - 6 Ensure that the DUT sends a correctly formatted <Request Short Audio Descriptor> message

This test only applies if the DUT (i.e. TV) supports <Request Short Audio Descriptor> messages as Initiator. (See CDF)

Ensure that the TE simulates the device at Logical Address 5.

Broadcast a <Report Physical Address> message from TE.

Invoke the DUT to send <Request Short Audio Descriptor> message(s). (See CDF)

The DUT sends one or more correctly formatted <Request Short Audio Descriptor> messages(s) that includes the correct operand values for 1 byte pair(s) of [Audio Format ID] and [Audio Format Code], corresponding to the audio formats (e.g. AC-3=0x03, AAC=0x06,…) indicated in the CDF.

11.1.15 - 7 Ensure that the DUT mutes its volume when the DUT receives a broadcast <Set System Audio Mode> ["On"] message.


Ensure the TE simulates a device at Logical Address 5.

Ensure the System Audio Mode is off.

Broadcast a <Set System Audio Mode> [“On”] message from TE.

The DUT mutes its volume.

11.1.15 - 8 Ensure that the DUT unmutes its volume when the DUT receives a broadcast <Set System Audio Mode> ["Off"] message.


Ensure the TE simulates a device at Logical Address 5.

Ensure the System Audio Mode is on. (E.g., broadcast a <Set System Audio Mode> ["On"] message from the TE.)

Broadcast a <Set System Audio Mode> [“Off”] message from TE.

The DUT unmutes its volume.





CECT 11.1.16 Audio Rate Control [CEC: 13.16]



11.1.16 - 1 Ensure that the DUT sends directly addressed <Set Audio Rate> messages in a correct timing if the user activates this feature.

This test only applies if the DUT supports <Set Audio Rate> messages as Initiator (See CDF).

Ensure that user activates this feature.

Measure time span between the directly addressed <Set Audio Rate> messages.

The DUT sends directly addressed <Set Audio Rate> messages at least once every 2 seconds.

The parameter [Audio Rate] shall be “0”, ”1”, ”2”, ”3”, ”4”,” 5”, or ”6”.



CECT 11.1.17 Audio Return Channel Control [CEC: 13.17]

Configurations

Tests 11.1.17-1 to 11.1.17-6 will test the control of the Audio Return Channel function on HDMI input(s) of the DUT.

If the DUT does not have any HDMI input that supports Audio Return Channel function, then SKIP tests from 11.1.17-1 to 11.1.17-6.

• The TE shall emulate a device at Logical Address for which the DUT supports Audio Return Channel function (see CDF).

• Tests from 11.1.17-1 to 11.1.17-4 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that supports Audio Return Channel function shall be connected to an HDMI output of the TE.

• Test 11.1.17-5 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that supports Audio Return Channel function shall be connected to an HDMI output of the TE. The TE shall simulate a Source which supports Audio Return Channel function connected to the DUT via a Repeater, and CEC messages are sent by the simulated Source for this test.



• Repeat tests from 11.1.17-1 to 11.1.17-5 for all the HDMI inputs of the DUT that support Audio Return Channel function (See CDF).

Test 11.1.17-6 is only performed if the DUT has any HDMI inputs that do not support the Audio Return Channel function.

• Test 11.1.17-6 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that does not support Audio Return Channel function shall be connected to an HDMI output of the TE.

• Repeat test 11.1.17-6 for all the HDMI inputs of the DUT that do not support Audio Return Channel function(See CDF).



11.1.17- 1 Ensure that the DUT sends a directly addressed <Request ARC Initiation> message.

This test only applies if the DUT supports <Request ARC Initiation> messages as Initiator (See CDF).


Invoke the DUT to send a directly addressed <Request ARC Initiation> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Request ARC Initiation> message with no operand to the TE.

11.1.17 - 2 Ensure that the DUT sends a directly addressed <Report ARC Initiated> message.

Ensure that the DUT is ready to initiate ARC. (See CDF)


Send a directly addressed <Initiate ARC> message to the DUT.

The DUT sends a directly addressed <Report ARC Initiated> message with no operand to the TE.




11.1.17 - 3 Ensure that the DUT sends a directly addressed <Request ARC Termination> message.

This test only applies if the DUT supports <Request ARC Termination> messages as Initiator (See CDF).

Ensure that ARC has been initiated. (See CDF)

Ensure that the DUT is ready to terminate ARC. (See CDF)


Invoke the DUT to send a directly addressed <Request ARC Termination> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Request ARC Termination> message with no operand to the TE.

11.1.17 - 4 Ensure that the DUT sends a directly addressed <Report ARC Terminated> message.


Ensure that the DUT is ready to terminate ARC.


Send a directly addressed <Terminate ARC> message to the DUT.

The DUT sends a directly addressed <Report ARC Terminated> message with no operand to the TE.

11.1.17 - 5 Ensure that the DUT does not respond with any directly addressed <Report ARC Initiated> messages to non-adjacent device.

Ensure the DUT takes Physical Address 0.0.0.0 and the TE simulates a grandchild device of the DUT. (e.g. If the DUT gives the TE a Physical Address of 1.0.0.0, then TE takes a Physical Address of 1.1.0.0).



The DUT does not send any directly addressed <Report ARC Initiated> messages to the TE.




11.1.17 - 6 Ensure that the DUT does not respond with any directly addressed <Report ARC Initiated> messages when receiving an <Initiate ARC> message from a device connected to an input which does not support Audio Return Channel function.

Ensure configuration for this test (see “Configurations” at start of this section).






CECT 11.2 Non TV Device

Configuration

For testing non-TV devices, the Source Device to TV Configuration (see CECT 5.4) shall be used except where explicitly stated. An HDMI output of the DUT shall be connected to an HDMI input of the test equipment. The test equipment shall by default mimic a device at Logical Address 0 and send all messages from this address (except where otherwise stated).



CECT 11.2.1 One Touch Play [CEC: 13.1]



11.2.1 - 1 Ensure that the DUT sends an <Image View On> or <Text View On> message followed by an <Active Source> message when the One Touch Play feature is initiated.

This test only applies if the DUT can become active source.

Initiate the One Touch Play feature on the DUT. The DUT sends an <Image View On> or <Text View On> message as locally specified and then broadcasts an <Active Source> message.

11.2.1 - 2 <Reserved>



CECT 11.2.2 Routing Control [CEC: 13.2]





11.2.2 - 1 Ensure that the DUT responds correctly to a <Set Stream Path> message that indicates it as the device to stream to.

This test only applies if the DUT supports <Set Stream Path> message as Follower (See CDF).

Broadcast a <Active Source> message indicating that another device is active source.

Broadcast a <Set Stream Path> message indicating that the DUT is now the active source.

The DUT broadcasts an <Active Source> message and streams its content to the display.

11.2.2 - 2 Ensure that the DUT responds correctly to a <Request Active Source> message when it is the current active source.

This test only applies if the DUT supports <Request Active Source> message as Follower (See CDF).

Ensure the DUT is now the active source.


The DUT responds an <Active Source> message to the <Request Active Source> message.

11.2.2 - 3 Ensure that the DUT responds correctly to a <Request Active Source> message from various logical addresses including the unregistered address (15), when it is the current active source.

This test only applies if the DUT supports <Request Active Source> message as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (1, 3, 4, 5 and 15).



The DUT responds to the <Request Active Source> message by broadcasting an <Active Source> message.




11.2.2 - 4 If the DUT is a current active source, the DUT shall issue <Inactive Source> when going into standby.

This test only applies if the DUT supports <Inactive Source> messages as Initiator.(See CDF)

Broadcast a <Set Stream Path> message with the Physical Address of the DUT.

Invoke the DUT to send an <Inactive Source> message. (i.e. When the DUT goes into standby)(See CDF).

The DUT sends a directly addressed <Inactive Source> message with the Physical Address of the DUT to the TV.



CECT 11.2.3 System Standby [CEC: 13.3]



11.2.3 - 1 If the DUT can initiate the system standby feature, check that it broadcasts a correctly formatted <Standby> message.

This test only applies if the DUT supports broadcast <Standby> messages as Initiator. (See CDF)

Ensure that the DUT is in a state where going into standby is permitted.

Initiate the System Standby feature on the DUT.

The DUT shall broadcast a <Standby> message, before going into standby itself.




11.2.3 - 2 Check that the DUT accepts a broadcast <Standby> message from various logical addresses including the unregistered address and switches to standby.

This test only applies if the DUT supports broadcast <Standby> messages as Follower.



Broadcast a <Standby> message.


11.2.3 - 3 Check that the DUT accepts a directly addressed <Standby> message from various logical addresses including the unregistered address and switches to Standby.

This test only applies if the DUT supports directly addressed <Standby> messages as Follower.



Send a <Standby> message to the DUT.


11.2.3 - 4 Check that the DUT does not broadcast any <Standby> message when just the DUT is put into the standby mode.

This test only applies if the DUT has a standby mode (See CDF).

Ensure that the DUT is in a state where going into standby mode is permitted.

Put the DUT into the standby mode (not the System Standby).

The DUT switches to standby and does not broadcast any <Standby> message.





CECT 11.2.4 One Touch Record [CEC: 13.4]



11.2.4 - 1 Ensure that the DUT sends a <Record TV Screen> message to the TV, when the One Touch Record feature is invoked locally and accepts a <Feature Abort> in response.

This test only applies if the DUT supports <Record TV Screen> as Initiator (See CDF).

Ensure the DUT has media loaded and is ready to record. (See CDF for instruction)

Invoke the One Touch Record feature on the DUT. (See CDF for instruction)

After the DUT sends a <Record TV Screen> message, send the DUT a <Feature Abort> [“Cannot Provide Source”] message.

The DUT sends a <Record TV Screen> message to the TV.

The DUT accepts the <Feature Abort> and does not begin recording.

11.2.4 - 2 Ensure that the DUT accepts a <Record On> [“Digital Service”] [“Digital Service Identification”] message and records the service specified.

This test only applies if the DUT supports <Record On> [“Digital Service”] as Follower (See CDF).

Ensure that the DUT selects a valid digital service ID ([“Service Identified by Digital IDs”] ["ARIB-T"] [0x7D70 0xA000 0x7D70] (or more suitable Digital Service identification ). (See CDF for instruction)

Ensure that the DUT has media loaded and is ready to record. (See CDF for instruction)

Send a <Record On> [“Digital Service”] [“Service Identified Digital IDs”] [“ARIB-T"] [0x7D70 0xA000 0x7D70] (the same as the digital service identification that the DUT selected) message to the DUT with a specified service.

The DUT changes its tuner to the specified service and begins recording.

The DUT responds with a <Record Status> [“Recording Digital Service”] message within several seconds or more.




11.2.4 - 3 Ensure that the DUT accepts a <Record On> [“Analogue Service”] [“Analogue Broadcast Type”] [“Analogue Frequency”] [“Broadcast System”] message and records the service specified.

This test only applies if the DUT supports <Record On> [“Analogue Service”] as Follower (See CDF).

Ensure that the DUT selects a valid Analogue Service (For example [“Terrestrial”] [0x00 0x00] ["NTSC M"] (or more suitable frequency)). (See CDF for instruction)


Send a <Record On> [“Analogue Service”] [“(the same as the Operands that the DUT selected)”] message to the DUT with a specified service.


The DUT responds with a <Record Status> [“Recording Analogue Service”] message within several seconds or more.

11.2.4 - 4 Ensure that the DUT accepts a <Record On> [“External Plug”] message and records the External Plug specified.

This test only applies if the DUT supports <Record On> [“External Plug”] as Follower (See CDF).

Ensure that the DUT selects a external plug.(i.e. external plug 1)(See CDF for instruction)


Send a <Record On> [“External plug"] [“(the same as the external plug number that the DUT selected)”] message to the DUT with a specified plug.


The DUT responds with a <Record Status> [“Recording External Input”] message within several seconds or more.

11.2.4 - 5 Ensure that the DUT accepts a <Record On> [“External Physical Address”] message and records the External Physical Address specified.

This test only applies if the DUT supports <Record On> [“External Physical Address”] as Follower (See CDF).

Ensure that the DUT selects an external plug. (See CDF for instruction)


Send a <Record On> [“External Physical Address"] [“(the Physical Address of the device that is the same as the selected external plug)”] message to the DUT with a specified plug.


The DUT responds with a <Record Status> [“Recording External Input”] message within several seconds or more.




11.2.4 - 6 Ensure that the DUT accepts a <Record On> [“Own Source”] message when it is displaying an internal tuner.

This test only applies if the DUT supports <Record On> [“Own Source”] as Follower (See CDF).

Ensure the DUT is displaying an internal tuner. (See CDF for instruction)


Send a <Record On> [“Own Source”] message to the DUT.

The DUT begins recording the service it is tuned to.

The DUT responds with a <Record Status> [“Recording currently selected source”] message within several seconds or more.

11.2.4 - 7 Ensure that the DUT accepts a <Record On> [“Own Source”] message when it is displaying an external source (if applicable).


Ensure the DUT is displaying some external source (e.g. a camcorder). (See CDF for instruction)



The DUT begins recording the external source.

The DUT responds with a <Record Status> [“Recording currently selected source”] message within several seconds or more.

11.2.4 - 8 Ensure that the DUT accepts a <Record Off> message when it is recording and it comes from the Initiator of the <Record On> message.


Ensure the DUT is displaying an internal tuner, has media loaded and is ready to record. (See CDF for instruction)


Send a <Record Off> message to the DUT.

The DUT stops recording on receipt of the <Record Off> message.




11.2.4 - 9 Ensure that the DUT accepts a <Record On> and corresponding <Record Off> message from various logical addresses.

This test only applies if the DUT supports <Record On> as Follower.(See CDF)

The following procedure shall be repeated with the TE simulating a device at various logical addresses (1, 3, 4 and 5).

Send a <Record On> message that can be received to the DUT. (e.g. send a <Record On> [“Own Source”] message if the DUT supports [“Own Source”]. See CDF.)

Send a <Record Off> message to the DUT.

The DUT begins recording the tuner it is tuned to.

The DUT responds with a <Record Status> message with correctly formatted operands within several seconds or more.

The DUT stops recording on receipt of the <Record Off> message.

11.2.4 - 10 Ensure that the DUT ignores a <Record On> message from the unregistered Logical Address (15).

This test only applies if the DUT supports <Record On> as Follower. (See CDF)


Ensure the DUT is displaying an internal tuner, has media loaded and is ready to record. (See CDF for instruction)

Send a <Record On> message that can be received to the DUT. (e.g. send a <Record On> [“Own Source”] message if the DUT supports [“Own Source”]. See CDF.)

The DUT ignores the incoming <Record On> message.



CECT 11.2.5 Timer Programming [CEC: 13.5]





11.2.5 - 1 If the DUT can set timer blocks via an EPG, ensure that it sends a correctly formatted <Set Digital Timer> messages for all valid Recording Device addresses.

This test only applies if the DUT (i.e. Tuner) supports <Set Digital Timer> message as Initiator (See CDF).

The following procedure shall be repeated with the TE simulating a device at logical addresses 1, 2, and 9.

Broadcast a <Report Physical Address> from Logical Address of a Recording Device.



The DUT sends a correctly formatted <Set Digital Timer> message with all parameters corresponding to the program that was selected.

11.2.5 - 2 If the DUT can set timer blocks via an EPG, ensure that it sends a correctly formatted <Set Analogue Timer> messages for all valid Recording Device addresses.

This test only applies if the DUT (i.e. Tuner) supports <Set Analogue Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Set Analogue Timer> message with all parameters corresponding to the program that was selected.




11.2.5 - 3 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set Digital Timer> message for all valid Recording Device addresses.

This test only applies if the DUT (I.e. Tuner) supports <Set Digital Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Set Digital Timer> message with all parameters corresponding to the timer that was set.

11.2.5 - 4 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set Analogue Timer> message for all valid Recording Device addresses.

This test only applies if the DUT (I.e. Tuner) supports <Set Analogue Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Set Analogue Timer> message with all parameters corresponding to the timer that was set.




11.2.5 - 5 If the DUT can set timer blocks via its menu, ensure that it sends a correctly formatted <Set External Timer> message for all valid Recording Device addresses.

This test only applies if the DUT (I.e. Tuner) supports <Set External Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Set External Timer> message with all parameters corresponding to the timer that was set.

11.2.5 - 6 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set Digital Timer> message.

This test only applies if the DUT supports <Set Digital Timer> message as Initiator (See CDF).

Invoke the DUT to send a <Set Digital Timer> message. (i.e. set a timer recording via its menu or via its EPG.)




11.2.5 - 7 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set Analogue Timer> message.

This test only applies if the DUT supports <Set Analogue Timer> message as Initiator (See CDF).

Invoke the DUT to send a <Set Analogue Timer> message. (i.e. set a timer recording via its menu or via its EPG.)







11.2.5 - 8 Ensure that the DUT handles a <Timer Status> message indicating that the Recording Device was not programmed successfully after sending a <Set External Timer> message.

This test only applies if the DUT supports <Set External Timer> message as Initiator (See CDF).

Invoke the DUT to send a <Set External Timer> message. (i.e. set a timer recording via its menu or via its EPG.)




11.2.5 - 9 If the DUT can set and clear timer blocks via an EPG, ensure that it sends a correctly formatted <Clear Digital Timer> message and clears the timer from its display when receiving a <Timer Cleared Status> message.

This test only applies if the DUT (I.e. Tuner) supports <Clear Digital Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the program that was cleared.


11.2.5 - 10 If the DUT can set and clear timer blocks via an EPG, ensure that it sends a correctly formatted <Clear Analogue Timer> message and clears the timer from its display when receiving a <Timer Cleared Status> message.

This test only applies if the DUT (I.e. Tuner) supports <Clear Analogue Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the program that was cleared.





11.2.5 - 11 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Digital Timer> messages and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.






The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the timer that was cleared.


11.2.5 - 12 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Analogue Timer> messages and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.






The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the timer that was cleared.


11.2.5 - 13 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear External Timer> messages and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating the timer was successfully cleared.

This test only applies if the DUT (I.e. Tuner) supports <Clear External Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Clear External Timer> message with all parameters corresponding to the timer that was cleared.





11.2.5 - 14 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Digital Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device.






The DUT sends a correctly formatted <Clear Digital Timer> message with all parameters corresponding to the timer that was not cleared.


11.2.5 - 15 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear Analogue Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device.






The DUT sends a correctly formatted <Clear Analogue Timer> message with all parameters corresponding to the timer that was not cleared.





11.2.5 - 16 If the DUT can set and clear timer blocks via its menu, ensure that it sends a correctly formatted <Clear External Timer> message and clears the timer from its menu when receiving a <Timer Cleared Status> message indicating that the timer could not be cleared because there is no matching timer in the Recording Device.

This test only applies if the DUT (I.e. Tuner) supports <Clear External Timer> message as Initiator (See CDF).





The DUT sends a correctly formatted <Clear External Timer> message with all parameters corresponding to the timer that was not cleared.


11.2.5 - 17 Ensure that the DUT handles correctly a <Set Analogue Timer> messages and responds with a <Timer Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Set Analogue Timer> messages as Follower.(See CDF)

Ensure that the DUT has media loaded and is ready to record.

Send a <Set Analogue Timer> message to the DUT.

The DUT sets timer blocks internally to record analogue service, and responds a <Timer Status> message within several seconds or more.

11.2.5 - 18 Ensure that the DUT handles correctly a <Set Digital Timer> messages and responds with a <Timer Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Set Digital Timer> messages as Follower.(See CDF)


Send a <Set Digital Timer> message to the DUT.

The DUT sets timer blocks internally to record digital service, and responds a <Timer Status> message within several seconds or more.




11.2.5 - 19 Ensure that the DUT handles correctly a <Set External Timer> messages and responds with a <Timer Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Set External Timer> messages as Follower.(See CDF)


Send a <Set External Timer> message to the DUT.

The DUT sends timer blocks internally to record external input, and responds a <Timer Status> message within several seconds or more.

11.2.5 - 20 Ensure that the DUT handles correctly a <Clear Analogue Timer> messages and responds with a <Timer Cleared Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Clear Analogue Timer> messages as Follower.(See CDF)


Send a <Set Analogue Timer> message to the DUT.

Send a <Clear Analogue Timer> message with operands that same as previously sending <Set Analogue Timer> to the DUT.

The DUT sends a <Timer Status> message within several seconds or more when receiving <Set Analogue Timer> message.

The DUT responds <Timer Cleared Status> message to a <Clear Analogue Timer> message within several seconds or more.

11.2.5 - 21 Ensure that the DUT handles correctly a <Clear Digital Timer> messages and responds with a <Timer Cleared Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Clear Digital Timer> messages as Follower.(See CDF)


Send a <Set Digital Timer> message to the DUT.

Send a <Clear Digital Timer> message with operands that same as previously sending <Set Digital Timer> to the DUT.

The DUT sends a <Timer Status> message within several seconds or more when receiving <Set Digital Timer> message.

The DUT responds <Timer Cleared Status> message to a <Clear Digital Timer> message within several seconds or more.

11.2.5 - 22 Ensure that the DUT handles correctly a <Clear External Timer> messages and responds with a <Timer Cleared Status> message.

This test only applies if the DUT(i.e. Recording Device) supports <Clear External Timer> messages as Follower.(See CDF)


Send a <Set External Timer> message to the DUT.

Send a <Clear External Timer> message with operands that same as previously sending <Set External Timer> to the DUT.

The DUT sends a <Timer Status> message within several seconds or more when receiving <Set External Timer> message.

The DUT responds <Timer Cleared Status> message to a <Clear External Timer> message within several seconds or more.





CECT 11.2.6 System Information [CEC: 13.6]



11.2.6 - 1 Ensure that the DUT correctly acknowledges a <Polling Message> message.

Send the DUT a <Polling Message> message. The DUT ACKs the message.

11.2.6 - 2 Ensure that the DUT responds correctly to a <Give Physical Address> message from various logical addresses including the unregistered address.

This test only applies if the DUT supports <Give Physical Address> as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4, 5 and 15) except the DUT's LA.

Send the DUT a <Give Physical Address> message.

The DUT responds by broadcasting a <Report Physical Address> message indicating the correct Physical Address of the device.




11.2.6 - 3 Ensure that the DUT handles a <Set Menu Language> message correctly.

This test applies to all DUTs except for (See CDF): - Mobile Devices; or - devices which are not able to change the language by CEC messages, e.g. a PC or devices with only one language setting; or - devices without OSD/ Menu generation capabilities.

If the Set Menu Language function can be disabled, make sure that it is active (see CDF).

Broadcast a <Set Menu Language> message with a different language to the currently set value and which is supported by the DUT.

The DUT updates its menu language settings.

11.2.6 - 4 Ensure that the DUT handles a <Set Menu Language> message with unsupported language correctly.



Broadcast a <Set Menu Language> message with a different language from the currently set value and which is not supported by the DUT.

The DUT menu language setting is not modified.




11.2.6 - 5 Ensure that the DUT ignores a <Set Menu Language> message coming from a Logical Address other than 0 (TV).




Broadcast a <Set Menu Language> message (from the test equipment address) with a different language from the currently set value on the DUT.

The DUT menu language setting is not modified.

11.2.6 - 6 Ensure that the DUT handles a <Get CEC Version> message.

This test only applies if the DUT supports <Get CEC Version> messages as Follower or the DUT can send or receive <Vendor Command>, messages to or from devices having another Vendor ID.(See CDF)

Send a <Get CEC Version> message to the DUT. The DUT sends a correctly formatted <CEC Version> message with a [CEC Version] indicating the version number of the CEC Supplement 1 specification which was used to design the device (See CDF for the CEC version number).

11.2.6 - 7 Ensure that the DUT does not respond with any <Set Menu Language> messages to all <Get Menu Language> messages.

Send a <Get Menu Language> message from the test equipment’s Logical Address 0.

The DUT does not send a <Set Menu Language> message.





CECT 11.2.7 Deck Control [CEC: 13.7]



11.2.7 - 1 Ensure that the DUT responds to a <Deck Control> [“Skip Forward/Wind”] message.

This test only applies if the DUT supports <Deck Control> [“Skip Forward/Wind”] message as Follower (See CDF).

Ensure that the DUT is playing media.

Send the message <Deck Control> [“Skip Forward/Wind”] to the DUT.

The DUT responds to the message and skips/winds forward depending upon the device type.

11.2.7 - 2 Ensure that the DUT responds to a <Deck Control> [“Skip Reverse/Rewind”] message.

This test only applies if the DUT supports <Deck Control> [“Skip Reverse/Rewind”] message as Follower (See CDF).


Send the message <Deck Control> [“Skip Reverse/Rewind”] to the DUT.

The DUT responds to the message and skips backwards/rewinds depending upon the device type.

11.2.7 - 3 Ensure that the DUT responds to a <Deck Control> [“Stop”] message when it is playing.

This test only applies if the DUT supports <Deck Control> [“Stop”] message as Follower (See CDF).


Send the message <Deck Control> [“Stop”] to the DUT.

The DUT stops playing.

11.2.7 - 4 Ensure that the DUT accepts a valid <Deck Control> message from various logical addresses.

This test only applies if the DUT supports <Deck Control> [“Stop”] message as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4 and 5) except the DUT's LA.



The DUT stops playing.




11.2.7 - 5 Ensure that the DUT ignores a <Deck Control> message from the unregistered Logical Address (15).

This test only applies if the DUT supports <Deck Control> [“Stop”] as Follower (See CDF).





11.2.7 - 6 Ensure that the DUT responds to a <Play> [“Play Forward”] message when it is stopped but has media loaded.

This test only applies if the DUT supports <Play> [“Play Forward”] message as Follower (See CDF).

Ensure the DUT has media available and is idle.

Send the message <Play> [“Play Forward”] to the DUT.

The DUT begins playing its media.

11.2.7 - 7 Ensure that the DUT responds to a <Play> [“Play Reverse”] message when it is stopped but has media loaded.

This test only applies if the DUT supports <Play> [“Play Reverse”] message as Follower (See CDF).


Send the message <Play> [“Play Reverse”] to the DUT.

If capable, the DUT starts playing in reverse.

11.2.7 - 8 Ensure that the DUT responds to a <Play> [“Play Still”] message when it is playing.

This test only applies if the DUT supports <Play> [“Play Still”] message as Follower (See CDF).


Send the message <Play> [“Play Still”] to the DUT.

The DUT switches from playing forwards to still mode (paused).




11.2.7 - 9 Ensure that the DUT responds to a <Play> [“Play Still”] message when it is stopped but has media loaded.

This test only applies if the DUT supports <Play> [“Play Still”] message as Follower (See CDF).


Send the message <Play> [“Play Still”] to the DUT.

The DUT enters still mode. (Displays a frozen picture).

OR (depending on local specification)

The DUT sends a <Feature Abort> and remains idle.

11.2.7 - 10 Ensure that the DUT responds to a <Play> message with all valid [“Slow Forward speed”], [“Slow Reverse speed”], [“Fast Forward speed”] and [“Fast Reverse speed”] operands when it is stopped but has media loaded.

This test only applies if the DUT supports <Play> message with operands above as Follower (See CDF).


Send the message <Play> [“Fast Forward Min Speed”] addressed from TV to the DUT.

Repeat the above process for the following parameters: (It is needed to test for only the operands supported <Play> as Follower by the DUT.) [“Fast Forward Medium Speed”] [“Fast Forward Max Speed”] [“Fast Reverse Min Speed”] [“Fast Reverse Medium Speed”] [“Fast Reverse Max Speed”] [“Slow Forward Min Speed”] [“Slow Forward Medium Speed”] [“Slow Forward Max Speed”] [“Slow Reverse Min Speed”] [“Slow Reverse Medium Speed”] [“Slow Reverse Max Speed”]

The DUT sends an <Image View On> or <Text View On> message to the TV.

The DUT starts playing in scan mode at the selected speed (or a sensible close match if that speed is not supported).

OR (depending on local specification)

The DUT sends a <Feature Abort> and remains idle.




11.2.7 - 11 Ensure that the DUT responds to a <Play> message with all valid [“Slow Forward speed”], [“Slow Reverse speed”], [“Fast Forward speed”] and [“Fast Reverse speed”] operands when it is playing.

This test only applies if the DUT supports <Play> message as Follower with operands above (See CDF).


Send the message <Play> [“Fast Forward Min Speed”] addressed from TV to the DUT.

Repeat the above process for the following parameters: (It is needed to test for only the operands supported <Play> as Follower by the DUT.)

[“Fast Forward Medium Speed”] [“Fast Forward Max Speed”] [“Fast Reverse Min Speed”] [“Fast Reverse Medium Speed”] [“Fast Reverse Max Speed”] [“Slow Forward Min Speed”] [“Slow Forward Medium Speed”] [“Slow Forward Max Speed”] [“Slow Reverse Min Speed”] [“Slow Reverse Medium Speed”] [“Slow Reverse Max Speed”]

The DUT switches to playing in the selected mode and speed (or a sensible close match if that speed is not supported).

11.2.7 - 12 Ensure that the DUT responds to a <Play> message from various logical addresses.


The following procedure shall be repeated with the TE simulating a device at various logical addresses (1, 3, 4 and 5) except the DUT's LA.



The DUT begins playing its media.




11.2.7 - 13 Ensure that the DUT ignores a <Play> message from the unregistered Logical Address (15).






11.2.7 - 14 Ensure that the DUT generates a correctly formatted <Deck Status> messages in response to a <Give Deck Status> [“Once”] message.

This test only applies if the DUT supports <Give Deck Status> [“Once”] message as Follower and supports <Deck Status> messages as Initiator with operands above (See CDF).

Ensure the DUT is playing forwards.

Send a <Give Deck Status> [“Once”] message to the DUT.

Repeat the test for each of the following states: (It is needed to test for only the state supported <Deck Status> as initiator by the DUT.)

Playing Reverse Paused Still Slow Forwards Slow Reverse Fast Forward Fast Reverse Stopped (Idle) media present No media present Skip Forward or Winding(if applicable) Skip Reverse or Rewinding(if applicable) Recording (if applicable) Index Search Forward (if applicable) Index Search Reverse (if applicable)

The DUT responds with the appropriate <Deck Status> message for the decks state. The parameter returned shall be as follows:

Playing Forwards – [“Play”] Playing Reverse – [“Play Reverse”] Paused – [“Still”] Slow Forwards – [“Slow”] Slow Reverse – [“Slow Reverse”] Fast Forwards – [“Search Forward”] Fast Reverse – [“Search Reverse”] Stopped (Idle) media present – [“Stop”] No media present – [“No Media”] Skip Forward or Winding – [“Skip Forward/Wind”] Skip Reverse or Rewinding– [“Skip Reverse/Rewind”] Recording – [“Record”] Index Search Forward- [“Index Search Forward”] Index Search Reverse - [“Index Search Reverse”]




11.2.7 - 15 Ensure that the DUT responds correctly to the <Give Deck Status> message with the parameters [“On”] and [“Off”].

This test only applies if the DUT supports <Give Deck Status> [“On”] and [“Off”] message as Follower (See CDF).

Ensure the DUT is idle and contains media.

Send a <Give Deck Status> [“On”] message to the DUT.

Press play on the DUT to start playing the media.

Press stop on the DUT to stop the media playing.

Send a <Give Deck Status> [“Off”] message to the DUT.

Press play on the DUT to start playing the media.

The DUT responds on receipt of the <Give Deck Status> message with a <Deck Status> [“Stop”] message.

The DUT sends a <Deck Status> [“Play”] message when it starts playing.

The DUT sends a <Deck Status> [“Stop”] message when it is stopped.

The DUT does not send any other <Deck Status> message.

11.2.7 - 16 Ensure that the DUT handles a <Give Deck Status> message from various logical addresses.

This test only applies if the DUT supports <Give Deck Status> [“Once”] message as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (1, 3, 4 and 5) except the DUT's LA.



The DUT responds with a <Deck Status> [“Play”] message.

11.2.7 - 17 Ensure that the DUT ignores a <Give Deck Status> message from the unregistered Logical Address (15).

This test only applies if the DUT supports <Give Deck Status> [“Once”] message as Follower (See CDF).








11.2.7 - 18 Ensure that the DUT responds to a <Deck Control> [“Eject”] message.

This test only applies if the DUT supports <Deck Control> [“Eject”] messages as Follower (See CDF).

Ensure that the DUT is media loaded.

Send the message <Deck Control> [“Eject”] to the DUT.

The DUT ejects its media.



CECT 11.2.8 Tuner Control [CEC: 13.8]



11.2.8 - 1 Ensure that the DUT handles a <Select Digital Service> message correctly from various logical addresses for a service that the device has set and is not currently tuned to.

This test only applies if the DUT supports <Select Digital Service> as Follower.


Ensure the DUT is powered on, selects service 1. (e.g. Digital Service Identification is [“Service Identified by Digital IDs”] ["ARIB-T"] [0x7D70 0xA000 0x7D70] )

Send the DUT a <Select Digital Service> message for service 2. (e.g. Digital Service Identification is [“Service Identified Digital IDs”] ["ARIB-T"] [0x7FD1 0x0808 0x7FD1] )

The DUT’s tuner changes to service 2.




11.2.8 - 2 Ensure that the DUT ignores a <Select Digital Service> message coming from the unregistered Logical Address (15).



Ensure the DUT is powered on, selects service 1. (e.g. Digital Service Identification is [“Service Identified Digital IDs”] ["ARIB-T"] [0xA000 0x7D70 0x7D70] )

Send the DUT a <Select Digital Service>message for service 2. (e.g. Digital Service Identification is [“Service Identified Digital IDs”] ["ARIB-T"] [0x7FD1 0x0808 0x7FD1] )


11.2.8 - 3 Ensure that the DUT handles a <Select Digital Service> message correctly for a service that the device has set and is already tuned to.


Ensure the DUT is powered on, selects service 1. (e.g. Digital Service Identification is [“Service Identified Digital IDs”] ["ARIB-T"] [0xA000 0x7D70 0x7D70] )

Send the DUT a <Select Digital Service> for service 1 message. (e.g. Digital Service Identification is [“Service Identified Digital IDs”] ["ARIB-T "] [0xA000 0x7D70 0x7D70] )

The DUT shall ignore the message and the tuner remains on the same service.

11.2.8 - 4 Ensure that the DUT handles a <Select Analogue Service> message correctly from various logical addresses for a service that the device has set and is not currently tuned to.

This test only applies if the DUT supports <Select Analogue Service> as Follower.

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4 and 5) except the DUT's L.A.

Ensure the DUT is powered on, selects service 1. (e.g. [“Terrestrial”] [0x00 0x00] [“NTSC_M”])

Send the DUT a <Select Analogue Service> message for service 2. (e.g. [“Terrestrial”] [0x00 0xFF] [“NTSC M”] or more suitable one that is different from service 1.)

The DUT’s tuner changes to service 2.




11.2.8 - 5 Ensure that the DUT ignores a <Select Analogue Service> message coming from the unregistered Logical Address (15).



Ensure the DUT is powered on, selects service 1. (e.g. [“Terrestrial”] [0x00 0x00] [“NTSC M”] or more suitable one.)

Send the DUT a <Select Analogue Service>message for service 2. (e.g. [“Terrestrial”] [0x00 0x00] [“NTSC M”] or more suitable one.)


11.2.8 - 6 Ensure that the DUT handles a <Select Analogue Service> message correctly for a service that the device has set and is already tuned to.


Ensure the DUT is powered on, selects service 1. (e.g. [“Terrestrial”] [0x00 0x00] [“NTSC M”] or more suitable one.)

Send the DUT a <Select Analogue Service> for service 1 message. (e.g.[“Terrestrial”] [0x00 0x00] [“NTSC M”] or more suitable one.)

The DUT shall ignore the message and the tuner remains tuned on the same service.

11.2.8 - 7 Ensure that the DUT handles a <Tuner Step Increment> message correctly from various logical addresses.

This test only applies if the DUT supports <Tuner Step Increment> message as Follower (See CDF).


Ensure the DUT is powered on.

Send a <Tuner Step Increment> message to the DUT.

The DUT goes to a higher preset number, or wraps around to the beginning of the preset list.

11.2.8 - 8 Ensure that the DUT ignores a <Tuner Step Increment> message coming from the unregistered Logical Address (15).

This test only applies if the DUT supports <Tuner Step Increment> message as Follower (See CDF).



Send a <Tuner Step Increment> message to the DUT.





11.2.8 - 9 Ensure that the DUT handles a <Tuner Step Decrement> message correctly from various logical addresses.

This test only applies if the DUT supports <Tuner Step Decrement> message as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4 and 5) except the DUT's logical address.

Ensure the DUT is powered on

Send a <Tuner Step Decrement> message to the DUT.

The DUT goes to a lower preset number, or wraps around to the end of the preset list.

11.2.8 - 10 Ensure that the DUT ignores a <Tuner Step Decrement> message coming from the unregistered Logical Address (15).

This test only applies if the DUT supports <Tuner Step Decrement> message as Follower (See CDF).



Send a <Tuner Step Decrement> message to the DUT.


11.2.8 - 11 Ensure that the DUT handles a <Give Tuner Device Status> [“Once”] message from various logical addresses, when it is displaying its tuner.

This test only applies if the DUT supports <Give Tuner Device Status> [“Once”] message as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4 and 5) except the DUT's logical address.

Ensure the DUT is displaying its tuner.

Send the DUT a <Give Tuner Device Status> [“Once”] message.

The DUT responds with a <Tuner Device Status> message indicating that it is displaying its tuner and the correct service identification.

11.2.8 - 12 Ensure that the DUT ignores a <Give Tuner Device Status> [“Once”] message from the unregistered Logical Address (15).

This test only applies if the DUT supports <Give Tuner Device Status> [“Once”] message as Follower (See CDF).



Send the DUT a <Give Tuner Device Status> [“Once”] message.

The DUT ignores the <Tuner Device Status> message.




11.2.8 - 13 Ensure that the DUT handles the <Give Tuner Device Status> [“On”] and <Give Tuner Device Status> [“Off”] messages correctly.

This test only applies if the DUT supports <Give Tuner Device Status> [“On”] and [“Off”] message as Follower (See CDF).


Send the DUT a <Give Tuner Device Status> [“On”] message.

Change the service that the DUT is tuned to. (See CDF for instruction)

Send the DUT a <Give Tuner Device Status> [“Off”].

Change the service that the DUT is tuned to.

The DUT responds with a <Tuner Device Status> message indicating that it is displaying its tuner and the correct service.

The DUT sends an additional <Tuner Device Status> message indicating the new service.

The DUT does not send a third <Tuner Device Status> message.



CECT 11.2.9 Vendor Specific Commands [CEC: 13.9]



11.2.9 - 1 Ensure that the DUT accepts a <Give Device Vendor ID> message from various logical addresses including the unregistered Logical Address (15).

This test only applies if the DUT supports <Give Device Vendor ID> as Follower (See CDF).

The following procedure shall be repeated with the TE simulating a device at various logical addresses (0, 1, 3, 4, 5 and 15) except the DUT's LA.

Send a <Give Device Vendor ID> message to the DUT.

The DUT responds by broadcasting a <Device Vendor ID> message with the correct ID depending upon the vendor.




11.2.9 - 2 Ensure that the DUT broadcasts a <Device Vendor ID> messages after a successful initialization and address allocation.

This test only applies if the DUT supports <Device Vendor ID> as Initiator. (See CDF)

Disconnect the DUT to the TE.(or HPD is asserted from the TE).



The DUT broadcasts a <Device Vendor ID> message with the correct ID depending upon the vendor.

11.2.9 - 3 If the DUT can attempt to send a <Vendor Command> to another vendor's device, ensure the DUT does not send a Vendor Specific Commands to a device that it does not recognize.

This test only applies if the DUT supports <Vendor Command> as Initiator and can try to send a <Vendor Command> to the device whose Vendor IDs that are different from the DUT.

The TE shall simulate a device that has a Vendor ID that is different from the DUT, and simulates a device at Logical Address that the DUT tries to send the Vendor Specific Commands.(See CDF for Vendor ID that is different from the DUT, and Logical Address to send the Vendor Specific Commands.)

Broadcast a <Report Physical Address> message from the TE

Broadcast a <Device Vendor ID> message from the TE.

Invoke the DUT to send a <Vendor Command> message. (See CDF for instruction to initiate the Vendor Specific function.)

The DUT does not send any <Vendor Command> message.





CECT 11.2.10 OSD Display [CEC: 13.10]



11.2.10 - 1 Check that the DUT sends out a correctly formatted <Set OSD String> [Display Control] [OSD String] message. (If possible)

This test only applies if the DUT supports <Set OSD String> message as Initiator (See CDF).

If possible, set the DUT into a mode that utilizes the TV's OSD feature and invoke an OSD message by altering the parameter currently displayed on the OSD.

The DUT sends a <Set OSD String> message with the correct [Display Control] and [OSD String] parameter.



CECT 11.2.11 Device OSD Name Transfer [CEC: 13.11]



11.2.11 - 1 Ensure that the DUT responds correctly to a <Give OSD Name> message coming from various logical addresses.

This test only applies if the DUT supports <Give OSD Name> message as Follower (See CDF).


Send the DUT a <Give OSD Name> message.

The DUT responds with a <Set OSD Name> message to the appropriate logical address.




11.2.11 - 2 Ensure that the DUT ignores a <Give OSD Name> message from the unregistered Logical Address (15).

This test only applies if the DUT supports <Give OSD Name> message as Follower (See CDF).


Send the DUT a <Give OSD Name> message.




CECT 11.2.12 Device Menu Control [CEC: 13.12]



11.2.12 - 1 Ensure that the DUT sends a <Menu Status> [“Activated”] message when its menu is activated locally.

This test only applies if the DUT supports <Menu Status> message as Initiator and the DUT has a means to activate its menu (See CDF).

Ensure the DUT's menu is not activated. (See CDF for instruction)


Locally activate the device menu. (See CDF for instruction)

The DUT sends a <Menu Status> [“Activated”] message when activating the menu.




11.2.12 - 2 Ensure that the DUT sends a <Menu Status> [“Deactivated”] message when its menu is deactivated locally.

This test only applies if the DUT supports <Menu Status> message as Initiator and the DUT has a means to deactivate its menu (See CDF).

Ensure the DUT's menu is activated. (See CDF for instruction)

Ensure the DUT is now the active source. (See CDF for instruction)

Locally deactivate the device menu. (See CDF for instruction)

The DUT sends a <Menu Status> [“Deactivated”] message when deactivating the menu.

11.2.12 - 3 Ensure that the DUT responds correctly to a <Menu Request> [“Activate”] message.

This test only applies if the DUT supports <Menu Request> message as Follower (See CDF).


Send a <Menu Request> [“Activate”] message to the DUT.

The DUT sends a <Menu Status> [“Activated”] or <Menu Status> ["Deactivated"] message in response.

11.2.12 - 4 Ensure that the DUT responds correctly to a <Menu Request> [“Deactivate”] message.



Send a <Menu Request> [“Deactivate”] message to the DUT.

The DUT sends a <Menu Status> [“Deactivated”] or <Menu Status> ["Activated"] message in response.

11.2.12 - 5 Ensure that the DUT responds to a <Menu Request> message from various logical addresses.




Send a <Menu Request> [“Query”] message to the DUT (from the TE address).

The DUT responds by sending a <Menu Status> [“Activated”] or <Menu Status> ["Deactivated"] message.




11.2.12 - 6 Ensure that the DUT ignores a <Menu Request> message from the unregistered Logical Address (15).




Send a <Menu Request> [“Query”] message to the device (from the TE address).


11.2.12 - 7 Ensure that the DUT responds correctly to a <User Control Pressed> and corresponding <User Control Released> message when displaying a menu.

This test only applies if the DUT supports <User Control Pressed> and <User Control Released> messages as Follower (See CDF).


Send a <Menu Request> [“Activate”] message to the DUT.

Send a <User Control Pressed> message for all valid user control codes that the DUT supports among following ones.

Select, Up, Down, Left, Right

For each user control sent, send a <User Control Released> message directly after.

The DUT’s menu is activated.

The DUT’s menu reacts sensibly to the incoming messages.





CECT 11.2.13 Remote Control Pass Through [CEC: 13.13]



11.2.13 - 1 Ensure that the DUT responds correctly to a <User Control Pressed> message followed immediately by a <User Control Released> message.

This test only applies if the DUT supports <User Control Pressed> and <User Control Released> messages as Follower (See CDF).

Send the DUT a <User Control Pressed> message for a remote control key that the DUT should handle.

Send the DUT a <User Control Released> message.

Repeat the above procedure for several other valid remote control codes.

The DUT handles the message as if the remote control key was pressed locally.

11.2.13 - 2 Ensure that the DUT handles repeated <User Control Pressed> messages for Press and Hold Operation.

This test only applies if a DUT supports a <User Control Pressed> message and Press and Hold Operation (see CEC 13.13.3) as Follower. (See CDF)

Set the TE to simulate a device at Logical Address 0 (TV).

Ensure the DUT is in the mode where Press and Hold Operation can be observed (See CDF).

Send repeated <User Control Pressed> messages with UI Command that the DUT will accept as Press and Hold Operation (See CDF for supported [UI Command]) for at least 5 seconds. The time between the repeated messages is 450ms.

Send a <User Control Released> message directly after the last repeated <User Control Pressed> message.

The DUT starts Press and Hold behaviour as described in CDF.

The DUT stops Press and Hold behavior.




11.2.13 - 3 Ensure that the DUT stops Press and Hold behavior when the DUT does not receive repeated <User Control Pressed> message within the Follower Safety Timeout period.





The TE stops to send the repeated messages without sending a <User Control Released> message.

The DUT starts Press and Hold behavior as described in CDF.


11.2.13 - 4 Ensure that the DUT stops Press and Hold behavior when the DUT receives a <User Control Pressed> message with another [UI Command] within the Follower Safety Timeout period.





Send a <User Control Pressed> message with a different supported [UI Command] from the previous one directly after the last repeated <User Control Pressed> message.

The DUT starts Press and Hold behavior as described in CDF.






CECT 11.2.14 Give Device Power Status [CEC: 13.14]




Ensure the DUT is power on.


The DUT responds by sending a <Report Power Status> [“On”] message.


This test only applies if the DUT supports <Report Power Status> [“Standby”] as Initiator. (See CDF).

Ensure the DUT is standby.


The DUT responds by sending a <Report Power Status> [“Standby”] message.





CECT 11.2.15 System Audio Control [CEC: 13.15]



11.2.15 - 1 Ensure that the DUT handles <System Audio Mode Request> messages with its child Physical Address coming from various logical address.

This test only applies if the DUT(i.e. amplifier) supports <System Audio Mode Request> messages as Follower.(See CDF)

The following procedure shall be repeated with TE simulating a device at Logical Address 0, 3.

Send a <System Audio Mode Request> [0.0.0.0] message to the DUT.

The DUT broadcasts a <Set System Audio Mode> [“On”] message.

11.2.15 - 2 Ensure that the DUT issues a <Set System Audio Mode> message correctly when the feature is initiated from the DUT.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator, and can initiate the System Audio Mode Function via its control (See CDF)

Ensure that the TE simulates the device at Logical Address 0,

Invoke the DUT to initiate the System Audio mode to On.

The TE responds <Active Source> [0.0.0.0] message to a <Request Active Source> message.

The DUT sends a <Set System Audio Mode> [“On”] message to Logical Address 0.





11.2.15 - 3 Ensure that the DUT doesn’t broadcast any <Set System Audio Mode> messages when the feature is initiated from the DUT, but the TV responds with a <Feature Abort> message to <Set System Audio Mode> message.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator, and can initiate the System Audio Mode Function via its control (See CDF)


Invoke the DUT to initiate the System Audio mode to On.

The TE responds <Active Source> [0.0.0.0] message to a <Request Active Source> message.

The TE shall respond with <Feature Abort> message to the directly addressed <Set System Audio Mode> message.

The DUT sends a <Set System Audio Mode> [“On”] message to Logical Address 0.

The DUT shall not broadcast a <Set System Audio Mode> [“On”] message.

11.2.15 - 4 Ensure that the DUT responds correctly to a <Give System Audio Status> message when the System Audio Mode is On.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator and supports <Give System Audio Status> messages as Follower.(See CDF)


Send a <Give System Audio Status> message to the DUT.


The DUT responds with a <System Audio Mode Status> [“On”] message to a <Give System Audio Status> message

11.2.15 - 5 Ensure that the DUT sends a <Set System Audio Mode> [“Off]” message when receiving a <System Audio Mode Request> message with no operands.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator.(See CDF)



Send a <System Audio Mode Request> message with no operands.

The DUT broadcasts a <Set System Audio Mode> [“Off”] message.




11.2.15 - 6 Ensure that the DUT sends a <Set System Audio Mode> [“Off”] message before goes into standby when the System Audio Mode is On.




Invoke the DUT to go into standby.

The DUT sends a <Set System Audio Mode> [“Off”] message before go into standby.

11.2.15 - 7 Ensure that the DUT responds correctly to a <Give System Audio Mode Status> message when the System Audio Mode is Off.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator and supports <Give System Audio Mode Status> messages as Follower.(See CDF)

Ensure that the System Audio Mode is Off.

Send a <Give System Audio Mode Status> message to the DUT

The DUT responds with a <System Audio Mode Status> [“Off”] message.

11.2.15 - 8 Ensure that the DUT handles correctly a <User Control Pressed> [“Mute”] message when the System Audio Mode is On.




Send a <User Control Pressed> [“Mute”] message and a <User Control Released> message.

The DUT accepts a <User Control Pressed> message and a <User Control Released> message, and mutes its volume.

11.2.15 - 9 Ensure that the DUT responds correctly to a <Give Audio Status> message.

This test only applies if the DUT(i.e. amplifier) supports <Give Audio Status> messages as Follower.(See CDF)


Send a <Give Audio Status> message to the DUT

The DUT responds with a <Report Audio Status> [“Audio Status”] message




11.2.15 - 10 Ensure that the DUT sends a <Give System Audio Status> message when it goes standby to On.

This test only applies if the DUT (i.e. Tuner) supports <Give Audio Mode Status> messages as Initiator. (See CDF)



The DUT shall be standby.

Invoke the DUT to turn on.

The DUT sends a <Give System Audio Mode Status> message to a device at Logical Address 5.

11.2.15 - 11 Ensure that the DUT issues correctly a <User Control Pressed> [“Volume Up” | “Volume Down”] message when the System Audio Control is On.

This test only applies if the DUT(i.e. Tuner) supports <Set System Audio Mode> messages as Follower and supports <User Control Pressed> messages as Initiator.(See CDF)


Press the volume up/down key on the DUT's local or remote control.

The DUT issues a <User Control Pressed> [“Volume Up” | “Volume Down”] message. And the DUT doesn't change its volume level.

11.2.15 - 12 Ensure that the DUT issues correctly a <User Control Pressed> [“Mute”] message when the System Audio Control is On.

This test only applies if the DUT(i.e. Tuner) supports <Set System Audio Mode> messages as Follower and supports <User Control Pressed> messages as Initiator.(See CDF)


Press the volume mute or unmute key on the DUT's local or remote control.

The DUT issues a <User Control Pressed> [“Mute”] message. And the DUT doesn't change its volume level.




11.2.15 - 13 Ensure that the DUT replies with a correctly formatted <Report Short Audio Descriptor> message, when receiving a <Request Short Audio Descriptor> message.

This test only applies if the DUT supports <Request Short Audio Descriptor> messages as Follower. (See CDF)


Send a <Request Short Audio Descriptor> message with several [Audio Format ID] [Audio Format Code] pairs, including one pair that the DUT support and one pair that the DUT does not support. (See CDF)

The DUT replies with a correctly formatted <Report Short Audio Descriptor> message with the [Short Audio Descriptor] indicating only the requested [Audio Format ID] [Audio Format Code] pair which the DUT supports.

11.2.15 - 14 Ensure that the DUT replies with a <Feature Abort> ["Invalid Operand"] message, when receiving <Request Short Audio Descriptor> message with a single [Audio Format ID] [Audio Format Code] pair which the DUT does not support.

This test only applies if the DUT supports <Request Short Audio Descriptor> messages as Follower (See CDF.)


Send a <Request Short Audio Descriptor> message with a single [Audio Format ID] [Audio Format Code] pair which the DUT does not support. (See CDF)

The DUT replies a <Feature Abort> ["Invalid Operand"] message.

11.2.15 - 15 Ensure that the DUT sends a correctly formatted <Request Short Audio Descriptor> messages to a child device connected to the DUT.

This test only applies if the DUT supports a <Request Short Audio Descriptor> messages as Initiator.(See CDF)

Ensure the DUT simulates a child device of the DUT. (e.g. If the DUT takes a Physical Address of 1.0.0.0, then TE takes a Physical Address of 1.1.0.0).

Broadcast a <Report Physical Address> message from the TE.

Invoke the DUT to send a directly addressed <Request Short Audio Descriptor> message(s) to the TE. (See CDF)

The DUT sends one or more correctly formatted <Request Short Audio Descriptor> message(s) that include(s) the correct operand values for 1 byte pair(s) of [Audio Format ID] and [Audio Format Code], corresponding to the audio formats (e.g. AC-3=0x03, AAC=0x06…) indicated in the CDF.




11.2.15 - 16 Ensure that the DUT unmutes its volume when it broadcasts a <Set System Audio Mode> [“On”] message.



Ensure that the System Audio Mode is off. (e.g. send a <System Audio Mode Request> message without parameter from TE.)

Send a <System Audio Mode Request> [0.0.0.0] message to the DUT to turn on the System Audio Mode feature.

The DUT unmutes its volume.

11.2.15 - 17 Ensure that the DUT mutes its volume when it broadcasts a <Set System Audio Mode> [“Off”] message.



Ensure that the System Audio Mode is on. (e.g. invoke the DUT to turn on the System Audio Mode feature, or send a <System Audio Mode Request> message with valid Physical Address from TE.)

Send a <System Audio Mode Request> message without any parameter to the DUT to turn off the System Audio Mode feature.

The DUT mutes its volume.




11.2.15 - 18 Ensure that the DUT does not broadcast a <Set System Audio Mode> message correctly when the feature is initiated from the DUT, but the TV responds with a <Feature Abort> message to directly addressed <Set System Audio Mode> message within the required maximum response time of 1 second.

This test only applies if the DUT(i.e. amplifier) supports <Set System Audio Mode> messages as Initiator, and can initiate the System Audio Mode Function via its control on condition that the DUT starts the feature with firstly sending a directly addressed <Set System Audio Mode> [“On”] message.(See CDF)


Invoke the DUT to initiate the System Audio mode to On.(See CDF)

The TE responds with an <Active Source> [0.0.0.0] message to a <Request Active Source> message.

The TE responds to directly addressed <Set System Audio Mode> [“On”] with a <Feature Abort> message. The TE shall finish sending that message at 896+/-16msec after the TE received the (end of the) directly addressed <Set System Audio Mode> [“On”] message.

The DUT sends a directly addressed <Set System Audio Mode> [“On”] message to Logical Address 0.





11.2.15 - 19 Ensure that the DUT does not broadcast a <Set System Audio Mode> message correctly when the feature is initiated from Logical Address 3, but the TV responds with a <Feature Abort> message to directly addressed <Set System Audio Mode> message within the required maximum response time of 1 second.

This test only applies if the DUT(i.e. amplifier) supports <System Audio Mode Request> messages as Follower, and can initiate the System Audio Mode Function on condition that the DUT starts the feature with firstly sending a directly addressed <Set System Audio Mode> [“On”] message.(See CDF)

Ensure that the TE simulates the device at Logical Address 0 and 3.

Send a <System Audio Mode Request> [0.0.0.0] message to the DUT from Logical Address 3.

The TE responds with a <Active Source> [0.0.0.0] message to a <Request Active Source> message.

The TE responds to directly addressed <Set System Audio Mode> [“On”] with a <Feature Abort> message. The TE shall finish sending that message at 896+/-16msec after the TE received the (end of the) directly addressed <Set System Audio Mode> [“On”] message.

The DUT sends a directly addressed <Set System Audio Mode> [“On”] message to Logical Address 0.






CECT 11.2.16 Audio Rate Control [CEC: 13.16]



11.2.16 - 1 Ensure that the DUT accept a directly addressed <Set Audio Rate> message.

This test only applies if the DUT supports <Set Audio Rate> messages as Follower (See CDF).

Ensure that the DUT playing an audio media such as CD, Super Audio CD or DVD-AUDIO.

Send the DUT 4 directly addressed <Set Audio Rate> [Audio Rate] messages in 2 seconds or less span according to the two sequences below.

Sequence 1 : [Audio Rate] = “1” -> “2” -> “3” -> “0”

Sequence 2 : [Audio Rate] = “4” -> “5” -> “6” -> “0”

The DUT ACKs all the <Set Audio Rate> messages in either Sequence 1 or Sequence 2.

11.2.16 - 2 Ensure that the DUT sends directly addressed <Set Audio Rate> messages in a correct timing if the user activates this feature.

This test only applies if the DUT supports <Set Audio Rate> messages as Initiator (See CDF).

Ensure that user activates this feature.

Measure time span between the directly addressed <Set Audio Rate> messages.

The DUT sends directly addressed <Set Audio Rate> messages at least once every 2 seconds.

The parameter [Audio Rate] shall be

“0”, ”1”, ”2”, ”3”, ”4”,” 5”, or ”6”.





CECT 11.2.17 Audio Return Channel Control [CEC: 13.17]

Configurations

Tests 11.2.17-1 to 11.2.17-6 will test the control of the Audio Return Channel function on HDMI output(s) of the DUT.

Tests 11.2.17-7 to 11.2.17-12 will test the control of the Audio Return Channel function on HDMI input(s) of the DUT.

If the DUT does not have any HDMI output that supports Audio Return Channel function, then SKIP tests from 11.2.17-1 to 11.2.17-6.


• Tests from 11.2.17-1 to 11.2.17-4 shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of the DUT that supports Audio Return Channel function shall be connected to an HDMI input of the TE.

• Test 11.2.17-5 shall use the Basic Configuration (see CECT Figure 1) and an HDMI output that supports Audio Return Channel function of the DUT shall be connected to an HDMI input of the TE. The TE shall simulate a device at Logical Address for which the DUT supports Audio Return Channel function (See CDF) connected via a Repeater, and CEC messages are sent by the (simulated) a device at Logical Address for which the DUT supports Audio Return Channel function (See CDF) side for this test.

• Repeat tests from 11.2.17-1 to 11.2.17-5 for all the HDMI outputs of the DUT that support Audio Return Channel function(See CDF).

Test 11.2.17-6 is only performed if the DUT has any HDMI outputs that do not support the Audio Return Channel function (See CDF).

• Test 11.2.17-6 shall use the Basic Configuration (see CECT Figure 1) and an HDMI output of the DUT that does not support Audio Return Channel function shall be connected to an HDMI input of the TE.

• Repeat test 11.2.17-6 for all the HDMI outputs that do not support Audio Return Channel function of the DUT. (See CDF)

If the DUT does not have any HDMI input that supports Audio Return Channel function, then SKIP tests from 11.2.17-7 to 11.2.17-12


• Tests from 11.2.17-7 to 11.2.17-10 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that supports Audio Return Channel function shall be connected to an HDMI output of the TE.



• Test 11.2.17-11 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that supports Audio Return Channel function shall be connected to an HDMI output of the TE. The TE shall simulate a Source which supports Audio Return Channel function connected to the DUT via a Repeater, and CEC messages are sent by the simulated Source for this test.

• Repeat tests from 11.2.17-7 to 11.2.17-11 for all the HDMI inputs of the DUT that support Audio Return Channel function (See CDF).

Test 11.2.17-12 is only performed if the DUT has any HDMI inputs that do not support the Audio Return Channel function.

• Test 11.2.17-12 shall use the Basic Configuration (see CECT Figure 1) and an HDMI input of the DUT that does not support Audio Return Channel function shall be connected to an HDMI output of the TE.

• Repeat test 11.2.17-12 for all the HDMI inputs of the DUT that do not support Audio Return Channel function (See CDF).



11.2.17 - 1 Ensure that the DUT sends a directly addressed <Initiate ARC> message when it wants to initiate ARC.


Invoke the DUT to send a directly addressed <Initiate ARC> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Initiate ARC> message with no operand to the TE.

11.2.17 - 2 Ensure that the DUT sends a directly addressed <Terminate ARC> message when it wants to terminate ARC.




Invoke the DUT to send a directly addressed <Terminate ARC> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Terminate ARC> message with no operand to the TE.




11.2.17 - 3 Ensure that the DUT sends a directly addressed <Initiate ARC> message when it is requested to initiate ARC.



Send a directly addressed <Request ARC Initiation> message to the DUT.

The DUT sends a directly addressed <Initiate ARC> message with no operand to the TE.

11.2.17 - 4 Ensure that the DUT sends a directly addressed <Terminate ARC> message when it is requested to terminate ARC.




Send a directly addressed <Request ARC Termination> to the DUT.

The DUT sends a directly addressed <Terminate ARC> message with no operand to the TE.

11.2.17 - 5 Ensure that the DUT does not respond with any directly addressed <Initiate ARC> messages to non-adjacent device.

The TE takes a Physical Address of 0.0.0.0 and gives the DUT a Physical Address of 1.1.0.0.

Ensure that the DUT is ready to initiate ARC.



The DUT does not send any directly addressed <Initiate ARC> messages to the TE.




11.2.17 - 6 Ensure that the DUT does not respond with any directly addressed <Initiate ARC> messages when receiving an <Request ARC Initiation> message from a device connected to an HDMI output which does not support Audio Return Channel function.





The DUT does not send any directly addressed <Initiate ARC> messages to the TE.

11.2.17 - 7 Ensure that the DUT sends a directly addressed <Request ARC Initiation> message.

This test only applies if the DUT supports <Request ARC Initiation> messages as Initiator (See CDF).


Invoke the DUT to send a directly addressed <Request ARC Initiation> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Request ARC Initiation> message with no operand to the TE.

11.2.17 - 8 Ensure that the DUT sends a directly addressed <Report ARC Initiated> message.




The DUT sends a directly addressed <Report ARC Initiated> message with no operand to the TE.




11.2.17 - 9 Ensure that the DUT sends a directly addressed <Request ARC Termination> message.

This test only applies if the DUT supports <Request ARC Termination> messages as Initiator (See CDF).


Ensure that the DUT is ready to terminate ARC. (See CDF)


Invoke the DUT to send a directly addressed <Request ARC Termination> message (See CDF for detail of how to invoke).

The DUT sends a directly addressed <Request ARC Termination> message with no operand to the TE.

11.2.17 - 10 Ensure that the DUT sends a directly addressed <Report ARC Terminated> message.




Send a directly addressed <Terminate ARC> message to the DUT.

The DUT sends a directly addressed <Report ARC Terminated> message with no operand to the TE.

11.2.17 - 11 Ensure that the DUT does not respond with any directly addressed <Report ARC Initiated> messages to non-adjacent device.

The TE simulates a grandchild device of the DUT. (e.g. If the DUT has been allocated the Physical Address of 1.0.0.0 and gives the TE a Physical Address of 1.1.0.0, then TE takes a Physical Address of 1.1.1.0).







11.2.17 - 12 Ensure that the DUT does not respond with any directly addressed <Report ARC Initiated> messages when receiving an <Initiate ARC> message from a device connected to an HDMI input which does not support Audio Return Channel function.









CECT 11.3 CEC Switch The following are the set of tests that must be carried out on a CEC Switch. The tests listed as mandatory must be run. In addition, there is a section detailing additional tests for CEC Switches that may be manually switched.


[CEC: 11] Switch Requirements

[CEC: 13.1] One Touch Play

[CEC: 13.2] Routing Control

The DUT can act correctly for each Feature and Manual Switching

Configuration

For non-TV devices including CEC Switch functionality and pure CEC Switches, an HDMI output of the DUT shall be connected to an HDMI input of the test equipment. It is not necessary to test TV devices including CEC Switch functionality. (It is tested on CECT11.1.2.)

CECT 11.3.1 Mandatory Tests [CEC: 11.1]



11.3.1 - 1 Ensure that the DUT reacts correctly to an <Active Source> message when it does not need to change its switch position.

Ensure the DUT is switched to its child at position 1.

Broadcast an <Active Source> message, indicating a Physical Address below the DUT’s child position 1.

The DUT does not switch.

11.3.1 - 2 Ensure that the DUT reacts correctly to an <Active Source> message when it does need to change its switch position.


Broadcast an <Active Source> message indicating a Physical Address below the DUT’s child position 2.

The DUT switches to position 2.




11.3.1 - 3 Ensure that the DUT reacts correctly to a <Set Stream Path> message when it does not need to change its switch position.


Broadcast a <Set Stream Path> message indicating a Physical Address below the DUT’s child position 1.

The DUT does not switch.

11.3.1 - 4 Ensure that the DUT reacts correctly to a <Set Stream Path> message when it does need to change its switch position.


Broadcast a <Set Stream Path> message, indicating a Physical Address below the DUT’s child position 2.

The DUT switches to position 2.

11.3.1 - 5 Ensure that the DUT reacts correctly to a <Routing Change> message.

Allocate the DUT a Physical Address of 1.0.0.0.

Ensure the DUT is switched to its child at position 1 (the device at 1.1.0.0).

Broadcast a <Routing Change> [0.0.0.0] [1.0.0.0] message (Emulating that TV device switched from its internal source to HDMI input.).

The DUT broadcasts a <Routing Information> [1.1.0.0] message.

11.3.1 - 6 Ensure that a CEC Switch reacts correctly to a <Routing Information> message.


Broadcast a <Routing Information> [1.0.0.0] message to the DUT.

The DUT broadcasts a <Routing Information> [1.1.0.0] message.



CECT 11.3.2 Optional Tests If Manual Switching Is Possible.

The following test shall be carried out for CEC Switches where manual switching is allowed. [CEC: 11.1]




11.3.2 - 1 Ensure that the DUT broadcasts a <Routing Change> message when it is manually switched.

Allocate the DUT a Physical Address of 1.0.0.0.

Ensure the DUT is currently switched to child 1 (the device at 1.1.0.0).

Switch the DUT manually to child 2 (the device at 1.2.0.0).

The DUT broadcasts a <Routing Change> [1.1.0.0] [1.2.0.0] message





CECT 12 Invalid Message Tests The Invalid message tests shall be run for every message that a device supports. [CEC: 12] [CEC: 17]


[CEC: 12] High Level Protocol The DUT correctly supports Mandatory or declared Features and Messages.

Configuration




12 - 1 For every message that the DUT can receive that is defined as broadcast only, ensure that it ignores it when it is received as a directly addressed message.


For every message that the DUT can receive and should only be accepted when broadcast, send it as a directly addressed message to the DUT.


12 - 2 For every message that the DUT can receive that is defined as directly addressed only, ensure that the DUT ignores it when it is received as a broadcast message.


For every message that the DUT can receive and should only be accepted when directly addressed, send it as a broadcast message.





12 - 3 Ensure that the DUT ignores every broadcast message that the DUT does not support.

For every message that the DUT does not support and should only be accepted when broadcast, send it to the DUT.


12 - 4 <Reserved>


Check the pass criteria of each test by following the directions provided by the CEC Compliance Test Tool for CECT 12.

HDMI Compliance Test Specification Version1.4a


Appendix 1 CEC Capabilities Declaration Form The following declaration must be completed prior to CEC testing. The information that is entered will be used to determine which groups of tests are performed. If DUT has plural device types, following declaration form must be completed for each device type, because supported messages may be different between each device type.

CEC Capability Choices Value Comments

TV/Display (Y/N) Recording Device (Y/N) Tuner (Y/N) Playback Device (Y/N) Audio System (Y/N) Video Processor (Y/N)

CEC Device Type(s)

Pure CEC Switch (Y/N)

Does the device implement CEC Switch functionality?

CEC Switch (Y/N)

If the CEC Device Type is “TV/Display”, does the DUT want to advertise being a second TV?

Y / N

Does the device act as a Root device (Meaning: DUT is a Sink or Repeater and DUT’s Physical Address is 0.0.0.0 and DUT’s EDID(s) [if present] contain Source Physical Address of P.0.0.0)

Y / N

Number of HDMI Inputs (from General sheet) Are the CEC signals on input connectors independent? (Meaning: no physical connection between inputs and DUT has a Logical Address of 0 for all inputs). [Note: If device has no HDMI inputs, answer “N”.]

Y / N

Number of HDMI Outputs (from General sheet) Port # of the CEC-capable output 0 - X How many independent CEC lines are in the product, driven by independent CEC driving circuitry and logical processing?

- If there is only one CEC line, or all connectors share the same CEC line driver and logical processor, answer 1; - If there are multiple independent CEC systems, indicate the number of independent CEC systems

1 - X

Does CEC enabling initial setting exist? Y / N (*1)

*1: If Y, setting instruction is needed. (ex: see page ** of attached instruction Manual, etc.)



CEC Features / Messages Supported The following form must be filled in to declare the set of CEC features and messages that the DUT supports.

*1: If Y, setting instruction is needed. (ex: see page ** of attached instruction Manual, etc.)

CEC Feature Choices Value Comments Support as Initiator?

Support as Follower?

CEC Message

Choices Value Choices Value

Comments

Choices Value Comments Comments

The DUT has Digital tuner? Y / N (7bytes for Digital

Service Identification)

->Please write two typical Digital Service Identification(i.e. ["Service Identification Method"] ["Digital Broadcast System"] ["Service Idetification"] ) that the DUT can display and how to select the service using the DUT's control. (7bytes for Digital


The DUT has Analogue tuner? Y / N (4bytes for Analogue


->Please write two typical Identifier(i.e. ["Analogue Broadcast Type"] ["Analogue Frequency"] ["Broadcast System"] ) that the DUT can display and how to select the service using the DUT's control.

(4bytes for Analogue Service Identification)

Can DUT be brought out of Standby?

Y / N

->Supported Opcode for bringing out of Standby. (example. <Image View On>, <Text View On>)

Can the DUT send two consecutive messages.?

Y / N

-> A typical operation for sending two consecutive messages.

One Touch Play Support? (Y / N) Y (Mandatory Feature) Does DUT(TV) have an

internal source? Y / N

Does DUT(TV) have a text mode?

Y / N

If Y, describe how this mode is entered and how entry is confirmed:





CEC Message


Comments


<Active Source> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Image View On> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Text View On> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Routing Control Support? (Y / N) Y (Mandatory Feature) <Request Active Source> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Routing Change> Y / N Y / N -> Condition / Instruction for Initiator?

(A typical instruction for changing input port.)

-> Condition / Instruction for Follower? (Can the DUT indicate anything of changing input?)

<Routing Information> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Set Stream Path> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? -> If we can select a source device via the DUT's

menu. A typical operation for select a source via its menu.

<Inactive Source> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Standby Support? (Y / N) The DUT has standby mode? Support? (Y / N) <Standby>(Directly Addressed) Y / N Y / N -> Condition / Instruction for Initiator?





CEC Message


Comments


-> Condition / Instruction for Follower? (Won't turn to standby while recording, etc.)

<Standby>(Broadcast) Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? (Won't

turn to standby while recording, etc.)

One Touch Record Support? (Y / N) <Record Off> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Record On>["Own Source"] Y / N Y / N -> Condition / Instruction for Initiator? (Operation

example how to invoke the DUT to send <Record On>)

-> Condition / Instruction for Follower? (When is the DUT ready to record? e.g. the DUT is Power On and Media loaded. )

<Record On>["Digital Service"] Y / N Y / N -> Condition / Instruction for Initiator? (Operation


-> Condition / Instruction for Follower? (When is the DUT ready to record? e.g. Power On and Media loaded. )

<Record On>["Analogue Service"] Y / N Y / N -> Condition / Instruction for Initiator? (Operation


-> Condition / Instruction for Follower? (When is the DUT ready to record? e.g. Power On and Media loaded. )

<Record On>["External Plug"] Y / N Y / N -> Condition / Instruction for Initiator? (Operation


-> Condition / Instruction for Follower? (A typical instruction for recording external plug as Follower and when is the DUT ready to record? )





CEC Message


Comments


<Record On>["External Physical Address"] Y / N Y / N -> Condition / Instruction for Initiator? (Operation


-> Condition / Instruction for Follower? (A typical instruction for recording external Physical Address as Follower and when is the DUT ready to record? )

<Record Status> Y / N Y / N <Record TV Screen> Y / N Y / N -> Condition / Instruction for Initiator? (Operation

example for Initiating the feature by the DUT.)

-> Condition / Instruction for Follower?

Timer Programming Support? (Y / N) <Clear Analogue Timer> Y / N Y / N -> Condition / Instruction for Initiator?( Operation

example for initiating the feature via EPG or via menu.)

-> Condition / Instruction for Follower? <Clear Digital Timer> Y / N Y / N -> Condition / Instruction for Initiator?( Operation


-> Condition / Instruction for Follower? <Clear External Timer> Y / N Y / N -> Condition / Instruction for Initiator?( Operation


-> Condition / Instruction for Follower? <Set Analogue Timer> Y / N Y / N -> Condition / Instruction for Initiator?( Operation


-> Condition / Instruction for Follower? <Set Digital Timer> Y / N Y / N -> Condition / Instruction for Initiator?( Operation


-> Condition / Instruction for Follower? <Set External Timer>[…]["External Plug"] Y / N Y / N





CEC Message


Comments


-> Typical an External Plug number -> Condition / Instruction for Initiator?( Operation

example for initiating the feature via EPG or via menu. And how to set External Plug, if required. )

-> Condition / Instruction for Follower? <Set External Timer>[…]["External Physical Address"] Y / N Y / N -> Typical an External Physical Address -> Condition / Instruction for Initiator?( Operation

example for initiating the feature via EPG or via menu. And how to set External Physical Address, if required.)

-> Condition / Instruction for Follower? <Set Timer Program Title> Y / N Y / N -> Condition / Instruction for Initiator?( Operation


-> Condition / Instruction for Follower? <Timer Cleared Status> Y / N Y / N <Timer Status> Y / N Y / N

System Information Support? (Y / N) Languages Supported

(Supported Operands for <Set Menu Language>)

(See ISO/FDIS 639-2)

<Get Menu Language> Y / N Y / N -> Condition / Instruction for Initiator? <Give Physical Address> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Polling Message> Y / N Y / N -> Condition / Instruction for Initiator? <Report Physical Address> Y / N Y / N <Set Menu Language> Y / N Y / N -> Condition / Instruction for Initiator? (Operation

example how to modify the DUT's language setting. )

-> Condition / Instruction for Follower? <Get CEC Version> Y / N Y / N -> Condition / Instruction for Initiator?

http://www.loc.gov/standards/iso639-2/langhome.html

http://www.loc.gov/standards/iso639-2/langhome.html





CEC Message


Comments


-> Condition / Instruction for Follower? <CEC Version> Y / N Y / N -> Condition / Instruction for Initiator? -> CEC Version (which was used to design the

DUT.)

Deck Control Support? (Y / N) <Deck Control> Y / N Y / N ->Supported Operands? 0x01 - 0x04

-> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Deck Status> Y / N Y / N -> Supported Operands?

(When does the dut send with? e.g. Playing forward CD or DVD for ["Play"] )

0x11 - 0x1F

<Give Deck Status> Y / N Y / N -> Supported Operands? "On"/"Off"/"Once" -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Play> Y / N Y / N ->Supported Operands? 0x05 - 0x25

-> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Tuner Control Support? (Y / N) <Give Tuner Device Status> Y / N Y / N -> Supported Operands? "On"/"Off"/"Once" -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Select Digital Service> Y / N Y / N





CEC Message


Comments


-> Condition / Instruction for Initiator? (A typical instruction for Select Digital Service.)

-> Condition / Instruction for Follower? <Select Analogue Service> Y / N Y / N -> Condition / Instruction for Initiator?

(A typical instruction for Select Analogue Service.)

-> Condition / Instruction for Follower? <Tuner Device Status> Y / N Y / N <Tuner Step Decrement> Y / N Y / N <Tuner Step Increment> Y / N Y / N -> Condition / Instruction for Initiator?

(A typical instruction for Tuner Step Increment / Decrement on the DUT’s local or remote control.)


Vendor Specific Support? (Y / N) -> Vendor ID (issued by IEEE

RAC) used by DUT 24 bit IEEE ID (0x000000-

0xFFFFFF)

-> One typical Vendor ID (issued by IEEE RAC) unacceptable for DUT

24 bit IEEE ID (0x000000-0xFFFFFF)

<Device Vendor ID> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Give Device Vendor ID> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Vendor Command> Y / N Y / N Can the DUT send a

<Vendor Command> to the device whose Vendor ID is different from the DUT’s?

Y / N

-> Condition / Instruction for Initiator to send a <Vendor Command> to the device whose Vendor ID is different from the DUT’s?

<Vendor Command With ID> Y / N Y / N <Vendor Remote Button Down> Y / N Y / N





CEC Message


Comments


<Vendor Remote Button Up> Y / N Y / N

OSD Display Support? (Y / N) <Set OSD String> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Device OSD Transfer Support? (Y / N) <Give OSD Name> Y / N Y / N -> Condition / Instruction for Initiator? Enumerate which device type the DUT supports. -> Condition / Instruction for Follower? <Set OSD Name> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? -> Device OSD Name （≤14 ASCII） Where is this displayed and how to display it?

Device Menu Control Support? (Y / N) <Menu Request> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Menu Status> Y / N Y / N -> Condition / Instruction for Initiator?

(What status the DUT send? When does the dut send with? )

Recording Device(Y/ N)

Playback Device(Y/ N)

Tuner (Y/ N) Audio System(Y/ N)

What device can the DUT send to on the state of Device Menu Active?

Video Processor (Y / N)

Choose "Y" If the DUT can sends after receiving <Menu Status>.

-> Supported Operation IDs to send Recording Devices?

(0x00 - 0x75)

-> Supported Operation IDs to send Playback Devices?

(0x00 - 0x75)





CEC Message


Comments


-> Supported Operation IDs to send Tuner devices?

(0x00 - 0x75)

-> Supported Operation IDs to send Audio System devices?

(0x00 - 0x75)


Remote Control Passthrough Support? (Y / N) <User Control Pressed> Y / N Y / N <User Control Released> Y / N Y / N

Recording Device(Y/ N)

Playback Device(Y/ N)

Tuner (Y/ N) Audio System(Y/ N)

What device can the DUT select as the target device for remote control pass through?

Video Processor or Second TV (Y/N)

-> Supported Operation IDs to send Recording Devices?

(0x00 - 0x75) (Please include key label with Operation ID)

-> Supported Operation IDs to send Playback Devices?


-> Supported Operation IDs to send Tuner devices?


-> Supported Operation IDs to send Audio System devices?


-> Supported Operation IDs to send Video Processor devices?


-> Supported Operation IDs as Follower?

(0x00 - 0x75)

Press and Hold Operation Support? Y / N Y / N

-> Supported Remote Control or Local Keys to send Recording Device for Press and Hold Operation.





CEC Message


Comments


-> Supported Remote Control or Local Keys to send Playback Devices for Press and Hold Operation.

-> Supported Remote Control or Local Keys to send Tuner devices for Press and Hold Operation.

-> Supported Remote Control or Local Keys to send Audio System devices for Press and Hold Operation.

-> Supported Remote Control or Local Keys to send Video Processor or Second TV devices for Press and Hold Operation.

-> Supported Operation IDs as Press and Hold Operation as Follower. Describe the behavior when the DUT receive for Press and Hold Operation.

(0x00 - 0x75)

-> Condition / Instruction for Initiator?


Power Status Support? (Y / N) Y (Mandatory Feature) <Give Device Power Status> Y / N Y / N -> Condition / Instruction for Initiator? <Report Power Status> Y / N Y / N

Feature Abort Support? (Y / N) Y(Mandatory Feature) <Feature Abort> Y / N Y Y / N Y <Abort> Y / N N Y / N

System Audio Control Support? (Y / N) <Give Audio Status> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Give System Audio Mode Status> Y / N Y / N





CEC Message


Comments


-> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Report Audio Status> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Set System Audio Mode> Y / N Y / N -> Condition / Instruction for Initiator?

Operation example for activating to "On" by the DUT. Operation example for activating to "Off" by the DUT.

DUT can start the feature by first sending a directly addressed <Set System Audio Mode> [“On”] message to the TV?

(Y / N)

-> Condition / Instruction for the DUT to start the feature by first sending a directly addressed <Set System Audio Mode> [“On”] message to the TV?

-> Condition / Instruction for Follower? <System Audio Mode Request> Y / N Y / N -> Condition / Instruction for Initiator?

Operation example for activating to "On" by the DUT. Operation example for activating to "Off" by the DUT.

-> Condition / Instruction for Follower? <System Audio Mode Status> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Report Short Audio Descriptor> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower? <Request Short Audio Descriptor> Y / N Y / N Enumerate supported audio format names (refer

CEA-861-D Table 37).

-> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Audio Rate Control Support? (Y / N)





CEC Message


Comments


Supported control range by the DUT

Wide / Narrow / Both

Instruction for activating feature.

<Set Audio Rate> Y / N Y / N -> Condition / Instruction for Initiator? -> Condition / Instruction for Follower?

Audio Return Channel Control (Tx) for HDMI input (s)

Support? (Y / N)

HDMI input Port(s) # supporting ARC HDMI input Port(s) # not supporting ARC Logical Address(es) (of the ARC Rx) for which ARC

Tx provides support

(Enter "ALL" or the list of Logical Addresses which are supported.)

Condition / Instruction for ready to initiate ARC?

Condition / Instruction for initiating ARC (ie to get ARC running)?

Condition / Instruction for ready to terminate ARC?

<Request ARC Initiation> Y / N (na) -> Condition / Instruction for Initiator? <Request ARC Termination> Y / N (na) -> Condition / Instruction for Initiator? Audio Return Channel control (RX) for HDMI output(s)

Support? (Y / N)

HDMI output Port # supporting ARC HDMI output Port # not supporting ARC (only if

multiple HDMI outputs)

Logical Address(es) (of the ARC Tx) for which ARC Rx provides support1

(Enter "ALL" or the list of Logical Addresses which are supported.)

Condition/Instruction for sending <Initate ARC> Condition/Instruction for sending <Terminate ARC> Condition/Instruction for preparation to receive

<Request ARC Initiation> (for test 11.2.17-3)





CEC Message


Comments


Condition / Instruction for initiating ARC (ie to get ARC running)?

Capability Discovery and Control Support? (Y / N)

*1: If Y, setting instruction and confirmation method are needed.

HEAC Compliance Test Specification Version 1.4a

HDMI Licensing, LLC. Confidential Page HEAC-i

HDMI Compliance Test

Specification

Supplement 2 HDMI Ethernet and

Audio Return Channel (HEAC)


HDMI Licensing, LLC. Confidential Page HEAC-ii

HEACT Table of Contents HEACT 1 Introduction............................................................................................................ 1

HEACT 1.1 Purpose and Scope ........................................................................................ 1 HEACT 1.2 Normative References .................................................................................... 1 HEACT 1.3 Organization of this document ........................................................................ 1

HEACT 2 Definition ................................................................................................................ 2 HEACT 2.1 Conformance Levels ....................................................................................... 2 HEACT 2.2 Usages and Conventions................................................................................ 2 HEACT 2.3 Acronyms and Abbreviations .......................................................................... 3

HEACT 3 Overview................................................................................................................. 5 HEACT 4 Test Equipment...................................................................................................... 6

HEACT 4.1 Test Equipment Overview ............................................................................... 6 HEACT 4.1.1 Required Capabilities versus Recommended Equipment ............................ 6

HEACT 4.2 HEAC Electrical and Cable Test Equipment ................................................... 6 HEACT 4.2.1 Electrical and Cable Testing ......................................................................... 6

HEACT 4.3 CDC Test Equipment .................................................................................... 13 HEACT 4.3.1 CDC Electrical Test Equipment .................................................................. 13 HEACT 4.3.2 CDC Logical Test Equipment...................................................................... 13

HEACT 4.4 Networking Test Equipment .......................................................................... 16 HEACT 4.4.1 Network Testing .......................................................................................... 16

HEACT 5 Electrical Characteristics Test ........................................................................... 20 HEACT 5.1 Differential Signal Characteristics Tests........................................................ 20

Test ID HEACT 5-1: Operating DC Voltage Test.................................................................. 20 Test ID HEACT 5-2: Jitter Max Test ..................................................................................... 23 Test ID HEACT 5-3: Rise Time/Fall Time Test ..................................................................... 26 Test ID HEACT 5-4: High/Low/Center Level Voltage Test ................................................... 29 Test ID HEACT 5-5: Cycle Time Test ................................................................................... 32

HEACT 5.2 Common Mode Signal Characteristics Tests ................................................ 36 Test ID HEACT 5-6: Operating DC Voltage Test.................................................................. 36 Test ID HEACT 5-7: High/Low Level Voltage Test ............................................................... 39 Test ID HEACT 5-8: Rise/Fall Time Test .............................................................................. 43 Test ID HEACT 5-9: Jitter Max/Clock Frequency Test ......................................................... 46 Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test ............................................... 50

HEACT 5.3 Single Mode Signal Characteristics Tests..................................................... 54 Test ID HEACT 5-11: Operating DC Voltage Test ................................................................ 54 Test ID HEACT 5-12: Signal Amplitude Test........................................................................ 57 Test ID HEACT 5-13: Rise/Fall Time Test............................................................................ 61 Test ID HEACT 5-14: Jitter Max/Clock Frequency Test ....................................................... 64


HDMI Licensing, LLC. Confidential Page HEAC-iii

Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test ............................................... 68 HEACT 5.4 Receiver Performance Tests......................................................................... 72

Test ID HEACT 5-16 : Differential Signal Receiver Performance Test................................. 72 Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test ......................... 77 Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test.............................. 80 Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test..................................... 84 Test ID HEACT 5-20: Single Mode Operating DC Voltage Test........................................... 87

HEACT 6 Cable Assembly Tests......................................................................................... 92 Test ID HEACT 6-1: Intra-Pair Skew Test ............................................................................ 92 Test ID HEACT 6-2: Differential Attenuation Test................................................................. 94 Test ID HEACT 6-3: Differential/Common Mode Impedance Test ....................................... 97

HEACT 7 Capability Discovery and Control .................................................................... 100 HEACT 7.1 Test Configurations ..................................................................................... 100

HEACT 7.1.1 Basic Configuration .................................................................................. 100 HEACT 7.1.2 HEC Feature Configuration ...................................................................... 101

HEACT 7.2 General Constraints .................................................................................... 105 HEACT 7.2.1 Handling Response Messages................................................................. 105 HEACT 7.2.2 Ignoring Messages ................................................................................... 105 HEACT 7.2.3 Handling Flow Control .............................................................................. 105 HEACT 7.2.4 Verifying Messages at Feature Tests........................................................ 105

HEACT 7.3 Low Level Protocol Tests for CDC Devices ................................................ 106 HEACT 7.3.1 Electrical Specification.............................................................................. 106 Test ID: HEACT 7.3.1-1 CEC Bus Logic ‘0’ and ‘1’ Voltage Level .................................. 106 Test ID: HEACT 7.3.1-2 Maximum Rise Time and Fall Time.......................................... 108 HEACT 7.3.2 Signaling and Bit Timings ......................................................................... 110 HEACT 7.3.3 Frame Communication ............................................................................. 114

HEACT 7.4 Low Level Protocol Tests for CDC/CEC Devices........................................ 120 HEACT 7.4.1 Initiator Logical Address ........................................................................... 120

HEACT 7.5 Low Level Protocol Tests for All CDC Devices ........................................... 121 HEACT 7.5.1 CDC Control Signal Line Arbitration ......................................................... 121 HEACT 7.5.2 Destination Logical Address ..................................................................... 122 HEACT 7.5.3 CEC Opcode Block................................................................................... 122 HEACT 7.5.4 Initiator Physical Address ......................................................................... 123 HEACT 7.5.5 Frame Validation....................................................................................... 125

HEACT 7.6 Feature Tests .............................................................................................. 126 HEACT 7.6.1 HDMI Ethernet Channel (HEC) ................................................................ 126 HEACT 7.6.2 CDC_HPD (CDC Hot Plug Detect signal) ................................................ 185

HEACT 8 Networking ......................................................................................................... 228 HEACT 8.1 Networking test Overview ........................................................................... 228


HDMI Licensing, LLC. Confidential Page HEAC-iv

HEACT 8.1.1 Networking test steps ............................................................................... 228 HEACT 8.1.2 Agilent N5610A Converter setup procedure............................................. 229 HEACT 8.1.3 CEC/CDC Controller setup procedure...................................................... 230 HEACT 8.1.4 Agilent N5610A Converter enable procedure........................................... 230 HEACT 8.1.5 CEC/CDC Controller close procedure: ..................................................... 230 HEACT 8.1.6 Target HEC Device for Networking test.................................................... 231

HEACT 8.2 Networking Test Methods............................................................................ 234 Test ID HEACT 8-1: Packet filtering/forwarding................................................................. 234 Test ID HEACT 8-2: Forwarding of BPDU ......................................................................... 238 Test ID HEACT 8-3: RSTP functionality ............................................................................. 242 Test ID HEACT 8-4: Queue Control ................................................................................... 248 Test ID HEACT 8-5: Unchanged Priority Tag value ........................................................... 251

Appendix 1 – Capabilities Declaration Form (CDF) ............................................................. 256 Appendix2 - Test Result Form ............................................................................................... 267


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HEACT Test Figures Setup 1. Test ID HEACT 5-1: Operating DC Voltage Test-Tektronix.................................... 21 Setup 2. Test ID HEACT 5-1: Operating DC Voltage Test – Agilent..................................... 22 Setup 3. Test ID HEACT 5-2: Jitter Max Test-Tektronix ....................................................... 24 Setup 4. Test ID HEACT 5-2: Jitter Max Test – Agilent ........................................................ 25 Setup 5. Test ID HEACT 5-3: Rise Time/Fall Time Test-Tektronix ....................................... 27 Setup 6. Test ID HEACT 5-3: Rise Time/Fall Time Test – Agilent ........................................ 28 Setup 7. Test ID HEACT 5-4: High/Low/Center Level Voltage Test-Tektronix ..................... 30 Setup 8. Test ID HEACT 5-4: High/Low/Center Level Voltage Test – Agilent ...................... 31 Setup 9. Test ID HEACT 5-5: Cycle Time Test-Tektronix ..................................................... 33 Setup 10. Test ID HEACT 5-5: Cycle Time Test – Agilent.................................................... 35 Setup 11. Test ID HEACT 5-6: Operating DC Voltage Test-Tektronix .................................. 37 Setup 12. Test ID HEACT 5-6: Operating DC Voltage Test – Agilent................................... 38 Setup 13. Test ID HEACT 5-7: High/Low Level Voltage Test-Tektronix ............................... 40 Setup 14. Test ID HEACT 5-7: High/Low Level Voltage Test – Agilent ................................ 42 Setup 15. Test ID HEACT 5-8: Rise/Fall Time Test-Tektronix .............................................. 44 Setup 16. Test ID HEACT 5-8: Rise/Fall Time Test – Agilent............................................... 45 Setup 17. Test ID HEACT 5-9: Jitter Max/Clock Frequency Test-Tektronix ......................... 48 Setup 18. Test ID HEACT 5-9: Jitter Max/Clock Frequency Test – Agilent.......................... 49 Setup 19. Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test-Tektronix ............... 51 Setup 20. Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test - Agilent ................. 53 Setup 21. Test ID HEACT 5-11: Operating DC Voltage Test-Tektronix ................................ 55 Setup 22. Test ID HEACT 5-11: Operating DC Voltage Test – Agilent................................. 56 Setup 23. Test ID HEACT 5-12: Signal Amplitude Test-Tektronix ........................................ 58 Setup 24. Test ID HEACT 5-12: Signal Amplitude Test - Agilent.......................................... 60 Setup 25. Test ID HEACT 5-13: Rise/Fall Time Test-Tektronix ............................................ 62 Setup 26. Test ID HEACT 5-13: Rise/Fall Time Test - Agilent.............................................. 63 Setup 27. Test ID HEACT 5-14: Jitter Max/Clock Frequency Test-Tektronix ....................... 65 Setup 28. Test ID HEACT 5-14: Jitter Max/Clock Frequency Test - Agilent......................... 67 Setup 29. Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test-Tektronix ............... 69 Setup 30. Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test - Agilent ................. 71 Setup 31. Test ID HEACT 5-16 : Differential Signal Receiver Performance Test-Tektronix. 74 Setup 32. Test ID HEACT 5-16 : Differential Signal Receiver Performance Test – Agilent . 75 Setup 33. Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test-Tektronix ...................................................................................................................... 78 Setup 34. Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test – Agilent............................................................................................................................................. 79 Setup 35. Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test-Tektronix............................................................................................................................................. 81


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Setup 36. Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test – Agilent............................................................................................................................................. 83 Setup 37. Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test-Tektronix ..... 85 Setup 38. Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test – Agilent...... 86 Setup 39. Test ID HEACT 5-20: Single Mode Operating DC Voltage Test-Tektronix........... 88 Setup 40. Test ID HEACT 5-20: Single Mode Operating DC Voltage Test – Agilent ........... 90 Setup 41. Test ID HEACT 6-1: Intra-Pair Skew Test ............................................................ 92 Setup 42. Test ID HEACT 6-1: Intra-Pair Skew Test – Agilent ............................................. 93 Setup 43. Test ID HEACT 6-2: Differential Attenuation Test ................................................ 94 Setup 44. Test ID HEACT 6-2: Differential Attenuation Test – Agilent TDR......................... 96 Setup 45. Test ID HEACT 6-2: Differential Attenuation Test – Agilent Network Analyzer .... 96 Setup 46. Test ID HEACT 6-3: Differential/Common Mode Impedance Test....................... 98 Setup 47. Test ID HEACT 6-3: Differential/Common Mode Impedance Test - Agilent......... 99 Setup 48. Test ID: HEACT 7.3.1-1 CEC Bus Logic ‘0’ and ‘1’ Voltage Level ..................... 107 Setup 49. Test ID: HEACT 7.3.1-2 Maximum Rise Time and Fall Time............................. 109 Setup 50. Test ID:HEACT 7.6.1 HEC Functionality Check- Agilent ................................... 127 Setup 51. Test ID HEACT 8-1: Packet filtering/forwarding................................................. 236 Setup 52. Test ID HEACT 8-2: Forwarding of BPDU ......................................................... 239 Setup 53. Test ID HEACT 8-3: RSTP functionality............................................................. 246 Setup 54. Test ID HEACT 8-4: Queue Control................................................................... 250 Setup 55. Test ID HEACT 8-5: Unchanged Priority Tag value ........................................... 253


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HEACT Figure

HEACT Figure 5-1 Waveform for testing Cycle Time .......................................................... 32 HEACT Figure 5-2 High/Low Level Measurement............................................................... 39 HEACT Figure 5-3 Signal Amplitude measurement............................................................. 57 HEACT Figure 7-1 Basic Configuration ............................................................................. 100 HEACT Figure 7-2 HEC Feature Configuration ................................................................. 101 HEACT Figure 7-3 Rise Time and Fall Time in CDC waveform ........................................ 108 HEACT Figure 7-4 Example of how the DUT loses arbitration to the TE. ......................... 118 HEACT Figure 7-5 CDC_HPD test concept for Source Devices ....................................... 185 HEACT Figure 7-6 CDC_HPD test concept for Sink Devices ........................................... 186 HEACT Figure 7-7 CDC_HPD test concept for Repeater Devices.................................... 188 HEACT Figure 8-1 Networking Test Steps......................................................................... 228 HEACT Figure 8-2 Agilent N5610A Converter ................................................................... 229 HEACT Figure 8-3 One Time Test Rule ............................................................................. 232 HEACT Figure 8-4 Port Rotation Rule ............................................................................... 233 HEACT Figure 8-5 RSTP Test Topology for HEC port is equal to 2. ................................. 243


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HEACT 1 Introduction HEACT 1.1 Purpose and Scope This document constitutes the specification of procedures, tools and criteria for testing the compliance of devices with the High-Definition Multimedia Interface Specification Version 1.4 Supplement 2 – HDMI Ethernet and Audio Return Channel (HEAC).

HEACT 1.2 Normative References HDMI Licensing, LLC. “High-Definition Multimedia Interface, Specification Version 1.4”, June 5, 2009.

HEACT 1.3 Organization of this document This specification is organized as follows:

Chapter 1 describes the Purpose and Scope of the document, references, usages and conventions.

Chapter 2 defines terms and acronyms used within the document.

Chapter 3 provides an Overview to HEAC compliance testing.

Chapter 4 describes the Required Capabilities for the defined test equipment as well as certain Recommended Test Equipment that has been proven to meet those requirements.

Chapter 5 describes the tests for Electrical Characteristics.

Chapter 6 describes the tests for Cable Assembly.

Chapter 7 describes the tests for Capability Discovery and Control.

Chapter 8 describes the tests for Networking.

Appendix 1 defines the Capabilities Declaration Form, which is filled out and submitted by the product manufacturer whenever a product is sent for testing at an Authorized Testing Center (ATC) or when the results of ATC or self-testing are sent to the HDMI Licensing, LLC.

Appendix 2 defines the Test Results Form, which is completed by the test operator and submitted as the results of ATC or self-testing to the HDMI Licensing, LLC.



HEACT 2 Definition HEACT 2.1 Conformance Levels expected A key word used to describe the behavior of the hardware or software in

the design models assumed by this specification. Other hardware and software design models may also be implemented.

may A key word that indicates flexibility of choice with no implied preference.

shall A key word indicating a mandatory requirement. Designers are required to implement all such mandatory requirements.

should A key word indicating flexibility of choice with a strongly preferred alternative. Equivalent to the phrase is recommended.

HEACT 2.2 Usages and Conventions [HDMI: X.Y.Z] Shorthand notation indicating a reference to the HDMI Specification.

Examples: [HDMI: 3.2] denotes a reference to the HDMI Specification, section 3.2.

[CEC: X.Y.Z] Denotes a reference to the HDMI Specification, Supplement 1, “Consumer Electronics Control”, section CEC X.Y.Z.

[HEAC: X.Y.Z] Denotes a reference to the HDMI Specification, Supplement 2, “HDMI Ethernet and Audio Return Channel”, section HEAC X.Y.Z.

[IEC 60958-1: X.Y.Z] Denotes a reference to the IEC 60958-1, “DIGITAL AUDIO INTERFACE – Part 1: General”, Clause X.Y.Z.

FAIL, “xxx” Indicates a directive to the test operator to fail this test and to write “FAIL” in the “Pass/Fail” field of the Test Results form, and the comment “xxx” in the Comments field. It is permitted and frequently useful for the remainder of the test to be performed to provide additional information about the failure.

PASS, “xxx” Indicates a directive to the test operator to pass this test and to write “PASS” in the “Pass/Fail” field of the Test Results form, and the comment “xxx” in the Comments field. The PASS directive indicates that the test is complete unless indicated otherwise. There is an implied PASS directive at the end of every test method, causing successfully completed tests to PASS.

SKIP, “xxx” Indicates a directive to the test operator to skip this test and to write “SKIP” in the “Pass / Fail” field of the Test Results form, and the comment “xxx” in the Comments field.

DST=”xx:xx:xx:xx:xx:xx” Indicates Destination (receiver’s) MAC address in MAC Frame.

SRC=”xx:xx:xx:xx:xx:xx” Indicates Source (sender’s) MAC Address in MAC Frame.

LENGTH=”xxxx” Byte Indicates the number of byte of DATA field in MAC Frame.

DATA= Indicates the contents in data field in MAC Frame.



HEACT 2.3 Acronyms and Abbreviations

AC Alternating Current ACK Acknowledge AHEC Active HDMI Ethernet Channel AP Alternate Port ARC Audio Return Channel ARP Address Resolution Protocol A/V Audio / Video BPDU Bridge Protocol Data Unit CDC Capability Discovery and Control CDF Capabilities Declaration Form CEC Consumer Electronics Control CP Content Protection CSV Comma Separated Values CTT Compliance Test Tool DP Designated Port DUT Device Under Test EDID Extended Display Identification Data ENC External Network Connection FIB Filtering Database GUI Graphical User Interface HDCP High-bandwidth Digital Content Protection HDMI High-Definition Multimedia Interface HEAC HDMI Ethernet and Audio Return Channel HEC HDMI Ethernet Channel HPD Hot Plug Detection ID Identification LAN Local Area Networking MAC Media Access Control MRT Maximum Response Time MSTP Multiple Spanning Tree Protocol NDP Neighbor Discovery Protocol PA Physical Address PC Personal Computer PING Packet Internet Groper PHEC Potential HDMI Ethernet Channel QoS Quality of Services RP Root Port RSTP Rapid Spanning Tree Protocol SAP Session Announcement Protocol



STP Spanning Tree Protocol TPA Test point Access TE Test Equipment TV Television set TDR Time domain reflectometry TDT Time Domain Transmission UI Unit Interval VHEC Verified HDMI Ethernet Channel VID(VLAN ID) VLAN Identifier VLAN Virtual Local Area Networking VSDB Vendor-Specific Data Block



HEACT 3 Overview The HEAC Compliance Test Specification is broken down into the low level protocol tests which every device and Cable Assembly must adhere to and a set of feature based tests which apply only to devices that support that particular feature. A device or a Cable Assembly that fails any low level tests shall not claim to be HEAC compliant. A device that fails a feature test shall not claim to support that feature.

HEACT Table 3-1 shows which Section 5 tests shall be performed according to CDF entries.

All Source, Sink and Repeater devices with CDF field HEC == “Y” shall perform the necessary tests in Section 7 and 8.

HEAC Cables shall be tested according to Section 6 (in addition to the cable test in main CTS).

If a Repeater product supports HEC on any HDMI input(s), it is required to complete a Sink CDF describing those characteristics.

If a Repeater product supports HEC on one of its HDMI outputs, it is required to complete a Source CDF describing those characteristics.

If a Repeater product supports ARC on any HDMI input(s), it is required to complete a Sink CDF describing those characteristics.

If a Repeater product supports ARC on any HDMI output(s), it is required to complete a Source CDF describing those characteristics.

HEACT Table 3-1 Testing Item List

Test Item Test ID HEC ARC_TX_common

ARC_TX_single HEC ARC_RX

5-1 YES YES

5-2 YES YES

5-3 YES YES

5-4 YES YES

5-5 YES YES

5-6 YES

5-7 YES

5-8 YES

5-9 YES

5-10 YES

5-11 YES

5-12 YES

5-13 YES

5-14 YES

5-15 YES

5-16 YES YES

5-17 YES

5-18 YES

5-19 YES

5-20 YES

Receiverperformance

test

Sink Source

Differentialsignal

characteristicstest

Commonsignal

characteristicstest

Singlesignal

characteristicstest



HEACT 4 Test Equipment HEACT 4.1 Test Equipment Overview This section specified equipments for testing the HEAC lines and protocols.

HEACT 4.1.1 Required Capabilities versus Recommended Equipment Each piece of test equipment referenced by the individual test cases is listed below. For each test case, the “Required Test Equipment Capabilities” are described. All equipment used for testing the related attributes shall comply with the requirements listed for that piece of equipment.

In addition, for each of the defined pieces of equipment, specific commercial or custom “Recommended Test Equipment" is described. This includes the primary equipment that is used in the HDMI Authorized Test Centers and should also, if possible, be used for any self-testing of the related functions. Other configurations and equipment may be used for self-testing, as long as that equipment and the processes used meet all of the stated and implied requirements and permit an equivalent level of testing. It is the Adopter’s responsibility to verify that the substituted equipment and processes sufficiently meet all requirements.

Adopters should understand that HDMI Licensing, LLC, the HDMI Founders and test equipment makers do not ensure the future commercial availability of the recommended test equipment.

HEACT 4.2 HEAC Electrical and Cable Test Equipment All test equipment requiring calibration in order to ensure accurate and repeatable results shall be calibrated prior to and, if necessary, during the test procedure.

HEACT 4.2.1 Electrical and Cable Testing HEACT 4.2.1.1 HEAC Test Point Access Adapters/boards Overview In order to gain access to the required signals, HEAC Test Point Access adapters/boards are required, each tailored for a particular test purpose. TPA adapters/boards provide test points for the pins on the HEAC connector.

When an HEAC-TPA adapter/board is acting as a Sink (for Source DUT testing), additional functionality may be required. A variety of EDID images may be required in order to cause the Source to create a required signal. For this reason, an EDID Emulator might need to be attached to the HEAC-TPA adapter/board. In addition, used as a Sink, the HEAC-TPA adapter/board is typically operated with the Hot Plug Detect signal connected to the +5V Power signal through a 1.2 kΩ resistor.

The CEC/CDC Controller might need to be attached to the HEAC-TPA adaptor/board to activate/deactivate the HEC/ARC transmission/reception on the Source/Sink DUT.



Required Test Equipment Capabilities Following are the required capabilities common among all of the HEAC-TPA adopters/boards:

HDMI plug or receptacle is constructed to enable direct connection to a Source, Sink, or Cable Assembly. This includes attaching the assembly in tight or awkward locations such as within a connector access panel at the rear of a flat panel display.

HEAC+/- signals shall meet the following characteristics:

• The test port shall be appropriate to the type of probe used and is located at an equivalent trace length from the HDMI connector as all other test ports.

• Characteristic differential impedance except connector area, for HEAC pair is 100Ω ± 15%.

Pins or connectors not related to the HEAC +/- signals (if required for test):

• These pins have testing ports that can be used to measure or drive each of the signals.

• The connector provides an input of DC +5VDC to the +5V power pin.

Connection to the CEC/CDC Controller:

• An HDMI receptacle is mounted to enable connection to the CEC/CDC Controller. Signals used only for CEC/CDC control shall be available for this receptacle.

Recommended Test Equipment#1 • Tektronix Test Fixture TF-HEAC-TPA-MAIN • Tektronix Test Fixture TF-HEAC-TPA-AP • Tektronix Test Fixture TF-HEAC-TPA-CP • Tektronix Test Fixture TF-HEAC-TDR-AR • Tektronix Test Fixture TF-HEAC-TDR-CR • Tektronix Test Fixture TF-HDMID-TPA-P • Tektronix Test Fixture TF-HDMID-TPA-R

HEAC-TPA-MAIN is typically used in conjunction with HEAC-TPA-AP, HEAC-TPA-CP or HEAC-HDMID-TPA-P for Source and Sink tests. An HEAC-TPA-MAIN has a pair of impedance conversion circuits with a coupling capacitor. By connecting this impedance conversion circuit to output of the Arbitrary Waveform Generator which has 50Ω output source impedance, 45/50/55Ω selectable output source impedance will be available accordingly. Two HEAC-TDR-AR or two HEAC-TDR-CR are used for cable tests. These adapters permit direct access to HEAC +/-, DDC, and CEC signals.

Recommended Test Equipment #2 • Agilent 81150AU-EHD HEAC Physical Test Board

• Agilent N1080B-H01 Type A HEAC Test Fixture Plug Type • Agilent N1080B-H02 Type A HEAC Test Fixture Receptacle Type • Bitifeye BIT-HDMI-TCPL-0001 Type C HEAC Test Fixture Plug Type • Bitifeye BIT-HDMI-TCRE-0001 Type C HEAC Test Fixture Receptacle Type • Bitifeye BIT-HDMI-TDPL-0001 Type D HEAC Test Fixture Plug Type • Bitifeye BIT-HDMI-TDRE-0001 Type D HEAC Test Fixture Receptacle Type



HEACT 4.2.1.2 Digital Oscilloscope Required Test Equipment Capabilities

• DC to 0.5GHz, -3dB bandwidth or greater • Input configurations:

− 1 Differential Probe − 1 or more Single-Ended probes

• Sampling rate >= 10G samples/sec, sampling 2 channels simultaneously. • Sample memory: 2 channels at 20M samples per channel.

Recommended Test Equipment#1 • Tektronix DPO70000/B Series Digital Oscilloscope (e.g. DPO70804/B) with Option 2XL,

DJA, MTH, PTH or Tektronix DSA70000/B Series (e.g. DSA70804/B, equivalent) or Tektronix DPO7000 Series with Option 2XL DJA, MTM, PTM (e.g. DPO7254 or DPO7345) − Tektronix HEAC software – Opt HEAC

• Microsoft Excel 2002 or above

Recommended Test Equipment #2 • Agilent DSO80000B Series Oscilloscope (e.g. DSO80804B) with Option DSO80000-001 or

Agilent DSO90000A Series Oscilloscope (e.g. DSO90804A) − Agilent N5399B HDMI Compliance Test Software − Bitifeye BIT-HDMI-HEAC HEAC PHY Test software

HEACT 4.2.1.3 Arbitrary Waveform Generator Required Test Equipment Capabilities Capable of transmitting MLT-3 signals and IEC 60958-1 signals.

• MLT-3 signal − 125Mbps − Differential 1V peak-to-peak swing

• IEC 60958-1 signals − 6.144MHz, 5.6488MHz and 4.096MHz − 1V peak-to-peak swing for 2 channels.

Recommended Test Equipment#1 • Tektronix AWG5000/B Series (e.g. AWG5012, AWG5012B, AWG5014, AWG5014 or

AWG7102) with Option 01, 08 or AWG7000/B Series (e.g. AWG7102, AWG7052, AWG7122B or AWG7062B) with Option 01, 08.

Recommended Test Equipment #2 • Agilent 81150A Pulse Function Arbitrary Noise Generator

− Agilent 81150A-002 Two output channels − Agilent 81150A-PAT Pattern Generator Option − Agilent 11636B Power combiner − Bitifeye BIT -HDMI-HEAC HEAC PHY Test software



HEACT 4.2.1.4 Differential Probe Required Test Equipment Capabilities

• DC – 0.5GHz bandwidth (or greater) when connected to an oscilloscope • Common Mode Input Rage : -4V to +5V. • Differential Input Range : -1.6V to +1.6V.

Recommended Test Equipment#1 • For Tektronix DPO/DSA70000/B Series Digital Oscilloscope

− Tektronix P6247, P6248, P6330 or P7330 − Required accessories:

Tektronix 016-1884-00 Square Pin Adapter for P6330/P7330 Tektronix TCA-BNC for P6247/P6248/P6330

• For Tektronix DPO7000 Series Digital Oscilloscope − Tektronix P6330, TDP1000, TDP1500 or TDP3500 − Required accessories:

Tektronix 016-1884-00 Square Pin Adapter for P6330 Tektronix TPA-BNC Interface Adapter for P6247/P6248/P6330

Recommended Test Equipment #2 for use with Agilent oscilloscope • Agilent 1169A or 1168A Probe Amplifier • Agilent E2678A Single Ended/Differential Socket Probe Head

HEACT 4.2.1.5 Single-Ended Probe Required Test Equipment Capabilities

• DC – 0.5GHz bandwidth (or greater) when connected to an oscilloscope • Offset Range : -5V to +5V. • Dynamic Range : -1.6V to +1.6V.

Recommended Test Equipment#1 • For Tektronix DPO/DSA70000/B Series Digital Oscilloscope

− Tektronix P6243 or P6245 − Required accessories:

Tektronix TCA-BNC Interface Adapter Tektronix 196-3463-10 Y-lead Adapter

• For Tektronix DPO7000 Series Digital Oscilloscope − Tektronix P6243, P6245 or TAP1500 − Required accessories:

Tektronix 196-3463-10 Y-lead Adapter Tektronix TPA-BNC Interface Adapter for P6243/P6245

−

Recommended Test Equipment #2 for use with Agilent oscilloscope • Agilent 1169A or 1168A Probe Amplifier • Agilent E2678A Single Ended/Differential Socket Probe Head • Agilent E2697A High Impedance Adapter • Agilent 10073C Passive Probe



HEACT 4.2.1.6 TDR/TDT Oscilloscope Required Test Equipment Capabilities

• TDR measurement − Bandwidth : ≥ 18GHz − Pulse rise time : ≤ 75ps (10-90%) − 2 port (1 differential input/output) − Capability to adjust the effective rise time of the TDR waveform that is displayed on

the screen to a value below but very close to 200ps (10-90%). • TDT measurement

− Bandwidth: ≥ 18GHz − Pulse rise time : ≤ 75ps (10-90%) − 4 port (1 differential output and 1 differential input)

Recommended Test Equipment#1 • Tektronix TDS8000/B, TDS8200/B or DSA8200 • Tektronix 80E04 TDR-module • Tektronix 80E03 Sampling module • Tektronix 80SSPAR S-Parameter Software

Recommended Test Equipment #2 • Agilent 86100C Digital Communications Analyzer • Agilent 86100C-202 Enhanced TDR and S-parameter Application • Agilent 54754A TDR/TDT Module • Agilent 86112A Dual Electrical Receiver module or second 54754A module

HEACT 4.2.1.7 Network Analyzer Required Test Equipment Capabilities

• 4 ports used simultaneously

• At least 300kHz – 200MHz bandwidth is available.

• Dynamic accuracy over the frequency range 300kHz – 200MHz

− Magnitude: ≤ (±)0.50dB from 0 to – 50dBm − Phase: ≤ (±) 4 degrees from 0 to – 50dBm

Recommended Test Equipment • Agilent E5071C ENA Series Network Analyzer

• Agilent E5071C-440 4 port Test Set, 9kHz to 4.5GHz

• Agilent N4431B 4 port RF E-cal module



HEACT 4.2.1.8 50Ω SMA Terminators Required Test Equipment Capabilities

• 50Ω impedance ± 1% or better • Connects directly to SMA female.

Recommended Test Equipment Any lab-quality terminator which meets requirements specified above.

HEACT 4.2.1.9 SMA Cables Required Test Equipment Capabilities

• Less than 2 meters, preferably less than 1 meter. • Bandwidth: 9GHz or greater • 50Ω impedance

Recommended Test Equipment#1 Any of the following are recommended:

• Tektronix 174-1428-00 (1.5 meter) • Tektronix 174-1341-00 (1 meter) • Tektronix 174-1120-00 (0.22 meter)

Recommended Test Equipment #2 Any of the following are sufficient:

• Agilent 15443A matched cable pair • Agilent N4871A matched cable pair

HEACT 4.2.1.10 Digital Multi-Meter Required Test Equipment Capabilities

• Basic DC voltage, DC resistance measurement capability. • DC voltage

− DC voltage resolution ≤ 1μV when range is 0-1mV. − DC voltage accuracy ≤ ±10μV when range is 0-1mV. − Indicates the value of the DC voltage as a digital number.

• DC resistance − DC resistance resolution is more than 3 digits. − DC resistance accuracy ≤ ±1%. − At least 1MΩ (disconnected) must be measured. − Indicate the value of DC resistance as a digital number.



Recommended Test Equipment Any digital multi-meter meeting the above requirements may be used. One such option is:

• ADVANTEST R6552

HEACT 4.2.1.11 DC Power Supply Required Test Equipment Capabilities

• Can output DC 5VDC with an accuracy of ≤ ±1% • Maximum output current can be set with an accuracy of ≤ ±5% within the 10 to 100mA

range.

Recommended Test Equipment Any DC power supply meeting the above requirements may be used. One such option is:

• KENWOOD PW18-1.8AQ

HEACT 4.2.1.12 CEC/CDC Controller Required Test Equipment Capabilities

• Can activate/deactivate HEC/ARC transmission/reception on a DUT by CEC/CDC.

Recommended Test Equipment • Simplay SL-309 • Quantum Data 882CA (only for ARC testing)



HEACT 4.3 CDC Test Equipment HEACT 4.3.1 CDC Electrical Test Equipment For some tests a signal generator/analyzer is used to cause a DUT to send messages while an oscilloscope measures electrical characteristics of CEC bus waveforms generated by the DUT. For other tests, a voltmeter measures DC potentials under quiescent conditions – while the breakout box applies various static test loads.

The signal generator/analyzer may have a nominal fixed internal pull-up resistor. Some tests require the strength of this pull-up resistor and (or) the load capacitance to be varied. These tests may be conducted with additional parallel-connected components attached to the CEC bus.

HEACT 4.3.1.1 Required Test Equipment • It shall have modifiable load characteristics. • It shall have the ability to measure voltage levels under no-load and full-load conditions. • Test equipment accuracy shall be within ±10% of the maximum limiting value of the pass

criteria. Test equipment loads shall never exceed the ranges given in CEC Table 1 under “Measurement Method”. Tests are carried out at 25°C ±5°C.

• It shall have the ability to measure the quiescent current when not receiving a message, which is drawn by a DUT’s CEC line driver, with power completely removed (i.e. while the DUT is not ON or in Standby mode).

• It shall have modifiable bus high and low voltage levels from 0 – 3.7V.

HEACT 4.3.1.2 Recommended Test Equipment • YOKOGAWA DL 1640/F5 Oscilloscope (includes I²C Analyzer option) • ADVANTEST R6552 Digital Multi-Meter • Simplay CEC Explorer SL-309

HEACT 4.3.2 CDC Logical Test Equipment A CDC logical test equipment acts as an HDMI Sink and/or an HDMI Source device for the test configurations detailed in section HEACT 7.

The logical test equipment accepts Capabilities Declaration Form (CDF) values and automatically compiles the suite of tests necessary to certify a particular product model. The logical test equipment then guides the user through all of the test steps in the suite, collects data, and produces a summary report.

For some tests a Digital Oscilloscope is used to measure on the Data Link Layer whether an HDMI Ethernet Channel (HEC) is active or inactive. A HEAC-TPA adapter/board is used to connect the Digital Oscilloscope’s probe to the DUT’s HDMI connector.

For some tests an I²C Analyzer is used to read a DUT’s EDID data in order to detect changes of the incorporated Physical Address.



HEACT 4.3.2.1 Required Test Equipment Capabilities CDC Logical Test Equipment:

• It shall be able to mimic an HDMI device at any Logical Address 0-15. • It shall be capable of sending all CEC and CDC opcodes (both valid and invalid). • It shall be capable of sending and receiving all valid frames defined within the HEAC

specification. Besides, it shall be capable of sending invalid frames, as specified in particular tests in this document.

• It shall be capable of sending and receiving CEC <Abort> and CEC <Feature Abort> messages defined within the CEC specification.

• It shall be capable of measuring the timing of: start bit, data bits (low and high periods), response times to messages, inter-frame gaps and ACK bits. Timing accuracy shall be better than 100µs.

• It shall have programmable timing for start bits (low and high period), data bits and ACK bits.

• It shall be capable of sending a message synchronized with an incoming message or event (e.g. in order to win arbitration over the incoming message).

• It shall be capable of taking over individual bits on the bus when a device is transmitting a message.

• It shall have the ability to emulate both root and non-root devices. • It shall have the ability to simultaneously emulate multiple devices with different physical

addresses by sending and receiving CDC messages that incorporate the appropriate physical addresses.

• It shall be able to send a broadcast message to a DUT and monitor bus activity – recording the number of retry attempts and time delays (in nominal bit times) between retries, while withholding either header or data block ACK as the DUT attempts to respond.

• It shall handle messages from the DUT appropriately in the test sequence. For example, the DUT may send unexpected CEC and/or CDC messages at any time before sending the expected message.

• It shall be capable of changing the Physical Addresses in all its EDID data. • It shall be capable of reading and detecting changes of the EDID data of other devices. In

particular it shall be capable of detecting changes of Physical Addresses. • It shall be capable of setting and detecting high and low levels on the +5V Power line. • It shall be capable of setting and detecting high and low levels on the Hot Plug Detect line.

I²C Analyzer:

• It shall be capable of displaying all elements of an I²C transaction in a manner that allows the operator to determine if the transaction is compliant with the E-DDC protocol.

• It shall be able to be connected to the SDA and SCL signals on an EDID Emulator PCB or TPA fixture.

Digital Oscilloscope:

• With the same capabilities as described in section HEACT 4.2.1.2.

HEAC-TPA adapter/board:


Differential Probe:




HEACT 4.3.2.2 Recommended Test Equipment CDC Logical Test Equipment:

The recommended CDC Logical Test Equipment consists of a Simplay model CEC Explorer SL-309 instrument with a network connection to a host computer running CEC Explorer Application software. The CEC Explorer Application accepts Capabilities Declaration Form (CDF) values and automatically compiles the suite of tests necessary to certify a particular product model. The CEC Explorer Application then guides the user through all of the test steps in the suite, collects data, and produces a summary report.

I²C Analyzer:

Any I²C Analyzer meeting the requirements may be used. One such option is:

• YOKOGAWA DL 1640/F5 Oscilloscope (includes I²C Analyzer option)

Digital Oscilloscope:

• The same recommendations as described in section HEACT 4.2.1.2. HEAC-TPA adapter/board:

• The same recommendations as described in section HEACT 4.2.1.1.

Differential Probe:

• The same recommendations as described in section HEACT 4.2.1.4.



HEACT 4.4 Networking Test Equipment HEACT 4.4.1 Network Testing

HEACT 4.4.1.1 Packet filtering/forwarding In order to connect HEC cable to RJ45 Ethernet cable, N5610A converter is required.

Required Test Equipment Capabilities • It shall be capable of sending and receiving MAC frames according to the 100Base-TX

IEEE 802.3 standard. • It shall be capable of disabling its auto-negotiation functionality. • It shall be capable of counting the number of sending and receiving MAC frames. • It shall have the ability to count only the frame transmitted from the test equipment by using

test payload. • It shall have the ability to measure per traffic stream by using test payload.

Recommended Test Equipment • Agilent N2X

− N2X System Controller (eg. N5543E, N5544C, N5545C) − N2X Portable 2-Slot Chassis (eg. N5540A, N5541A) − N2X Ethernet XR-2 Test Card (eg. N5550B, N5551B) − E7881B Packets and Protocol Application or E7880B Packets Application Software − N5610A HDMI Ethernet Converter − N2X QuickTest Software

• Simplay CEC Explorer SL-309 − Simplay CEC Explorer application Software

• LAN cable − Straight, and any one of CAT5, CAT5e, CAT6, CAT6e, CAT7

HEACT 4.4.1.2 Forwarding of BPDU In order to connect HEC cable to RJ45 Ethernet cable, N5610A converter is required.


IEEE 802.3 standard. • It shall be capable of disabling its auto-negotiation functionality. • It shall be capable of sending and receiving BPDU frame. • It shall have the ability to filter frames and count the source and the destination mac

address at receiving port.







HEACT 4.4.1.3 RSTP functionality In order to connect HEC cable to RJ45 Ethernet cable, N5610A converter is required.


IEEE 802.3 standard. • It shall be capable of disabling its auto-negotiation functionality. • It shall be capable of counting the number of sending and receiving MAC frames. • It shall have the ability to count only the frame transmitted from the test equipment by using

test payload. • It shall have the ability to measure per traffic stream by using test payload. • It shall have the ability to emulate Rapid Spanning Tree Protocol. • It shall have the ability to change the root path cost while RSTP is running. • It shall be able to measure the Spanning Tree Convergence Time. • It shall be able to verify the Spanning tree status information.


− N2X System Controller (eg. N5543E, N5544C, N5545C) − N2X Portable 2-Slot Chassis (eg. N5540A, N5541A) − N2X Ethernet XR-2 Test Card (eg. N5550B, N5551B) − E7881B Packets and Protocol Application − N5580A Spanning Tree Protocol (STP, RSTP & MSTP) Emulation Software − N5610A HDMI Ethernet Converter − N2X QuickTest Software





HEACT 4.4.1.4 Queue Control In order to connect HEC cable to RJ45 Ethernet cable, N5610A converter is required.


IEEE 802.3 standard with tagging according to the IEEE 802.1Q standard. • It shall be capable of disabling its auto-negotiation functionality. • It shall be capable of counting the number of sending and receiving MAC frames. • It shall have the ability to count only the frame transmitted from the test equipment by using

test payload. • It shall have the ability to configure VLAN id and priority of the Ethernet frame. • It shall have the ability to count the number of frame of each VLAN priority.





HEACT 4.4.1.5 Unchanged Priority Tag value In order to connect HEC cable to RJ45 Ethernet cable, N5610A converter is required.


IEEE 802.3 standard with tagging according to the IEEE 802.1Q standard. • It shall be capable of disabling its auto-negotiation functionality. • It shall be capable of counting the number of sending and receiving MAC frames. • I It shall have the ability to count only the frame transmitted from the test equipment by

using test payload. • It shall have the ability to configure VLAN id and priority of the Ethernet frame. • It shall have the ability to count the number of frame of each VLAN priority.



HEACT 5 Electrical Characteristics Test HEACT 5.1 Differential Signal Characteristics Tests All tests in Differential Signal Characteristics tests are performed both at TP1 for the Source DUT and TP2 for the Sink DUT.

Test ID HEACT 5-1: Operating DC Voltage Test

Reference Requirement [HEAC: Table 2-9] HEAC Operating Conditions.

Operating DC Voltage (Veh) : 4.0 Volts ± 10% Differential Mode transmission

Test Objective Confirm that the Operating DC Voltage in Differential Mode on the HEAC +/- lines of the Source/Sink DUT device are within the specified limits.

Required Test Method If CDF field HEC == “N”, then SKIP.

For every HDMI port which supports HEC, perform the following:

1) Connect the HEAC-TPA adapter/board to the Source/Sink DUT HEAC connector. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate the differential pairs of HEAC-TPA adapter/board with an AC coupled 100 Ω

termination resistance. 4) Connect a single-ended probe to the HEAC + line and a second single-ended probe to the

HEAC - line. 5) If testing is for a Sink DUT then

− Connect and set the DC Power Supply to supply +5V between the +5V Power line and the DDC/CEC Ground on the HEAC-TPA adapter/board.

Else if testing is for Source DUT then

− Set the HEAC-TPA adapter/board to use the +5V Power not from the Source DUT but from the DC Power Supply.

− Connect the DC Power Supply to the HEAC-TPA adapter/board, and adjust the DC Power Supply that the measured and calculated mean values of the HEAC+/HEAC- lines are +4V.

6) Activate the HEC transmission on the Source/Sink DUT. 7) Capture 100 or more repetitions, triggered at the center level of the signal. Each capture

must be of duration 500 UI or more. 8) Measure and calculate the mean value of the HEAC + signal line as Veh1 and the mean

value of the HEAC - signal line as Veh2. 9) If (Veh1 < +3.6V) OR (Veh1 > +4.4V) then FAIL. 10) If (Veh2 < +3.6V) OR (Veh2 > +4.4V) then FAIL.



Recommended Test Method– Tektronix DPO70000/B, DSA70000/B, DPO7000 Series

Setup 1. Test ID HEACT 5-1: Operating DC Voltage Test-Tektronix

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix DPO70000/B

Series with options or DSA70000/B Series, DPO7000 Series

HEACT 4.2.1.2 1

2 Single-ended Probes < See reference > HEACT 4.2.1.5 2

3 CEC/CDC Controller < See reference > HEACT4.2.1.12 1

4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA-MAIN with TF-HEAC-TPA-AP, TF-HEAC-TPA-CP or TF-HDMID-TPA-P

HEACT 4.2.1.1 1

5 50Ω SMA Terminators < See reference > HEACT 4.2.1.8 2

6 SMA Cables < See reference > HEACT 4.2.1.9 2

7 DC Power Supply < See reference > HEACT 4.2.1.11 1

8 HDMI Cable < Any > - 1

If CDF field HEC == “N”, then SKIP.


1) Connect the CEC or CDC Controller to the CEC/CDC Control Port on the HEAC-TPA adapter.

2) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter.



4) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe point on the HEAC-TPA adapter, and a second single-ended probe from Ch2 to the HEAC - probe point.

5) If testing is for a Sink DUT then − Set the HEAC-TPA adapter to enable the Sink DUT test.

Else if testing is for a Source DUT then

− Set the HEAC-TPA adapter to enable the Source DUT test, and to use +5V power not from the Source DUT but from the DC Power Supply.

6) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 7) Turn on the power to the Source/Sink DUT. 8) Activate the HEC transmission on the HEAC Source/Sink DUT by using CEC/CDC

controller. 9) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be

used to automate the test sequence.

Recommended Test Method – Agilent DSO80000B, DSO90000A

Setup 2. Test ID HEACT 5-1: Operating DC Voltage Test – Agilent

No. Description Recommended TE Reference Qty1 Digital Oscilloscope Agilent DSO80000B or

AgilentDSO90000A HEACT 4.2.1.2 1

2 Single Ended Probe Agilent 10073C with Agilent E2697A

HEACT 4.2.1.4 2

3 HEAC-TPA adapter/board Agilent 81150AU-EHD with HEAC Test Fixture Plug

HEACT 4.2.1.1 1

4 CEC/CDC Controller <See reference> HEACT 4.2.1.12 1

5 DC Power Supply <See reference> HEACT 4.2.1.11 1



1) Connect 81150AU-EHD HEAC physical test board to Source/Sink DUT through HEAC test fixture plug type.

2) Connect CEC/CDC controller to HEAC physical test board.

Digital Oscilloscope

DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Single Ended Probe

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.

HEAC Physical Test Board

HEAC Test Fixture Plug

DC Power Supply

Single Ended Probe



3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect first 10073C probe to HEAC+ pin and second 10073C probe head to HEAC- pin

on HEAC physical test board. 5) If testing is for a Sink DUT Then

− connect jumper pin to position of “DUT=sink” on HEAC physical test board,

Else

− Connect jumper pin to position of “DUT=source” on HEAC physical test board. − Set +4V bias of HEAC + / HEAC - lines not from Source DUT but from DC power

supply. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate HEC transmission on Source/Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be

used to automate test sequence.

Test ID HEACT 5-2: Jitter Max Test

Reference Requirement [HEAC: Table 2-11] Differential Transmission Characteristics at TP1 and TP2.

Jitter Max : 1.4ns.

Test Objective Confirm the output jitter of the differential signal from the HEAC Source/Sink DUT is within the specified limit.



1) Connect the HEAC-TPA adapter/board to the Source/Sink DUT HEAC connector. 2) Connect the CEC/CDC Controller to the HEAC-TPA adapter/board. 3) Terminate the differential pairs of HEAC-TPA adapter/board with an AC coupled 100Ω

termination resistance. 4) Connect a differential probe to HEAC +/- lines at the termination resistance (Redt). 5) If testing is for a Sink DUT then



− Activate +4V bias by using the +5V Power from the Source DUT. 6) Activate the HEC transmission on the Source/Sink DUT.

7) Capture the waveform to measure the maximum jitter with ≥ 10GSa/s sampling rate, and ≥ 100 µs duration which enables 4,000 or more edges for jitter measurement.

8) Measure the peak-to-peak jitter value at the cross points of the positive as JITmax1 and negative pulses as JITmax2 by using the clock recovery with First-Order PLL of 75kHz BW.

9) If (JITmax1 > 1.4ns) then FAIL. 10) If (JITmax2 > 1.4ns) then FAIL.



Recommended Test Method – Tektronix DPO70000/B, DSA70000/B, DPO7000 Series

Setup 3. Test ID HEACT 5-2: Jitter Max Test-Tektronix


Series with options or DSA70000/B Series, or DPO7000 Series

HEACT 4.2.1.2 1

2 Differential Probe < See reference > HEACT 4.2.1.4 1

3 CEC/CDC Controller < See reference > HEACT 4.2.1.12 1


HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter. 4) Connect a differential probe to the HEAC +/- differential signal probe point on the

HEAC-TPA adapter.



5) If testing is for a Sink DUT then − Set the HEAC-TPA adapter to enable the Sink DUT test. − Connect and setup the DC Power Supply to supply +5V between the +5V Power line

and the DDC/CEC Ground on the HEAC-TPA adapter.


− Set the HEAC-TPA adapter to enable the Source DUT test. − Activate +4V bias by using the +5V Power from the Source DUT.

6) Activate the HEC transmission on the HEAC Source/Sink DUT by using CEC/CDC controller.

7) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be used to automate the test sequence.


Setup 4. Test ID HEACT 5-2: Jitter Max Test – Agilent

No. Description Recommended TE Reference Qty.1 Digital Oscilloscope Agilent DSO80000B or


2 Differential Probe Agilent 1169A or 1168A with Agilent E2678A

HEACT 4.2.1.4 1


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances.


DUT

CEC/CDC Controller

HEAC+

HEAC-

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply

HEAC+

HEAC-

differential test point



4) Connect E2678A differential socket probe head to HEAC +/- differential test point on HEAC physical test board.

5) If testing is for a Sink DUT Then − Connect jumper pin to position of “DUT=sink” on HEAC physical test board.

Else

− Connect jumper pin to position of “DUT=source” on HEAC physical test board. − Set +4V bias of HEAC+/HEAC- lines from +5V power of Source DUT.

6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate HEC transmission on Source/Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-3: Rise Time/Fall Time Test


Rise time of positive pulses signal : 3.0ns < Tr < 5.0ns Fall time of positive pulses signal : 3.0ns < Tf < 5.0ns Rise time of negative pulses signal : 3.0ns < Tr < 5.0ns Fall time of negative pulses signal : 3.0ns < Tf < 5.0ns

Test Objective Confirm the Rise/Fall time of the output signal from the HEAC Source/Sink DUT is within the specified limits.



1) Connect the HEAC-TPA adapter/board to the Source/Sink DUT HEAC connector. 2) Connect the CEC/CDC Controller to the HEAC-TPA adapter/board. 3) Terminate the differential pairs of HEAC-TPA adapter/board with an AC coupled 100 Ω

termination resistance. 4) Connect a differential probe to HEAC +/- lines at the termination resistance (Redt). 5) If testing is for a Sink DUT then

− Connect and setup the DC Power Supply to supply +5V between the +5V Power line and the DDC/CEC Ground on the HEAC-TPA adapter/board.


− Activate +4V bias by using the +5V Power from the Source DUT. 6) Activate the HEC transmission on the Source/Sink DUT. 7) Capture 100 or more repetitions, measure each edge during a waveform which has the

signal voltage stable for 5 consecutive UI before and 5 consecutive UI after the edge for the positive pulses on the MLT-3 signal. Each capture must be of duration 25 UI or more with sampling rate ≥ 10GSa/s.

8) Measure and calculate the average of Rise times of the positive pulses on the MLT-3 signals as Tr and the Fall times as Tf.

9) If (Tr < 3.0ns) OR (Tr > 5.0ns) then FAIL. 10) If (Tf < 3.0 ns) OR (Tf > 5.0 ns) then FAIL. 11) Repeat the above measurements for the negative pulses on the MLT-3 signals.




Setup 5. Test ID HEACT 5-3: Rise Time/Fall Time Test-Tektronix



HEACT 4.2.1.2 1



4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA–MAIN with TF-HEAC-TPA-AP, TF-HEAC-TPA-CP or TF-HDMID-TPA-P

HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Set the termination impedance of the adapter to 50Ω.



5) Connect a differential probe to the HEAC+/- differential signal probe point on the HEAC-TPA adapter.

6) If testing is for a Sink DUT then − Set the HEAC-TPA adapter to enable the Sink DUT test. − Connect and set the DC Power Supply to supply +5V between the +5V Power line







Setup 6. Test ID HEACT 5-3: Rise Time/Fall Time Test – Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board.


DUT

CEC/CDC Controller

HEAC+

HEAC-

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply

HEAC+

HEAC-




3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect E2678A differential socket probe head to HEAC+/- differential test point on HEAC

physical test board. 5) If testing is for a Sink DUT then

− Connect jumper pin to position of “DUT=sink” on HEAC physical test board.

Else




Test ID HEACT 5-4: High/Low/Center Level Voltage Test

Reference Requirement [HEAC : Table 2-11] Differential Transmission Characteristics at TP1 and TP2.

High Level Voltage (Vep): 0.2 Volts ± 10% Low Level Voltage (Vem): -0.2 Volts ± 10% Center Level Voltage (Vec): 0 Volts ± 20mV

Test Objective Confirm the High/Low/Center Level voltages of output signal from the HEAC Source/Sink DUT are within the specified limits.




termination resistance. 4) Connect a differential probe to the HEAC +/- lines at the termination resistance (Redt). 5) If testing is for a Sink DUT then

− Connect and setup the DC Power Supply to supply +5V between the +5V Power line and the DDC/CEC Ground on the HEAC-TPA adapter/board.


− Activate +4V bias by using the +5V Power from the Source DUT. 6) Activate the HEC transmission on the HEAC Source/Sink DUT. 7) Capture 100 or more repetitions, trigger and measure for each level during a waveform

which has the signal voltage stable at that level for minimum 10 consecutive UI with 8 UI measurement gate of MLT-3 signal. Each capture must be of duration 25 UI or so.

8) Read the measured value as the most common high level voltage (Vep). 9) If (Vep < +180mV) OR (Vep > +220mv) then FAIL. 10) Read the measured value as the most common low level voltage (Vem). 11) If (Vem < -220mv) OR (Vem > -180mV) then FAIL.



12) Read the measured value as the most common center level voltage (Vec). 13) If (Vec < -20mV) OR (Vec > +20mV) then FAIL.


Setup 7. Test ID HEACT 5-4: High/Low/Center Level Voltage Test-Tektronix



HEACT 4.2.1.2 1



4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA-MAIN with TF-TPA-TPA-AP, TF-HEAC-TPA-CP or TF-HDMID-TPA-P

HEACT 4.2.1.1 1










2) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Connect a differential probe to the HEAC +/- differential signal probe point on the

HEAC-TPA adapter. 5) If testing is for a Sink DUT then

− Connect and set the DC Power Supply to supply +5V between the +5V Power line and the DDC/CEC Ground on the HEAC-TPA adapter.


− Activate +4V bias by using the +5V Power from the Source DUT. 6) Activate the HEC transmission of the HEAC Source/Sink DUT by using CEC/CDC




Setup 8. Test ID HEACT 5-4: High/Low/Center Level Voltage Test – Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1




DUT

CEC/CDC Controller

HEAC+

HEAC-

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply

HEAC+

HEAC-







2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect E2678A differential socket probe head to HEAC +/- differential test point on

HEAC physical test board. 5) If testing is for a Sink DUT then


Else




Test ID HEACT 5-5: Cycle Time Test


Cycle Time: 8ns ± 0.125ns

Test Objective Confirm that cycle time of output signal from the HEAC Source/Sink DUT is within the specified limit.

Required Test Method 4 UI

HEACT Figure 5-1 Waveform for testing Cycle Time




termination resistance. 4) Connect a differential probe to the HEAC +/- lines at the termination resistance (Redt).



5) If testing is for a Sink DUT then



− Activate +4V bias by using the +5V Power from the Source DUT. 6) Activate the HEC transmission on the HEAC Source/Sink DUT. 7) Capture 100 or more repetitions, trigger and measure the cycle time as the average value

measured across 4 UI using the maximum transition waveform switching through all MLT-3 levels (binary representation of consecutive 1s) as shown in the figure. Each capture must be of duration 25 UI or more.

8) Measure the time period between two adjacent positive peaks and the measured time period divided by 4 is the Cycle time.

9) If (Cycle time < 7.875ns) OR (Cycle time > 8.125ns) then FAIL. 10) Measure the time period between two adjacent negative peaks and the measured time

period divided by 4 is the Cycle time. 11) If (Cycle time < 7.875ns) OR (Cycle time > 8.125ns) then FAIL.


Setup 9. Test ID HEACT 5-5: Cycle Time Test-Tektronix




Series with options or DSA70000/B Series

HEACT 4.2.1.2 1



4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA-MAIN with TF-HEAC-TPA-AP, TF-HEAC-TPA-CP, or TF-HDMID-TPA-P

HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter. 4) Connect a differential probe to the HEAC +/- differential signal probe point on the

HEAC-TPA adapter. 5) If testing is for a Sink DUT then

− Set the HEAC-TPA adapter to enable the Sink DUT test. − Connect and set the DC Power Supply to supply +5V between the +5V Power line




6) Activate the HEC transmission for the HEAC Source/Sink DUT by using CEC/CDC controller.





Setup 10. Test ID HEACT 5-5: Cycle Time Test – Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect E2678A differential socket probe head to HEAC +/- differential test point on

HEAC physical test board. 5) If testing is for a Sink DUT Then


Else

− Connect jumper pin to position of “DUT=source” on HEAC physical test board. − Set +4V bias of HEAC + / HEAC - lines from +5V power of Source DUT.




DUT

CEC/CDC Controller

HEAC+

HEAC-

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply

HEAC+

HEAC-




HEACT 5.2 Common Mode Signal Characteristics Tests All tests in Common Mode Signal Characteristics Tests are performed only at TP2 for the Sink DUT.



Operating DC Voltage (Veh) : 4.0 Volts ± 10% common mode transmission.

Test Objective Confirm that the Operating DC Voltage in common mode on the HEAC+/- lines is within the specified limit.

Required Test Method If CDF field ARC_TX_common == “N”, then SKIP.

For each HDMI input port which supports common mode ARC on DUT, perform the following:

1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate each HEAC+/- lines of the HEAC-TPA adapter/board with an AC coupled 50 Ω

termination resistance. 4) Connect a single-ended probe of the Digital Oscilloscope to the HEAC + line and a second

single-ended probe of the Digital Oscilloscope to the HEAC - line. 5) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (common mode) transmission on the Sink DUT. 7) Capture both signals simultaneously for 100 or more repetitions, triggered at the center

level of the signal. Each capture must be of duration 500 UI or more. 8) Measure and calculate the overall average value of the HEAC + signal as Veh1 and the

overall average value of HEAC - signal as Veh2. 9) If (Veh1 < +3.6V) OR (Veh1 > +4.4V) then FAIL. 10) If (Veh2 < +3.6V) OR (Veh2 > +4.4V) then FAIL.







HEACT 4.2.1.2 1




HEACT 4.2.1.1 1





If CDF field ARC_TX_common == “N”, then SKIP.


1) Connect the CEC/CDC Controller to the CEC/CDC Control Port on the HEAC-TPA adapter.

2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter.



4) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe point on the HEAC-TPA adapter, and a second single-ended probe from Ch2 to the HEAC - probe point.

5) Set the HEAC-TPA adapter to enable the Sink DUT test. 6) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 7) Turn on the power to the Sink DUT. 8) Activate the ARC (common mode) transmission on the HEAC Sink DUT by using

CEC/CDC controller. 9) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be







HEACT 4.2.1.4 2


HEACT 4.2.1.1 1





1) Connect 81150AU-EHD HEAC physical test board to Sink DUT through HEAC test fixture plug type.

2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect first 10073C probe to HEAC + pin and second 10073C probe to HEAC - pin on

HEAC physical test board.


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Single Ended Probe

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply

Single Ended Probe



5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (common mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-7: High/Low Level Voltage Test

Reference Requirement [HEAC: Table 2-12] HEAC Common Mode Transmission Characteristics at TP2.

High level voltage (+Vei-swing) : +0.2 Volts ± 20% Low level voltage (-Vei-swing) : −0.2 Volts ± 20%

Test Objective Confirm that the High/Low level voltage of output signal from the Sink DUT is within the specified limits.


HEACT Figure 5-2 High/Low Level Measurement



1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate each HEAC +/- lines of the HEAC-TPA adapter/board with an AC coupled 50Ω



DDC/CEC Ground on the HEAC-TPA adapter/board.

CH1

CH2

M1

Vo = overall average

V+

V-

Ground

All laid up from ground by approx. 4V.



6) Activate the ARC (common mode) transmission on the Sink DUT. 7) Capture both signals simultaneously for 100 or more repetitions, triggered at the center

level of signal swing level. Each capture must be of duration 500 UI or more. 8) Calculate the mean of the two acquired waveforms as M1. 9) Calculate the overall average value of M1 as Vo. 10) Measure the high and low levels.

+Vei-swing = High level of (M1 – Vo) -Vei-swing - = Low level of (M1 – Vo)

11) If (+Vei-swing < +160mV) OR (+Vei-swing > +240mV) then FAIL. 12) If (-Vei-swing < -240mV) OR (-Vei-swing > -160mV) then FAIL.


Setup 13. Test ID HEACT 5-7: High/Low Level Voltage Test-Tektronix




1 Digital Oscilloscope Tektronix DPO70000/B Series with options or DSA70000/B Series, DPO7000 Series

HEACT 4.2.1.2 1




HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter, and a second single-ended probe from Ch2 to the HEAC - probe point.

5) Set the HEAC-TPA adapter to enable the Sink DUT test. 6) Connect and set DC Power Supply to supply +5V to the HEAC-TPA adapter. 7) Turn on the power to the Sink DUT. 8) Activate the ARC (common mode) transmission on the HEAC Sink DUT by using






Setup 14. Test ID HEACT 5-7: High/Low Level Voltage Test – Agilent



2 Single Ended Probe Agilent 1169A or 1168A with Agilent E2678A

HEACT 4.2.1.4 2


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 50Ω termination resistances. 4) Connect first E2678A socket probe head to HEAC + pin and second E2678A socket probe

head to HEAC - pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (common mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be



DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.

Socket Probe Head



DC Power Supply



Test ID HEACT 5-8: Rise/Fall Time Test

Reference Requirement [HEAC: Table 2-12] HEAC Common Mode Transmission Characteristics at TP2.

Rise time (Tr) / Fall time (Tf), when accompanying with MLT-3 signals: Min 10ns, Max 60ns. Rise time (Tr) / Fall time (Tf), when accompanying without MLT-3 signals: Max 60ns.

Test Objective Confirm that the Rise/Fall times of the output signal from the Sink DUT are within the specified limits.



1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 4) Connect a single-ended probe of the Digital Oscilloscope to the HEAC + line and a second


DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (common mode) transmission on the Sink DUT. 7) Capture both signals simultaneously for 100 or more repetitions, triggered at the center

level of the Low-to-High transition of signal. Each capture must be of duration 5 UI or more.

8) Calculate the mean of the two acquired waveforms as M1. 9) Calculate the average M1 Rise time as Tr. 10) If (Tr > 60ns) then FAIL. 11) Capture both signals simultaneously for 100 or more repetitions, triggered at the center

level of the High-to-Low transition of signal. Each capture must be of duration 5 UI or more.

12) Calculate the mean of the two acquired waveforms as M1. 13) Calculate the average M1 Fall time as Tf. 14) If (Tf > 60ns) then FAIL.

• If CDF field HEC == “N”, then SKIP.

14.1) Activate the HEC and ARC (common mode) transmission on the Sink DUT.

14.2) Capture both signals simultaneously for 100 or more repetitions, triggered at the center level of the Low-to-High transition of signal. Each capture must be of duration 5 UI or more.

14.3) Calculate the mean of the two acquired waveforms as M1.

14.4) Calculate the average M1 Rise time as Tr.

14.5) If (Tr < 10ns) OR (Tr > 60ns) then FAIL.

14.6) Capture both signals simultaneously for 100 or more repetitions, triggered at the center level of the High-to-Low transition of signal. Each capture must be of duration 5 UI or more.



14.7) Calculate the mean of the two acquired waveforms as M1.

14.8) Calculate the average M1 Fall time as Tf.

14.9) If (Tf < 10ns) OR (Tf > 60ns) then FAIL.


Setup 15. Test ID HEACT 5-8: Rise/Fall Time Test-Tektronix



HEACT 4.2.1.2 1




HEACT 4.2.1.1 1











point on the HEAC-TPA adapter, and a second single-ended probe from Ch2 to HEAC - probe point.



used to automate the test sequence. • If CDF field HEC == “N”, then SKIP the folowing mesurement steps.

9.1) Activate the HEC and ARC (common mode) transmission on the HEAC Sink DUT by using CEC/CDC controller.

9.2) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be used to automate the test sequence.


Setup 16. Test ID HEACT 5-8: Rise/Fall Time Test – Agilent


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.

Socket Probe Head



DC Power Supply






HEACT 4.2.1.4 2


HEACT 4.2.1.1 1








used to automate test sequence. 9) Activate HEC and ARC (common mode) transmission on Sink DUT by using CEC/CDC

controller. 10) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-9: Jitter Max/Clock Frequency Test

Reference Requirement [HEAC : Table 2-12] HEAC Common Mode Transmission Characteristics at TP2.

Clock frequency : 6.144MHz ±0.1%, 5.6488MHz ±0.1% or 4.096MHz±0.1%

[IEC 60958-1: 7.1.3.2.5] Intrinsic jitter

Jitter Max : 0.05UI

Test Objective Confirm that the output jitter and Clock frequency from the Sink DUT are within the specified limits.




If all of CDF fields ARC_TX_frequency == “N”, then FAIL “ARC_TX support frequency empty”.


1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate each HEAC+/- lines of the HEAC-TPA adapter/board with an AC coupled 50Ω



DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (common mode) transmission on the Sink DUT. For each Clock frequency of CDF field ARC_TX_frequency == “Y”:

• 6.144 MHz • 5.6488 MHz • 4.096 MHz

Perform following steps:

7) Invoke the DUT to transmit the ARC signal at the Clock frequency. (See CDF) 8) Capture both signals simultaneously to measure the maximum jitter with ≥ 20ms duration

and ≥ 250MSa/s sampling rate. 9) Calculate the mean value of the two acquired waveforms as the M1. 10) Apply the Jitter Analysis Tool on this signal to obtain:

− Data Jitter (with Time Trend plot) − Data Frequency

11) For proper clock recovery, the nominal Clock frequency input and First-Order PLL of 700Hz BW is needed.

12) Read the peak-to-peak jitter value as the Jitter Max, and mean value in “Frequency Result” as the Clock frequency of the common mode signal.

13) If Clock frequency == “6.144MHz” then

13.1) If (Jitter Max > 8.1ns) then FAIL.

13.2) If (Clock frequency < 6.138MHz) OR (Clock frequency > 6.150MHz) then FAIL.










Setup 17. Test ID HEACT 5-9: Jitter Max/Clock Frequency Test-Tektronix



HEACT 4.2.1.2 1



4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA-MAIN with TF-HEAC-TPA-AP, TF=HEAC-TPA-CP or TF-HDMID-TPA-P

HEACT 4.2.1.1 1

5 50 Ω SMA Terminators < See reference > HEACT 4.2.1.8 2










2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Connect first a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC +

probing probe point on the HEAC-TPA adapter and, a second single-ended probe from Ch2 to the HEAC - probe point.





Setup 18. Test ID HEACT 5-9: Jitter Max/Clock Frequency Test – Agilent




HEACT 4.2.1.4 2


HEACT 4.2.1.1 1




DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.

Socket Probe Head



DC Power Supply









used to automate test sequence. 9) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test

Reference Requirement [HEAC: 4.2] The interface format of the Audio Return Channel is

defined in IEC 60958-1. This IEC 60958-1 stream also shall comply with IEC 60958-3 or IEC 61937 specifications.

[IEC 60958-1: 4.1, 4.2,4.3, and 5.3]

<See reference for details.> Clause 5.3 Byte 0 Bit 0 “0” Consumer use of channel status block

Test Objective Confirm that IEC 60958-1 stream from the Sink DUT is transmitted correctly.



1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate each HEAC +/- lines of the HEAC-TPA adapter/board with an AC coupled 50Ω


single-ended probe of the Digital Oscilloscope to HEAC - line. 5) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (common mode) transmission on the Sink DUT.



7) Capture both signals simultaneously to measure the maximum jitter with ≥ 20ms duration and ≥ 100MSa/s sampling rate.

8) Calculate the mean of the two acquired waveforms. 9) Execute the “SPDIF Analysis Software” for this waveform on the Digital Oscilloscope. 10) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then

FAIL. − Clause 4.1 − Clause 4.2 − Clause 4.3 − Clause 5.3 Consumer use

11) Turn +5V power to the +5V Power line off. 12) Perform the above measurement steps 7), 8) and 9). 13) If any protocol violation with respect to the following in IEC 60958-1 occurs, then FAIL.

− Clause 4.2 14) Turn +5V power to the +5V Power line on and then perform the test procedures in CEC

TEST 11.1.17-5. 15) Perform the above measurement steps 7), 8) and 9). 16) If any protocol violation with respect to the following in IEC 60958-1 occurs, then FAIL.

− Clause 4.2


Setup 19. Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test-Tektronix





HEACT 4.2.1.2 1




HEACT 4.2.1.1 1









point on the HEAC-TPA adapter and, a second single-ended probe from Ch2 to the HEAC - probe point.


CEC/CDC controller. 9) Set the Digital Oscilloscope to default and then perform the following setup. 10) Capture the waveforms and run the “SPDIF Analysis Software” on the Digital

Oscilloscope. 11) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then

FAIL. − Clause 4.1 − Clause 4.2 − Clause 4.3 − Clause and 5.3 Consumer use

12) Turn +5V power to the +5V Power line off. 13) Capture the waveforms and run the “SPDIF Analysis Software” on the Digital

Oscilloscope. 14) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then

FAIL. − Clause 4.2



15) Turn +5V power to the +5V Power line on and then perform the test procedures in CEC TEST 11.1.17-5.

16) Capture the waveforms and run the “SPDIF Analysis Software” on the Digital Oscilloscope.

17) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then FAIL.

− Clause 4.2


Setup 20. Test ID HEACT 5-10: IEC 60958-1 Stream Verification Test - Agilent




HEACT 4.2.1.4 2


HEACT 4.2.1.1 1







head to HEAC - pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (common mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup.


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.

Socket Probe Head



DC Power Supply



HEACT 5.3 Single Mode Signal Characteristics Tests All tests in Single Mode Signal Characteristics Tests are performed only at TP2 for the Sink DUT.

The single mode transmission case shall not be transmitted simultaneously with differential mode transmission.



Operating DC Voltage (Vel) : 0 ≤ Vel ≤ +5.0 Volts single mode transmission

Test Objective Confirm that the Operating DC Voltage in single mode on the HEAC + line is within the specified limit.

Required Test Method If CDF field ARC_TX_single == “N”, then SKIP.

For each HDMI input port which supports single mode ARC on DUT, perform the following:

1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate HEAC+ line of the HEAC-TPA adapter/board with an AC coupled 55Ω

termination resistance. 4) Connect a single-ended probe of the Digital Oscilloscope to the HEAC + line. 5) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (single mode) transmission on the Sink DUT. 7) Capture HEAC + signal 100 or more repetitions, triggered at the center level of the signal.

Each capture must be of duration 500 UI or more. 8) Measure and calculate the overall average value of the HEAC + signal as Vel. 9) If (Vel < 0V) OR (Vel > + 5V) then FAIL.







HEACT 4.2.1.2 1

2 Single-ended Probe < See reference > HEACT 4.2.1.5 1



HEACT 4.2.1.1 1


6 SMA Cable < See reference > HEACT 4.2.1.9 2





If CDF field ARC_TX_single == “N”, then SKIP.



2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter. 6) Set the HEAC-TPA adapter to enable the Sink DUT test. 7) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 8) Turn on the power to the Sink DUT. 9) Activate the ARC (single mode) transmission on the HEAC Sink DUT by using CEC/CDC








HEACT 4.2.1.4 1


HEACT 4.2.1.1 1




DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Single Ended Probe

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 55Ω termination resistance. 4) Connect 10073C probe to HEAC + pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (single mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-12: Signal Amplitude Test

Reference Requirement [HEAC : Table 2-14] HEAC Single Mode Transmission Characteristics at TP2.

Signal amplitude (Vel swing) : 0.5 Volts ± 0.1 Volts

Test Objective Confirm that the signal amplitude of output signal from the Sink DUT is within the specified limits.


HEACT Figure 5-3 Signal Amplitude measurement

CH1

Vel swing

Ground

All laid up from ground by approx. 0 ~ +5V.





1) Connect the HEAC-TPA adapter/board to the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate HEAC + line of the HEAC-TPA adapter/board with an AC coupled 55Ω

termination resistance. 4) Connect a single-ended probe of the Digital Oscilloscope to HEAC + line. 5) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (single mode) transmission on the Sink DUT. 7) Capture 100 or more repetitions, triggered at the center level of signal swing level. Each

capture must be of duration 500 UI or more. 8) Measure the average signal amplitude as Vel swing. 9) If (Vel swing < +0.4V) OR (Vel swing > + 0.6V) then FAIL.


Setup 23. Test ID HEACT 5-12: Signal Amplitude Test-Tektronix





HEACT 4.2.1.2 1




HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω SMA Terminators to the HEAC-TPA adapter. 4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter. 6) Set the HEAC-TPA adapter to enable the Sink DUT test. 7) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter. 8) Turn on the power to the Sink DUT. 9) Activate the ARC (single mode) transmission on the HEAC Sink DUT by using CEC/CDC






Setup 24. Test ID HEACT 5-12: Signal Amplitude Test - Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1




For each HDMI input port which supports single mode ARC on DUT, perform the following


2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 55Ω termination resistance. 4) Connect E2678A socket probe head to HEAC+ pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (single mode) transmission on Sink DUT by using CEC/CDC controller.

Perform the Required Test Method with this setup. Agilent automation software may be used to automate test sequence.


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply



Test ID HEACT 5-13: Rise/Fall Time Test

Reference Requirement [HEAC: Table 2-14] HEAC Single Mode Transmission Characteristics at TP2.

Rise time (Tr) / Fall time (Tf) : Max 60ns.

Test Objective Confirm that the Rise/Fall time of output signal from the Sink DUT are within the specified limits.



1) Connect the HEAC-TPA to the HDMI input of the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate HEAC + line of the HEAC-TPA adapter/board with an AC coupled 55Ω


DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (single mode) transmission on the Sink DUT. 7) Capture 100 or more repetitions, triggered at the center level of the Low-to-High transition

of signal. Each capture must be of duration 5 UI or more. 8) Calculate the average Ch1 Rise time as Tr. 9) If (Tr > 60ns) then FAIL. 10) Capture 100 or more repetitions, triggered at the center level of the High-to-Low transition

of IEC 60958-1 signal. Each capture must be of duration 5 UI or more. 11) Calculate the average Ch1 Fall time as Tf. 12) If (Tf > 60ns) then FAIL.




Setup 25. Test ID HEACT 5-13: Rise/Fall Time Test-Tektronix



HEACT 4.2.1.2 1




HEACT 4.2.1.1 1








2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter.



4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe



used to automate the test sequence. .


Setup 26. Test ID HEACT 5-13: Rise/Fall Time Test - Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 55 Ω termination resistance. 4) Connect E2678A socket probe head to HEAC + pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V.


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply



7) Activate ARC (single mode) transmission on Sink DUT by using CEC/CDC controller. Perform the Required Test Method with this setup. Agilent automation software may be used to automate test sequence.

Test ID HEACT 5-14: Jitter Max/Clock Frequency Test

Reference Requirement [HEAC: Table 2-14] HEAC Single Mode Transmission Characteristics at TP2.

Clock frequency : 6.144MHz ±0.1%, 5.6488MHz ±0.1% or 4.096MHz±0.1%

[IEC 60958-1: 7.1.3.2.5] Intrinsic jitter

Jitter Max : 0.05UI

Test Objective Confirm that the output jitter and Clock frequency at the Sink DUT are within the specified limits.




1) Connect the HEAC-TPA adapter/board to the HDMI input of the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate HEAC+ line of the HEAC-TPA adapter/board with an AC coupled 55Ω


DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (single mode) transmission on the Sink DUT. For each Clock frequency of CDF field ARC_TX_frequency:

• 6.144 MHz • 5.6488 MHz • 4.096 MHz


7) Invoke the DUT to transmit the ARC signal at the Clock frequency. (See CDF) 8) Capture signal to measure the maximum jitter with ≥ 20 ms duration and ≥ 250MSa/s

sampling rate.

8.1) Apply the Jitter Analysis Tool on this signal to obtain:


8.2) For proper clock recovery, the nominal Clock frequency input and First-Order PLL of 700Hz BW is needed.

9) Read the peak-to-peak jitter value as the Jitter Max, and Mean value in “Frequency Result” as the Clock frequency of the common mode signal.













Setup 27. Test ID HEACT 5-14: Jitter Max/Clock Frequency Test-Tektronix





HEACT 4.2.1.2 1




HEACT 4.2.1.1 1









2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter. 4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter. 6) Set the HEAC-TPA adapter to enable the Sink DUT test. 7) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 8) Turn on the power to the Sink DUT. 9) Activate the ARC (single mode) transmission on the HEAC Sink DUT. For each Clock frequency of CDF field ARC_TX_frequency:

• 6.144 MHz • 5.6488 MHz • 4.096 MHz


10) Invoke the DUT to transmit the ARC signal at the Clock frequency. (See CDF) 11) Capture the waveform to measure the maximum jitter with ≥ 20 ms duration and ≥ 1GSa/s

sampling rate.

11.1) Apply the Jitter Analysis Tool on this signal to obtain:


11.2) For proper clock recovery, the nominal Clock frequency input and First-Order PLL of 700Hz BW is needed.



12) Read the peak-to-peak jitter value as the Jitter Max, and Mean value in “Frequency Result” as the Clock frequency of the common mode signal.











Setup 28. Test ID HEACT 5-14: Jitter Max/Clock Frequency Test - Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1



If CDF field ARC_TX_single == “N”, then SKIP test.




DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply




2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 55Ω termination resistance. 4) Connect E2678A socket probe head to HEAC + pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (single mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Agilent automation software may be


Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test

Reference Requirement [HEAC 4.2] The interface format of the Audio Return Channel is

defined in IEC 60958-1 stream also shall comply with IEC 60958-3 or IEC 61937 specification.

[IEC 60958-1: 4.1, 4.2, 4.3, and 5.3]

<See reference for details.> Clause 5.3 Byte 0 Bit 0 “0” Consumer use of channel status block.

Test Objective Confirm the IEC 60958-1 stream from the Sink DUT is transmitted correctly.



1) Connect the HEAC-TPA adapter/board to the HDMI input of the Sink DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Terminate HEAC+ line of the HEAC-TPA adapter/board with an AC coupled 55Ω

termination resistance. 4) Connect a single-ended probe of the Digital Oscilloscope to HEAC + line. 5) Connect and set the DC Power Supply to supply +5V between the +5V Power line and the

DDC/CEC Ground on the HEAC-TPA adapter/board. 6) Activate the ARC (single mode) transmission on the Sink DUT. 7) Capture signal to measure the maximum jitter with ≥ 20 ms duration and ≥ 100Msa/a

sampling rate. 8) Execute the “SPDIF Analysis Software” on the Digital Oscilloscope. 9) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then




10) Turn +5V power to the +5V Power line off. 11) Perform the above measurement steps 7) and 8). 12) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then



14) Perform the above measurement steps 7) and 8). 15) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then



Setup 29. Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test-Tektronix





HEACT 4.2.1.2 1


3 CEC Controller < See reference > HEACT 4.2.1.12 1


HEACT 4.2.1.1 1







1) Connect the CEC Controller to the CEC/CDC Control Port on the HEAC-TPA adapter. 2) Connect the HEAC-TPA adapter to the HEAC connector on the Sink DUT. 3) Connect 50Ω Terminators to the HEAC-TPA adapter. 4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe


controller. 10) Set the Digital Oscilloscope to default and then perform the following setup. 11) Capture the waveform and run the “SPDIF Analysis Software” on the Digital Oscilloscope. 12) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then


13) Turn +5V power to +5V Power line off. 14) Capture the waveform and run the “SPDIF Analysis Software” on the Digital Oscilloscope. 15) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then





17) Capture the waveform and run the “SPDIF Analysis Software” on the Digital Oscilloscope. 18) If any protocol violation with respect to the following clauses in IEC 60958-1 occurs, then



Setup 30. Test ID HEACT 5-15: IEC 60958-1 Stream Verification Test - Agilent




HEACT 4.2.1.4 1


HEACT 4.2.1.1 1






2) Connect CEC/CDC controller to HEAC physical test board. 3) Terminate HEAC physical test board with AC coupled 55Ω termination resistance. 4) Connect E2678A socket probe head to HEAC+ pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=sink” on HEAC physical test board. 6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC (single mode) transmission on Sink DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup.


DUT

CEC/CDC Controller

HEAC+ HEAC- GND

GND

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.



DC Power Supply



HEACT 5.4 Receiver Performance Tests The following tests are included in this section.

• Differential Signal Receiver Performance tests for the Source/Sink DUT.

• Common Mode Signal Receiver Performance tests for the Source DUT.

• Single Mode Signal Receiver Performance tests for the Source DUT.

• Common Mode Operating DC Voltage tests for the Source DUT.

• Single Mode Operating DC Voltage tests for the Source DUT.

Test ID HEACT 5-16 : Differential Signal Receiver Performance Test

Reference Requirement [HEAC 2.5 : Table 2-11] Differential Transmission Characteristics at TP1 and TP2.

High level voltage, Vep : 0.2V±10% Low level voltage, Vem: 0.2V±10% Clock frequency : 125MHz+0.005% 125MHz-0.005% Common mode Signal Disturbance:

With Common mode : 0.4V+20%@ 6.144MHz Cable degradation:

With worst cable degradation (attenuation) Tolerance for output impedance variation of signal source: 100 Ω±10%

Test Objective Confirm that the differential signal receiver of the HEAC Source/Sink DUT is performed correctly within the specified Clock frequency deviation and amplitude deviation. Also confirm the common mode signal disturbance and the tolerance for output impedance variation of the signal source.


If CDF field Ethernet_ARP == “N”, then SKIP.


1) Connect the HEAC-TPA adapter/board to the Source/Sink DUT HEAC connector. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect a waveform generator to the HEAC-TPA adapter/board. 4) Connect a differential probe to the HEAC+/- lines on the HEAC-TPA adapter/board. 5) If testing is for a Sink DUT then


Else if testing for a Source DUT then

− Activate +4V bias by using the +5V Power from the Source DUT.



6) Activate the HEC transmission on the HEAC Source/Sink DUT. 7) Load the waveform data on a waveform generator for High level voltage test, and generate

it. 8) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 9) If the correct Ethernet packet data is not received, then FAIL. 10) Load the waveform data on a waveform generator for Low level voltage test, and generate

it. 11) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 12) If the correct Ethernet packet data is not received, then FAIL. 13) Load the waveform data on a waveform generator for Clock frequency variation test, and

generate it. 14) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 15) If the correct Ethernet packet data is not received, then FAIL. 16) Load the waveform data on a waveform generator for Cable degradation test, and

generate it. 17) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 18) If the correct Ethernet packet data is not received, then FAIL. 19) Load the nominal waveform data on a waveform generator, and generate it. 20) Set the output impedance of signal source to 110Ω. 21) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 22) If the correct Ethernet packet data is not received, then FAIL. 23) Set the output impedance of signal source to 90Ω. 24) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 25) If the correct Ethernet packet data is not received, then FAIL. If testing is for a Sink DUT or CDF field ARC_RX == “N”, then SKIP.

26) Load the waveform data on a waveform generator for Common mode Signal Disturbance test, and generate it.

27) Capture signal with ≥ 1ms duration and Sampling rate ≥ 1GSa/s, and decode it. 28) If the correct Ethernet packet data is not received, then FAIL.



Recommended Test Method – Tektronix DPO70000/B, DPO7000 Series and Tektronix AWG5000/B, AWG7000/B Series

Setup 31. Test ID HEACT 5-16 : Differential Signal Receiver Performance Test-Tektronix



HEACT 4.2.1.2 1

2 Arbitrary Waveform Generator Tektronix AWG5000/B, AWG7000/B Series

HEACT 4.2.1.3 1


4 HEAC-TPA adapter/board Tektronix TF-HEAC-TPA-MAIN with TF-HEAC-TPA-AP, TF-HEAC-TPA-CP, TF-HDMID-TPA-P

HEACT 4.2.1.1 1

5 Ethernet Cross Cable < Any > 1




9 HDMI Cable < Any > 1






1) Connect a general purpose LAN cross-cable to the Digital Oscilloscope and to the arbitrary waveform generator, and then enable the Tek-VISA connection to the arbitrary waveform generator and to the Digital Oscilloscope.

2) Connect a SMA cable to the Ch1 Marker1 output and to Ch2 on the Digital Oscilloscope. 3) Connect the HEAC-TPA adapter to the HEAC connector on the Source/Sink DUT. 4) Connect Ch1-Analog (+) output of the arbitrary waveform generator to the HEAC + SMA

connector on the HEAC-TPA adapter, and the Ch2-Analog(+) to HEAC -. 5) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 50Ω. 6) Connect a differential probe to the HEAC +/- differential signal probe point on the

HEAC-TPA adapter. 7) Connect the CEC or CDC Controller to the CEC/CDC Control Port on the HEAC-TPA

adapter. 8) If testing is for a Sink DUT then

− Set the HEAC-TPA adapter to enable the Sink DUT test. − Connect and set the DC Power Supply to supply +5V between the +5V Power line






Recommended Test Method – Agilent 81150A

Setup 32. Test ID HEACT 5-16 : Differential Signal Receiver Performance Test – Agilent


DUT

CEC/CDC Controller

Probe Amplifier Socket Probe Head

HEAC-

HEAC+

HDMI cable

CEC/DDC etc.

HEAC+

HEAC-



ISIin

ISIout

ISIin

ISIout

HEAC+

HEAC-

Power CombinerOut 1 + Out 1 -

Out 2 + Out 1 +

Out 2 +

To Scope ch4 Input

From 81150A #1 Out 2+

81150A #2 for common mode

81150A #1 for differential mode

DC Power Supply Differential test point



No. Description Recommended TE Reference Qty.1 Arbitrary Waveform Generator Agilent 81150A-002 2ch

model HE HEACT 4.2.1.2

2

2 Power Combiner Agilent 11636B H HEACT 4.2.1.2

2

3 Digital Oscilloscope Agilent DSO80000B or AgilentDSO90000A

HEACT 4.2.1.2 1


HEACT 4.2.1.4 1


HEACT 4.2.1.1 1

6 SMA Cable <See reference> HEACT 4.2.1.9 8






1) Connect CEC/CDC controller to HEAC physical test board. 2) Connect Two 81150A-002 to ISI input of HEAC physical test board by using power

combiners. 3) Connect SMA cables between ISI output and HEAC +/- input. 4) Connect 50Ω terminations on DUT input ports in 81150AU-EHD HEAC physical test

board. 5) Connect E2678A differential socket probe head to HEAC +/ differential test point on HEAC

physical test board. 6) Connect differential probe amplifier to channel 1 of the oscilloscope. 7) Connect output 2 of 81150A-002 #1 for differential signal to channel 4 of the oscilloscope. 8) If testing is for a Sink DUT then


Else


9) Connect DC power supply to HEAC physical test board and supply +5V. 10) Activate HEC transmission on Source/Sink DUT by using CEC/CDC controller. 11) Generate ARP request packet in the differential signal by 81150A-002 #1. 12) Generate disturbance common mode signal by 81150A-002 #2. 13) Capture the waveform of the generated signal without return signal from the DUT by the

scope. 14) Disconnect 50Ω terminations and connect HEAC physical test board to Source/Sink DUT

through HEAC test fixture plug type. 15) Capture the waveform by the scope and analyze the waveform. 16) If expected ARP reply packet is not received correctly then FAIL. 17) Repeat tests on remaining test setups.



Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test

Reference Requirement [HEAC: Table 2-13] HEAC Common Mode Transmission Characteristics at TP1

Minimum input (peak-to-peak) : 160mV Maximum input (peak-to-peak) : 480mV Differential Signal Disturbance:

With differential mode signal 0.4V+10% @ 125MHz

[IEC 60958-1: 7.1.3.3.4] Receiver jitter tolerance

jitter tolerance : 10UI Jitter Frequency=5Hz @ 6.144MHz 0.25UI, Jitter Frequency=200Hz @ 6.144MHz 0.2UI, Jitter Frequency=400kHz @ 6.144MHz

Test Objective Confirm the common mode signal receiver of the Source DUT is performed correctly within the specified Clock frequency deviation and amplitude deviation. Also confirm the jitter tolerance and differential signal disturbance.

Required Test Method If CDF field ARC_RX == “N”, then SKIP.

For each HDMI output port which supports ARC on DUT, perform the following:

1) Connect the HEAC-TPA adapter/board to the Source DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect an Arbitrary Waveform Generator to the HEAC-TPA adapter/board. 4) Activate +4V bias by using the +5V Power from the Source DUT. 5) Activate the ARC reception on the Source DUT. 6) Load the waveform data on a waveform generator for Maximum input test and generate it. 7) If the audible sound is not properly reproduced, then FAIL. 8) Load the waveform data on a waveform generator for Minimum input test and generate it. 9) If the audible sound is not properly reproduced, then FAIL. 10) Load the waveform data on a waveform generator for Jitter tolerance test and generate it. 11) If the audible sound is not properly reproduced, then FAIL. If CDF field HEC == “N”, then SKIP.

12) Activate the HEC reception on the Source DUT. 13) Load the waveform data on a waveform generator for Differential Signal Disturbance test

and generate it. 14) If the audible sound is not properly reproduced, then FAIL.




Setup 33. Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test-Tektronix



HEACT 4.2.1.2 1


HEACT 4.2.1.3 1


HEACT 4.2.1.1 1





If CDF field ARC_RX == “N”, then SKIP.


1) Connect the HEAC-TPA adapter to the HEAC connector on the Source DUT. 2) Connect the CEC or CDC Controller to the CEC/CDC Control Port on the HEAC-TPA

adapter. 3) Connect the Ch1 Analog (+) output from a waveform generator to the HEAC + SMA

connector of the HEAC-TPA adapter, and the Ch2 Analog (+) to the HEAC- SMA connector.



4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 50Ω. 5) Set the HEAC-TPA adapter to enable the Source DUT test. 6) Activate +4V bias by using the +5V Power from the Source DUT. 7) Activate the ARC reception on the HEAC Source DUT by using CEC/CDC controller. 8) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be



Setup 34. Test ID HEACT 5-17 : Common Mode Signal Receiver Performance Test – Agilent


model HEACT 4.2.1.2 2

2 Power Combiner Agilent 11636B HEACT 4.2.1.2 2


HEACT 4.2.1.1 1






1) Connect 81150AU-EHD HEAC physical test board to Source DUT through HEAC test fixture plug type.

2) Connect CEC/CDC controller to HEAC physical test board. 3) Connect Two 81150A-002 to HEAC physical test board by using power combiners. 4) Connect jumper pin to position of “DUT=source” on HEAC physical test board. 5) Set +4V bias of HEAC+/ HEAC- lines from +5V power of Source DUT.

DUT

CEC/CDC Controller

HEAC-

HEAC+

HDMI cable

CEC/DDC etc.

HEAC+

HEAC-



ISIin

ISIout

ISIin

ISIout

HEAC+HEAC-

Power CombinerOut 1 + Out 1 -

Out 2 + Out 1 +

81150A #2 for common mode

81150A #1 for differential mode

DC Power Supply



6) Connect DC power supply to HEAC physical test board and supply +5V. 7) Activate ARC reception on Source DUT by using CEC/CDC controller. 8) Generate Audio signal in common mode signal by 81150A-002 #2. 9) Generate disturbance differential signal by 81150A-002 #1. 10) If audible sound is not properly reproduced then FAIL. 11) Repeat tests for all remaining conditions.

Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test

Reference Requirement [HEAC: Table2-15] HEAC Single Mode Transmission Characteristics at TP1

0V ≤ Vel ≤ 5V

[IEC 60958-1: 7.1.3.3.2, 7.1.3.3.3 and 7.1.3.3.4]

Minimum input (peak-to-peak) : 200mV Maximum input (peak-to-peak) : 600mV jitter tolerance : 10UI, Jitter Frequency=5Hz @ 6.144MHz, Vel = 0, 2.5, 5V

0.25UI, Jitter Frequency=200Hz @ 6.144MHz, Vel = 0, 2.5, 5V 0.2UI, Jitter Frequency=400kHz @ 6.144MHz, Vel = 0, 2.5, 5V

Test Objective Confirm the single mode signal receiver of Source DUT is performed correctly within the specified Clock frequency deviation and amplitude deviation. Also confirm the jitter tolerance.



1) Connect the HEAC-TPA adapter/board to the Source DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect an Arbitrary Waveform Generator to the HEAC-TPA adapter/board. 4) Connect a single-ended probe of the Digital Oscilloscope to HEAC + line. 5) Configure the output impedance of the Arbitrary Waveform Generator to be equivalent to

55Ω. 6) Set the HEAC-TPA adapter/board to use +5V power not from the Source DUT but from the

DC Power Supply. 7) Activate the ARC reception on the Source DUT. 8) Adjust the DC Power Supply that the measured and calculated mean value of the HEAC +

line is +5.0V. 9) For each of test conditions in the requirements, repeat the following measurement steps.

9.1) Load the waveform data on a Arbitrary Waveform Generator and generate it.

9.2) If the audible sound is not properly reproduced, then FAIL.



10) Adjust the DC Power Supply that the measured and calculated mean value of the HEAC + line is +2.5V.

11) For each of test conditions in the requirements, repeat the following measurement steps.

11.1) Load the waveform data on the Arbitrary Waveform Generator and generate it.


12) Turn the DC Power Supply off. 13) For each of test conditions in the requirements, repeat the following measurement steps.

13.1) Load the waveform data on the Arbitrary Waveform Generator and generate it.



Setup 35. Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test-Tektronix





HEACT 4.2.1.2 1


HEACT 4.2.1.3 1



HEACT 4.2.1.1 1




8 HDMI Cable < Any > 1

9 Ethernet Cross Cable < Any > - 1



1) Connect the HEAC-TPA adapter to the HEAC connector on the Source DUT. 2) Connect the CEC or CDC Controller to the CEC/CDC Control Port on the HEAC-TPA

adapter. 3) Connect the Ch1 Analog(+) output from the Arbitrary Waveform Generator to the HEAC+

SMA connector of the HEAC-TPA adapter. 4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter. 6) Set the HEAC-TPA adapter to use +5V power not from the Source DUT but from the DC

Power Supply. 7) Load the waveform data on the Arbitrary Waveform Generator and generate it. 8) Activate the ARC reception on the HEAC Sink DUT by using CEC/CDC controller. 9) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be





Setup 36. Test ID HEACT 5-18 : Single Mode Signal Receiver Performance Test – Agilent




HEACT 4.2.1.2 1


HEACT 4.2.1.4 2


HEACT 4.2.1.1 1







2) Connect CEC/CDC controller to HEAC physical test board. 3) Connect 81150A-002 to HEAC physical test board. 4) Configure the output source impedance of the Arbitrary Waveform Generator to be

equivalent to 55Ω. 5) Connect jumper pin to position of “DUT=source” on HEAC physical test board. 6) Set HEAC + bias not from Source DUT but from DC power supply. 7) Connect DC power supply to HEAC physical test board. 8) Activate ARC reception on Source DUT by using CEC/CDC controller. 9) Generate Audio signal in single mode signal by 81150A-002 #2.

DUT

CEC/CDC Controller

HEAC-

HEAC+

HDMI cable

CEC/DDC etc.

HEAC+ HEAC-



ISIin

ISIout

ISIin

ISIout

HEAC+HEAC-

Out 2 + Out 1 +

81150A for single mode


Single Ended Probe

DC Power Supply



10) If audible sound is not properly reproduced then FAIL. 11) Repeat tests for all remaining conditions.

Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test


Operating DC Voltage (Veh) : 4.0 Volts ± 10% Common mode transmission.

Test Objective Confirm that the Operating DC Voltage on the HEAC+/- lines at TP1 is within the specified limit.



1) Connect the HEAC-TPA adapter/board to the Source DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect an Arbitrary Waveform Generator to the HEAC-TPA adapter/board. 4) Connect a single-ended probe of the Digital Oscilloscope to HEAC + line and a second

single-ended probe of the Digital Oscilloscope to HEAC- line. 5) Set the HEAC-TPA adapter/board to use the +5V Power not from the Source DUT but from

the DC Power Supply. 6) Connect the DC Power Supply to the HEAC-TPA adapter/board, and adjust the DC Power

Supply that the measured and calculated mean value of the HEAC +/HEAC - lines are +4V.

7) Activate the ARC reception on the HEAC Source DUT. 8) Load the waveform data of the ARC signal (common mode) with Clock frequency

6.144MHz on the Arbitrary Waveform Generator and generate it. 9) Capture both signals simultaneously for 100 or more repetitions, triggered at the center

level of signal swing level. Each capture must be of duration 500 UI or more. 10) Measure and calculate the overall average value of the HEAC + signal line as Vh1 and the

mean value of HEAC - signal line as Vh2. 11) If (Veh1 < +3.6V) OR (Veh1 > +4.4V) then FAIL. 12) If (Veh2< +3.6V) OR (Veh2> +4.4V) then FAIL.



Recommended Test Method–-Tektronix DPO70000/B, DPO7000 Series and Tektronix AWG5000/B, AWG7000/B Series

Setup 37. Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test-Tektronix



HEACT 4.2.1.2 1


HEACT 4.2.1.3 1




HEACT 4.2.1.1 1

6 DC Power Supply < See Reference > HEACT 4.2.1.11 1








1) Connect the HEAC-TPA adapter to the HEAC connector on the Source DUT. 2) Connect the CEC or CDC Controller to CEC/CDC Control Port on the HEAC-TPA adapter. 3) Connect the Ch1 Analog (+) output from the Arbitrary Waveform Generator to the HEAC+

SMA connector of the HEAC-TPA adapter, and the Ch2 Analog (+) to the HEAC- SMA connector.

4) Set the Impedance Conversion Circuit in the HEAC-TPA adapter to 50Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC+ probe

point on the HEAC-TPA adapter, and a second single-ended probe from Ch2 to the HEAC - probe point.

6) Set the HEAC-TPA adapter to enable the Source DUT test, and to use +5V power not from the Source DUT but from the DC Power Supply.

7) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 8) Turn on the power to the Source DUT. 9) Activate the ARC reception on the HEAC Source DUT by using CEC/CDC controller. 10) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be



Setup 38. Test ID HEACT 5-19 : Common Mode Operating DC Voltage Test – Agilent

DUT

CEC/CDC Controller

HEAC-

HEAC+

HDMI cable

CEC/DDC etc.

HEAC+ HEAC-



ISIin

ISIout

ISIin

ISIout

HEAC+HEAC-

Out 2 + Out 1 +

81150A for common mode


Single Ended Probe

DC Power Supply






HEACT 4.2.1.2 1


HEACT 4.2.1.4 2


HEACT 4.2.1.1 1







2) Connect CEC/CDC controller to HEAC physical test board. 3) Connect 81150A-002 to HEAC physical test board. 4) Connect first 10073C probe to HEAC + pin and second 10073C probe to HEAC – pin on

HEAC physical test board. 5) Connect jumper pin to position of “DUT=source” on HEAC physical test board. 6) Set +4V bias of HEAC +/HEAC - lines not from Source DUT but from DC power supply. 7) Connect DC power supply to HEAC physical test board and supply +5V. 8) Activate ARC reception on Source DUT by using CEC/CDC controller. 9) Generate Audio signal in common mode signal by 81150A-002. 10) Perform the Required Test Method with this setup. Agilent automation software may be

used to automated test sequence.

Test ID HEACT 5-20: Single Mode Operating DC Voltage Test


Operating DC Voltage (Vel) : 0 ≤ Vel ≤ +5.0 Volts single mode transmission

Test Objective Confirm that the Operating DC Voltage in single mode on the HEAC+ line at TP1 is within the specified limit.



1) Connect the HEAC-TPA adapter/board to the Source DUT. 2) Connect the CEC/CDC controller to the HEAC-TPA adapter/board. 3) Connect an Arbitrary Waveform Generator to the HEAC-TPA adapter/board. 4) Connect a single-ended probe of the Digital Oscilloscope to HEAC + line.



5) Set the HEAC-TPA adapter/board to use +5V Power not from the Source DUT but from the DC Power Supply.

6) Connect the DC Power Supply to the HEAC-TPA adapter/board, and adjust the DC Power Supply that the measured and calculated mean value of the HEAC+- line is +5.0V.

7) Activate the ARC reception on the Source DUT. 8) Load the waveform data of the ARC signal (single mode) with Clock frequency 6.144MHz

on the Arbitrary Waveform Generator and generate it. 9) Capture the HEAC+ signal 100 or more repetitions, triggered at the center level of the

signal swing level. Each capture must be of duration 500 UI or more. 10) Measure and calculate the overall average value of the HEAC + signal line as Vel. 11) If (Vel < 0V) OR (Vel > + 5V) then FAIL. 12) Adjust the DC Power Supply that the measured and calculated mean value of the HEAC +

line is +2.5V. 13) Repeat above measurement steps from 8) to 10). 14) Turn the DC Power Supply off. 15) Repeat above measurement steps from 8) to 10).

Recommended Test Method- Tektronix DPO70000/B, DPO7000 Series and Tektronix AWG5000/B, AWG7000/B Series

Setup 39. Test ID HEACT 5-20: Single Mode Operating DC Voltage Test-Tektronix



No Description Recommended TE Reference Qty.1 Digital Oscilloscope Tektronix DPO70000/B


HEACT 4.2.1.2 1


HEACT 4.2.1.3 1




HEACT 4.2.1.1 1

6 DC Power Supply < See Reference > HEACT 4.2.1.11 1






1) Connect the HEAC-TPA adapter to the HEAC connector on the Source DUT. 2) Connect the CEC or CDC Controller to CEC/CDC Control Port on the HEAC-TPA adapter. 3) Connect the Ch1 Analog (+) output from a waveform generator to the HEAC + SMA

connector of the HEAC-TPA adapter. 4) Set the Coupling & Impedance Conversion Circuit in the HEAC-TPA adapter to 55Ω. 5) Connect a single-ended probe from Ch1 of the Digital Oscilloscope to the HEAC + probe

point on the HEAC-TPA adapter. 6) Set the HEAC-TPA adapter to enable the Source DUT test, and to use +5V power not from

the Source DUT but from the DC Power Supply. 7) Connect and set the DC Power Supply to supply +5V to the HEAC-TPA adapter. 8) Turn on the power to the Source DUT. 9) Activate the ARC reception on the HEAC Source DUT by using CEC/CDC controller. 10) Load the nominal audio waveform data on the arbitrary waveform generator and generate

it. 11) Perform the Required Test Method with this setup. Tektronix Opt HEAC software may be





Setup 40. Test ID HEACT 5-20: Single Mode Operating DC Voltage Test – Agilent




HEACT 4.2.1.2 1


HEACT 4.2.1.4 1


HEACT 4.2.1.1 1







2) Connect CEC/CDC controller to HEAC physical test board. 3) Connect 81150A-002 to HEAC physical test board. 4) Connect 10073C probe to HEAC + pin on HEAC physical test board. 5) Connect jumper pin to position of “DUT=source” on HEAC physical test board. 6) Set HEAC+ bias not from Source DUT but from DC power supply. 7) Connect DC power supply to HEAC physical test board. 8) Activate ARC reception on Source DUT by using CEC/CDC controller. 9) Generate Audio signal in single mode signal by 81150A-002.

DUT

CEC/CDC Controller

HEAC-

HEAC+

HDMI cable

CEC/DDC etc.

HEAC+ HEAC-



ISIin

ISIout

ISIin

ISIout

HEAC+HEAC-

Out 2 + Out 1 +

81150A for single mode


Socket Probe Head

DC Power Supply



10) Perform the Required Test Method with this setup. Agilent automation software may be used to automation test sequence.



HEACT 6 Cable Assembly Tests In addition to testing this section, it is also required to complete a Cable CDF of the main body.

Test ID HEACT 6-1: Intra-Pair Skew Test

Reference Requirement [HEAC: Table 2-17] HEAC +/- Lines Cable Assembly.

Maximum Cable Assembly Intra-pair skew : 111ps

Test Objective Confirm that the intra-pair skew in the HDMI cable with HEAC is within the specified limit.

Required Test Method If CDF field Cable_HEAC == “N”, then SKIP.

1) Setup the TDT Oscilloscope to skew test mode. 2) Perform deskew per manufacture recommended procedure. 3) Connect the DUT and measure the skew between the signals of the pair of HEAC +/- lines. 4) Measure the delay time between HEAC + signal and HEAC - signal. 5) If delay time is greater than or equal to the specified limit, then FAIL.

Recommended Test Method – Tektronix TDS8000/B, TDS8200/B, DSA8200

Setup 41. Test ID HEACT 6-1: Intra-Pair Skew Test



If CDF field Cable_HEAC == “N”, then SKIP.

1) Calibrate (De-skew) the measurement equipment according to the manufacturer’s recommended procedures.

2) Connect an HEAC-TDR-R adapter to each end of the cable under test. 3) Connect the TDT oscilloscope output (stimulus) channel + side to HEAC + SMA connector

and - side to the HEAC - SMA connector on the input of the HEAC-TPA-R adapter. 4) Connect the TDT oscilloscope input channel + side to HEAC + SMA connector and – side

to the HEAC- SMA connector on the output of the HEAC-TDR-R adapter. 5) Configure the TDT oscilloscope to measure the both single-ended signals on channel #2. 6) Set the vertical axis to 100mV/Div and the horizontal axis to 100ps/Div. 7) Measure the skew (delay between inputs on channel 2) and Tskew, using the TDT

oscilloscope. 8) The measurement point is the absolute voltage of +125mV on the + side of the input

channel and -125mV on the – side of the input channel. 9) If Tskew > 111ps, then FAIL.

Recommended Test Method – Agilent 86100C

Setup 42. Test ID HEACT 6-1: Intra-Pair Skew Test – Agilent

No. Description Recommended TE Reference Qty. 1 TDR/TDT Oscilloscope Tektronix TDS8000/B,

TDS8200/B, DSA8200 with 80E04 and 80E03

HEACT 4.2.1.6 1

2 HEAC-TDR-R adapters Tektronix TF-HEAC-TDR-AR, TF-HEAC-TDR-CR or TF-HDMID-TPA-R

HEACT 4.2.1.1 2


No. Description Recommended TE Reference Qty.1 TDR/TDT Oscilloscope Agilent 86100C HEACT 4.2.1.6 1


3 HEAC Test Fixture Receptacle <See reference> HEACT 4.2.1.1 2

DUT Cable

HEAC-

HEAC+

HEAC Test Fixture Receptacle

86100C TDR/TDT Scope

HEAC-

HEAC+




1) Connect SMA cables to TDR oscilloscope. 2) Perform deskew per manufacture recommended procedure. 3) Connect SMA cables to the cable DUT through the HEAC Test Fixture. 4) Measure the delay between HEAC + and HEAC -. 5) If delay time is greater than equal specified limit then FAIL.

Test ID HEACT 6-2: Differential Attenuation Test

Reference Requirement [HEAC : Table 2-17] HEAC +/- Lines Cable Assembly.

Differential Attenuation 300kHz – 10MHz < 1.6dB 10MHz – 100MHz < 5dB 100MHz – 200MHz <7.1dB

Test Objective Confirm that the lower limit of the differential attenuation of HDMI cable with HEAC is within specified limits.

Required Test Method If CDF field Cable_HEAC== “N”, then SKIP.

1) Setup the TDR/TDT oscilloscope or Network Analyzer to differential attenuation measurement mode.

2) Perform calibration per manufacture recommended procedure. 3) Measure differential attenuation with frequency range of 300kHz to 200MHz. 4) Check attenuation at the specified frequency.


Setup 43. Test ID HEACT 6-2: Differential Attenuation Test




1) Execute the S-Parameter Calculation software on the TDR/TDT oscilloscope. 2) Calibrate (De-skew) the measurement equipment according to the manufacturer’s

recommended procedures. 3) Connect the near end of cable to the first HEAC-TPA-R adapter. 4) Connect the TDR/TDT oscilloscope output (stimulus) channel + side to the HEAC + SMA

connector and - side to the HEAC - SMA connector on the input of the HEAC-TDR-R adapter.

5) Configure TDR/TDT oscilloscope to generate odd mode pulses and measure the differential amplitude in TDR mode on the TDR measurement channel.

− Set the vertical axis to 100mV/Div and the horizontal axis to 500ps/Div on the TDR measurement channel.

6) Adjust the horizontal position to : − Rising portion of the reflected pulse waveform (HEAC-TDR-R unterminated) as it is

just visible on the most left side of the oscilloscope screen. (The rising portion of the intrinsic pulse waveform should be off of the screen.)

7) Acquire the waveform on the TDR measurement channel as the Reference Waveform on the S-Parameter software.

8) Connect the far end of the cable under test to the second HEAC-TDR-R adapter. 9) Connect SMA cables to the TDR/TDT oscilloscope and to the far-end HEAC-TPA-R

adapter. 10) Configure the TDR/TDT oscilloscope to measure differential voltage on the TDT

measurement channel. − Set the vertical axis to 100mV/Div and do not change the horizontal scale and

position on the TDT measurement channel. 11) Acquire the waveform on the TDT measurement channel as the Transferred Waveform on

the S-Parameter software. 12) Start the calculation of the insertion loss using the Reference waveform and Transferred

waveform in the S-Parameter software. 13) If the calculated attenuation for each frequency range is not within the limit value, then

FAIL.

No. Description Recommended TE Reference Qty.1 TDR/TDT Oscilloscope Tektronix TDS8000/B,

TDS8200/B, DSA8200 with 80E04

HEACT 4.2.1.6 1

2 HEAC-TDR-R Adapters Tektronix TF-HEAC-TDR-AR, TF-HEAC-TDR-CR or TF-HDMID-TPA-R

HEACT 4.2.1.1 2





Setup 44. Test ID HEACT 6-2: Differential Attenuation Test – Agilent TDR


1) Connect SMA cables to TDR oscilloscope. 2) Perform TDT differential calibration per manufacture recommended procedure. 3) Connect SMA cables to the cable DUT through the HEAC Test Fixture. 4) Measure the TDT waveform and calculate differential attenuation. 5) Check attenuation at specified frequency. .

Recommended Test Method – Agilent E5071C

Setup 45. Test ID HEACT 6-2: Differential Attenuation Test – Agilent Network Analyzer




No. Description Recommended TE Reference Qty.1 Network Analyzer Agilent E5071C HEACT 4.2.1.6 1



DUT Cable

HEAC-

HEAC+


E5071C Network Analyzer

HEAC-

HEAC+

DUT Cable

HEAC-

HEAC+



HEAC-

HEAC+




1) Connect SMA cables to Network Analyzer. 2) Setup Network Analyzer with 1601 measurement points, measurement frequency range of

300kHz to 200MHz. IF bandwidth is not critical. 3) Calibrate Network Analyzer using 4 port E-cal module or standard calibration kit. 4) Connect SMA cables to the cable DUT through the HEAC Test Fixture. 5) Measure the differential attenuation. 6) Check attenuation at specified frequency.

Test ID HEACT 6-3: Differential/Common Mode Impedance Test

Reference Requirement [HEAC: Table 2-17] HEAC +/- Lines Cable Assembly.

Differential Impedance* Connection point and transition area :Up to 1ns : 100Ω ± 15%*Cable area : 1 ns – 2.5 ns 100Ω ± 10%

Common Mode Impedance* Cable area : 1 ns – 2.5 ns 30Ω ± 20%

* A single excursion is permitted out to a max/min of 100Ω +/- 25% and of a duration less than 250ps.

Test Objective Confirm the differential and common mode impedance of the HDMI cable with HEAC is within the specified limits.

Required Test Method If CDF field Cable_HEAC== “N”, then SKIP.

1) Setup the TDR/TDT oscilloscope to differential and common mode TDR measurement mode.

2) Perform differential and common mode TDR calibration per manufacture recommended procedure.

3) Set effective rise time to Tr =1ns in actual observation of a voltage at the unterminated TPA adapter open end.

4) Setup the TDR/TDT oscilloscope to measure the differential impedance. 5) If the differential impedance is not within the specified limit value then FAIL. 6) Setup the TDR/TDT oscilloscope to measure the common mode impedance. 7) If the common mode impedance is not within the specified limit value, then FAIL.




Setup 46. Test ID HEACT 6-3: Differential/Common Mode Impedance Test

No. Description Recommended TE Reference Qty.1 TDR/TDT Oscilloscope Tektronix TDS8000/B,

TDS8200/B, DSA8200 with 80E04

HEACT 4.2.1.6 1

2 HEAC-TDR-R Adapters Tektronix TF-HEAC-TDR-AR, TF-HEAC-TDR-CR or TF-HDMID-TPA-R

HEACT 4.2.1.1 2




1) Calibrate (De-skew) the measurement equipment according to the manufacturer’s recommended procedure.

2) Connect the near end of the cable to the first HEAC-TDR-R adapter. 3) Connect the far end of the cable to the second HEAC-TDR-R adapter. 4) Connect 50 Ω terminators to HEAC + and – connectors on the far-end of the

HEAC-TDR-R adapter. 5) Connect the TDR/TDT oscilloscope output (stimulus) channel + side to the near-end of the

TPA-R adapter, and the – side to the HEAC - SMA connector. 6) Configure the TDR/TDT oscilloscope to generate odd mode pulses and measure the

differential impedance in TDR mode: − TDR effective rise time = 1ns. Note that many TDRs use a much faster actual rise

time and use a digital filter to attain the effective near-1 ns rise time. − Vertical axis is set to 'ohms (Ω)’.

7) View the TDR trace of the impedance, Zdiff, in the cable area. 8) Measure the lowest impedance value (Zdiff-lo) and the highest impedance value (Zdiff-hi)

along the signal path, from the near-end of the HEAC connector until just before the far-end one.

9) If (Zdiff-lo < 90Ω) OR (Zdiff-hi > 110Ω) then FAIL.



10) Configure the TDR/TDT oscilloscope to generate even mode pulses and measure the common mode impedance in TDR mode.

11) View the TDR trace of impedance, Zcomm, in the cable area. 12) Measure the lowest impedance value (Zcomm-lo) and the highest impedance value

(Zcomm-hi) along the signal path, from the near-end of the HEAC connector until just before the far-end one.

13) If (Zcomm-lo < 24Ω) OR (Zcomm-hi > 36Ω) then FAIL.


Setup 47. Test ID HEACT 6-3: Differential/Common Mode Impedance Test - Agilent


1) Connect SMA cables to TDR oscilloscope. 2) Perform differential TDR calibration per manufacture recommended procedure. 3) Connect SMA cables to the HEAC Test Fixture. 4) Set the effective rise time of as close to 1ns at the test fixture open end. 5) Connect HEAC Test Fixture to the cable DUT. 6) Measure the differential impedance by the TDR scope. 7) If the differential impedance is not within the specified limit value then FAIL. 8) Perform common mode TDR calibration per manufacture recommended procedure. 9) Connect SMA cables to the HEAC Test Fixture. 10) Set the effective rise time of as close to 1ns at the test fixture open end. 11) Connect HEAC Test Fixture to the cable DUT. 12) Measure the common mode impedance by the TDR scope. 13) If the common mode impedance is not within the specified limit value then FAIL.




4 50ohm SMA Terminator <See reference> HEACT 4.2.1.8 2

DUT Cable

HEAC-

HEAC+



HEAC-

HEAC+ 50ohm termination



HEACT 7 Capability Discovery and Control The CDC Compliance Test Specification is divided into low level protocol tests and feature based tests. The low level protocol tests are divided into tests which every device shall adhere and into specific tests for either CDC-only devices or for devices supporting both CDC and CEC (CDC/CEC devices). A device that fails any test shall neither claim to be CDC compliant nor HEAC compliant.

Each set of tests has a reference, in the form of [HEAC x.y.z] or [CEC x.y.z], to the corresponding section within the CDC or CEC specification that is being tested.

HEACT 7.1 Test Configurations This section describes a set of test configurations used throughout this test specification. In each configuration the following conditions are expected (except where explicitly testing that property):

• A Source DUT has been allocated a valid Physical Address by the Test Equipment (TE). The TE shall allocate address [“1.0.0.0”] to all source devices except where otherwise defined.

• The DUT has been allocated an appropriate Logical Address.

• The DUT is powered on and in an appropriate state to accept the message(s) being tested.

Prior to running any of the required tests, the CDC Compliance Test Tool instrument should be powered on and communicating with the software running on the host PC. It is assumed that the CDC Test Tool instrument is in idle mode waiting for a command to be issued from the software.

HEACT 7.1.1 Basic Configuration The basic configuration consists of one connection between the DUT and the TE. If the DUT has an HDMI output, then connect that output to a TE’s HDMI input. If the DUT does not have an HDMI output, then connect the TE’s HDMI output to any of the DUT’s HDMI inputs.

HEACT Figure 7-1 Basic Configuration

The basic configuration is commonly used throughout this specification. When a configuration is not defined, all tests within that section shall use the basic configuration.

Note: Unless a specific configuration is described, the DUT shall be not connected to any device other than the TE.



HEACT 7.1.2 HEC Feature Configuration The HEC feature configuration is mainly used during the HEC feature tests specified under HEACT 7.6.1. A number of the tests use the same configuration as shown in HEACT Figure 7-1 consisting of one connection between the DUT and the TE. For several of the tests a connection is additionally made between the DUT and a Digital Oscilloscope via a HEAC-TPA adapter/board.

If the DUT has an HDMI output, then connect that output to a TE’s HDMI input regardless of whether or not HEC Functionality is supported by the DUT’s HDMI output. With this configuration the TE shall take the physical address [“0.0.0.0”] and shall allocate the physical address [“1.0.0.0”] to the DUT.

If the DUT does not have an HDMI output, connect the TE’s HDMI output to the DUT’s first HDMI input regardless of whether or not HEC Functionality is supported by the DUT’s HDMI input. With this configuration the DUT shall take the physical address [“0.0.0.0”] and it shall allocate the physical address [“1.0.0.0”] to the TE.

The Digital Oscilloscope (via the HEAC-TPA adapter/board) is only connected in case it is used during a test. Each test requiring use of a Digital Oscilloscope has a description of the DUT’s HDMI connections to which the Digital Oscilloscope shall be connected. In most cases this is the HDMI connection under test. In the case where the Digital Oscilloscope and the TE are required to be connected to the same HDMI connection then the TE and the Digital Oscilloscope shall be connected to that HDMI connection via the HEAC-TPA adapter/board (dashed line showing the HDMI connection in HEACT Figure 7-2).

Note: Unless a specific configuration is described, the DUT shall be not connected to any device other than the TE and the Digital Oscilloscope (via the HEAC-TPA adapter/board).

DUT

TestEquipment


HDMI

HDMI

HEAC-TPA Adapter Ethernet

HDMI

HEACT Figure 7-2 HEC Feature Configuration

During many of the HEC feature tests the TE shall emulate additional devices that are not physically present in the HEC feature configuration. HEACT Table 7-1 specifies the behavior and initial state of those emulated devices as well as their connections within the HEC feature configuration. Within the HEC Feature tests the emulated devices are referred to by their ID number.



HEACT Table 7-1 Table of devices emulated by the TE during HEC feature tests

Emulated Device(s) ID

Connection and Initial State

Messages supported by TE for each emulated device.

Connection Examples

1 The TE emulates a device connected to the DUT’s HDMI connection under test. The emulated device supports HEC Functionality on the connection to the DUT. The [HEC Functionality State] of this connection is set to [“HEC Inactive”]. The [Host Functionality State] is set to [“Host Active”]. The [ENC Functionality State] is set to [“Ext Con Active”]. Note that the physical TE shall not emulate a device at its PA except when its PA matches the PA of the emulated device.

As follower (all CDC HEC messages): <CDC_HEC_InquireState> <CDC_HEC_ReportState> <CDC_HEC_SetStateAdjacent> <CDC_HEC_SetState> <CDC_HEC_RequestDeactivation> <CDC_HEC_NotifyAlive> <CDC_HEC_Discover> As initiator (all CDC HEC messages): <CDC_HEC_InquireState> <CDC_HEC_ReportState> <CDC_HEC_SetStateAdjacent> <CDC_HEC_SetState> <CDC_HEC_RequestDeactivation> <CDC_HEC_NotifyAlive> <CDC_HEC_Discover>

Example of an emulated device connected to a Root DUT’s third HDMI input under test (PA [“3.0.0.0”]).

Two examples of an emulated device connected to a Source/Repeater DUT’s HDMI input/output under test (PA [“1.2.0.0”] / [“0.0.0.0”]).

TE(0.0.0.0)

DUT(1.0.0.0)

Emulated(1.2.0.0)

TE + Emulated(0.0.0.0)

DUT(1.0.0.0)

2 The TE emulates a

device connected to the DUT’s HDMI connection under test. The emulated device does not support HEC Functionality on the connection to the DUT. The [HEC Functionality State] of this connection is set to [“HEC Not Supported”]. The [Host Functionality State] is set to [“Host Not Supported”]. The [ENC Functionality State] is set to [“Ext Con Not Supported”]. Note that the physical TE shall not emulate a device at its PA except when its PA matches the PA of the emulated device.

The same as described under ID 1. Same as the ID 1 connection examples.






Connection Examples

3 The TE emulates two devices. The first is connected to the DUT’s HDMI connection under test. The second is connected to the second HDMI input of the first emulated device. The first emulated device supports HEC Functionality on the HDMI connections to the DUT and to the second emulated device. The second emulated device supports HEC Functionality on the HDMI connection to the first emulated device. The [HEC Functionality State] of those connections is set to [“HEC Inactive”]. The [Host Functionality State] is set to [“Host Active”] and the [ENC Functionality State] is set to [“Ext Con Active”] for both emulated devices. Note that the physical TE shall not emulate a device at its PA except when its PA matches the PA of an emulated device.

The same as described under ID 1. Example of two emulated devices connected to a Root DUT’s second HDMI input under test (PA 2.0.0.0).

Example of two emulated devices connected to a Source/Repeater DUT’s HDMI output under test (PA 0.0.0.0).






Connection Examples

4 The TE emulates three devices. The first is connected to the DUT’s HDMI connection under test. The second is connected to the second HDMI input of the first emulated device. The third is connected to the first HDMI input of the second emulated device. The first emulated device supports HEC Functionality on the HDMI connections to the DUT and to the second emulated device. The second emulated device supports HEC Functionality on the HDMI connections to the first emulated device and to the third emulated device. The third emulated device supports HEC Functionality on the HDMI connection to the second emulated device. The [HEC Functionality State] of those connections is set to [“HEC Inactive”]. The [Host Functionality State] is set to [“Host Active”] and the [ENC Functionality State] is set to [“Ext Con Active”] for all emulated devices. Note that the physical TE shall not emulate a device at its PA except when its PA matches the PA of an emulated device.

The same as described under ID 1. Example of three emulated devices connected to a Root DUT’s second HDMI input under test (PA 2.0.0.0).

DUT(0.0.0.0)

TE(1.0.0.0)

Emulated 1(2.0.0.0)

Emulated 2(2.2.0.0)

Emulated 3(2.2.1.0)

Example of three emulated devices connected to a Source/Repeater DUT’s HDMI output under test (PA 0.0.0.0).



HEACT 7.2 General Constraints HEACT 7.2.1 Handling Response Messages The CDC Specification as well as the CEC Specification allows a device to send CDC and/or CEC messages at any time.

In some tests is a requirement that the DUT responds to a message sent by the TE. If the required response is a message sent by the DUT, then the TE is required to correctly handle such a response:

• If any unexpected CEC or CDC messages are received before the expected response, then the test shall not fail because of the unexpected message(s), except where specifically described.

• A test shall fail if the expected response is not received within the CDC Maximum Response Time [HEAC 3.1.1] except where specifically described.

HEACT 7.2.2 Ignoring Messages In some tests the DUT is required to ignore an incoming message. In order to pass such a test, the DUT shall not:

• Send any CDC message in response (note that at any time the DUT might send CDC or CEC messages that are not a response to the message to be ignored).

• Invoke any detectable change in its existing mode of operation.

• Invoke any change in what it is currently displaying.

HEACT 7.2.3 Handling Flow Control Because CDC provides a mechanism to enable flow control [CEC 7.2], it is possible that a device may justifiably reject a message at any time. In the case when a device (unexpectedly) negatively acknowledges a header or data block, the test should be repeated up to 5 times with an allowance of at least one second between re-transmissions.

If the DUT continues to negatively acknowledge the message in all retransmission attempts, the test should be logged as a failure.

HEACT 7.2.4 Verifying Messages at Feature Tests The TE is required to verify the message frame of CDC messages sent by the DUT during all feature tests described under HEACT 7.6 except where specifically described. The TE shall verify the following items and a test shall be designated a failure if at least one item is not verified:

• All CDC messages (CEC opcode value 0xF8) sent by the DUT have the correct Start Bit and Data Bit timings and are sent using the correct Signal Free Time.

• All CDC messages (CEC opcode value 0xF8) sent by the DUT have the correct levels for all EOM and ACK bits.

• All CDC messages (CEC opcode value 0xF8) sent by the DUT are sent using the Broadcast Destination Logical Address in the CEC Header Block.

• All CDC messages (CEC opcode value 0xF8) sent by the DUT have a minimum length which is until the end of the CDC Opcode block (until the third operand block of the respective CEC message).



• All messages sent by a CDC-only DUT incorporate a value of 0xF8 in the CEC opcode block. Note that this applies only to CDC-only devices since devices supporting both CDC and CEC might send CEC messages with different opcodes at any time.

• All messages sent by a CDC-only DUT using the Unregistered Initiator Logical Address in the Header Block.

HEACT 7.3 Low Level Protocol Tests for CDC Devices Each test described within this section shall be run if the DUT does support CDC.

HEACT 7.3.1 Electrical Specification

Test ID: HEACT 7.3.1-1 CEC Bus Logic ‘0’ and ‘1’ Voltage Level


[CEC: Table 2] CEC Electrical Specification

A logic ‘0’ output voltage level must be ≥ 0V and ≤ 600mV


A logic ‘1’ output voltage level must be ≥ 2.5V and ≤ 3.63V

Test Objective Verify the DUT’s CDC waveform Logic ‘0’ and ‘1’ output voltage level is within the limits of the specification.

Required Test Method • Connect the DUT to the TE.

• Connect the CEC line to +3.3V via a 27kΩ ±5% resistor.

• Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message.


• If logic ‘0’ is < 0V or is > 600mV or If logic ‘1’ is < 2.5V or is > 3.63V then → FAIL.

• Repeat test with the CEC line connected to +3.3V via a 3kΩ ±5% resistor.

• Repeat test with the CEC line connected to ground via a 150kΩ +5%-0% resistor.

• Execute the test procedure to at least one of the DUT’s HDMI inputs/outputs which support CDC.




Out 3 Out 2 Out 1 In 10 / 100


On


TMDS

DUT RootDUT

Repeater or Source


COM 2

Out 2

Out 1

In

Oscilloscope

HDMI Cable

HDMI-to-BNCCable

BNC-to-COM2


Setup 48. Test ID: HEACT 7.3.1-1 CEC Bus Logic ‘0’ and ‘1’ Voltage Level


1 CDC Compliance Test Tool Simplay CEC Explorer SL-309 with a host computer

HEACT 4.3.2.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 or Tektronix TDS7404

1


1


1

5 HDMI Cable Simplay CEC Explorer, PL-HDMI-01

1

• Set-up the CDC Compliance Test Tool as detailed in section HEACT 4.3.2.2.

• Power on DUT.

• Connect the DUT to the CDC-CTT as detailed in the Setup above.

• Measure the Logic ‘0’ and ‘1’ voltage by following the directions provided by the CDC-CTT for Test ID: HEACT 7.3.1-1.

• The CDC-CTT will indicate if Logic ‘0’ and ‘1’ output voltage levels of the DUT is within the specification.

Note: During transition from Logic ‘1’ to Logic ‘0’ a negative overshoot with maximum 300mV and up to 150µs duration is allowed.



Test ID: HEACT 7.3.1-2 Maximum Rise Time and Fall Time



The rise time from 10% to 90% of the bus pull-up voltage must be ≤ 250µs


The fall time from 90% to 10% of the bus pull-up voltage must be ≤ 50µs

Test Objective Verify the maximum rise time and fall time of the DUT’s CDC waveform is within the limits of the specification.

Required Test Method • Connect the TE to the CEC line on the DUT.

• Connect the CEC line to +3.3V via a 27kΩ ±5% resistor.

• Apply the total parasitic capacitance with a nominal value, but not exceeding 1600pF, between the CEC line and ground.

• Measure the CEC line voltage, VHIGH.

• Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message.

• Measure the waveform the DUT creates.

• If the rise time from 10% to 90% of VHIGH > 250µs and If the fall time from 90% to 10% of VHIGH > 50µs then → FAIL.

• Repeat the test with the CEC line connected to +3.3V via a 3kΩ ±5% resistor and also apply a total parasitic capacitance with a nominal value, not exceeding, of 7700pF, between the CEC line and ground.

• Execute the test procedure to at least one of the DUT’s HDMI inputs/outputs which support CDC.

HEACT Figure 7-3 Rise Time and Fall Time in CDC waveform

90% of VHIGH

10% of VHIGH

rise time fall time

VHIGH




Out 3 Out 2 Out 1 In 10 / 100


On


TMDS

DUT RootDUT

Repeater or Source

COM 2

Out 2

Out 1

In

Oscilloscope

HDMI Cable

HDMI-to-BNCCable

BNC-to-COM2



Setup 49. Test ID: HEACT 7.3.1-2 Maximum Rise Time and Fall Time


1 CDC Compliance Test Tool Simplay CEC Explorer SL-309 with a host computer

HEACT 4.3.2.2 1

2 Digital Oscilloscope YOKOGAWA DL1640 or Tektronix TDS7404

1


1

4 BNC-to-COM2 Simply CEC Explorer Cable, S-CtB-01

1


1

• Set-up the CDC Compliance Test Tool as detailed in section HEACT 4.3.2.2.

• Power on the DUT.

• Connect the DUT to the CDC-CTT as detailed in the Setup above.

• Measure the rise and fall times by following the directions provided by the CDC-CTT for Test ID: HEACT 7.3.1-2.

• The CDC-CTT will indicate if the rise and fall times of the DUT are within the specification.



HEACT 7.3.2 Signaling and Bit Timings HEACT 7.3.2.1 Bit Transmission Reference Requirement

[CEC: 5] Signaling and Bit Timings

The DUT correctly transmits the individual bits of a CDC message.

Configuration This set of tests shall use the Basic Configuration (see HEACT Figure 7-1).

If the DUT has any HDMI inputs, then connect the test equipment’s HDMI output to each input on the DUT, referencing the “Number of HDMI Inputs” in the CDF. Note that if the DUT has also an HDMI output (i.e. it is a Repeater) then simultaneously connect the test equipment’s HDMI input to the output on the DUT so that the DUT can discover its physical address.

If the DUT has any HDMI outputs, then connect the test equipment’s HDMI input to each output on the DUT, referencing the “Number of HDMI Outputs” in the CDF.

Execute the test procedure to at least one of the DUT’s HDMI inputs/outputs which support CDC.

The test equipment sends CDC messages. The test equipment monitors the CEC line at the same time.


Test ID Test Objective Required Test Method Pass Criteria 7.3.2.1 - 1

Verify the bit timings of a start bit are within the values specified by CDC.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Measure the timings of the ‘start’ bit. Repeat the test at least 3 times.

The start bits’ low period is from 3.5ms to 3.9ms. The start bits’ total period is from 4.3ms to 4.7ms.

7.3.2.1 - 2

Verify the timings of a ‘1’ data bit are within the values specified by CDC.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Measure the timings of a ’1’ data bit. Repeat the test at least 3 times.

The ‘1’ data bits’ low time period is from 0.4ms to 0.8ms. The ‘1’ data bits’ total time period is from 2.05ms to 2.75ms.




Verify the timings of a ‘0’ data bit are within the values specified by CDC.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Measure the timings of a ‘0’ data bit. Repeat the test at least 3 times.

The ‘0’ data bits’ low time period is from 1.3ms to 1.7ms. The ‘0’ data bits’ total time period is from 2.05ms to 2.75ms.

Recommended Test Method Check the pass criteria of each test by following the directions provided by the CDC Compliance Test Tool for HEACT 7.3.2.1.

HEACT 7.3.2.2 Bit Reception Reference Requirements

[CEC: 5] Signaling and Bit Timings

The DUT correctly receives the individual bits of a CDC message.

Configuration This test shall use the same configuration as HEACT 7.3.2.1.



Verify that the receiving tolerances of a start bit’s low period are within the values specified.

On the TE set the low interval time of the start bit to 3.5ms and set the total start bit time to 4.5ms. Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for low interval values of 3.7ms and 3.9ms.

The DUT must acknowledge and respond to ALL messages within the low interval time range ≥ 3.5ms and ≤ 3.9ms.




Verify that the receiving tolerances of a start bit’s total period fall within the values specified.

On the TE set the low interval time of the start bit to 3.7ms and set the high interval time of the start bit to 0.6ms (4.3ms total). Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for high interval values of 1.0ms (4.7ms total times respectively).

The DUT must acknowledge and respond to ALL messages within the total bit time range ≥ 4.3ms and ≤ 4.7ms.

7.3.2.2 - 3

Verify that the receiving tolerances of a logical ‘1’data bit’s low period fall within the values specified.

On the TE set the low interval time of the ‘1’ bit to 0.4ms and set the total ‘1’ bit time to 2.4ms. Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for low interval values of 0.6ms and 0.8ms.


7.3.2.2 - 4

Verify that the receiving tolerances of a logical ‘1’data bit’s total period fall within the values specified.

On the TE set the low interval time of the ‘1’ bit to 0.6ms and set the high interval time of the ‘1’ bit to 1.45ms (2.05ms total). Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for high interval values of 2.15ms (2.75ms total times respectively).





Verify that the receiving tolerances of a logical ‘0’ data bit’s low period fall within the values specified.

On the TE set the low interval time of the ‘0’ bit to 1.3ms and set the total ‘0’ bit time to 2.4ms. Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for low interval values of 1.5ms and 1.7ms.


7.3.2.2 - 6

Verify that the receiving tolerances of a logical ‘0’ data bit’s total period fall within the values specified.

On the TE set the low interval time of the ‘0’ bit to 1.5ms and set the high interval time of the ‘0’ bit to 0.55ms (2.05ms total). Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Repeat the test for high interval values of 1.25ms (2.75ms total times respectively).





HEACT 7.3.3 Frame Communication With all tests in this section the CEC line shall be monitored. A test automatically fails if a device attempts to transmit when it should not or creates any signals on the CEC line that are not expected. For every test where the DUT reacts by sending a CDC message, the test fails if the DUT does not respond with the appropriate message within 1 second [HEAC: 3.1.1].


[CEC: 6] Frame Description [CEC: 7] Reliable Communication Mechanisms[CEC: 8] Protocol Extensions [HEAC: 3.1] Protocol General Rules

The DUT correctly receives and sends a CDC Frame.


Execute the test procedure to one of the DUT’s HDMI inputs/outputs which supports CDC.

HEACT 7.3.3.1 ACK (Acknowledge)



Verify that the DUT acknowledges with a ’1’ ACK bit for every message block when receiving a CEC message that is directly addressed to another device. Test applies only if the DUT does not support CEC messages (CDC-only device) (see CDF).

For all destination logical addresses 0 to 14: Send a CEC <Abort> message directly addressed to the appropriate destination logical address.

For all sent messages: Every block within the message is acknowledged with a ‘1’ ACK bit. (i.e. it does nothing)

7.3.3.1 - 2

Verify that the DUT acknowledges with a ’1’ ACK bit for every message block when receiving a valid CEC broadcast message.

Broadcast a CEC <Report Physical Address> message. If the DUT does not acknowledge any message blocks with a ‘0’ ACK bit (Flow Control) then resend the message to the DUT after a delay of between 7.2ms and 12ms. Resend the message up to 5 times.





Verify that the DUT acknowledges with a ‘1’ ACK bit for every message block when receiving a valid CDC broadcast message.

Broadcast a <CDC_HEC_Discover> message. If the DUT does not acknowledge any message blocks with a ‘0’ ACK bit (Flow Control) then resend the message to the DUT after a delay of between 7.2ms and 12ms. Resend the message up to 5 times.



HEACT 7.3.3.2 Header Block



Verify that the DUT writes the correct initiator logical address when sending a message. Test applies only if the DUT does not support CEC messages (CDC-only device) (see CDF).

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message.

The DUT writes the “Unregistered” (15) logical address in the Initiator logical address field of the <CDC_HEC_ReportState> message.




HEACT 7.3.3.3 Retries (Frame Retransmissions)

Required Test Method Test ID Test Objective Required Test Method Pass Criteria 7.3.3.3 - 1

Verify that the DUT accepts a negative acknowledgement when broadcasting a message and tries to re-transmit the message up to 5 times.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Negatively acknowledge ACK bit = ‘0’ the header block within the <CDC_HEC_ReportState> message that the DUT broadcasts. Negatively acknowledge a message block within all retransmission attempts. Repeat the test for all data blocks of the <CDC_HEC_ReportState> message.

The DUT tries to re-send the message between 1 to 5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.

7.3.3.3 - 2

Verify the DUT detects low impedance on the CEC line when it is transmitting high impedance and is not expecting a follower asserted bit.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. When the DUT is transmitting in high impedance mode while it is sending the message, switch the bus to the low impedance mode during a non-follower asserted bit.

The DUT tries to re-send the message between 1 to 5 times and then stops transmitting the message. The time between the retries is ≥ 3 nominal data bit periods.




HEACT 7.3.3.4 CEC Line Error Handling


Verify that when the DUT discovers a corrupted bit it generates a bit error notification.

Broadcast a <CDC_HEC_Discover> message. Ensure that Information bit 3 in Figure 7 of CEC6.1 of the first data block (the CEC opcode block) contains a corrupted bit. (A period between falling edges that is less than the minimum bit period). Repeat the test method by corrupting information bit 0 of the first data block. Repeat the test method by corrupting information bit 5 of the first data block. Repeat the test method by corrupting information bit 6 of the first data block. Repeat the test method by corrupting information bit 7 of the first data block.

For every corrupted message, the DUT generates a low bit period on the control signal line of 1.4-1.6 times the nominal data bit period. (A value of ≥ 3.4ms and ≤ 3.8ms is acceptable). The DUT does not respond to the message (it does not send a <CDC_HEC_ReportState> message).




HEACT 7.3.3.5 Control Signal Line Arbitration


Verify that if the DUT sees that the bus is low while its output is at a high level during the start bit, it loses arbitration and stops transmitting.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. 3.5ms after the DUT begins transmitting its start bit, transmit a low bit period of 0.8ms, to ensure that the DUT detects the low impedance.

The DUT detects the bus is low, loses arbitration and stops transmitting its current message. When the DUT resends its message, it sends after the signal free time of ≥ 5 nominal data bit periods. (It is PASS if the DUT does not resend.)

7.3.3.5 - 2

Verify that if the DUT sees that the bus is low while its output is at a high level during the initiator logical address bits, it must lose arbitration and try to re-transmit after the given signal free time. Test does not apply to a DUT which has taken (CEC) Logical Address 0 since it will never lose arbitration to another initiator logical address (see CDF).

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. While the DUT is transmitting a ‘1’ in the initiator logical address bits, transmit a ‘0’ on the bus.

The DUT detects the bus is low while transmitting a ‘1’ in the initiator logical address bit, loses arbitration and stops transmitting its current message. When the DUT re-sends its message, it sends after the signal free time of ≥ 5 nominal data bit periods. (It is PASS if the DUT does not resend.)

HEACT Figure 7-4 shows how the DUT loses arbitration in the source address bits. The TE transmits a ‘0’ while the DUT is transmitting a ‘1’.

HEACT Figure 7-4 Example of how the DUT loses arbitration to the TE.




HEACT 7.3.3.6 Signal Free Time


Verify the DUT waits for at least 5 bit periods before transmitting a new message.


The DUT waits for a signal free time of ≥ 5 nominal data bit periods before attempting to transmit the message.




HEACT 7.4 Low Level Protocol Tests for CDC/CEC Devices Each test described within this section shall be run only if the DUT supports both CDC and CEC.

CDF values are referenced to determine if the DUT supports CEC i.e. if it is a CDC/CEC device.

HEACT 7.4.1 Initiator Logical Address Reference Requirement

[HEAC: 3.1] Protocol General Rules

A device that implements CEC as well as CDC shall use an Initiator Logical Address allocated according to Supplement 1.

Required Test Method Test ID Test Objective Required Test Method Pass Criteria 7.4.1 - 1 Verify that the DUT is using

the same initiator logical address for both, CEC and CDC messages. (Does not apply to pure CEC Switches, as TE cannot send directly addressed messages to LA=15)

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. Send a CEC <Abort> message directly addressed to the DUT. Use the same destination logical address for the message as the initiator logical address incorporated in the <CDC_HEC_ReportState> message received from the DUT. The DUT should respond with a CEC <Feature Abort> message.

The initiator logical addresses incorporated in both, the <CDC_HEC_ReportState> and the CEC <Feature Abort> message sent by the DUT are the same.

Recommended Test Method Check the pass criteria of each test by following the directions provided by the CDC Compliance Test Tool for HEACT 7.4.1.



HEACT 7.5 Low Level Protocol Tests for All CDC Devices All tests described within this section shall be run for all CDC devices. This includes CDC-only devices as well as devices supporting both CDC and CEC. For CDC-only devices these tests shall be run in addition to the tests described under HEACT 7.3. For devices supporting CDC and CEC these tests shall be run in addition to the tests described under HEACT 7.3 and HEACT 7.4.

HEACT 7.5.1 CDC Control Signal Line Arbitration Reference Requirement


CEC line arbitration for CDC messages commences with the leading edge of the Start Bit and continues until the end of the Initiator Physical Address within the second CEC operand block.


Test ID Test Objective Required Test Method Pass Criteria 7.5.1 - 1 Verify that the DUT

recognizes the bus is low while its output is at a high level during the destination logical address bits, it must lose arbitration and try to retransmit after the given signal free time.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. While the DUT is transmitting a 1 in the destination logical address bits, transmit a 0 on the bus.


7.5.1 - 2 Verify that the DUT recognizes the bus is low while its output is at a high level during the CEC Opcode bits, it must lose arbitration and try to re-transmit after the given signal free time.

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. While the DUT is transmitting a 1 in the CEC Opcode bits, transmit a 0 on the bus.


7.5.1 - 3 Verify that the DUT recognizes the bus is low while its output is at a high level during the initiator physical address bits, it must lose arbitration and try to re-transmit after the given signal free time. Test does not apply to Root DUTs that take physical address “0.0.0.0” since they will never lose arbitration to another initiator physical address (see CDF).

Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message. While the DUT is transmitting a 1 in the initiator physical address bits, transmit a 0 on the bus.





HEACT 7.5.2 Destination Logical Address Reference Requirement


All CDC messages shall be broadcast using a Destination Logical Address of 15 (the CEC Broadcast Logical Address).


Test ID Test Objective Required Test Method Pass Criteria 7.5.2 - 1 Verify that the DUT ignores a

<CDC Message> (CEC opcode value 0xF8) sent to another than the broadcast destination.

For all destination logical addresses 0 to 14: Send a <CDC_HEC_Discover> message on the bus directly addressed to initiator logical address.

If the DUT is a CDC-only device (refer to CDF): The DUT ignores the message. Else: The DUT responds with a CEC <Feature Abort> message.

7.5.2 - 2 Verify that the DUT writes the correct destination logical address when sending a message.


The DUT writes the “Broadcast” (15) logical address in the Destination logical address field of the <CDC_HEC_ReportState> message.


HEACT 7.5.3 CEC Opcode Block Reference Requirement


CDC messages shall always use a CEC opcode value of 0xF8.


Test ID Test Objective Required Test Method Pass Criteria 7.5.3 - 1 Verify that the DUT ignores a

message incorporating another CEC opcode value than 0xF8.

Broadcast a <CDC_HEC_Discover> message with the complete CDC frame but with a CEC opcode value of 0xFF.

The DUT ignores the (invalid) message.

7.5.3 - 2 Verify that the DUT ignores a message incorporating another CEC opcode value than 0xF8.

Broadcast a CEC <Abort> message.

The DUT ignores the (invalid) message.

7.5.3 - 3 Verify that the DUT incorporates the correct CEC opcode value 0xF8 when sending a CDC message.


The DUT responds by broadcasting a <CDC_HEC_ReportState> message incorporating the value 0xF8 in the CEC opcode block.




HEACT 7.5.4 Initiator Physical Address Reference Requirement


CDC messages shall always incorporate the Initiator Physical Address in the first and the second operand block of the respective CEC message.

HEACT 7.5.4.1 Root Devices

Configuration This set of tests shall use the Basic Configuration (see HEACT Figure 7-1) and each HDMI input of the DUT shall be connected to an HDMI output of the TE referring to the “Number of HDMI Inputs” in CDF.

A root device must always take physical address “0.0.0.0”.



Verify that the DUT sends CDC messages incorporating the correct initiator physical address.


The DUT responds by broadcasting a <CDC_HEC_ReportState> message incorporating the initiator physical address [“0.0.0.0”] in the first and the second operand block of the respective CEC message.


HEACT 7.5.4.2 All Other Devices

Configuration This set of tests shall use the Basic Configuration (see HEACT Figure 7-1) and each HDMI output of the DUT shall be connected to an HDMI input of the TE referring “Number of HDMI Outputs” in CDF.




Verify that the DUT sends CDC messages incorporating the correct initiator physical address when connected directly to a Sink device.

Set the TE to allocate a physical address of [“2.0.0.0”] to the DUT. Connect the DUT via its HDMI output to the TE and disconnect it (or assert HPD from the TE). Set the TE to allocate a physical address of [“1.0.0.0”] to the DUT. Connect the DUT to the TE. Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message.


7.5.4.2 - 2

Verify that the DUT sends CDC messages incorporating the correct initiator physical address when connected at the bottom of the device network.

Set the TE to allocate a physical address of [“1.0.0.0”] to the DUT. Connect the DUT via its HDMI output to the TE and disconnect it (or assert HPD from the TE). Set the TE to allocate a physical address of [“2.3.4.5”] to the DUT. Connect the DUT to the TE. Broadcast a <CDC_HEC_Discover> message. The DUT should respond with a <CDC_HEC_ReportState> message.





HEACT 7.5.5 Frame Validation Reference Requirement

[CEC: 7.3] Frame Validation

A follower shall ignore a frame if the number of Data Blocks is less than the number specified for that opcode.

Required Test Method Note that for some CDC messages, the number of Data Blocks may vary.

Test ID Test Objective Required Test Method Pass Criteria 7.5.5 - 1 Verify that for every CDC

message that the DUT supports as a follower it ignores the message if it is missing any parameter. (i.e. the message does not contain all operands specified in the relevant HEAC specification)

For every CDC message that the DUT supports as a follower and has at least one parameter: Send the CDC message to the DUT missing its final operand of 1 byte or greater. See HEACT Table 7-2 for an example of the CDC messages to be sent.

The DUT ignores the CDC message.

7.5.5 - 2 Verify that the DUT ignores additional data blocks after EOM = 1 is not the last data block of the message.

Broadcast a <CDC_HEC_Discover> message with an additional Data Block at the end, where EOM = 1 on both the last and the next to last Data Block of the total message.

The DUT ignores data in the additional data blocks after the (first) data block with EOM = 1, so answers normally with a <CDC_HEC_ReportState> message.

HEACT Table 7-2 Example of frame validation tests.

Message Required Test Method Pass Criteria <CDC_HEC_InquireState> Broadcast a

<CDC_HEC_InquireState> message without the second [Physical Address] parameter.





HEACT 7.6 Feature Tests

HEACT 7.6.1 HDMI Ethernet Channel (HEC) All HDMI devices supporting HEC functionality shall also support CDC and the HDMI Ethernet Channel (HEC) feature of CDC. Therefore, for all devices supporting HEC functionality, the tests within this HDMI Ethernet Channel section shall be executed (see CDF).

Within some tests of this section a Digital Oscilloscope is used to verify whether the HEC Functionality on an HDMI port is active or inactive. For this verification the Digital Oscilloscope shall measure on the Data Link Layer the presence or absence of MAC frames (including Idle frames) sent by the DUT. Note that HEC is based on the Ethernet standard 100Base-TX and that HEC drivers therefore continuously send MAC frames even if there is no payload. The HEC Functionality on an HDMI port shall be considered active if the Digital Oscilloscope continuously displays MAC frames received from the DUT. The HEC Functionality on an HDMI port shall be considered inactive if the Digital Oscilloscope does not continuously display MAC frames received from the DUT.

Required Test Method for HEC Functionality check with Digital Oscilloscope 1) Connect the HEAC-TPA adapter/board to a DUT’s HDMI port as described in the

appropriate test. 2) If the Digital Oscilloscope shall be connected to the same DUT’s HDMI port as the CDC

CTT: − Connect the CDC CTT to the HEAC-TPA adapter/board.

3) Else if a Sink DUT is under test: − Connect and configure the DC Power Supply to drive +5V between +5V Power and

DDC/CEC Ground on the HEAC-TPA adapter/board. 4) Terminate the HEAC-TPA adapter/board with 50Ω through a DC block capacitor. 5) Connect the Digital Oscilloscope’s differential probe to the HEAC+/- lines.

6) Set the Digital Oscilloscope to display MAC frames appropriately.

7) Execute the test as described in the appropriate test. When required, display the MAC frames with the Digital Oscilloscope.

8) The HEC Functionality on the HDMI port shall be considered active if the Digital Oscilloscope continuously displays MAC frames received from the DUT. The HEC Functionality on an HDMI port shall be considered inactive if the Digital Oscilloscope does not continuously display MAC frames received from the DUT.



Recommended Test Method for HEC Functionality check with Digital Oscilloscope – Agilent DSO80000B, DSO90000A

Setup 50. Test ID:HEACT 7.6.1 HEC Functionality Check- Agilent




HEACT 4.2.1.4 1

3 HEAC-TPA Agilent 81150AU-EHD with HEAC Test Fixture Plug

HEACT 4.2.1.1 1

4 CDC Compliance Test Tool Simplay CEC Explorer SL 309 with a host computer

HEACT 4.3.2.2 1

1) Connect the E2678A differential socket probe head to the HEAC+/- pins on the 81150AU-EHD HEAC-TPA.

2) Terminate HEAC physical test board with 50 Ω termination. 3) Connect the 81150AU-EHD HEAC-TPA through the HEAC Test Fixture Plug to the

appropriate DUT’s HDMI port. 4) If the Digital Oscilloscope shall be connected to the same DUT’s HDMI port as the CDC

CTT: − Connect the CDC CTT to the 81150AU-EHD HEAC-TPA. − Connect the HEAC+/- lines of the HEAC Test Fixture Plug through the

81150AU-EHD HEAC-TPA to the CDC CTT. 5) Else

− Connect the HEAC+/- lines of the HEAC Test Fixture Plug through the 81150AU-EHD HEAC-TPA to the Digital Oscilloscope.

6) Perform the Required Test Method with this setup. If the Digital Oscilloscope is connected to the HEAC-TPA then connect the HEAC+/- lines of the HEAC Test Fixture Plug through the HEAC-TPA to the Digital Oscilloscope only when the HEC Functionality has to be checked during the test.


DUT

CEC Explorer

HEAC+

HEAC-

Probe Amplifier

Socket Probe Head

HEAC+

HEAC-

HDMI cable

CEC/DDC etc.





HEACT 7.6.1.1 HEC Capability Discovery Reference Requirement

[HEAC: 3.4.1.3] HEC Capability Discovery

The DUT correctly sends <CDC_HEC_Discover> messages. The DUT shall correctly respond at <CDC_HEC_Discover> message reception. The DUT shall notify other devices whenever it allocates a new Physical Address or it changes at least one of its HEC capabilities.

HEACT 7.6.1.1.1 Discovery

Configuration This set of tests shall use the HEC Feature Configuration (see HEACT 7.1.2).



Verify that the DUT correctly sends <CDC_HEC_Discover> messages. Test applies only if the DUT supports <CDC_HEC_Discover> as an initiator (see CDF).

The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_Discover> message (see CDF).

The DUT sends a <CDC_HEC_Discover> message incorporating its physical address as the initiator address. The DUT does not respond with a <CDC_HEC_ReportState> message to its <CDC_HEC_Discover> message.

7.6.1.1 - 2

Verify that the DUT does not send <CDC_HEC_Discover> messages more often than once every 3 minutes. Test applies only if the DUT supports <CDC_HEC_Discover> as an initiator (see CDF).

The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_Discover> message (see CDF). Check if the trigger feature is automatically disabled as a result of the first trigger. If not, then repeat the procedure to trigger the DUT to send a <CDC_HEC_Discover> message within 5 seconds to 2:50 minutes after the first trigger (see CDF). Repeat the procedure to trigger the DUT to send a <CDC_HEC_Discover> message within 3:10 minutes or more after the first trigger (see CDF).

The DUT sends a <CDC_HEC_Discover> message incorporating its physical address as the initiator address. The DUT does not send a <CDC_HEC_Discover> message after the second trigger. The DUT sends a <CDC_HEC_Discover> message incorporating its physical address as the initiator address after the third trigger. The DUT does not respond with a <CDC_HEC_ReportState> message to its own <CDC_HEC_Discover> messages.




Verify that the DUT correctly responds at <CDC_HEC_Discover> message reception.

The TE broadcasts a <CDC_HEC_Discover> message incorporating the initiator physical address [“1.2.3.4”]. Wait for minimum 5 seconds. If the DUT supports Standby (see CDF): Set the DUT to Standby and repeat the test.

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating its physical address as the initiator address, the Target Physical Address [“1.2.3.4”], a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con xxx”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State], [ENC Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 4

Verify that the DUT correctly responds at <CDC_HEC_Discover> message reception. Test applies only to DUTs supporting External Network Connection - ENC (see CDF).

Ensure that the DUT is not connected to the External Network (e.g. unplug the cable). The TE broadcasts a <CDC_HEC_Discover> message incorporating the initiator physical address [“1.2.3.4”].

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating its physical address as the initiator address, the Target Physical Address [“1.2.3.4”], a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con Not Supported”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 5

Verify that the DUT correctly responds at <CDC_HEC_Discover> message reception. Test applies only to DUTs supporting External Network Connection - ENC (see CDF).

Ensure that the DUT is correctly connected to the External Network (e.g. plug the cable). The TE broadcasts a <CDC_HEC_Discover> message incorporating the initiator physical address [“1.2.3.4”].

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating its physical address as the initiator address, the Target Physical Address [“1.2.3.4”], a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con Active”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.



Recommended Test Method Check the pass criteria of each test by following the directions provided by the CDC Compliance Test Tool for HEACT 7.6.1.1.1

HEACT 7.6.1.1.2 Capability Notification



Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its HEC Functionality State from [“HEC Not Supported”] to [“HEC Inactive”]. Test applies only to DUTs having the capability to enable and disable its HEC Functionality via user setting (see CDF).

Pre-condition: DUT’s HEC Functionality is disabled. Its [HEC Functionality State] is [“HEC Not Supported”]. Enable the DUT’s HEC Functionality by user setting (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con xxx”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State], [ENC Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 7

Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its HEC Functionality State from [“HEC Inactive”] to [“HEC Not Supported”]. Test applies only to DUTs having the capability to enable and disable its HEC Functionality via user setting (see CDF).

Pre-condition: DUT’s HEC Functionality is enabled. Its [HEC Functionality State] is [“HEC Inactive”]. Disable the DUT’s HEC Functionality by user setting (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Not Supported”] [“Host Not Supported”][“Ext Con Not Supported”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. All incorporated [HEC Support Field] bits are set to ‘0’.

7.6.1.1 - 8

Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [Host Functionality State] from [“Host Inactive”] to [“Host Active”]. Test applies only to DUTs supporting Host Functionality and having the capability to activate and deactivate its Host Functionality (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. Its [Host Functionality State] is [“Host Inactive”]. Activate the DUT’s Host Functionality (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host Active”][“Ext Con xxx”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [ENC Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.




Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [Host Functionality State] from [“Host Active”] to [“Host Inactive”]. Test applies only to DUTs supporting Host Functionality and having the capability to activate and deactivate its Host Functionality (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. Its [Host Functionality State] is [“Host Active”]. Deactivate the DUT’s Host Functionality (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host Inactive”][“Ext Con xxx”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [ENC Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 10

Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [ENC Functionality State] from [“Ext Con Not Supported”] to [“Ext Con Active”]. Test applies only to DUTs supporting External Network Connection (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. There is no connection to an External Network e.g. cable is unplugged or no wireless connection ([ENC Functionality State] is [“Ext Con Not Supported”]). External Network Connection is enabled by user setting if such a user setting exists. Connect the DUT to an External Network e.g. by cable plugging (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host xxx”][“Ext Con Active”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 11

Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [ENC Functionality State] from [“Ext Con Active”] to [“Ext Con Not Supported”]. Test applies only to DUTs supporting External Network Connection (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. The DUT is connected to an External Network (see CDF). Its [ENC Functionality State] is [“Ext Con Active”]. Disconnect the DUT from the External Network e.g. by unplugging the cable.

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host xxx”][“Ext Con Not Supported”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.




Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [ENC Functionality State] from [“Ext Con Not Supported”] to [“Ext Con Active”]. Test applies only to DUTs supporting External Network Connection and having the capability to activate or deactivate its External Network Connection via user setting (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. The DUT is correctly connected to an External Network (see CDF). Its user setting controlling the External Network Connection is disabled ([ENC Functionality State] is [“Ext Con Not Supported”]). Activate the DUT’s External Network Connection through the user setting (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host xxx”][“Ext Con Active”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 13

Verify that the DUT correctly notifies its HEC capabilities to other devices after a change of its [ENC Functionality State] from [“Ext Con Active”] to [“Ext Con Not Supported”]. Test applies only to DUTs supporting External Network Connection and having the capability to activate or deactivate its External Network Connection via user setting (see CDF).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. The DUT is correctly connected to an External Network (see CDF). Its user setting controlling the External Network Connection is enabled ([ENC Functionality State] is [“Ext Con Active”]). Deactivate the DUT’s External Network Connection through the user setting (see CDF).

The DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host xxx”][“Ext Con Not Supported”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.

7.6.1.1 - 14

Verify that the DUT correctly notifies its HEC capabilities to other devices whenever it discovers a new physical address. Test applies only to DUTs that are not root devices (root devices always take the physical address [“0.0.0.0”]).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. Its physical address is [“1.0.0.0”]. The TE allocates the new physical address [“2.0.0.0”] to the DUT via its EDID setting and by issuing an HPD pulse low for more than 100msec.

The DUT sends a <CDC_HEC_ReportState> message incorporating its new PA [“2.0.0.0”] as the initiator PA, the Target Physical Address [“F.F.F.F”], a [HEC State] of [“HEC Inactive”] | [“HEC Active”] [“Host xxx”][“Ext Con xxx”][“No Error”], the [HEC Support Field] and not the [HEC Activation Field] parameter. The incorporated [Host Functionality State], [ENC Functionality State] and [HEC Support Field] bits correspond to the CDF of the DUT.




Verify that the DUT does not notify its HEC capabilities to other devices at HPD signaling when no new physical address has been allocated. Test applies only to DUTs that are not root devices (root devices always take the physical address [“0.0.0.0”]).

Pre-condition: The DUT’s HEC Functionality State is either [“HEC Inactive”] or [“HEC Active”]. Its physical address is [“1.0.0.0”]. The TE pulses HPD low for more than 100msec to the DUT (the physical address in EDID remains [“1.0.0.0”]).

The DUT does not notify its HEC capabilities to other devices.

Recommended Test Method Check the pass criteria of each test by following the directions provided by the CDC Compliance Test Tool for HEACT 7.6.1.1.2.

HEACT 7.6.1.2 HEC Control - Inquiry Reference Requirement

[HEAC: 3.2.1.4] HEC Control

The DUT shall correctly support the <CDC_HEC_InquireState> message as an initiator. The DUT shall correctly respond to reception of <CDC_HEC_InquireState> messages.




Verify that the DUT does not inquire a PHEC which includes at least one of the DUT’s HDMI connections that do not support HEC Functionality. Test applies only to DUTs having at least one HDMI connection on which HEC Functionality is not supported (see CDF).

Repeat the test for all of the DUT’s HDMI connections not supporting HEC Functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Check if the trigger feature is automatically disabled for this port. If not, follow the procedure to trigger the DUT to send a <CDC_HEC_InquireState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices (see CDF).

The DUT does not send the triggered <CDC_HEC_InquireState> message.

7.6.1.2 - 2

Verify that the DUT correctly sends a <CDC_HEC_InquireState> message, and does not respond with a <CDC_HEC_ReportState> message to its own

Perform the test for one of the DUT’s HDMI connections supporting HEC Functionality (see CDF): The TE emulates the ID 1

The DUT correctly sends the <CDC_HEC_InquireState> message. The DUT does not respond with a



Test ID Test Objective Required Test Method Pass Criteria <CDC_HEC_InquireState> message.

device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_InquireState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices (see CDF).

<CDC_HEC_ReportState> message to its own <CDC_HEC_InquireState> message. TE stops monitoring for the <CDC_HEC_ReportState> messages after 1 second.

7.6.1.2 - 3

Verify that the DUT does not respond to a <CDC_HEC_InquireState> message incorporating a channel that none of the DUT’s HDMI connections are part of.

The TE sends a <CDC_HEC_InquireState> message incorporating the Physical Addresses [“2.2.1.0”] and [“2.2.2.0”] as the Terminating Devices.

The DUT ignores the <CDC_HEC_InquireState> message. TE stops monitoring for the <CDC_HEC_ReportState> messages after 1 second.

7.6.1.2 - 4

Verify that the DUT responds to a <CDC_HEC_InquireState> message incorporating a channel that at least one of the DUT’s HDMI connections is part of.

Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The TE sends a <CDC_HEC_InquireState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices.

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating the TE’s Physical Address as the Target Address, a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The incorporated [Host Functionality State] and [ENC Functionality State] correspond to the CDF of the DUT.

7.6.1.2 - 5

Verify that the DUT responds to a <CDC_HEC_InquireState> message incorporating a channel that at least one of the DUT’s HDMI connections is part of and at least one of those HDMI connections does not support HEC Functionality. Test applies only to DUTs not supporting HEC Functionality on at least one of its HDMI connections (see CDF).

Repeat the test for all of the DUT’s HDMI connections not supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_InquireState> message incorporating the Physical Addresses of the DUT and of the emulated device as the Terminating Devices.

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating the emulated device’s Physical Address as the Target Address, a [HEC State] of [“HEC Not Supported”][“Host Not Supported”][“Ext Con Not Supported”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

7.6.1.2 – 6

Verify that the DUT responds to a <CDC_HEC_InquireState> message incorporating a channel that at least one of the DUT’s HDMI connections is part of and when set to Standby. Test applies only to DUTs

Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): Set the DUT to Standby if the DUT supports Standby (see CDF).

Within the MRT the DUT sends a <CDC_HEC_ReportState> message incorporating the TE’s Physical Address as the Target Address, a [HEC State] of [“HEC Inactive”][“Host xxx”][“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC



Test ID Test Objective Required Test Method Pass Criteria supporting a Standby mode (see CDF).

The TE emulates the ID 1 device described in HEACT Table 7-1. The TE sends a <CDC_HEC_InquireState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices.

Activation Field] parameter. The incorporated [Host Functionality State] and [ENC Functionality State] correspond to the CDF of the DUT.


HEACT 7.6.1.3 HEC Control – Activation Reference Requirement


The DUT correctly sends <CDC_HEC_SetState> messages. The DUT shall correctly respond at <CDC_HEC_SetState> message reception.


HEACT 7.6.1.3.1 DUT as Activator



Verify that the DUT does not activate a PHEC without successful verification the PHEC is a VHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 2 device described in HEACT Table 7-1. Check if the trigger feature is automatically disabled for this port. If not, trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF).

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT does not send a <CDC_HEC_SetState> message since the verification of the channel to be activated has failed. The DUT does not activate the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT does not activate a PHEC without successful verification the PHEC is a VHEC (no response from another device). Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device does not respond to both, <CDC_HEC_Discover> and <CDC_HEC_InquireState> messages.


7.6.1.3 - 3

Verify that the DUT does not activate a PHEC without successful verification that the PHEC is a VHEC (error response from another device). Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds to each <CDC_HEC_Discover> and <CDC_HEC_InquireState> message with a <CDC_HEC_ReportState> message incorporating a [CDC Error Code] of [“Other Error”].





Verify that the DUT does not activate a PHEC if one of its HDMI connections that do not support HEC Functionality is part of that PHEC. Test applies only to DUTs having at least one HDMI connection on which HEC Functionality is not supported and which also support <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections not supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Check if the trigger feature is automatically disabled for this port. If not, trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF).

The DUT does not send a <CDC_HEC_SetState> message. The DUT does not activate the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.

7.6.1.3 - 5

Verify that the DUT correctly activates a VHEC that one of its HDMI connections is part of. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly activates a VHEC that two of its HDMI connections are part of. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality, which support <CDC_HEC_SetState> as an initiator, and which also support functionality as Activator to activate a HEC through two of its own HEC ports with two external Terminating Devices (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of both emulated devices as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated devices respond with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on both HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly activates a VHEC that none of its HDMI connections is part of. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator and which also support functionality as Activator to activate a HEC with two external Terminating Devices which includes none of its own HEC ports (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of both emulated devices as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated devices respond with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated devices. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The HEC Functionality on all of the DUT’s HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation message after a VHEC activation attempt has failed due to no response from a device that is part of that VHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device does not respond with a <CDC_HEC_ReportState> message to the DUT’s <CDC_HEC_SetState> message.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. Within two seconds the DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter incorporating the same Terminating Devices as the previous message. The DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation message after a VHEC activation attempt has failed due to an error response from a device that is part of that VHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“Other Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Repeat the same test with the only difference that the emulated device responds by incorporating [“HEC Inactive”] instead of [“HEC Active“].

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the same Terminating Devices as the previous message within the MRT after reception of the error response. The DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation message after a VHEC activation attempt has failed due to a [“HEC Not Supported”] response from a device that is part of that VHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Not Supported”] [“Host Not Supported”] [“Ext Con Not Supported”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the same Terminating Devices as the previous message within the MRT after reception of the [“HEC Not Supported”] response. The DUT deactivates the HEC Functionality on its HDMI connection that is part of the activated HEC. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation message after a VHEC activation attempt has failed due to an unexpected invalid [“HEC Inactive”] [“No Error”] response from a device that is part of that VHEC (note that this is an illegal response for a responding device). Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Inactive”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the same Terminating Devices as the previous message within the MRT after reception of the [“HEC Inactive”] response. The DUT deactivates the HEC Functionality on its HDMI connection that is part of the activated HEC. Check with a Digital Oscilloscope.




Verify that the DUT activates the same VHEC only once. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. 5 seconds or more after receiving the response, check if the trigger feature is automatically disabled for this port as a result of the first trigger. If not, once again trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF).

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated device. The DUT correctly sends only one <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection that is part of the activated HEC. Check with a Digital Oscilloscope.




Verify that the DUT correctly activates two VHECs and waits for activation of the second VHEC until the activation of the first VHEC is finished (MRT elapsed). Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator and which also support functionality as Activator to activate at least two HECs simultaneously (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). Immediately after the first trigger, trigger the DUT to send a second <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). Both emulated devices respond within 460-500ms after a <CDC_HEC_ SetState> or within 740- 780ms after a <CDC_ HEC_ReportState> message reception with a <CDC_HEC_ReportState> messages incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”] [“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated devices. The DUT correctly sends both <CDC_HEC_SetState> [“Activate HEC”] messages and does not respond with <CDC_HEC_ReportState> to them. The DUT waits until the MRT of the first activation attempt has finally elapsed before sending the second activation message (note that the MRT also elapses in case all devices have responded). The DUT activates the HEC Functionality on its HDMI connection that is part of the activated HEC. Check with a Digital Oscilloscope.




Verify that the DUT continues to wait an additional second for responses to its activation messages if a response has been received within 1 second (MRT). Maximum waiting time for all responses is 5 seconds. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 4 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the third emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated devices respond with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The first emulated device responds within 460-500ms, the second within 1.435-1.475s and the third within 2.410-2.450s after <CDC_HEC_SetState> message reception.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated devices. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection that is part of the activated HEC. Check with a Digital Oscilloscope.




Verify that the DUT correctly activates multiple VHECs simultaneously. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator and which also support functionality as Activator to activate multiple HECs simultaneously (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 4 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT as the common Terminating Device and between two to three of the emulated devices (depending upon the number of simultaneous HECs supported by the DUT) as each channel’s second Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first (and second – depending upon the number of simultaneous HECs supported by the DUT) emulated device(s) respond with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host Active”] [“Ext Con Active”][“No Error”] and a [HEC Activation Field] parameter indicating the activation on the HDMI connections. The outmost emulated device (second or third depending on the number of simultaneous HECs supported by the DUT) responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Inactive”] [“Host Active”] [“Ext Con Active”][“Other Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated devices. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation message after the activation of one of multiple VHECs has failed due to a response with an unexpected [Activation Field] parameter. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator and which also support functionality as Activator to activate at least two HECs simultaneously (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test on one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT as the common Terminating Device and of each emulated device as each channel’s second Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host Active”] [“Ext Con Active”][“No Error”] and a [HEC Activation Field] parameter indicating that the HEC functionality at the connection to the DUT is not active. The second emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Activation Field] nor the [HEC Support Field] parameter.

After the full reset and before the activation of a HEC, the DUT verifies that the channel to be activated is a VHEC by either sending a <CDC_HEC_Discover> or <CDC_HEC_InquireState> message and by receiving an appropriate response from the emulated devices. The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the physical addresses of the DUT and the first emulated device as the Terminating Devices after reception of the [“HEC Inactive”] response. The DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the physical addresses of the DUT and the second emulated device as the Terminating Devices after reception of the [“HEC Inactive”] response. The DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




HEACT 7.6.1.3.2 DUT as part of a VHEC activated by another device


Verify that the DUT does not respond to a <CDC_HEC_SetState> message incorporating a single VHEC when none of its HDMI connections supporting HEC Functionality are part of the VHEC to be activated.

The TE sends a <CDC_HEC_SetState> message incorporating the Physical Addresses [“2.2.1.0”] and [“2.2.2.0”] as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

The DUT ignores the <CDC_HEC_SetState> message. The DUT does not activate the HEC Functionality on any of its HDMI connections. Check with a Digital Oscilloscope.

7.6.1.3 - 18

Verify that the DUT does not respond to a <CDC_HEC_SetState> message incorporating multiple VHECs when none of its HDMI connections supporting HEC Functionality are part of the VHECs to be activated.

The TE sends a <CDC_HEC_SetState> message incorporating the Physical Address [“1.1.0.0”] as the common Terminating Device and [“1.1.1.0”], [“1.1.2.0”], [“1.1.3.0”], [“1.1.4.0”] as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

The DUT ignores the <CDC_HEC_SetState> message. The DUT does not activate the HEC Functionality on any of its HDMI connections. Check with a Digital Oscilloscope.

7.6.1.3 - 19

Verify that the DUT correctly responds to a <CDC_HEC_SetState> message incorporating a single VHEC when at least one of its HDMI connections that do not support HEC Functionality is part of the VHEC to be activated.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections not supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Not Supported”] [“Host xxx”] [“Ext Con xxx”] [“Initiator does not have the requested capability”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The HEC Functionality on all of the DUT’s HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly responds to a <CDC_HEC_SetState> message incorporating a single VHEC when at least one of its HDMI connections supporting HEC Functionality are part of the VHEC to be activated. Verify that the DUT keeps its HEC Functionality State when following the usual procedure that would otherwise set the DUT to Standby.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Follow the usual procedure that would otherwise set the DUT to Standby if the DUT supports Standby (see CDF).

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Following the usual procedure that would otherwise set the DUT to Standby does not change the HEC Functionality state on any of the DUT’s HDMI connections. Check with a Digital Oscilloscope.

7.6.1.3 - 21

Verify that the DUT correctly responds to a <CDC_HEC_SetState> message incorporating a single VHEC when two of its HDMI connections supporting HEC Functionality are part of the VHEC to be activated. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. The TE sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of both emulated devices as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the TE as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly responds to a <CDC_HEC_SetState> message incorporating multiple VHECs when at least one of its HDMI connections supporting HEC Functionality are part of the VHECs to be activated.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The TE sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT as the common Terminating Device and of both emulated devices as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the TE as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host xxx”] [“Ext Con xxx”][“No Error”], the [HEC Activation Field] and not the [HEC Support Field] parameter. The Host and ENC Functionality States and the [HEC Activation Field] correspond to the information given in CDF and the HECs being activated. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.

7.6.1.3 - 23

Verify that the DUT correctly responds to a <CDC_HEC_SetState> message incorporating multiple VHECs when two of its HDMI connections supporting HEC Functionality are part of the VHECs to be activated. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. The TE sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT as the common Terminating Device and of both emulated devices as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the TE as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host xxx”] [“Ext Con xxx”][“No Error”], the [HEC Activation Field] and not the [HEC Support Field] parameter. The Host and ENC Functionality States and the [HEC Activation Field] correspond to the information given in CDF and the HECs being activated. The DUT activates the HEC Functionality on its HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT keeps the HEC Functionality on its HDMI connections active when receiving a new activation message. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. The TE sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. After 5 seconds the TE sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds to each activation message with a <CDC_HEC_ReportState> message incorporating the Physical Address of the TE as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on both HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.



Test ID Test Objective Required Test Method Pass Criteria 7.6.1.3 – 25

Verify that the DUT in Standby state correctly responds to a <CDC_HEC_SetState> message incorporating a single VHEC when at least one of its HDMI connections supporting HEC Functionality are part of the VHEC to be activated. Test applies only to DUTs supporting a Standby mode (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 1. Set the DUT to Standby (see CDF). The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.



Test ID Test Objective Required Test Method Pass Criteria 7.6.1.3 – 26

Verify that the DUT in Standby state correctly responds to a <CDC_HEC_SetState> message incorporating a single VHEC when at least one of its HDMI connections supporting HEC Functionality are part of the VHEC to be activated. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality and which support a Standby mode (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 1. Each emulated device is connected to one of the DUT’s HDMI connections under test. Set the DUT to Standby (see CDF). The TE sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the first emulated device and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the TE as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.


HEACT 7.6.1.4 HEC Control - Deactivation Reference Requirement


The DUT correctly sends <CDC_HEC_SetState> messages. The DUT shall correctly respond at <CDC_HEC_SetState> message reception.




HEACT 7.6.1.4.1 DUT as a Deactivator



Verify that the DUT does not deactivate the HEC Functionality on an HDMI connection that is part of a deactivated AHEC if that HDMI connection is also part of another AHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). After 5 seconds the second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait for 5 seconds or more. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”] (see CDF).

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. Within the MRT the DUT responds to the activation message of the second emulated device with a <CDC_HEC_ReportState> message incorporating the Physical Address of the second emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Activation Field] nor the [HEC Support Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT correctly sends a <CDC_HEC_SetState> [“Deactivate HEC”] message. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope.




Verify that the DUT deactivates the HEC Functionality on an HDMI connection that is part of a deactivated AHEC if that HDMI connection is not part of another AHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). Wait for 5 seconds or more. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”] (see CDF).

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. The DUT correctly sends a <CDC_HEC_SetState> [“Deactivate HEC”] message. The HEC Functionality on the HDMI connection under test is inactive. Check with a Digital Oscilloscope.




Verify that the DUT deactivates the HEC Functionality on an HDMI connection that is part of a deactivated AHEC if that HDMI connection is not part of another AHEC. Verify that the HEC Functionality State of an HDMI connection that is not part of a deactivated AHEC remains the same at deactivation. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality, which support <CDC_HEC_SetState> as an initiator, and which also support functionality as Activator to activate at least two HECs (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). Wait for 5 seconds or more. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). Wait for 5 seconds or more. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”] (see CDF).

The DUT correctly sends both <CDC_HEC_SetState> [“Activate HEC”] messages. The DUT correctly sends a <CDC_HEC_SetState> [“Deactivate HEC”] message. The DUT keeps the HEC Functionality on its HDMI connection to the second emulated device active. The HEC Functionality on all other HDMI connections is inactive. Check with a Digital Oscilloscope.




HEACT 7.6.1.4.2 DUT as part of an AHEC deactivated by another device


Verify that the DUT does not respond to a <CDC_HEC_SetState> [“Deactivate HEC”] message incorporating an AHEC that none of its HDMI connections are part of.

Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses [“2.2.1.0”] and [“2.2.2.0”] as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] Wait for 2 seconds. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses [“2.2.1.0”] and [“2.2.2.0”] as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

The DUT ignores both <CDC_HEC_SetState> messages. The DUT does not activate the HEC Functionality on any of its HDMI connections. Check with a Digital Oscilloscope.




Verify that the DUT does not respond to a <CDC_HEC_SetState> [“Deactivate HEC”] message incorporating an AHEC that at least one of its HDMI connections is part of but the deactivating device is not the Activator of that AHEC.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the first emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT ignores the <CDC_HEC_SetState> [“Deactivate HEC”] message from the second emulated device. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope.




Verify that the DUT correctly responds to a <CDC_HEC_SetState> [“Deactivate HEC”] message incorporating an AHEC that at least one of its HDMI connections is part of.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. After reception of the deactivation message the DUT deactivates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT correctly responds to a <CDC_HEC_SetState> [“Deactivate HEC”] message incorporating an AHEC that at least one of its HDMI connections is part of. Verify that the DUT keeps the HEC Functionality on its HDMI connection active if that connection is also part of another AHEC.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT as the common Terminating Device and of both emulated devices as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has responded with a <CDC_HEC_ReportState> message and has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds to the activation message with a <CDC_HEC_ReportState> message incorporating the Physical Address of the first emulated device as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and the [HEC Activation Field] but not the [HEC Support Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. After reception of the deactivation message the DUT keeps the HEC Functionality on its HDMI connections under test activated. Check with a Digital Oscilloscope.




Verify that the DUT correctly responds to a <CDC_HEC_SetState> [“Deactivate HEC”] message incorporating an AHEC that at least one of its HDMI connections is part of. Verify that the DUT deactivates the HEC Functionality on the appropriate HDMI connections but keeps the HEC Functionality on all other HDMI connections that are not part of the deactivated AHEC. Test applies only to DUTs having at least two HDMI connections supporting HEC Functionality (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for two of the DUT’s HDMI connections supporting HEC functionality simultaneously (see CDF): The TE emulates two ID 1 devices described in HEACT Table 7-1. Each emulated device is connected to one of the DUT’s HDMI connections under test. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT as the common Terminating Device and of both emulated devices as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has responded with a <CDC_HEC_ReportState> message and has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and of the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds to the activation message with a <CDC_HEC_ReportState> message incorporating the Physical Address of the first emulated device as the Target Address, a [HEC State] of [“HEC Activation Field”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and the [HEC Activation Field] but not the [HEC Support Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on both HDMI connections under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. After reception of the deactivation message the DUT deactivates the HEC Functionality on the HDMI connection to the second emulated device and keeps the HEC Functionality on the HDMI connection to the first emulated device active. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




HEACT 7.6.1.5 HEC Control - Request Deactivation Reference Requirement


The DUT shall correctly support the <CDC_HEC_RequestDeactivation> message as an initiator. The DUT shall correctly respond at <CDC_HEC_RequestDeactivation> messages reception.




HEACT 7.6.1.5.1 DUT as an Activator


Verify that the DUT as an Activator correctly responds at reception of a deactivation request from a device that is part of the AHEC activated by the DUT. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator and which are capable as Activator of activating a HEC which is then in a state the DUT agrees to deactivation requests (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Wait until the DUT has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The emulated device sends a <CDC_HEC_ RequestDeactivation> message incorporating the DUT’s Physical Address as the Target Address and the Physical Addresses of the DUT and the emulated device as the Terminating Devices.

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. After reception of the deactivation request from the emulated device the DUT correctly sends a <CDC_HEC_SetState> [“Deactivate HEC”] incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices. The DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT which is an Activator ignores a deactivation request from a device that is part of an AHEC that was not activated by the DUT. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The first emulated device sends a <CDC_HEC_Request Deactivation> message incorporating the Physical Address of the DUT as the Target Address and the Physical Addresses of the DUT and the second emulated device as the Terminating Devices.

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT ignores the <CDC_HEC_Request Deactivation> message. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope.




Verify that the DUT which is an Activator ignores a deactivation request from a device that is part of an AHEC that was not activated by the DUT. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The second emulated device sends a <CDC_HEC_Request Deactivation> message incorporating the Physical Address of the DUT as the Target Address and the Physical Addresses of the DUT and the first emulated device as the Terminating Devices.

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT ignores the <CDC_HEC_Request Deactivation> message. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope.




HEACT 7.6.1.5.2 DUT as part of an AHEC activated by another device


Verify that the DUT correctly sends a deactivation request and deactivates the HEC Functionality on the appropriate HDMI connections after the reception of <CDC_HEC_SetState> [“Deactivate HEC”].

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has responded with a <CDC_HEC_ReportState> message and has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. Trigger the DUT to send a <CDC_HEC_Request Deactivation> message incorporating the Physical Address of the emulated device as the Target Address and the Physical Addresses of the DUT and the emulated device as the Terminating Devices (see CDF). The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT correctly sends a <CDC_HEC_Request Deactivation> message. After reception of the deactivation message the DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT correctly sends a deactivation request and it does not deactivate the HEC Functionality on its appropriate HDMI connections when the Activator does not respond with <CDC_HEC_SetState> [“Deactivate HEC”].

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has activated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. Trigger the DUT to send a <CDC_HEC_Request Deactivation> message incorporating the Physical Address of the emulated device as the Target Address and the Physical Addresses of the DUT and the emulated device as the Terminating Devices (see CDF). The emulated device does not respond with a <CDC_HEC_SetState> message.

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT correctly sends a <CDC_HEC_Request Deactivation> message. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope.




HEACT 7.6.1.6 HEC Control - Alive Reference Requirement


The DUT shall correctly support the <CDC_HEC_NotifyAlive> message as an initiator. The DUT shall correctly support the <CDC_HEC_NotifyAlive> message as a follower.




Verify that the DUT as an Activator of an AHEC correctly sends <CDC_HEC_NotifyAlive> messages and keeps track of <CDC_HEC_NotifyAlive> messages of the other devices in the AHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the [“HEC Active”] and [“No Error”] parameter. The emulated device stops sending <CDC_HEC_NotifyAlive> messages after the third message is sent.

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. Immediately after sending the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. Within each 60 to 65 seconds thereafter it repeats sending <CDC_HEC_NotifyAlive>. Within 150 seconds after the emulating device has sent the third <CDC_HEC_NotifyAlive> message the DUT correctly sends a <CDC_HEC_SetState> message with [“Deactivate HEC”] parameter and the same Terminating Devices as the previous message. After sending the deactivation message the DUT deactivates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and stops sending <CDC_HEC_NotifyAlive> messages (TE keeps monitoring for 70 seconds after deactivation).




Verify that the DUT as an Activator of an AHEC and additionally as part of another AHEC that is activated by another device, correctly sends <CDC_HEC_NotifyAlive> messages and keeps sending these messages when it deactivates its AHEC. Test applies only to DUTs supporting <CDC_HEC_SetState> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with <CDC_HEC_Report State> [..][“HEC Active”][..][..][“No Error”]. The TE waits until the DUT has sent two times <CDC_HEC_NotifyAlive>. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”] (see CDF). The TE waits until the DUT has sent two times <CDC_HEC_NotifyAlive>. Trigger the DUT to send a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”] (see CDF). The emulated device responds with <CDC_HEC_ReportState> [..][“HEC Inactive”][..][..] [“No Error”].

The DUT correctly sends a <CDC_HEC_SetState> [“Activate HEC”] message. Immediately after sending the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. Within each 60 to 65 seconds it thereafter repeats sending <CDC_HEC_NotifyAlive>. After reception of the activation message from the emulated device the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter within the MRT. The Host and ENC Functionality States correspond to the information given in CDF. The DUT correctly sends a <CDC_HEC_SetState> [“Deactivate HEC”] message. After sending the deactivation message the DUT keeps sending <CDC_HEC_NotifyAlive> messages. The TE monitors for two further messages.




Verify that the DUT after its connection becomes part of an AHEC activated by another device sends a <CDC_HEC_NotifyAlive> message randomly within 10 to 50 seconds after activation.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Repeat this loop three times: Loop start: The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”]. Wait until the DUT has responded with a <CDC_HEC_ReportState> message and has deactivated the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. Loop end.

For each cycle of the test loop: After reception of the activation message from the emulated device the DUT responds with a <CDC_HEC_ReportState> [..] [“HEC Active”][..][..][“No Error”] message within the MRT. After reception of the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. The start timing is different for each test. Within each 60 to 65 seconds it repeats sending <CDC_HEC_NotifyAlive>. After reception of the deactivation message from the emulated device the DUT responds with a <CDC_HEC_ReportState> [..][“HEC Inactive”][..][..] [“No Error”] message within the MRT. After reception of the deactivation message the DUT deactivates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and stops sending <CDC_HEC_NotifyAlive>.




Verify that the DUT after its connection becomes part of an AHEC sends <CDC_HEC_NotifyAlive> messages and continues sending these messages even when following the usual procedure that would otherwise set the DUT to standby. Test applies only to DUTs supporting a standby mode (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages. Follow the usual procedure that would otherwise set the DUT to standby mode (see CDF). Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages. Switch the DUT back to power on mode. Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages.

After reception of the activation message from the emulated device the DUT responds with a <CDC_HEC_ReportState> [..][“HEC Active”][..][..][“No Error”] message within the MRT. After reception of the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. Within each 60 to 65 seconds it repeats sending <CDC_HEC_NotifyAlive>. The DUT continues to send <CDC_HEC_NotifyAlive> messages with the correct timings.




Verify that the DUT after its connection becomes part of two AHECs correctly sends <CDC_HEC_NotifyAlive> messages and continues sending these messages when one of the AHECs is deactivated.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT as the common Terminating Device and of both emulated devices as the channels’ second Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”]. Wait until the DUT has sent two <CDC_HEC_NotifyAlive> messages.

After reception of the activation message from the first emulated device the DUT responds with a <CDC_HEC_ReportState> [..][“HEC Activation Field”] [..][..][“No Error”][HEC Activation Field] message within the MRT. After reception of the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. Within each 60 to 65 seconds it repeats sending <CDC_HEC_NotifyAlive>. After reception of the deactivation message the DUT keeps the HEC Functionality on its HDMI connection under test active and continues sending <CDC_HEC_NotifyAlive> messages with the correct timing.




Verify that the DUT which is part of multiple AHECs continues to send <CDC_HEC_NotifyAlive> messages even when a <CDC_HEC_NotifyAlive> message is missing from one Activator of one of the AHECs.

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The first emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the first emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. The second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. Wait until the DUT has sent two times <CDC_HEC_NotifyAlive>. The first emulated device waits 160s until sending the next time <CDC_HEC_NotifyAlive>. Wait until the DUT has sent two times <CDC_HEC_NotifyAlive>. The second emulated device waits 160s until sending the next time <CDC_HEC_NotifyAlive>.

After each reception of an activation message from the emulated devices the DUT responds with a <CDC_HEC_ReportState> [..][“HEC Active”][..][..][“No Error”] message within the MRT. After reception of the activation message the DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. Within each 60 to 65 seconds it repeats sending <CDC_HEC_NotifyAlive>. The DUT keeps sending <CDC_HEC_NotifyAlive> and keeps its HEC Functionality on the HDMI connection under test active (check with a Digital Oscilloscope) even after a <CDC_HEC_NotifyAlive> message from the first emulated device is missing (after 140 seconds). The DUT stops sending <CDC_HEC_NotifyAlive> and deactivates its HEC Functionality on the HDMI connection under test (check with a Digital Oscilloscope) after a <CDC_HEC_NotifyAlive> message from the second emulated device is also missing (after 140 seconds).




HEACT 7.6.1.7 HEC Control for Adjacent Devices All tests within this section apply only to DUTs supporting HEC Control for Adjacent Devices.


[HEAC: 3.2.1.5] HEC Control for Adjacent Devices

If a DUT supports HEC Control for Adjacent Devices, then The DUT shall correctly support the <CDC_HEC_SetStateAdjacent> message as an initiator. The DUT shall correctly support the <CDC_HEC_SetStateAdjacent> message as a follower.



Verify that the DUT correctly sends <CDC_HEC_SetState Adjacent> messages. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the first emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first emulated device responds with <CDC_HEC_ ReportState> [“DUT’s PA”] [“HEC Active”] [“Host Active”] [“Ext Con Active”] [“No Error”]. Wait until the DUT has activated its HEC Functionality on its HDMI connection under test. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the first emulated device as the Terminating Device and a [HEC Set State] value of [“Deactivate HEC”] (see CDF).

The DUT correctly sends a <CDC_HEC_SetState Adjacent> incorporating the Physical Address of the first emulated device and a [HEC Set State] value of [“Activate HEC”] message and does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages. The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the first emulated device and a [HEC Set State] value of [“Deactivate HEC”] and does not respond with <CDC_HEC_ReportState> to it. The DUT deactivates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope.




Verify that the DUT does not activate the HEC Functionality on its HDMI connection when receiving an error response after it has sent a <CDC_HEC_ SetStateAdjacent> message. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“Other Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Repeat the same test with the only difference that the emulated device responds by incorporating [“HEC Inactive”] instead of [“HEC Active“].

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. After reception of the error response the DUT does not activate the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages.




Verify that the DUT does not activate the HEC Functionality on its HDMI connection when receiving a response of [“HEC Not Supported”] after it has sent a <CDC_HEC_SetState Adjacent> message. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Not Supported”] [“Host Inactive”] [“Ext Con Inactive”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. After reception of the [“HEC Not Supported”] response the DUT does not activate the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages.




Verify that the DUT does not activate the HEC Functionality on its HDMI connection when receiving unexpectedly an invalid response with a [HEC Functionality State] value of [“HEC Inactive”] with a [CDC Error Code] value of [“No Error”] after it has sent a <CDC_HEC_SetState Adjacent> message (note that this is an illegal response for a responding device). Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Inactive”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter.

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. After reception of the [“HEC Inactive”] response the DUT does not activate the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages.




Verify that the DUT does not activate the HEC Functionality on its HDMI connection when receiving no response after it has sent a <CDC_HEC_SetState Adjacent> message. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device does not respond with a <CDC_HEC_ReportState> message.

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. The DUT does not activate the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages.




Verify that the DUT, which has activated a HEC by sending a <CDC_HEC_ SetStateAdjacent> deactivates the HEC Functionality on the appropriate HDMI connection at cable removal if that connection is not part of an AHEC activated by another device. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Disconnect the HDMI cable on the TE’s HDMI connection used for the test.

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the emulated device as a Terminating Device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages. After cable removal the DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope.




Verify that the DUT, which has activated a HEC by sending a <CDC_HEC_ SetStateAdjacent> message, correctly responds to received <CDC_HEC_SetState> messages when at least one of its HDMI connections is part of a channel incorporated in such a message. Test applies only to DUTs supporting <CDC_HEC_ SetStateAdjacent> as an initiator (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. Trigger the DUT to send a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the first emulated device as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). The first emulated device responds with a <CDC_HEC_ReportState> message incorporating the DUT’s Physical Address as the Target Address, a [HEC State] of [“HEC Active”] [“Host Active”] [“Ext Con Active”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Wait until DUT has activated its HEC Functionality on its HDMI connection under test. The second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Address of the DUT and of the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. After 60 seconds the second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

The DUT correctly sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the first emulated device and a [HEC Set State] value of [“Activate HEC”] and it does not respond with <CDC_HEC_ReportState> to it. After reception of the response message the DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages. After reception of the activation message the DUT sends a <CDC_HEC_ReportState> message incorporating the Target Physical Address of the second emulated device, a [HEC State] of [“HEC Active”][“Host xxx”][“Ext Con xxx”][“No Error”], and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The [Host Functionality State] and [ENC Functionality State] correspond to the DUT’s CDF. The DUT starts sending <CDC_HEC_NotifyAlive> messages within 10 to 50 seconds. The DUT keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope. After reception of the deactivation message the DUT keeps the HEC Functionality on its HDMI connection under test activated (check with a Digital Oscilloscope) and stops sending <CDC_HEC_NotifyAlive>.




Verify that the DUT correctly responds to <CDC_HEC_SetState Adjacent> messages and ignores <CDC_HEC_ SetStateAdjacent> messages received from devices that are not adjacent to the DUT. Test applies only if the DUT supports <CDC_HEC_SetState Adjacent> as a follower (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The second emulated device sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the DUT as the Termination Device and a [HEC Set State] value of [“Activate HEC”]. After 5 seconds the first emulated device sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the DUT as the Termination Device and a [HEC Set State] value of [“Activate HEC”]. After 5 seconds the second emulated device sends a <CDC_HEC_Set StateAdjacent> message incorporating the Physical Address of the DUT as the Termination Device and a [HEC Set State] value of [“Deactivate HEC”]. After 5 seconds the first emulated device sends a <CDC_HEC_Set StateAdjacent> message incorporating the Physical Address of the DUT as the Termination Device and a [HEC Set State] value of [“Deactivate HEC”].

The DUT ignores the first <CDC_HEC_SetState Adjacent> message. Within the MRT after reception of the second activation message the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the first emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test. The HEC Functionality on all other HDMI connections remains inactive. Check with a Digital Oscilloscope. The DUT ignores the deactivation message sent from the second emulated device and keeps the HEC Functionality on its HDMI connection under test activated. Check with a Digital Oscilloscope. At reception of the deactivation message from the first emulated device the DUT deactivates the HEC Functionality on its HDMI connection under test. Check with a Digital Oscilloscope. The DUT does not send <CDC_HEC_NotifyAlive> messages.




Verify that the DUT, which is part of a HEC activated by a <CDC_ HEC_SetStateAdjacent> message, correctly responds to received <CDC_HEC_SetState> messages when at least one of its HDMI connections is part of a channel incorporated in such a message. Test applies only if the DUT supports <CDC_HEC_SetState Adjacent> as a follower (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Perform the test for one of the DUT’s HDMI connections supporting HEC functionality (see CDF): The TE emulates the ID 3 devices described in HEACT Table 7-1. The first emulated device sends a <CDC_HEC_ SetStateAdjacent> message incorporating the Physical Address of the DUT as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF). Wait until DUT has activated its HEC Functionality on its HDMI connection under test. After 60 seconds the second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and of the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Activate HEC”]. After 60 seconds the first emulated device sends a <CDC_HEC_SetState Adjacent> message incorporating the Physical Address of the DUT as the Terminating Device and a [HEC Set State] value of [“Deactivate HEC”]. After 70 seconds the second emulated device sends a <CDC_HEC_SetState> message incorporating the Physical Addresses of the DUT and of the second emulated device as the Terminating Devices and a [HEC Set State] value of [“Deactivate HEC”].

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the first emulated device as the Target Address, a [HEC State] of [“HEC Active”] [“Host xxx”] [“Ext Con xxx”][“No Error”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. The Host and ENC Functionality States correspond to the information given in CDF. The DUT activates the HEC Functionality on its HDMI connection under test (check with a Digital Oscilloscope) and does not send <CDC_HEC_NotifyAlive> messages. Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the second emulated device. The DUT keeps the HEC Functionality on its HDMI connection under test activated (check with anDigital Oscilloscope) and starts sending <CDC_HEC_ NotifyAlive> messages within 10 to 50 seconds. After reception of the deactivation message from the first emulated device the DUT keeps the HEC Functionality on its HDMI connection under test activated (check with Digital Oscilloscope) and continues to send <CDC_HEC_NotifyAlive> messages. After reception of the deactivation message from the second emulated device the DUT deactivates the HEC Functionality on its HDMI connection under test and stops sending <CDC_HEC_ NotifyAlive>.




Verify that the DUT correctly responds at reception of a <CDC_ HEC_SetStateAdjacent> message incorporating a DUT’s HDMI connection not supporting HEC Functionality. Test applies only if the DUT supports <CDC_HEC_SetState Adjacent> as a follower and if the DUT has at least one HDMI connection on which HEC Functionality is not supported (see CDF).

Perform a full reset of the DUT e.g. by toggling AC-on to AC-off to AC-on (see CDF). Repeat the test for all of the DUT’s HDMI connections not supporting HEC functionality (see CDF): The TE emulates the ID 1 device described in HEACT Table 7-1. The emulated device sends a <CDC_HEC_Set StateAdjacent> message incorporating the Physical Address of the DUT as the Terminating Device and a [HEC Set State] value of [“Activate HEC”] (see CDF).

Within the Maximum Response Time the DUT responds with a <CDC_HEC_ReportState> message incorporating the Physical Address of the emulated device as the Target Address, a [HEC State] of [“HEC Not Supported”] [“Host xxx”] [“Ext Con xxx”] [“Initiator does not have the requested capability”] and neither the [HEC Support Field] nor the [HEC Activation Field] parameter. Check the DUT with a Digital Oscilloscope to ensure that no HEC Functionality is activated on its HDMI connection under test.




HEACT 7.6.2 CDC_HPD (CDC Hot Plug Detect signal) HEACT 7.6.2.1 Overview All HDMI devices supporting HEC functionality shall also support CDC and the CDC_HPD feature of CDC. Therefore, for all devices supporting HEC functionality, the tests within this CDC_HPD section shall be executed depending on whether a device is a Source, a Sink or a Repeater.

Before and during the execution of the CDC_HPD tests, the TE shall support all CDC messages as a follower and the <CDC_HPD_SetState> [Input port number] [“CP&EDID_ENABLE”] message as an initiator except where otherwise defined. After the TE’s support for these messages is enabled and before the execution of each CDC_HPD test, a full reset of the DUT shall be performed e.g. by toggling AC-on to AC-off to AC-on (see CDF). Note that HDMI Sinks verify CDC support of a connected HDMI Source by sending at least one CDC message. After the full reset of the DUT and before the execution of each CDC_HPD test, the TE shall send a <CDC_HPD_SetState> [Input port number] [“CP&EDID_ENABLE”] message in case it emulates an HDMI Sink except where otherwise defined, and it shall respond to all CDC messages in case it emulates an HDMI Source or an HDMI Sink except where otherwise defined.

During the execution of the CDC_HPD tests, the TE shall verify that all <CDC_HPD_SetState> messages sent by the DUT incorporate the [Input port number] and the [HPD State] parameter within only one data block and that the [Input port number] parameter is incorporated in the four most significant bits within that data block.

During the execution of the CDC_HPD tests, the TE shall verify that all <CDC_HPD_ReportState> messages sent by the DUT incorporate the [HPD State] and the [CDC_HPD_Error_Code] parameter within only one data block and that the [HPD State] parameter is incorporated in the four most significant bits within that data block.

HEACT 7.6.2.1.1 Overview for Source Devices For all Source devices supporting HEC functionality, all tests under section HEACT 7.6.2.2 shall be executed.

For DUTs acting as Source devices all CDC_HPD messages are tested independent of whether a DUT supports CP (e.g. HDCP) or not (as indicated in HEACT Figure 7-5).

Test tools like an Ethernet analyzer or a TV for monitoring are not necessary for the tests within section HEACT 7.6.2.2, since only the CDC_HPD feature is tested within this section.

(Source Device)

A/V Sink

CDC LogicalTest Equipment

1

N

DUTSink TE

HEC, CDC, CDC_HPDSource functionality

HDMI Output ports

I2C Analyzer

HEACT Figure 7-5 CDC_HPD test concept for Source Devices



HEACT 7.6.2.1.2 Overview for Sink devices For all Sink devices supporting HEC functionality, all tests under section HEACT 7.6.2.3 shall be executed.

Since it is mandatory for Sink devices to support the <CDC_HPD_SetState> message, it shall be indicated in the CDF how to trigger this message to be sent. This method shall trigger the Sink DUT to either send a <CDC_HPD_SetState>[Input port number]([“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”], or [“CP&EDID_DISABLE_ENABLE”]) message in case it supports CP or to send a <CDC_HPD_SetState>[Input port number]([“EDID_DISABLE”] and [“EDID_ENABLE”], or [“EDID_DISABLE_ENABLE”]) message in case it does not support CP.

The following is an example of such an indication in the CDF:

When HDMI input port 1 is being tested, the user first selects another HDMI input port and then returns to HDMI input port 1 as shown in HEACT Figure 7-6.

Test tools like an Ethernet analyzer or an A/V source are not necessary for the tests within section HEACT 7.6.2.3, since only the CDC_HPD feature is tested within this section.

A/V Source

(Sink Device)1

M

DUTSource TE

HEC, CDC, CDC_HPDSink functionality

TriggeringMethod

HDMI Input ports

CDC LogicalTest Equipment

HEACT Figure 7-6 CDC_HPD test concept for Sink Devices

HEACT 7.6.2.1.3 Overview for Repeater Devices Repeater devices consist of one or more HDMI input ports and one or more HDMI output ports and are capable of passing HDMI signals received on their HDMI inputs through to their HDMI outputs. As specified in the HDMI main specification, all HDMI input ports shall support fully compliant HDMI Sink functionality and all HDMI output ports shall support fully compliant HDMI Source functionality.

Devices that consist of one or more HDMI input ports and one or more HDMI output ports and that are not capable of forwarding any CDC_HPD signal or Physical HPD signal from HDMI output ports to HDMI input ports, shall not be considered Repeater devices with respect to CDC_HPD testing. The CDC_HPD functionality of the HDMI input ports and HDMI output ports of those devices shall be tested independently and shall therefore be considered as either Source device functionality (refer to HEACT 7.6.2.1.1) or Sink device functionality (refer to HEACT 7.6.2.1.2). HEACT Table 7-3 provides an overview about HDMI Repeater devices, their functionalities, and the tests to be executed depending on the different functionalities. Note that HDMI Repeater devices that support forwarding functionality are described as Repeater devices hereinafter for the remainder of this Section HEACT 7.

For all Repeater devices supporting HEC functionality, all tests under section HEACT 7.6.2.4 shall be executed.

HDMI Repeater devices signal the detection of an active downstream HDMI Sink to upstream HDMI Sources by sending <CDC_HPD_SetState> messages to each upstream HDMI Source that is directly connected in order to transfer the EDID from the Sink to the Sources as described in HEACT Figure 7-7.



Repeater devices supporting HEC functionality and therefore CDC_HPD might not support HEC functionality on all of its HDMI inputs and HDMI outputs. The different types of CDC_HPD support of a Repeater device are classified into the three types, Type-I, Type-II and Type-III.

Repeater device Type-I: The Repeater supports CDC_HPD on both, the HDMI input port and the HDMI output port under test.

Repeater device Type-II: The Repeater supports CDC_HPD on the HDMI input port but not on the HDMI output port under test.

Repeater device Type-III: The Repeater supports CDC_HPD on the HDMI output port but not on the HDMI input port under test.

HEACT Table 7-3 Summary of Repeater Devices’ functionalities and CDC_HPD testing

No. Forwarding functionality *2) Repeater Type Tests to be executed for the DUT

Type-I All tests in sections HEACT 7.6.2.2 and HEACT 7.6.2.3.

Type-II All tests in section HEACT 7.6.2.3.

1 No Physical Addresses on DUT’s Sink and Source side are not linked (split architecture, see CEC Figure 9B or 10B) Testing as Source device and as Sink device.

Type-III All tests in section HEACT 7.6.2.2.

Type-I All tests in sections HEACT 7.6.2.2 and HEACT 7.6.2.3 and test ID 7.6.2.4-27 *1).

Type-II All tests in section HEACT 7.6.2.3 and test ID 7.6.2.4-34 *1).

2 No Usual case (the Physical Address of DUT’s Sink functionality is derived in normal way from the connection of DUT’s Source functionality). Testing as Source device and as Sink device.

Type-III All tests in section HEACT 7.6.2.2 and test ID 7.6.2.4-41 *1).

Type-I All tests in sections HEACT 7.6.2.4.1 and HEACT 7.6.2.4.2.

Type-II All tests in sections HEACT 7.6.2.4.3 and HEACT 7.6.2.4.4.

3 Yes Testing as Repeater device.

Type-III All tests in section HEACT 7.6.2.4.5

*1) These tests verify the forwarding of Physical HPD signals from HDMI output ports to HDMI input ports in case the DUT’s Physical Address changed. Therefore these tests shall be also executed for DUTs that do not support forwarding functionality but that support Physical Address propagation.

*2) Set to Yes, if the DUT supports at least one of the following forwarding functionalities:

a) The DUT forwards a CDC_HPD message at the reception of a CDC_HPD message.

b) The DUT forwards a physical HPD signal at the reception of a CDC_HPD message.

c) The DUT forwards a CDC_HPD message at reception of a physical HPD signal.



The basic CDC_HPD signaling rule for a Repeater device supporting forwarding functionality is the following:

At reception of [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] messages, or a [“CP&EDID_DISABLE_ENABLE”] message from a device directly connected to an HDMI downstream port the Repeater sends [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] messages, or a [“CP&EDID_DISABLE_ENABLE”] message to each device directly connected to an HDMI upstream port. At reception of [“EDID_DISABLE”] and [“EDID_ENABLE”] messages, or a [“EDID_DISABLE_ENABLE”] message from a device directly connected to an HDMI downstream port the Repeater sends [“EDID_DISABLE”] and [“EDID_ENABLE”] messages, or a [“EDID_DISABLE_ENABLE”] message to each device directly connected to an HDMI upstream port.

Apart from this basic CDC_HPD signaling rule, many more CDC_HPD signaling rules exist due to the various possible combinations of a Repeater device connected with a Source and a Sink device.

HEACT Table 7-4 shows a summary of all CDC_HPD signaling rules to signal CDC_HPD downstream port messages to upstream ports.

Sinkfunctionality

A/VSource

Sourcefunctionality

(Repeater Device)

A/V Sink1

M

1

N

DUTSource TE Sink TE

CDC LogicalTest

EquipmentCDC Logical

Test Equipment

I2C Analyzer

HEACT Figure 7-7 CDC_HPD test concept for Repeater Devices

HEACT Table 7-4 CDC_HPD test summary for Repeater Devices

Repeater device

No.

Directly connected

Source device supports

CDC_HPD?

Type CP support?

Sent messages to upstream port

Received messages from downstream port

1

Yes -I Yes

CP&EDID_DISABLE and CP&EDID_ENABLE, or CP&EDID_DISABLE_ENABLE


2

Yes -I Yes


Physical HPD

3

No -I Yes Physical HPD


4

No -I No *1)


5 No -I Any Physical HPD Physical HPD

6 Yes -I Any

EDID_DISABLE and EDID_ENABLE, or EDID_DISABLE_ENABLE




Repeater device

No.

Directly connected

Source device supports

CDC_HPD?

Type CP support?

Sent messages to upstream port

Received messages from downstream port

7 No -I Any *1)


8

Yes -I No EDID_DISABLE and EDID_ENABLE, or EDID_DISABLE_ENABLE


9 Yes -I No


Physical HPD

10 Yes

-II

Yes CP&EDID_DISABLE and CP&EDID_ENABLE, or CP&EDID_DISABLE_ENABLE

Physical HPD

11 No -II Any Physical HPD Physical HPD

12 Yes -II

No EDID_DISABLE and EDID_ENABLE, or EDID_DISABLE_ENABLE

Physical HPD

13 Any

-III

Yes Physical HPD CP&EDID_DISABLE and CP&EDID_ENABLE, or CP&EDID_DISABLE_ENABLE

14 Any

-III

No *1) CP&EDID_DISABLE and CP&EDID_ENABLE, or CP&EDID_DISABLE_ENABLE

15 Any -III Any Physical HPD Physical HPD

16 Any -III

Any *1) EDID_DISABLE and EDID_ENABLE, or EDID_DISABLE_ENABLE

*1) Repeater may send a Physical HPD signal to the Source device or may not send any signals (No. 4, No. 7, No. 14 and No. 16).

No. 5, No. 11 and No. 15 are not tested regarding CDC_HPD except when a Physical Address in the EDID data is changed.

No.1: Sending the [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] upstream port messages, or the [“CP&EDID_DISABLE_ENABLE”] upstream port message can be triggered by either the [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] downstream port messages, or the [“CP&EDID_DISABLE_ENABLE”] downstream port message.

No. 6: Sending the [“EDID_DISABLE”] and [“EDID_ENABLE”] upstream port messages, or the [“EDID_DISABLE_ENABLE”] upstream port message can be triggered by either the [“EDID_DISABLE”] and [“EDID_ENABLE”] downstream port messages, or the [“EDID_DISABLE_ENABLE”] downstream port message.

No. 8: Sending the [“EDID_DISABLE”] and [“EDID_ENABLE”] upstream port messages, or the [“EDID_DISABLE_ENABLE”] upstream port message can be triggered by either the [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] downstream port messages, or the [“CP&EDID_DISABLE_ENABLE”] downstream port message.



No.1, No. 2, No. 10: If the DUT sends a <CDC_HPD_SetState> [“CP&EDID_DISABLE”] message to the Source TE and the Source TE responds with a <CDC_HPD_ReportState> [“CP&EDID DISABLE”] [“No Error”] message, then the DUT should respond by sending a <CDC_HPD_SetState> [“CP&EDID_ENABLE”] message.

No. 6, No. 8, No. 9, No. 12: If the DUT sends a <CDC_HPD_SetState> [“EDID_DISABLE”] message to the Source TE and the Source TE responds with a <CDC_HPD_ReportState> [“EDID DISABLE”] [“No Error”] message, then the DUT should respond by sending a <CDC_HPD_SetState> [“EDID_ENABLE”] message.

HEACT 7.6.2.2 Source DUT Reference Requirement

[HEAC: 3.2.2.2] HDMI Sources supporting the CDC_HPD feature 1) shall correctly process <CDC_HPD_SetState> messages and respond with <CDC_HPD_ReportState> messages. 2) shall correctly read and process EDID.




Required Test Method Test ID

Test Objective Required Test Method Pass Criteria

7.6.2.2 - 1

Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID.

The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message with the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. Detect whether or not the TE’s EDID data is read by the DUT.

Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message. Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message.

7.6.2.2 - 2


The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. Detect whether or not the TE’s EDID data is read by the DUT.

Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message.



Test ID


7.6.2.2 – 3


The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message with the [HPD_State] parameter [“EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. Detect whether or not the TE’s EDID data is read by the DUT.

Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message. Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“EDID_ENABLE”] [“No Error”] message. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“EDID_ENABLE”] [“No Error”] message.

7.6.2.2 - 4


The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. Detect whether or not the TE’s EDID data is read by the DUT.

Within the Maximum Response Time the DUT responds with a <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“No Error”] message. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“No Error”] message.




HEACT 7.6.2.3 Sink DUT HEACT 7.6.2.3.1 Sink DUT’s CDC_HPD message


[HEAC: 3.2.2.2] HDMI Sinks which support HEC shall support the <CDC_HPD_SetState> message as an initiator and the <CDC_HPD_ReportState> message as a follower. HDMI Sinks supporting the CDC_HPD feature shall use the <CDC_HPD_SetState> message to communicate the availability of the Sink’s EDID and to initiate a content protection reset in the Source instead of toggling the Physical HPD line. A Sink shall not send a <CDC_HPD_SetState> message with any of the following parameters unless it supports content protection: [“CP&EDID_DISABLE”], [“CP&EDID_ENABLE”], [“CP&EDID_DISABLE_ENABLE”] After reception of a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] (or [“EDID_DISABLE”]) [“No Error”] message, the HDMI Sink is permitted to transit to the EDID unreadable state and within this state it may change EDID data. Prior to sending a <CDC_HPD_SetState> [Input port number] [“CP&EDID_ENABLE”] (or [“EDID_ENABLE”]) message, the HDMI Sink shall transit to the EDID readable state.



Test ID


7.6.2.3 - 1

Verify that the DUT supports the CP&EDID mode. Test applies only to DUTs supporting CP (see CDF).

Check CDF At least the DUT supports either [“CP&EDID_DISABLE_ENABLE”] or [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”].



Test ID


7.6.2.3 - 2

Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Test applies only to DUTs supporting [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message to the DUT within the Maximum Response Time. After reception of this message, the DUT should send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”]. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message to the DUT within the Maximum Response Time.

The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the Source TE.

7.6.2.3 - 3

Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Test applies only to DUTs supporting [“CP&EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message to the DUT within the Maximum Response Time.

The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE.

7.6.2.3 - 4

Verify that the DUT supports the EDID mode. Test applies only to DUTs without CP functionality support (see CDF).

Check CDF At least the DUT supports either [“EDID_DISABLE_ENABLE”] or [“EDID_DISABLE”] and [“EDID_ENABLE”]. The DUT neither supports [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] nor [“CP&EDID_DISABLE_ENABLE”].



Test ID


7.6.2.3 - 5

Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Test applies only to DUTs supporting [“EDID_DISABLE”] and [“EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message to the DUT within the Maximum Response Time. After reception of this message, the DUT should send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_ENABLE”]. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“EDID_ENABLE”] [“No Error”] message to the DUT within the Maximum Response Time.

The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_ENABLE”] to the Source TE.

7.6.2.3 - 6

Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Test applies only to DUTs supporting [“EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“No Error”] message to the DUT within the Maximum Response Time.

The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the Source TE.




HEACT 7.6.2.3.2 Sink DUT’s Physical HPD Reference Requirement

[HEAC: 3.1.3] HDMI Sinks supporting CDC shall keep the physical HPD pin high. HDMI Sinks supporting CDC shall keep the physical HPD pin low for a short period that is at least 100ms in the following cases: • it changes the Physical Address in the HDMI VSDB of its own EDID

presented to the source;

• it receives no response or an Error response after sending a <CDC_HPD_SetState> message;

• to meet the requirement that the HPD pin may be asserted only when the +5V Power line from the Source is detected.




Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“Other Error”] message to the DUT within the Maximum Response Time. The TE responds with the same message in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“CP&EDID_DISABLE”] parameter.

The DUT sets the Physical HPD pin to low.




Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“CP&EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“Other Error”] message to the DUT within the Maximum Response Time. The TE responds with the same message in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“CP&EDID_DISABLE_ENABLE”] parameter.


7.6.2.3 - 9

Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“EDID_DISABLE”] and [“EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“EDID_DISABLE”] [“Other Error”] message to the DUT within the Maximum Response Time. The TE responds with the same message in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“EDID_DISABLE”] parameter.





Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE responds by sending a <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“Other Error”] message to the DUT within the Maximum Response Time. The TE responds with the same message in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“EDID_DISABLE_ENABLE”] parameter.


7.6.2.3 - 11

Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“CP&EDID_DISABLE”] and [“CP&EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE does not respond. The TE does also not respond in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“CP&EDID_DISABLE”] parameter.


7.6.2.3 - 12

Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“CP&EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE does not respond. The TE does also not respond in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“CP&EDID_DISABLE_ENABLE”] parameter.





Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“EDID_DISABLE”] and [“EDID_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the TE by referring to the CDF. At reception of this message, the TE does not respond. The TE does also not respond in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“EDID_DISABLE”] parameter.


7.6.2.3 - 14

Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message. Test applies only to DUTs supporting [“EDID_DISABLE_ENABLE”] (see CDF).

Trigger the DUT to send a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the TE by referring to the CDF. At reception of this message, the TE does not respond. The TE does also not respond in case the DUT retries sending the <CDC_HPD_SetState> message incorporating the [“EDID_DISABLE_ENABLE”] parameter.





HEACT 7.6.2.4 Repeater DUT

HEACT 7.6.2.4.1 Repeater Device Type-I CDC HPD message Reference Requirement

[HEAC: 3.2.2.2] HDMI Sources supporting the CDC_HPD feature 1) shall correctly process <CDC_HPD_SetState> messages and respond with <CDC_HPD_ReportState> messages. 2) shall correctly read and process EDID. HDMI Sinks which support HEC shall support the <CDC_HPD_SetState> message as an initiator and the <CDC_HPD_ReportState> message as a follower. HDMI Sinks supporting the CDC_HPD feature shall use the <CDC_HPD_SetState> message to communicate the availability of the Sink’s EDID and to initiate a content protection reset in the Source instead of toggling the Physical HPD line. A Sink shall not send a <CDC_HPD_SetState> message with any of the following parameters unless it supports content protection: [“CP&EDID_DISABLE”], [“CP&EDID_ENABLE”], [“CP&EDID_DISABLE_ENABLE”] After reception of a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] (or [“EDID_DISABLE”]) [“No Error”] message, the HDMI Sink is permitted to transit to the EDID unreadable state and within this state it may change EDID data. Prior to sending a <CDC_HPD_SetState> [Input port number] [“CP&EDID_ENABLE”] (or [“EDID_ENABLE”]) message, the HDMI Sink shall transit to the EDID readable state.






Type-I CDC_HPD message (No. 1 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs supporting CP functionality (see CDF).

7.6.2.4 - 1

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator.

1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE.



Test ID


7.6.2.4 - 2


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE.

Type-I CDC_HPD message (No. 6 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs regardless of whether or not CP functionality is supported (see CDF).

7.6.2.4 - 3

Execute Test 7.6.2.4-1 with the following replacements: Replace [“CP&EDID_DISABLE”] with [“EDID_DISABLE”]. Replace [“CP&EDID_ENABLE”] with [“EDID_ENABLE”].

Replace [“CP&EDID_DISABLE_ENABLE”] with [“EDID_DISABLE_ENABLE”].

7.6.2.4 - 4





Test ID


Type-I CDC_HPD message (No. 8 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs without CP functionality support (see CDF).

7.6.2.4 - 5


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_DISABLE_ENABLE”] to the Source TE.



Test ID


7.6.2.4 - 6


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“EDID_DISABLE_ENABLE”] to the Source TE.



Test ID


Type-I CDC_HPD message (No. 3 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source without CDC_HPD functionality. Test applies only to Type-I DUTs supporting CP functionality (see CDF).

7.6.2.4 - 7

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to the Source TE to low after <CDC_HPD_SetState> message reception from the Sink TE.

The Source TE does not respond to CDC messages. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. The Source TE reads the DUT’s EDID.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT signals Physical HPD low for more than 100ms to the Source TE after receiving the <CDC_HPD_SetState> message from the Sink TE.

7.6.2.4 - 8

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to the Source TE to low after <CDC_HPD_SetState> message reception from the Sink TE.

The Source TE does not respond to CDC messages. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. The Source TE reads the DUT’s EDID.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID. 2. DUT Sink functionality: The DUT signals Physical HPD low for more than 100ms to the Source TE after receiving the <CDC_HPD_SetState> message from the Sink TE.



Test ID


Type-I CDC_HPD message (No. 4 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source without CDC_HPD functionality. Test applies only to Type-I DUTs without CP functionality support (see CDF).

7.6.2.4 - 9

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify either that the DUT sets the Physical HPD pin to the Source TE to low or that the DUT’s EDID data is not changed after <CDC_HPD_SetState> message reception from the Sink TE.

The Source TE does not respond to CDC messages. The Source TE reads the DUT’s EDID. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. If the Source TE does not detect the Physical HPD pin being set to low within 2s after <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message reception, the Source TE reads the DUT’s EDID and compares the EDID data with the EDID data previously read.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT signals Physical HPD low for more than 100ms to the Source TE after receiving the <CDC_HPD_SetState> message from the Sink TE. Case 2: The DUT’s EDID data is not changed.



Test ID


7.6.2.4 - 10


The Source TE does not respond to CDC messages. The Source TE reads the DUT’s EDID. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. If the Source TE does not detect the Physical HPD pin being set to low within 2s after <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message reception, the Source TE reads the DUT’s EDID and compares the EDID data with the EDID data previously read.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID. 2. DUT Sink functionality: Case 1: The DUT signals Physical HPD low for more than 100ms to the Source TE after receiving the <CDC_HPD_SetState> message from the Sink TE. Case 2: The DUT’s EDID data is not changed.

Type-I CDC_HPD message (No. 7 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source without CDC_HPD functionality. Test applies only to Type-I DUTs regardless of whether or not CP functionality is supported (see CDF).

7.6.2.4 - 11

Execute Test 7.6.2.4-9 with the following replacements: Replace [“CP&EDID_DISABLE”] with [“EDID_DISABLE”].

Replace [“CP&EDID_ENABLE”] with [“EDID_ENABLE”].

7.6.2.4 - 12

Execute Test 7.6.2.4-10 with the following replacements: Replace [“CP&EDID_DISABLE_ENABLE”] with [“EDID_DISABLE_ENABLE”].



Test ID


Type-I CDC_HPD message (No. 2 in HEACT Table 7-4) One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs supporting CP functionality (see CDF).

7.6.2.4 - 13

1. DUT Source functionality: Verify that the DUT correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator.

The Sink TE does not send CDC messages. 1. The Sink TE sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID after receiving the Physical HPD signal. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE.

Type-I CDC_HPD message (No. 9 in HEACT Table 7-4) One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs without CP functionality support (see CDF).

7.6.2.4 - 14






HEACT 7.6.2.4.2 Repeater Device Type-I Physical HPD Reference Requirement

[HEAC: 3.1.3] HDMI Sinks supporting CDC shall keep the physical HPD pin high. HDMI Sinks supporting CDC shall keep the physical HPD pin low for a short period that is at least 100ms in the following cases: • it changes the Physical Address in the HDMI VSDB of its own EDID









Type-I Physical HPD due to an error response One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs supporting CP functionality (see CDF).

7.6.2.4 - 15

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message.

1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message incorporating an error code of [“Other Error”] to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


7.6.2.4 - 16


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message incorporating an error code of [“Other Error”] to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

Type-I Physical HPD due to an error response One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs regardless of whether or not CP functionality is supported (see CDF).

7.6.2.4 - 17



7.6.2.4 - 18





Test ID


Type-I Physical HPD due to an error response One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs without CP functionality support (see CDF).

7.6.2.4 - 19


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message incorporating an error code of [“Other Error”] to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


7.6.2.4 - 20


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE responds by sending a <CDC_HPD_ReportState> message incorporating an error code of [“Other Error”] to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE_ENABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


Type-I Physical HPD due to no response within the Maximum Response Time One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs supporting CP functionality (see CDF).

7.6.2.4 - 21

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message.

1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE does not respond.The Source TE does also not respond in case the DUT resends the <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sends a <CDC_HPD_SetState> message incorporating an [HPD_State] parameter of either [“CP&EDID_DISABLE”] or [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After the Source TE did not respond within the Maximum Response Time, the DUT might resend the <CDC_HPD_SetState> message.The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


7.6.2.4 - 22


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE does not respond. The Source TE does also not respond in case the DUT resends the <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sends a <CDC_HPD_SetState> message incorporating an [HPD_State] parameter of either [“CP&EDID_DISABLE”] or [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After the Source TE did not respond within the Maximum Response Time, the DUT might resend the <CDC_HPD_SetState> message.The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

Type-I Physical HPD due to no response within the Maximum Response Time One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs regardless of whether or not CP functionality is supported (see CDF).

7.6.2.4 - 23



7.6.2.4 - 24





Test ID


Type-I Physical HPD due to no response within the Maximum Response Time One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs without CP functionality support (see CDF).

7.6.2.4 - 25


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE does not respond. The Source TE does also not respond in case the DUT resends the <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sends a <CDC_HPD_SetState> message incorporating an [HPD_State] parameter of either [“EDID_DISABLE”] or [“EDID_DISABLE_ENABLE”] to the Source TE. After the Source TE did not respond within the Maximum Response Time, the DUT might resend the <CDC_HPD_SetState> message.The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


7.6.2.4 - 26


1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message, the Source TE does not respond. The Source TE does also not respond in case the DUT resends the <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sends a <CDC_HPD_SetState> message incorporating an [HPD_State] parameter of either [“EDID_DISABLE”] or [“EDID_DISABLE_ENABLE”] to the Source TE. After the Source TE did not respond within the Maximum Response Time, the DUT might resend the <CDC_HPD_SetState> message.The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

Type-I Physical HPD due to Physical Address change (in case of No. 1, 2, 6, 8 or 9 in HEACT Table 7-4). One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-I DUTs regardless of whether or not CP functionality is supported (see CDF). Skip this test if the DUT does not support Physical Address propagation (see CDF).

7.6.2.4 - 27

1. DUT Source functionality: Verify that the DUT correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to low after its Physical Address is changed.

1. The Sink TE changes its Physical Address and sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should set the Physical HPD pin to the Source TE to low. The Source TE reads the DUT’s EDID.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID. 2. DUT Sink functionality: The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. The DUT has changed its Physical Address in its EDID appropriately.




HEACT 7.6.2.4.3 Repeater Device Type-II CDC HPD message Reference Requirement





Required Test Method Test ID Test Objective Required Test Method Pass Criteria Type-II (No. 10 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs supporting CP functionality (see CDF).

7.6.2.4 - 28


1. The Sink TE sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID after receiving the Physical HPD signal. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE.



Test ID Test Objective Required Test Method Pass Criteria Type-II (No. 12 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs without CP functionality support (see CDF).

7.6.2.4 - 29


1. The Sink TE sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message the Source TE responds by sending a <CDC_HPD_ReportState> message to the DUT within the Maximum Response Time.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID after receiving the Physical HPD signal. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“EDID_DISABLE”] [“No Error”] message from the Source TE, the DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_ENABLE”] to the Source TE. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“EDID_DISABLE_ENABLE”] to the Source TE.


HEACT 7.6.2.4.4 Repeater Device Type-II Physical HPD Reference Requirement

[HEAC: 3.1.3] HDMI Sinks supporting CDC shall keep the physical HPD pin high. HDMI Sinks supporting CDC shall keep the physical HPD pin low for a short period that is at least 100ms in the following cases: • it changes the Physical Address in the HDMI VSDB to its own EDID







Required Test Method Test ID Test Objective Required Test Method Pass Criteria Type-II Physical HPD due to an error response One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs supporting CP functionality (see CDF).

7.6.2.4 - 30

1. DUT Source functionality: Verify that the DUT correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Verify that the DUT sets the Physical HPD pin to low after it received a response with an error code to its <CDC_HPD_SetState> message.

The Sink TE does not send CDC messages. 1. The Sink TE sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message the Source TE responds by sending a <CDC_HPD_ReportState> message incorporating an error code of [“Other Error”] within the Maximum Response Time. The TE responds with the same error code in case the DUT retries sending the <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID after receiving the Physical HPD signal. 2. DUT Sink functionality: Case 1: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms. Case 2: The DUT sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After receiving the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“Other Error”] message from the Source TE, the DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

Type-II Physical HPD due to an error response One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs without CP functionality support (see CDF).

7.6.2.4 - 31





Test ID Test Objective Required Test Method Pass Criteria Type-II Physical HPD due to no response within the Maximum Response Time One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs supporting CP functionality (see CDF).

7.6.2.4 - 32

1. DUT Source functionality: Verify that the DUT correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT correctly supports the <CDC_HPD_SetState> message as an initiator. Verify that the DUT sets the Physical HPD pin to low after it received no response to its <CDC_HPD_SetState> message.

The Sink TE does not send CDC messages. 1. The Sink TE sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID.2. The DUT should send a <CDC_HPD_SetState> message to the Source TE. At reception of the <CDC_HPD_SetState> message the Source TE responds by sending a <CDC_HPD_ReportState> message after 1.2s (Maximum Response Time elapsed). The TE responds after the same time in the case the DUT retries to send <CDC_HPD_SetState> message.

1. DUT Source functionality: The DUT reads the Sink TE’s EDID after receiving the Physical HPD signal. 2. DUT Sink functionality: The DUT sends a <CDC_HPD_SetState> message incorporating an [HPD_State] parameter of either [“CP&EDID_DISABLE”] or [“CP&EDID_DISABLE_ENABLE”] to the Source TE. After the Source TE did not respond within the Maximum Response Time, the DUT might resend the <CDC_HPD_SetState> message.The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

Type-II Physical HPD due to no response within the Maximum Response Time One TE as Sink without CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs without CP functionality support (see CDF).

7.6.2.4 - 33



Type-II Physical HPD due to Physical Address change (in the case of No. 10 or 12 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-II DUTs regardless of whether or not CP functionality is supported (see CDF). Skip this test if the DUT does not support Physical Address propagation (see CDF).

7.6.2.4 - 34


The Sink TE does not send CDC messages. 1. The Sink TE changes its Physical Address and sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should set the Physical HPD pin to the Source TE to low. The Source TE reads the DUT’s EDID.





HEACT 7.6.2.4.5 Repeater Device Type-III CDC HPD message Reference Requirement







Type-III CDC_HPD message (No. 13 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-III DUTs supporting CP functionality (see CDF).

7.6.2.4 - 35

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to low after it received the <CDC_HPD_SetState> message from the Sink TE.

1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.

7.6.2.4 - 36

1. DUT Source functionality: Verify that the DUT responds within the Maximum Response Time at reception of a <CDC_HPD_SetState> message and correctly reads the Sink’s EDID. 2. DUT Sink functionality: Verify that the DUT sets the Physical HPD pin to low after it received the <CDC_HPD_SetState> message from the Sink TE.

1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: The DUT sets the Physical HPD pin to the Source TE to low for more than 100ms.



Test ID


Type-III CDC_HPD message (No. 14 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-III DUTs without CP functionality support (see CDF).

7.6.2.4 - 37


The Source TE reads the DUT’s EDID. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. If the Source TE does not detect the Physical HPD pin being set to low within 2s after <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message reception, the Source TE reads the DUT’s EDID and compares the EDID data with the EDID data previously read.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE”] [“No Error”] message within the Maximum Response Time. The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sets the Physical HPD pin to the Source TE to low. Case 2: The DUT’s EDID data is not changed.



Test ID


7.6.2.4 - 38


The Source TE reads the DUT’s EDID. 1. The Sink TE sends a <CDC_HPD_SetState> message incorporating the [HPD_State] parameter [“CP&EDID_DISABLE_ENABLE”] to the DUT. The DUT should respond with a <CDC_HPD_ReportState> message. Measure the time period between both messages. 2. The DUT should set the Physical HPD pin to the Source TE to low. If the Source TE does not detect the Physical HPD pin being set to low within 2s after <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message reception, the Source TE reads the DUT’s EDID and compares the EDID data with the EDID data previously read.

1. DUT Source functionality: The DUT responds with a <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message within the Maximum Response Time. The DUT reads the Sink TE’s EDID after sending the <CDC_HPD_ReportState> [“CP&EDID_DISABLE_ENABLE”] [“No Error”] message. 2. DUT Sink functionality: Case 1: The DUT sets the Physical HPD pin to the Source TE to low. Case 2: The DUT’s EDID data is not changed.

Type-III CDC_HPD message (No. 16 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-III DUTs regardless of whether or not CP functionality is supported (see CDF).

7.6.2.4 - 39


Replace [“CP&EDID_ ENABLE”] with [“EDID_ENABLE”].

7.6.2.4 - 40

Execute Test 7.6.2.4-38 with the following replacements: Replace [“CP&EDID_DISABLE_ENABLE”] with [“EDID_DISABLE_ENABLE”].

Type-III Physical HPD due to Physical Address change (in the case of No. 13 in HEACT Table 7-4) One TE as Sink with CDC_HPD functionality and another TE as Source with CDC_HPD functionality. Test applies only to Type-III DUTs (see CDF). Skip this test if the DUT does not support Physical Address propagation (see CDF).

7.6.2.4 - 41


1. The Sink TE changes its Physical Address and sets the Physical HPD pin to the DUT to low for 110ms. The DUT should start reading the Sink TE’s EDID. 2. The DUT should set the Physical HPD pin to the Source TE to low. The Source TE reads the DUT’s EDID.




HEACT 8 Networking HEACT 8.1 Networking test Overview

HEACT 8.1.1 Networking test steps In this clause, Agilent N5610A Converter and CEC/CDC Controller setup procedure are described.

Those procedure activate DUT’s networking part of HEC prior to perform the Networking test.

Networking test steps are shown in HEACT Figure 8-1.

HEACT Figure 8-1 Networking Test Steps



HEACT 8.1.2 Agilent N5610A Converter setup procedure

The N5610A HDMI Ethernet Converter allows you to test the HEAC functionality of an HDMI device. This converter translates a 100Mb/s Ethernet signal on an RJ45 connector to an HDMI connector. Figure 8-2 shows N5610A front panel.

HEACT Figure 8-2 Agilent N5610A Converter

To connect HEC output of DUT using CEC/CDC Controller - Ensure that the DUT=SINK/DUT=SOURCE button is set to source (in). This button

determines whether the DUT is an HDMI source or sink device.

- Ensure that the HEAC Enable button is out to prevent the flow of Ethernet signals until the connection with the DUT has been initiated, that is, the CDC and EDID information has been exchanged with the DUT.

- Connect an RJ45 Ethernet cable from LAN port to the Agilent N2X Test Card.

- Connect an HDMI cable from Secondary HDMI port to the CEC/CDC Controller.

- Connect an HDMI cable that supports Ethernet from DUT (HEAC) port to the DUT.

- Connect the power cable to the supplied power adaptor and plug it in.

To connect HEC input of DUT using CEC/CDC Controller - Ensure that the DUT=Sink / DUT = Source button is set to sink (out).



- Connect an HDMI cable from Secondary HDMI port to the CEC/CDC Controller.



To connect HEC input of DUT without CEC/CDC Controller. - Ensure that the DUT=Sink / DUT = Source button is set to sink (out).







HEACT 8.1.3 CEC/CDC Controller setup procedure Before performing Networking test, HDMI Ethernet Channel (HEC) shall be activated by CDC

messages.

CEC/CDC Controller can generate these messages by performing script file.

There are some cases of HEC activation, and multiple script files are provided for each case.

HEACT 8.1.4 Agilent N5610A Converter enable procedure - After the appropriate information has been exchanged through CEC line, press “HEAC

Enable” button to allow the flow of Ethernet signals from the N2X test card.

HEACT 8.1.5 CEC/CDC Controller close procedure: - Stop performing the script file on CEC/CDC Controller, and close it.



HEACT 8.1.6 Target HEC Device for Networking test HEACT 8.1.6.1 Target HEC Device Types for Networking test • Type e1 and Type e4 with a single HEC port skip Networking test.

• For HEC device with multiple HEC ports (ex. Type e2, Type e3, Type e4 with multiple HEC ports), perform the test in this section.

• HEC device with two HEC ports and no network connection skip Test ID HEACT 8-4.

See HEACT Table 8-1.

Where Np indicates the number of network ports and it is depending on HEC device Types.

HEACT Table 8-1

YES: Need to test

Np is defined for each Type:

For Test ID HEACT 8-1, 8-2, 8-4, and 8-5

• Type e2: Number of the HEC port. • Type e3: Number of the HEC port plus number of Ethernet port (RJ45). • Type e4: Number of the HEC port plus number of Ethernet port (RJ45). (Not including

Ethernet ports for which forwarding of MAC frames from/to the HEC ports is not supported.) For Test ID HEACT8-3

• Type e2: Number of the HEC output port. • Type e3: Number of the HEC output port plus number of Ethernet port (RJ45). • Type e4: Number of the HEC output port plus number of Ethernet port (RJ45). (Not

including Ethernet ports for which forwarding of MAC frames from/to the HEC ports is not supported.)



HEACT 8.1.6.2 Test rule for more than 3 ports If number of DUT ports are more than three, two kinds of test rules are provided. Test has only

to be performed either one.

HEACT 8.1.6.2.1 One Time Test Rule Any 3 ports are chosen at random as shown in Figure 8-3, and test is completed just for once.

HEACT Figure 8-3 One Time Test Rule



HEACT 8.1.6.2.2 Port Rotation Rule 3 ports are chosen from port #1 in serial order, and perform the test repeatedly as shown in

Figure 8-4.

HEACT Figure 8-4 Port Rotation Rule



HEACT 8.1.6.3 Other comments / restrictions for networking CTS The MAC address table aging time of the target HEC Device shall be adequate to not disturb the test. If the target HEC Device is not required to support RSTP by the HDMI specification, the BPDU shall nonetheless be forwarded. Target HEC Device that has Ethernet port(s) (RJ45) shall be set as follows.

• Auto-negotiate link mode: disabled • Duplex mode: Full • Link rate: 100Mbps

HEACT 8.2 Networking Test Methods

Test ID HEACT 8-1: Packet filtering/forwarding

Reference Requirement HDMI Supplement 2 section 5.5

Test Objective

Verify that packet filtering and forwarding functionality of layer 2 switch.



If Np == 1, then SKIP.

If Np == 2, then perform 1.

If Np ≥ 3, then perform 2.

Where Np is the number of the HEC ports plus the number of Ethernet ports (RJ45). (Not including Ethernet ports for which forwarding of MAC frames to/from the HEC ports is not supported.)

1. Test for Np is equal to 2 1) Connect Tester port #1 and #2 to DUT port #1 and #2 respectively.

(Place a converter between DUT port and Tester port when DUT port is an HEC connector.)

2) Send packets from Tester port #1 to DUT port #1 and from Tester port #2 to DUT port #2 simultaneously at high traffic rate (7500 frame/sec) in 1 second in order to register source MAC addresses into a Filtering Database. The parameters of packets sent from Tester port #1 are; DST = 00-0c-03-00-00-02, SRC = 00-0c-03-00-00-01, LENGTH = 1518 Byte, DATA = not specified. The parameters of packets sent from Tester port #2 are; DST = 00-0c-03-00-00-01, SRC = 00-0c-03-00-00-02, LENGTH = 1518 Byte, DATA = not specified.

3) Send 80000 packets with the same parameters at high traffic rate (7500 frame/sec). 4) Count packets in step 3) at all Tester ports.



5) Verify if next results are all correct. At Tester port #1,

The number of received packets are 80000, and all packets are sent from Tester port #2.

At Tester port #2, The number of received packets are 80000, and all packets are sent from Tester port #1.

6) If all results are correct then PASS, else FAIL.

2. Test for Np is more than or equal to 3 1) Connect Tester port #1, #2 and #3 to DUT port #1, #2 and #3 respectively.


2) Send packets from Tester port #1 to DUT port #1, from Tester port #2 to DUT port #2 and from Tester port #3 to DUT port #3 simultaneously at high traffic rate (7500 frame/sec) in 1 second in order to register source MAC addresses into a Filtering Database. The parameters of packets sent from Tester port #1 are; DST = 00-0c-03-00-00-02, SRC = 00-0c-03-00-00-01, LENGTH = 1518 Byte, DATA = not specified. The parameters of packets sent from Tester port #2 are; DST = 00-0c-03-00-00-03, SRC = 00-0c-03-00-00-02, LENGTH = 1518 Byte, DATA = not specified. The parameters of packets sent from Tester port #3 are; DST = 00-0c-03-00-00-01, SRC = 00-0c-03-00-00-03, LENGTH = 1518 Byte, DATA = not specified.

3) Send 80000 packets with the same parameters at high traffic rate (7500 frame/sec). 4) Count packets in step 3) at all Tester ports. 5) Verify if next results are all correct,




6) If number of DUT port is greater than three, perform the test according to One Time Test Rule as shown in Figure 8-3, or rotate DUT ports conforming to Port Rotation Rule and execute step 1) through step 5) as shown in Figure 8-4.

7) If all results are correct then PASS else FAIL.



Recommended Test Setup – Agilent N2X

Setup 51. Test ID HEACT 8-1: Packet filtering/forwarding

No. Description Recommended TE Reference Qty. 1 Traffic Generator Agilent N2X 1 2 HDMI Ethernet Converter Agilent N5610A 1-3

1. Test for Np is equal to 2 1) Connect N2X port 101/1 and 101/2 to DUT port 1 and 2 respectively. 2) Disable Auto-negotiate link mode and set Duplex Mode to Full and set Link Rate to 100M if

DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a StreamGroup1 on port 101/1.

DST = 00:0c:03:00:00:02, SRC = 00:0c:03:00:00:01, LENGTH = 1518 Byte Select 101/1 and 101/2 as expected destination port.

6) Define the Profile1 for StreamGroup1. Set mode to single shot: 80000 frames and set frames/s to 7500.

7) Create a StreamGroup2 on port 101/2. DST = 00:0c:03:00:00:01, SRC = 00:0c:03:00:00:02, LENGTH = 1518 Byte Select 101/1 and 101/2 as expected destination port.


9) Measure 4 streams using stream statistics. 101/1->101/2 StreamGroup1, 101/1->101/1 StreamGroup1 101/2->101/1 StreamGroup2, 101/2->101/2 StreamGroup2

10) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 11) Press Traffic button to send learning traffic. 12) After the learning traffic stops, set test mode to once and set test duration to 00:00:11 on

Test Session properties. Press Traffic button to start test.



13) Verify stream statistics results. 101/1->101/2 StreamGroup1 Rx Test Packets is 80000. 101/2->101/1 StreamGroup2 Rx Test Packets is 80000. 101/1->101/1 StreamGroup1 Rx Test Packets is 0. 101/2->101/2 StreamGroup2 Rx Test Packets is 0.

14) Perform the test. If OK, then PASS else FAIL.

2. Test for Np is more than or equal to 3 1) Connect N2X port 101/1, 101/2 and 101/3 to DUT port 1, 2 and 3 respectively. 2) Disable Auto-negotiate link mode and set Duplex Mode to Full and set Link Rate to 100M if


DST = 00:0c:03:00:00:02, SRC = 00:0c:03:00:00:01, LENGTH = 1518 Byte Select 101/1, 101/2 and 101/3 as expected destination port.


7) Create a StreamGroup2 on port 101/2. DST = 00:0c:03:00:00:03, SRC = 00:0c:03:00:00:02, LENGTH = 1518 Byte Select 101/1, 101/2 and 101/3 as expected destination port.


9) Create a StreamGroup3 on port 101/3. DST = 00:0c:03:00:00:01, SRC = 00:0c:03:00:00:03, LENGTH = 1518 Byte Select 101/1, 101/2 and 101/3 as expected destination port.


11) Measure 9 streams using stream statistics. 101/1->101/2 StreamGroup1, 101/1->101/3 StreamGroup1, 101/1->101/1 StreamGroup1 101/2->101/3 StreamGroup2, 101/2->101/1 StreamGroup2, 101/2->101/2 StreamGroup2 101/3->101/1 StreamGroup3, 101/3->101/2 StreamGroup3, 101/3->101/3 StreamGroup3

12) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 13) Press Traffic button to send learning traffic. 14) After the learning traffic stops, set test mode to once and set test duration to 00:00:11 on

Test Session properties. Press Traffic button to start test. 15) Verify stream statistics results.

101/1->101/2 StreamGroup1 Rx Test Packet is 80000. 101/2->101/3 StreamGroup2 Rx Test Packet is 80000. 101/3->101/1 StreamGroup3 Rx Test Packet is 80000. 101/1->101/3 StreamGroup1 Rx Test Packets is 0. 101/2->101/1 StreamGroup2 Rx Test Packets is 0. 101/3->101/2 StreamGroup3 Rx Test Packets is 0. 101/1->101/1 StreamGroup1 Rx Test Packets is 0. 101/2->101/2 StreamGroup2 Rx Test Packets is 0. 101/3->101/3 StreamGroup3 Rx Test Packets is 0.



16) Perform the test. If OK, then jump to step 17), else FAIL. 17) If number of DUT port is greater than three, perform the test according to One Time Test

Rule as shown in Figure 8-3, or rotate DUT ports conforming to Port Rotation Rule and execute step 1) through step 16) as shown in Figure 8-4.

If every test is completed without FAIL, then PASS.

Agilent N2X QuickTest Software will be used to automate the test sequence.

Test ID HEACT 8-2: Forwarding of BPDU

Reference Requirement HDMI Supplement 2 section 5.7.1 802.1D-2004

Test Objective

Verify that BPDUs are forwarded from/to DUT ports.



If CDF field HEC_RSTP_function == ”Y“, then SKIP.







2) Send 10 BPDUs from Tester port #1 to DUT port #1 at low traffic rate (around 10 frame/sec).

3) The parameters of packets sending from Tester port #1 are; 4) DST = 01-80-c2-00-00-00

SRC = 00-0c-03-00-00-00 5) Count number of BPDUs which Destination MAC address and Source MAC address is

identical to BPDUs in step 2) at Tester port #2. 6) If counts at Tester port #2 are equal to 10, then OK, else NG. 7) If all result are OK then PASS else FAIL. Note: BPDU parameters are not specified.





2) Send 10 BPDUs from Tester port #1 to DUT port #1 at low traffic rate (around 10 frame/sec).

3) The parameters of packets sending from Tester port #1 are; 4) DST = 01-80-c2-00-00-00

SRC = 00-0c-03-00-00-00 5) Count number of BPDUs which Destination MAC address and Source MAC address is

identical to BPDUs in step 2) at Tester port #2 and port #3. 6) If both counts are equal to 10, then OK else NG. 7) If number of DUT port is greater than three, perform the test according to One Time Test


8) If all results are OK then PASS else FAIL.

Note: BPDU parameters are not specified.


Setup 52. Test ID HEACT 8-2: Forwarding of BPDU






Set Layer2 encapsulation to Ethernet SAP. Select Rapid Spanning Tree BPDU from “Add Protocol” and set Mac address as follows. DST = 01:80:c2:00:00:00 SRC = 00:0c:03:00:00:00

6) Define the Profile 1 for StreamGroup1. Set mode to single shot: 10 frames and set frames/s to 10.

7) Create a frame matcher to filter the DST and SRC on 101/2. 8) Select Rx Frame Matcher #1 from measurements. 9) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 10) Press Traffic button to start test. 11) Measure the number of Rx frame matcher packets on port 101/2.

If the Rx frames matcher result is 10 then OK else NG. 12) Perform the test. If OK, then PASS, else FAIL.





Set Layer2 encapsulation to Ethernet SAP. Select Rapid Spanning Tree BPDU from “Add Protocol” and set Mac address as follows. DST = 01:80:c2:00:00:00 SRC = 00:0c:03:00:00:00

6) Define the Profile 1 for StreamGroup1. Set mode to single shot: 10 frames and set frames/s to 10.

7) Create a frame matcher to filter the DA and SA for 101/2 and 101/3. 8) Select Rx Frame Matcher #1 from measurements. 9) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 10) Press Traffic button to start test. 11) Measure the number of Rx frame matcher packets on port 101/2 and 101/3.

If both Rx frames matcher results are 10 then OK else NG. 12) Perform the test. If OK, then jump to step 13), else FAIL. 13) If number of DUT port is greater than three, perform the test according to One Time Test






Test ID HEACT 8-3: RSTP functionality

Reference Requirement HDMI Supplement 2 section 5.7.1 RSTP 802.1D-2004

Test Objective

Verify loop detection and removal functionality.



If CDF field HEC_RSTP_function == ”N“ and Np ≥ 2, then FAIL.




Where Np is the number of the HEC output ports plus the number of Ethernet ports (RJ45). (Not including Ethernet ports for which forwarding of MAC frames to/from the HEC ports is not supported.)

The bridge priority and path cost of DUT shall be declared in CDF field HEC_Bridge_Priority and HEC_Bridge_Port_Path_Cost respectively.

The recommended path cost value for 100Mbps can be referred in 802.1D-2004.



2) Create a RSTP bridge with lower bridge priority on Tester port #1 than that of DUT. 3) Create a RSTP bridge with higher bridge priority on Tester port #2 than that of port #1. 4) Establish RSTP sessions. 5) Verify that port #1 is a root bridge.

If port #1 is not a root bridge then FAIL. 6) Verify that port #2 is not a root bridge.

If port #2 is a root bridge then FAIL. 7) Verify that port #1 is Designated Port (DP).

If port #1 is not DP then FAIL. 8) Verify that port #2 is Root Port (RP).

If port #2 is not RP then FAIL. 9) If all result are correct, then PASS else FAIL.



HEACT Figure 8-5 RSTP Test Topology for HEC port is equal to 2.



2) Create a RSTP bridge on Tester port #1. 3) Create a RSTP bridge with low root path cost on Tester port #2. 4) Create a RSTP bridge with high root path cost on Tester port #3. 5) Emulate a root bridge behind Tester port #2 and #3. 6) Establish RSTP sessions. 7) Send packets more than or equal to 1,000 frame/sec from Tester port #1 to Root Bridge.

The parameters of packets sent from Tester port #1 are; DST = 00-00-00-aa-bb-cc, SRC = 00-0c-03-00-00-01, LENGTH = 64 Byte, DATA = not specified.

8) Verify loop detection and removal functionality. Verify that DUT forwards the traffic to the appropriate path. If the traffic is received at Tester port #3 or not received at Tester port #2, then FAIL.

9) Change the root path cost of Tester port #2 higher than the cost of Tester port #3. Verify loop detection, removal functionality, and convergence time. If the traffic is received at Tester port #2 or not received at Tester port #3, then FAIL. If convergence time is less than 5 sec then PASS, else FAIL.





HEACT Table 8-2 Recommended Parameter Value

Parameter Recommended Value (*1) Bridge Hello Time 2.0 Bridge Max Age 20.0 Bridge Forward Delay 15.0 *1) DUT shall use Recommended Value. Parameter Recommended Value Range Bridge Priority 32 768 0-61 440 in steps of 4 096 (*2) Port Priority 128 0-240 in steps of 16 *2) DUT shall not use 0 for Bridge priority. Parameter Recommended Value Recommended Range (*3) Port Path Cost (100Mbps) 200 000 20 000-2 000 000

*3) DUT shall use within Recommended Range.



HEACT Figure 8-6 RSTP Test Topology for HEC port is more than or equal to 3




Setup 53. Test ID HEACT 8-3: RSTP functionality

No. Description Recommended TE Reference Qty. 1 Traffic Generator Agilent N2X 1 RSTP Emulator Agilent N2X 1 2 HDMI Ethernet Converter Agilent N5610A 1-3


DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a RSTP Bridge on port 101/1

Set the Bridge MAC address to 00:00:00:00:00:aa. Set the Bridge Priority to 0. Set the Root Bridge MAC address to 00:00:00:00:00:aa. Set the Root Bridge Priority to 0. Set the Root Path Cost to 0.

6) Create a RSTP Bridge on port 101/2. Set the Bridge MAC address to 00:00:00:00:00:bb. Set the Bridge Priority to 32768. Set the Root Bridge MAC address to 00:00:00:00:00:bb. Set the Root Bridge Priority to 32768. Set the Root Path Cost to 0.

7) Enable the RSTP emulations by clicking the checkbox of each emulation. 8) Open the RSTP emulations by right clicking on the emulation and selecting the “Open

Active".



9) At this point, you should notice that all emulations proceed to the forwarding state. RSTP emulations will reach the forwarding state in a couple of seconds.

10) Verify Rapid spanning tree information in RSTP Bridge instance detail on 101/1. Role = Designated Port. Root bridge = Yes.

11) Verify Rapid spanning tree information in RSTP Bridge instance detail on 101/2. Role = Root Port. Root bridge = No.



DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a RSTP Bridge on port 101/1

Set the Bridge MAC address to 00:00:00:00:00:aa. Set the Bridge Priority to 32768. Set the Root Bridge MAC address to 00:00:00:00:00:aa. Set the Root Bridge Priority to 32768.

6) Create a RSTP Bridge on port 101/2. Set the Bridge MAC address to 00:00:00:00:00:bb. Set the Bridge Priority to 32768. Set the Root Bridge MAC address to 00:00:00:aa:bb:cc. Set the Root Bridge Priority to 0. Set the Root Path Cost to 200000.

7) Create a RSTP Bridge on port 101/3. Set the Bridge MAC address to 00:00:00:00:00:cc. Set the Bridge Priority to 32768. Set the Root Bridge MAC address to 00:00:00:aa:bb:cc. Set the Root Bridge Priority to 0. Set the Root Path Cost to 200001.

8) Create a StreamGroup1 on port 101/1. DST=00:00:00:aa:bb:cc, SRC = 00:0c:03:00:00:01, LENGTH = 64 Byte Select 101/2 and 101/3 as expected destination port.

9) Define the Profile for StreamGroup1. Set mode to continuous and set frames/s to 2500.

10) Enable the RSTP emulations by clicking the checkbox of each emulation. 11) Open the RSTP emulations by right clicking on the emulation and selecting the “Open

Active". 12) At this point, you should notice that all emulations proceed to the forwarding state.

RSTP emulations will reach the forwarding state in a couple of seconds. 13) Set test mode to continuous on Test Session properties. 14) Press Traffic button to send StreamGroup1. 15) Verify that DUT forwards the traffic to port 101/2.

If the traffic is received at port 101/2 and not received at port 101/3, then PASS, else FAIL. 16) Change the route path cost of the RSTP emulation of 101/2 from 200000 to 200010. 17) If the traffic is received at port 101/3 and not received at port 101/2, then PASS, else FAIL.



18) Measure the convergence time by using capture or API. Convergence Time = the timestamp of the first frame received on 101/3 – the timestamp of the last frame received on101/2.

19) If convergence time is less than 5 sec then PASS, else FAIL. 20) If number of DUT port is greater than three, perform the test according to One Time Test




Test ID HEACT 8-4: Queue Control

Reference Requirement HDMI Supplement 2 section 5.8 Queue 802.1Q-2003

Test Objective

Verify that number of queues is greater than or equal to four.

Note: Strict priority is assumed.



1) Check to see if CDF field HEC_VLAN_ID has the value 0, 1, or 4095.

If CDF field HEC_VLAN_ID =0, 1, or 4095 then FAIL. If CDF field HEC_VLAN_ID is not specified, this field is assumed an appropriate value.

2) Connect Tester port #1, #2 and #3 to DUT port #1, #2 and #3 respectively. (Place a converter between DUT port and Tester port when DUT port is an HEC connector.)

3) Select combination of priority values for tagged MAC frames in HEACT Table 8-3. HEACT Table 8-3 the combinations of priority values

Combination number

Priority value #1

Priority value #2

#1 7 1

#2 7 3

#3 7 5

#4 5 1

#5 5 3

#6 3 1



4) Send learning packet which VID equals 0 and priority values equals CDF field

HEC_VLAN_ID from Tester port #3 at low traffic rate (around 10 frame/sec). The parameters of packets sending from Tester port #3 are; DST = FF-FF-FF-FF-FF-FF, SRC = 00-0c-03-00-00-03, LENGTH = 1500 Byte, DATA = not specified.

5) Generate a stream containing packets with VID equal to CDF field HEC_VLAN_ID and priority values equal to Priority value #1 of combination #1, i.e. 7, and packets with VID equals CDF field HEC_VLAN_ID and priority values equals Priority value #2 of combination #1, i.e. 1, such that the ratio of the packets with each priority is equal to 1, and such packets are sent in alternating manner, i.e. Port#1: 717171..., Port#2: 717171.... . Send 8000 packets of this stream simultaneously at high traffic rate (around 8,000 frame/sec) on both Tester port #1 and port #2. The parameters of packets sending from Tester port #1 are; DST = 00-0c-03-00-00-03, SRC = 00-0c-03-00-00-01, LENGTH = 1500 Byte, DATA = not specified. The parameters of packets sending from Tester port #2 are; DST = 00-0c-03-00-00-03, SRC = 00-0c-03-00-00-02, LENGTH = 1500 Byte, DATA = not specified.

6) Count number of packets from 1st packet for 1 second at Tester port #3 7) Observable results are as follow.

HEACT Table 8-4 The observable results

Combination number

Observable Results

#1 n(priority #7) greater than n(priority #1)






Note: n(priority #x) means number of arrived packets which has priority #x tag.

8) Select next combination of priority values and execute step 4) through 7). Repeat for all combinations of priority values.

9) Repeat step 4) through 8) for 10 times. 10) If number of DUT port is greater than three, perform the test according to One Time Test


11) If all results are correct, then PASS else FAIL.




Setup 54. Test ID HEACT 8-4: Queue Control


1) Connect N2X port 101/1, 101/2 and 101/3 to DUT port 1, 2 and 3 respectively. 2) Disable Auto-negotiate link mode and set Duplex Mode to Full and set Link Rate to 100M if

DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a StreamGroup1 with VID equals CDF field HEC_VLAN_ID and priority equals one

of selected combinations of priority values on port 101/1. Use list of filed modifier. DST = 00:0c:03:00:00:03, SRC = 00:0c:03:00:00:01, LENGTH = 1500 Byte

6) Create a StreamGroup2 with VID equals CDF field HEC_VLAN_ID and priority equals one of selected combinations of priority values on port 101/2. Use list of filed modifier. DST = 00:0c:03:00:00:03, SRC = 00:0c:03:00:00:02, LENGTH = 1500 Byte

7) Create a StreamGroup3 with VID equals CDF field HEC_VLAN_ID and priority equals 0 on port 101/3. DST = FF:FF:FF:FF:FF:FF, SRC = 00:0c:03:00:00:03, LENGTH = 1500 Byte

8) Define the Profile1 for StreamGroup1 and StreamGroup2. Set mode to single shot: 8,000 frames and set 8,000 frames/s.

9) Define the Profile1 for StreamGroup3. Set mode to continuous and set frames/s to 10.

10) Disable Profile 1 on 101/1 and 101/2. 11) Set filed statistics for vlan priority on 101/3.



12) Set test mode to once and set test duration to 00:00:01 and disable trickle time on Test Session properties.

13) Press Traffic button to send learning traffic. 14) Enable Profile 1 on 101/1 and 101/2. 15) Press Traffic button to start test. 16) Measure the number of Rx Test packets per vlan priority value. 17) If the results are correct as Table 8-4 then OK else NG. 18) Repeat this step for all combinations of priority values. 19) Repeat step 13) through 18) for 10 times. 20) If number of DUT port is greater than three, perform the test according to One Time Test


21) If all results are correct, then PASS else FAIL.


Test ID HEACT 8-5: Unchanged Priority Tag value

Reference Requirement HDMI Supplement 2 section 5.8 802.1Q-2003

Test Objective

Verify that priority tag values of sent packets are unchanged.







Check to see if CDF field HEC_VLAN_ID has the value 0, 1, 4095.

If CDF field HEC_VLAN_ID =0, 1, or 4095 then FAIL.

If CDF field HEC_VLAN_ID is not specified, this field is assumed an appropriate value.



1. Test for Np is equal to 2 1) Connect test port #1 and #2 to DUT port #1 and #2 respectively.


2) Set CDF field HEC_VLAN_ID to VID and 7 to user priority of tagged packets. 3) Send packets from Tester port #1 to DUT port #1 and from Tester port #2 to DUT port #2

simultaneously at low traffic rate (around 10 frame/sec) in 1 second in order to register source MAC addresses into FIB. The parameters of packets sending from Tester port #1 are; DST = 00-0c-03-00-00-02, SRC = 00-0c-03-00-00-01, LENGTH = 64 Byte, DATA = not specified. The parameters of packets sending from Tester port #2 are; DST = 00-0c-03-00-00-01, SRC = 00-0c-03-00-00-02, LENGTH = 64 Byte, DATA = not specified.

4) Send the same 10 packets from each port at low traffic rate (around 10 frame/sec). 5) Count number of packets at Tester port #1 and port #2 under next conditions respectively.

At Tester port #1, count number of packets. Verify priority tag value for each packet whether it is identical to the one sent from tester port #2, or not. If number of packet is 10 and priority tag value of all packets is identical then OK else NG. At Tester port #2, count number of packets. Verify priority tag value for each packet whether it is identical to the one sent from tester port #1, or not. If number of packet is 10 and priority tag value of all packets is identical then OK else NG.

6) Decrement user priority value and execute step 3) through 5). Repeat until user priority value is zero.


2. Test for Np is more than or equal to 3 1) Connect test port #1, #2 and #3 to DUT port #1, #2 and #3 respectively.


2) Set CDF field HEC_VLAN_ID to VID and 7 to user priority of tagged packets. 3) Send packets from Tester port #1 to DUT port #1, from Tester port #2 to DUT port #2 and

from Tester port #3 to DUT port #3 simultaneously at low traffic rate (around 10 frame/sec) in 1 second in order to register source MAC addresses into FIB. The parameters of packets sending from Tester port #1 are; DST = 00-0c-03-00-00-02, SRC = 00-0c-03-00-00-01, LENGTH = 64 Byte, DATA = not specified. The parameters of packets sending from Tester port #2 are; DST = 00-0c-03-00-00-03, SRC = 00-0c-03-00-00-02, LENGTH = 64 Byte, DATA = not specified. The parameters of packets sending from Tester port #3 are; DST = 00-0c-03-00-00-01, SRC = 00-0c-03-00-00-03, LENGTH = 64 Byte, DATA = not specified.

4) Send the same 10 packets from each port at low traffic rate (around 10 frame/sec).



5) Count number of packets at Tester port #1, port #2 and port #3 under next conditions respectively. At Tester port #1, count number of packets. Verify priority tag value for each packet whether it is identical to the one sent from tester port #3, or not. If number of packet is 10 and priority tag value of all packets is identical then OK else NG. At Tester port #2, count number of packets. Verify priority tag value for each packet whether it is identical to the one sent from tester port #1, or not. If number of packets is 10 and priority tag value of all packets is identical then OK else NG. At Tester port #3, count number of packets. Verify priority tag value for each packet whether it is identical to the one sent from tester port #2, or not. If number of packets is 10 and priority tag value of all packets is identical then OK else NG.

6) Decrement user priority value and execute step 3) through 5). Repeat until user priority value is zero.




Setup 55. Test ID HEACT 8-5: Unchanged Priority Tag value





DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a StreamGroup1 with VID equals CDF field HEC_VLAN_ID and priority equals 7

on port 101/1. DST = 00:0c:03:00:00:02, SRC = 00:0c:03:00:00:01, LENGTH = 64 Byte


7) Create a StreamGroup2 with VID equals CDF field HEC_VLAN_ID and priority equals 7 on port 101/2. DST = 00:0c:03:00:00:01, SRC = 00:0c:03:00:00:02, LENGTH = 64 Byte


9) Set field statistics for vlan priority on all ports. 10) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 11) Press Traffic button to send learning traffic. 12) After the learning traffic stops, press Traffic button to start test. 13) Verify filed statistics results.

If the number of vlan priority 7 Rx test packets at all ports are 10 then OK else NG. If other priority values which are not transmitted are counted, then NG.

14) Decrease the user priority value. Repeat this step until user priority value is zero.

15) Perform the test. If OK , then PASS, else FAIL.


DUT port is HEC. 3) Ensure that the link is active at all N2X ports. 4) Disable ARP and NDP. 5) Create a StreamGroup1 with VID equals 0 and priority equals 7 on port 101/1.

DST = 00:0c:03:00:00:02, SRC = 00:0c:03:00:00:01, LENGTH = 64 Byte 6) Define the Profile1 for StreamGroup1.

Set mode to single shot: 10 frames and set frames/s to 10. 7) Create a StreamGroup2 with VID equals 0 and priority equals 7 on port 101/2.


Set mode to single shot: 10 frames and set frames/s to 10. 9) Create a StreamGroup3 with VID equals 0 and priority equals 7 on port 101/3.


Set mode to single shot: 10 frames and set frames/s to 10. 11) Set field statistics for vlan priority on all ports. 12) Set test mode to once and set test duration to 00:00:01 on Test Session properties. 13) Press Traffic button to send learning traffic. 14) After the learning traffic stops, press Traffic button to start test.



15) Verify filed statistics results. If the number of vlan priority 7 Rx test packets at all ports are 10 then OK else NG. If other priority values which are not transmitted are counted, then NG

16) Decrease the user priority value. Repeat this step until user priority value is zero.

17) Perform the test. If OK, then jump to step 18), else FAIL. 18) If number of DUT port is greater than three, perform the test according to One Time Test






Appendix 1 – Capabilities Declaration Form (CDF) The following declaration must be completed prior to testing. The options that are supported will be used to determine which groups of tests are performed.

Source, Sink, and Repeater products also require the completion and submission of the CDC CDF and Networking Test CDF if HEC == “Y”.

Source/Sink/Repeater Characteristics Product Category and Info

Field Name Field Definition Choices

HDMI_output_count How many HDMI output ports are on product? 0…X

HDMI_input_count How many HDMI input ports are on product? 0…X

HEC Related Characteristics


HEC Does the device support HDMI_Ethernet? Y/N

If Source, identify which HDMI output supports HEC.

If Sink, how many HDMI inputs support HEC?

If Sink, identify which HDMI inputs support HEC.

HEC_Ext_Network_

Conn Definition

The number of Ethernet ports (RJ45) for which MAC forwarding to the HEC ports is supported.

0…N

How to identify the HEC_Ext_Network_Conn port(s)?

ARP and IP will be common for one device (if a device supports multiple IP addrs, only one is needed for testing):

Ethernet_ARP Does the device support ARP Protocol? Y/N



HEC Characteristics


HEC_VLAN_ID If the device support VLAN, what is the number of VLAN ID registered to the HEC port ?

<any number>

HEC_RSTP_function Does the device support RSTP ? Y/N

HEC_bridge_priority If HEC_RSTP_Function is ‘Y’ then: What is the number of Bridge Priority ?

<any number>

HEC_bridge_port_Path_cost If HEC_RSTP_Function is ‘Y’ then: What is the number of Port Path Cost ?

<any number>



Source Characteristics

A copy of the following table must be completed for each of the HDMI output ports on the product (field HDMI_output_count, above). If several ports have identical characteristics, only one of the following needs to be completed for that group or ports. Please indicate which ports are covered by this section.

Which HDMI output ports are

covered by this section?


MAC_Address XX:XX:XX:XX:XX:XX

IP Does DUT support IP? Y/N

Set_IP address If DUT supports IP, fill in the IP address.

XX.XX.XX.XX

ARC_RX Does the device support HDMI_ARC? Y/N



Sink Characteristics

A copy of the following table must be completed for each of the HDMI input ports on the product (field HDMI_input_count, above). If several ports have identical characteristics, only one of the following needs to be completed for that group or ports. Please indicate which ports are covered by this section.

Which HDMI Input ports are

covered by this section?


MAC_Address XX:XX:XX:XX:XX:XX

IP Does DUT support IP? Y/N

Set_IP address If DUT supports IP, fill in the IP address.

XX.XX.XX.XX

ARC_TX_common Does the device support ARC Common mode?

Y/N

ARC_TX_single Does the device support ARC Single mode?

Y/N

ARC_TX_frequency

If CDF field ARC_TX_common or ARC_TX_single is checked with “Y”, check all the supported frequencies for ARC (see following lines). Please indicate how to invoke the DUT to transmit an ARC signal for each supported frequency

(describe method)

6.144MHz Y/N

5.6488MHz Y/N

4.096MHz Y/N



Repeater Characteristics

If a Repeater product supports HEC on any HDMI input(s), it is required to complete a Sink CDF describing those characteristics.

If a Repeater product supports HEC on one of its HDMI outputs, it is required to complete a Source CDF describing those characteristics.

If a Repeater product supports ARC on any HDMI input(s), it is required to complete a Sink CDF describing those characteristics.

If a Repeater product supports ARC on any HDMI output(s), it is required to complete a Source CDF describing those characteristics.



Cable Assembly Characteristics


Cable_HEAC Does the DUT support HEAC? Y/N



CDC Capability Declaration Form The following declaration must be completed prior to CDC testing. The information that is entered will be used to determine which groups of tests are performed. CDC Capability Choices Value

CEC Protocol Value from CEC CDFDoes the device act as a Root device(Meaning: DUT is a Sink or Repeater and DUT’sPhysical Address is 0.0.0.0 and DUT’s EDID(s)[if present] contain Source Physical Address ofP.0.0.0)

Y / N

Does the DUT support the HEC Feature (Y/N)If Y and the HEC Feature can bedeactivated and activated via user setting,describe how to deactivate and activatethe HEC Feature.

Does the DUT support the HPD Feature (Y/N)Mandatory if HEC_Features='Y'

Number of HDMI inputs 0 - X

Number of HDMI inputs supporting HEC 0 - 14

Does HDMI Input 1 support HEC (Y/N)














Number of HDMI outputs 0 - X

Number of HDMI outputs supporting HEC 0 - 1

Which is the HDMI output supporting HEC 1 - X

Does the DUT support Host Functionality Y / NIf Y and Host Functionality can be deactivatedand activated, describe how to deactivate andactivate Host Functionality.

Does the DUT support External NetworkConnection (ENC)

Y / N

If Y and the ENC can be deactivated andactivated via user setting, describe how todeactivate and activate ENC.

If Y, describe how to connect to anddisconnect from the External Network (e.g. byplugging and unplugging cable).

Describe how to perform a full reset of the DUTDoes the DUT support Standby Y / N

If Y, describe how to trigger Standby mode

Comments



CDC_HEC_Feature_Messages

Choices Value Choices

Choices ValueDependent Sub featureSupport

Choices Value

Y / N Y / N

Capability NotificationY / N Y Y / N

Y / N Y Y / N

Y / N Y / N

Y / N

Y / N

IF Y, as Activator, how manyHECs can be activatedsimultaneously

1-4

Y / N

Y / N

Y / N Y Y / N

Y / N Y Y / N

Y / N Y / N

HEC Control – Alive

If Y, describe how to trigger the DUT to send the message foractivation (with ["Activate HEC"] parameter).

HEC Control – Activation

Does DUT support <CDC_HEC_NotifyAlive>

If Y, does the DUT support as Activator simultaneous activationsof multiple HECs

If Y, does the DUT as Activator support pass through HECactivation through its HDMI connections (DUT is not one of theTerminating Devices)

If Y, describe how to trigger the DUT to send the message

Does DUT support <CDC_HEC_ReportState>

If Y, describe how to trigger the DUT to send the message foractivation to activate a HEC which is then in a state the DUTagrees to deactivation requests.

Comments

Discovery

Does DUT support <CDC_HEC_InquireState>Describe how to trigger the DUT to send the message

Does DUT support <CDC_HEC_SetState>

Comments

How to trigger the Message CommentsDependent Feature Support Comments

Does DUT support <CDC_HEC_Discover>

Does DUT support <CDC_HEC_RequestDeactivation>Describe how to trigger the DUT to send the message

CDC FeatureCDC Message Support

as Initiator?Support

as Follower?

HEC Control - Inquiry

If Y, does the DUT support as Activator activating AHECs on twoor more of its HDMI connections concurrently

If Y, describe how to trigger the DUT to send the message fordeactivation (with ["Deactivate HEC"] parameter).

HEC Control – Request Deactivation

If Y, does the DUT as Activator support HEC activation of anAHEC which does not include any of its own HEC connections

Does DUT support <CDC_HEC_SetStateAdjacent>If Y, describe how to trigger the DUT to send the message foractivation (with ["Activate HEC"] parameter).If Y, describe how to trigger the DUT to send the message fordeactivation (with ["Deactivate HEC"] parameter).

HEC Control – Adjacent Devices



CDC_HPD_Feature_Messages

Choices Value, CommentsSource DUT

Does the DUT support CDC_HPD? *1) Y/NHow many HDMI output ports support CDC_HPD? The numberWhich HDMI output ports support CDC_HPD? Output port # list

Source DUTs supporting CDC_HPD shall be tested regardless of whether or not CP functionality is supported.

ChoicesValue,

Explanation,

Comments

Sink DUTDoes the DUT support CDC_HPD? *2) Y/NHow many HDMI input ports support CDC_HPD? The numberWhich HDMI intput ports support CDC_HPD? Input port #list

How to fully reset*3) the DUT/the port in order to send at least one of all CDC messages?Y/N

If Y, then (a) and/or (b) shall be set to "Y". If (c) is also supported, then it shall be set to "Y". If (d) is also supported, then it shall be set to "Y".If N, then (a) and (b) shall be set to "N", and (c) and/or (d) shall be set to "Y".

(a) [CP&EDID_DISABLE] and [CP&EDID_ENABLE] *4) Y/N

(b) [CP&EDID_DISABLE_ENABLE] Y/N

(c) [EDID_DISABLE] and [EDID_ENABLE] *4) Y/N

(d) [EDID_DISABLE_ENABLE] Y/N

Does the DUT support CP (ex. HDCP)?

Indicate the suport (Y/N) for each parameter. If a parameter is supported (Y), then describe how to trigger sending a message with this parameter.

*1) For Source DUTs supporting CDC_HPD it is mandatory to support <CDC_HPD_ReportState> as Initiator and<CDC_HPD_SetState> as Follower.

*2) For Sink DUTs supporting CDC_HPD it is mandatory to support <CDC_HPD_SetState> as Initiator and<CDC_HPD_ReportState> as Follower.

CDC_HPD Feature

*3) "fully reset" means a state transition such as power-on to power-off to power-on that is equivalent to newlyconnecting an adjacent Source device.*4) If the maximum period to send the two messages exceeds 2 seconds, then indicate the maximum period.



Choices Value,Explanati

on,

Comments

Repeater DUTY/N

If Y, for each HDMI port supporting CDC_HPD check whether itshall be tested as Source, Sink or Repeater (see also HEACT7.6.2.1.3).

Source functionality (Refer to HEACT 7.6.2.1.1 and HEACT 7.6.2.2)

Y/N

Which HDMI output ports supporting CDC_HPD do not supportforwarding any CDC_HPD signals or physical HPD signal from HDMIoutput ports to HDMI input ports?These ports are tested same as the ports of a Source device functionality.

Output port # list

Does the Physical Address of the DUT's Sink functionality dependon the connection of the DUT's Source functionality (PA is notfixed)?

Y/N

If PA is not fixed, then execute one of the tests ID 7.6.2.4 -27(Type-I), ID 7.6.2.4 -34(Type-II) or ID 7.6.2.4 -41(Type-III) depending on theDUT's device type for each port listed under (A). And indicate theinput port for the forwarded port.

Input port #

Sink functionality (Refer to HEACT 7.6.2.1.2 and HEACT 7.6.2.3)

Y/N

Which HDMI input ports supporting CDC_HPD do not supportforwarding any CDC_HPD signals or physical HPD signal from HDMIouput ports to HDMI input ports?These ports are tested same as the ports of a Sink device functionaliy.

Input port # list


Y/N

If PA is not fixed, then execute one of the tests ID 7.6.2.4 -27(Type-I), ID 7.6.2.4 -34(Type-II) or ID 7.6.2.4 -41(Type-III) depending on the DUT's device type for each port listed under (B) . Then indicate what output port cause the physical address of the input.

Output port #

Does the DUT support CP (ex. HDCP)? If Y, then (a) and/or (b) shall be set to "Y". If (c) is also supported, then it shall be set to "Y". If (d) is also supported, then it shall be set to "Y". If N, then (a) and (b) shall be set "N", and (c) abd/or (d) shall be set to "Y".

Y/N

Indicate the suport (Y/N) for each parameter. If a parameter issupported (Y), then describe how to trigger sending a message withthis parameter.

(a) [CP&EDID_DISABLE] and [CP&EDID_ENABLE] *4) Y/N

(b) [CP&EDID_DISABLE_ENABLE] Y/N

(c) [EDID_DISABLE] and [EDID_ENABLE] *4) Y/N

(d) [EDID_DISABLE_ENABLE] Y/N

How to fully reset*3) the DUT/ the input port in order to send at leastone of all CDC messages?

Does the DUT have HDMI output ports supporting CDC_HPD that do notsupport forwarding any CDC_HPD signals or physical HPD signal fromHDMI ouput ports to HDMI input ports (see HEACT 7.6.2.1.3)? If Y, thenfill the block (A) else blank the block (A).

(A)

Does the DUT support CDC_HPD?

Does the DUT have HDMI input ports supporting CDC_HPD that do notsupport forwarding any CDC_HPD signals or physical HPD signal fromHDMI output ports to HDMI input ports (see HEACT 7.6.2.1.3)? If Y, thenfill the block (B) else blank the block (B).

(B)



Choices Value,Explanati

on,

Comments

Repeater functionality (Refer to HEACT 7.6.2.1.3 and HEACT 7.6.2.4)

Y/N

Which HDMI input ports and/or HDMI output ports supporting CDC_HPDand at least one of forwarding CDC_HPD signals or physical HPD signalsfrom HDMI output ports to HDMI input ports?These ports are tested same as the ports of a Repeater device.

Input port #　-Output port #

list

Indicate the Repeater device type of the DUT (Type-I, Type-II, Type-III are defined in 7.6.2.1.3.). Type-I, -II, -III


Y/N

Does the DUT support CP (ex. HDCP)? Y/N

If necessary, indicate the condition to enable signal forwarding *5) Forwardingcondition

Maximum duration of forwarding from output to input. *6) Duration (Sec.)

How to fully reset*3) the DUT/ the input port in order to send at leastone of all CDC messages?

*5) Some test cases requires to change some area of the Sink TE's EDID when the Sink TE sends <CDC_HPD_SetSta*6) Indicate the maximum duration if reception of <CDC_HPD_SetState> till transmission of <CDC_HPD_SetState>exceeds 2 seconds.

Does the DUT have HDMI input ports and/or HDMI output portssupporting CDC_HPD and at least one of forwarding CDC_HPD signalsor physical HPD signals from HDMI output ports to HDMI input ports? IfY, then fill the block (C) else blank the block (C).

(C)



Appendix2 - Test Result Form All Source DUT tests are performed for each output connector on a device therefore, a product with multiple output connectors will require the completion and submission of multiple Source DUT Test Results Forms. This holds true for input connectors on Sink products as well.

The testing of the ”Repeater” functionality of Repeater products requires the completion of a Source results form for each output connector and a Sink results form for each input.

Source, Sink, and Repeater products also require the CDC and Networking test.



Test Results Form – Source DUT

[Output Port: ]

Differential Signal Characteristics Tests


HEACT 5-1:

Operating DC Voltage Test

Veh1(HEAC+):

Veh2(HEAC-):

HEACT 5-2:

Jitter Max Test

Positive Jitter Max :

Negative Jitter Max:

HEACT 5-3:

Rise Time/Fall Time Test

Positive pulses

Tr: Tf:

Negative pulses

Tr: Tf:

HEACT 5-4:

High/Low/Center Level Voltage Test

Vep:

Vem:

Vec:

HEACT 5-5:

Cycle Time Test

Positive pulses Cycle time:

Negative pulses Cycle time:

Receiver Performance Tests


HEACT 5-16 :

Differential Signal

Receiver Performance Test

HEACT 5-17 :

Common Mode Signal


HEACT 5-18 :

Single Mode Signal


Set DC Supply 0V

2.5V

5.0V

HEACT 5-19 :

Common Mode


Veh1 (HEAC +):

Veh2 (HEAC -):

HEACT 5-20:

Single Mode


Vel (HEAC +):



Test Results Form – Sink DUT

[Input Port: ]

Differential Signal Characteristics Tests


HEACT 5-1:


Veh1 (HEAC +):

Veh2 (HEAC -):

HEACT 5-2:

Jitter Max Test

Positive Jitter Max :

Negative Jitter Max:

HEACT 5-3:

Rise Time/Fall Time Test

Positive pulses

Tr: Tf:

Negative pulses

Tr: Tf:

HEACT 5-4:

High/Low/Center Level Voltage Test

Vep:

Vem:

Vec:

HEACT 5-5:

Cycle Time Test

Positive pulses Cycle time:

Negative pulses Cycle time:



Common Mode Signal Characteristics Tests


HEACT 5-6:


Veh1 (HEAC +):

Veh2 (HEAC -):

HEACT 5-6:

High/Low Level Voltage Test

+Vei-swing:

-Vei-swing:

HEACT 5-8:

Rise/Fall Time Test

Without HEC

Tr: Tf:

With HEC

Tr: Tf:

HEACT 5-9:

Jitter Max

Clock Frequency Test

ARC_TX_frequency: 6.144MHz

Jitter Max:

Clock frequency:


Jitter Max:

Clock frequency:


Jitter Max:

Clock frequency:

HEACT 5-10:

IEC 60958-1 Stream Verification Test



Single Mode Signal Characteristics Tests


HEACT 5-11


Vel:

HEACT 5-12:

Signal Amplitude Test

Vel-swing:

HEACT 5-13:

Rise/Fall Time Test

Tr: Tf:

HEACT 5-14:

Jitter Max Clock Frequency Test


Jitter Max:

Clock frequency:


Jitter Max:

Clock frequency:


Jitter Max:

Clock frequency:

HEACT 5-15:

IEC 60958-1 Stream Verification Test

Receiver Performance Tests


HEACT 5-16:

Differential Signal




Test Results Form –Cable DUT


HEACT 6-1:

Intra-Pair Skew Test

Tskew:

HEACT 6-2:

Differential Attenuation Test

Attenuation

300kHz - 10MHz:

10MHz-100MHz:

100MHz-200MHz:

HEACT 6-3:

Differential/Common Mode

Impedance Test

One side

Differential Impedance

Zdiff (Connector):

Zdiff(Cable):

Common Impedance

Zcom:

Another side

Differential Impedance

Zdiff (Connector):

Zdiff(Cable):

Common Impedance

Zcom:



CDC Test Results Form DUT:

HEACT 7.3 Low Level Protocol Tests for CDC-Only Devices


HEACT 7.3.1-1

CEC Bus Logic ‘0’ and ‘1’ Voltage Level

+3.3V via 27kΩ

Logic ‘0’ Logic ‘1’

+3.3V via 3kΩ


Ground via 150kΩ


HEACT 7.3.1-2

Maximum Rise Time and Fall Time

+3.3V via 27kΩ

Tr Tf

+3.3V via 3kΩ

Tr Tf

HEACT 7.3.2.1

Bit Transmission

HEACT 7.3.2.2

Bit Reception

HEACT 7.3.3.1

ACK (Acknowledge)

HEACT 7.3.3.2

Header Block

HEACT 7.3.3.3

Retries (Frame Retransmissions)

HEACT 7.3.3.4

CEC Line Error Handling

HEACT 7.3.3.5

Control Signal Line Arbitration

HEACT 7.3.3.6

Signal Free Time

HEACT 7.4 Low Level Protocol Tests for CDC/CEC Devices


HEACT 7.4.1

Initiator Logical Address



HEACT 7.5 Low Level Protocol Tests for All CDC Devices


HEACT 7.5.1

CDC Control Signal Line Arbitration

HEACT 7.5.2

Destination Logical Address

HEACT 7.5.3

CEC Opcode Block

HEACT 7.5.4

Initiator Physical Address

HEACT 7.5.4.2

All Other Devices

HEACT 7.5.5

Frame Validation

HEACT 7.6 Feature Tests


HEACT 7.6.1.1

HEC Capability Discovery

HEACT 7.6.1.2

HEC Control - Inquiry

HEACT 7.6.1.3

HEC Control – Activation

HEACT 7.6.1.3.2

DUT as Part of a VHEC activated by another device

HEACT 7.6.1.4

HEC Control - Deactivation

HEACT 7.6.1.5

HEC Control - Request Deactivation

HEACT 7.6.1.6

HEC Control - Alive

HEACT 7.6.1.7

HEC Control for Adjacent Devices



HEACT 7.6.2 CDC_HPD(CDC Hot Plug Detect signal


HEACT 7.6.2.2

Source DUT

HEACT 7.6.2.3.1

Sink DUT’s CDC_HPD message

HEACT 7.6.2.3.2

Sink DUT’s Physical HPD

HEACT 7.6.2.4.1

Repeater Device Type-I

CDC HPD message

HEACT 7.6.2.4.2

Repeater Device Type-I

Physical HPD

HEACT 7.6.2.4.3

Repeater Device Type-II

CDC HPD message

HEACT 7.6.2.4.4

Repeater Device Type-II

Physical HPD

HEACT 7.6.2.4.5

Repeater Device Type-III

CDC HPD message



HEACT 8 Networking Test Result DUT:


HEACT 8.1

Packet filtering/forwarding

HEACT 8.2

Forwarding of BPDU

HEACT 8.3

RSTP functionality

HEACT 8.4

Queue Control

HEACT 8.5

Unchanged Priority Tag value

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