Gaspard tutorial

Gaspard2 Tutorial

Rabie Ben Atitalah, Jean-Luc Dekeyser andPierre Boulet

24 September 2008

Overview

High Performance ApplicationDevelopment: MPSoC

VerificationSimulationSynthesis

Multiple languagesMultiple abst. levels

Application Domain of Gaspard2:intensive signal processing

"Gaspard" stands for

Graphical array specification for parallel anddistributed computing

Hypotheses

É component-basedÉ massive

parallelismÉ regular

applications andhardware

É no complex flow ofcontrol

É static scheduling,no RTOS

MARTE packages used in Gaspard2É Foundations

É Non Functional PropertiesÉ Generic Component Model

É Flow portsÉ Allocation

É Detailed Resource ModelingÉ Hardware Resource Modeling::HwLogical

É Repetitive Structure Modeling

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Detailed Example(∞)

Downscaler

(352,288,∞)

(132,128,∞)

Horiz. Filter

(352,288) (132,288)

Vert. Filter(132,288)

(132,128)

Horizontal Filter

Horizontal filter

(352,288)

(132,288)

(44,288)

Hfilter

(11) (3)

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Horizontal filter

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(132,288)

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Vertical Filter

Vertical filter

(132,288) (132,128)(132,32)

Vfilter

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RSM Semantics Summary

DSL for systematic signal processing

É First order pure functional languageÉ Multidimensional toroidal arraysÉ Pattern based data acess

Data parallel repetition

∀r,0 ≤ r < srepetition

∀i,0 ≤ i < spattern

t(r, i) = o+ (P F) ·�ri

�mod sarray

Overview

Software and hardware co-model for

data-intensive embedded systemco-design

MARTE packages used in Gaspard2

Foundations Non Functional Properties Generic Component Model

Flow ports Allocation

Detailed Resource Modeling Hardware Resource Modeling::HwLogical

Repetitive Structure Modeling

Gaspard2

UML2.0 MM

Gaspard2 MM

Marte MM

Co-model for co-design

Marte and Gaspard Metamodels High level data parallel constructions Hierarchical Repetitive Application, architecture and association models

Iterative dependency expression Data flow and control flow mixing Gaspard2 UML profile available

With MagicDraw and Papyrus

Optimization and compilation techniques

•Data parallel code transformations •Mapping and multi-objective hierarchical scheduling heuristics•Compilation from high-level models down to simulation, execution and synthesis •Eclipse integration•Model transformation techniques

•ModTransf, Momote, Mocode, QVTO

HP-SoC simulation and synthesis

•Simulation for architecture/application/association exploration

•SystemC simulation framework at PVT and CABA level

•Performance and power consumption evaluation

•Synthesis for large and reconfigurable FPGA

•VHDL code generation

•Network on Chip and SIMD design for MppSoC

•MppSoC implementation in FPGA (16-64 PE “à la Maspar”)

•OpenMP execution on SMP

•Synchronous code generation

Downscaler application

Horizontal filter: 8/3

CIF video frame: 352x288

Vertical filter:9/4

Resized video frame

CIF Frame structure

GOBn

GOB.

GOB.

GOB6

GOB5

GOB4

GOB3

GOB2

GOB1

352

288

Y component

+GOBn/2GOB4GOB3GOB2GOB1

176

144

U component

+GOBn/2GOB4GOB3GOB2GOB1

176

144

V component

Example: Downscaler

VFHF FCFGdata

Logical Memory

Sensor

Bus

MIPS processor

Hard Acc

CIF: 352x288

Task allocationData allocation

• First solution: Heterogeneous mono-processor architecture

• Second solution: Multi-processor architecture

Crossbar

4 to 16 MIPS processors

Downscaler: main application


• Horizontal filter task


• Vertical filter task


• Downscaler task


• Main application

Downscaler: main architecture

• Hardware elementary components

Shared Memory MPSoC architecture

Example of MPSoC architecture

Downscaler mapping

Downscaler: Deployment

Hardware and software deployment Intellectual Property block (IP) reuse from libraries A deployment extension is introduced The most important concepts

VirtualIP SoftwareIP, HardwareIP implements CodeFile Specialization Characteristic PowerModel

GaspardLib

GaspardLibSoftware Hardware

FFT, DCT, Convolution, FIR

Processor, cache, DMAC crossbar

EnergyProcessor, cache, DMAC crossbar

Downscaler: Deployment

Papyrus modeling editor

Open source UML2 specification compliant Afull Eclipse project such as EMF, etc. Support all UML2 diagrams and profile

MARTE, SysML, CCM

OCL verification Java and C++ code generation Developed and supported by CEA and LIFL (DaRT) www.papyrusuml.org

Technology bases of Gaspard2

Model driven engineering metamodels model transformations

Eclipse platform metamodeling language: Ecore integration framework based on plugins transformation chains

Gaspard2 model transformations

Polyhedron model

Information given by the distribution in the high MPSoC model A polyhedron is generated for each task repetition Parameterized by a processor number (p0) and the task indexes

Loop model

Scanning the polyhedron Corresponding loop generation Task repetition space Using the CLoog tool

Pattern accurate (PA) TLM level

Fast simulation Data transfer observation Hardware/Software simulation before the processor

component is available

Instruction memory

Data memory

NoC Processor 0

Array0 Array1

Not used

Task E

Task C

Processor 1

Task A

TE

Allocation

Allocation

Task D

TB

TA

Task B

TDTC

Application execution graph

Gaspard2 Démo…

UML Gaspard Polyhedron

Loop SystemC PA

https://gforge.inria.fr/projects/gaspard2/

Overview

Gaspard tutorial

Technology

Transcript of Gaspard tutorial