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Gallium Nitride E-Class Power Amplifier
ECE402 REPORT
Final
By Adam Woodward
Department of Electrical and Computer Engineering
Colorado State University Fort Collins, Colorado 80523
Project advisor: Dr. Fernando Tomasel
Approved by: Dr. Fernando Tomasel
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ABSTRACT
Current amplifier designs using semiconductor N-channel field effect
transistors (FETs) have significant losses at high power. Semiconductor FETs have
losses during current conduction through the channel due to drain-to-source
resistance (Rds ON). Substantial energy is also required to drive the gate capacitor
of the FET to get conduction through the drain-to-source channel. This gate
capacitor requires higher energy as the frequency increases, making it more difficult
at higher frequencies to completely turn on and off the FET.
Lower Rds ON and reduced gate capacitance can benefit the amplifier,
increasing efficiency and speed. New technology is now available that can achieve
both of these two objectives. In 2009 a company called Efficient Power Conversion
(EPC) produced the first commercially available Gallium Nitride eGaN FETs. This
Gallium Nitride material is grown on top of standard silicon wafers. This provides a
platform for new technology at a lower price. The devices created by EPC perform
much better than silicon in several ways. They have lower gate capacitance and
smaller Rds ON. This new technology has created a component that operates at a
high frequency and with low losses.
EPC component specifications have been entered into NL5 an electrical
engineering modeling software package, and show great results. The EPC2012
component rated for 200V Vds and 3A Ids shows up to 52W of RF power each. This
power will then be filtered and combined to produce a 500W RF power supply.
Summer semester will be focused on RF filtering and combining of several E-Class
amplifiers that use eGaN FETs as the main switch.
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TABLE OF CONTENTS
Title 2
Abstract 3
Table of Contents 4
List of Figures and Tables 5
I. Introduction 5
II. Schematic 10
III. Printed Circuit Board 12
IV. Building 13
V. Initial Test 14
VI. Tuning 15
VII. Ethical/Environmental issues 17
VIII. Manufacturability 17
IX. Marketability 18
X. Project Continuation 18
XI. Conclusion 19
References 20
Appendix A – Glossary 21
Appendix B – Budget 22
Appendix C- Time Line for Next Year 24
Acknowledgements 26
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LIST OF FIGURES
Figure 1 eGaN Gallium Nitride Structure 5
Figure 2 Schematic of E-Class Amplifier 6
Figure 3 Voltage and Current Waveforms of E-Class 7
Figure 4 Common Gate Resistance 8
Figure 5 Common Gate Charge 9
Figure 6 Schematic Single FET 11
Figure 7 Schematic Four FET’s 11
Figure 8 Schematic Sixteen FET’s 11
Figure 9 PCB Layout 12
Figure 10 Inductor Test Fixture 13
Figure 11 Infrared Soldering 14
Figure 12 Initial Loading of Board and basic test 15
Figure 13 Finding best impedance match value 15 Figure 14 Drain Waveform (Bad Tuning) 16
Figure15 Drain Waveform (Good Tuning) 16
Figure 16 Final Assembly 17
LIST OF TABLES
Table 1 Product Offering from EPC 7
Table 2 Common Component Data 8
Table 3 Digikey order #1 22 Table 4 Digikey order #2 23 Table 5 Digikey order #3 23 Table 6 PCB order from Advanced Circuits 23
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Introduction
The focus of this project is to investigate Gallium Nitride field effect
transistors (FETs), used in an E-class amplifier. The project was chosen in
collaboration with Advanced Energy to investigate this new technology for future
use in industrial power amplifiers. The team is lead by Dr. Fernando Tomasel a
member of technical staff at Advanced Energy. Team members also include Adam
Woodward a CSU senior, Dr. Don Van Zyl a member of Advanced Energy technical
staff, and Jose Medina an Advanced Energy tech specialist. The project is scheduled
to take two semesters and upon completion have a working power amplifier using
gallium nitride devices. The project will be managed and controlled by Adam
Woodward with Dr. Tomasel overseeing the group.
Gallium nitride devices are important to the future of electrical engineering.
They provide the benefit of lower gate charge and reduced series resistance of the
conducting channel, which results in increased efficiency and lower losses. The
ability to create GaN FETs and diodes has been around for twenty years. However,
for quite a few years the base substrate was very expensive compared to the cost of
silicon-based technology. New technology pioneered by Eudyna Corporation of
Japan in 2004 allows to grow gallium nitride on top of an existing silicon wafer as
seen in figure 1 (PhD). This technology reduces the cost of the gallium nitride
components and may lead to increased use and development of future parts. In June
of 2009 Efficient Power Conversion (EPC) released its first enhancement mode
eGaN on silicon (eGaN) and since then released several more components (PhD).
Figure 1. (Example of EPC eGaN FET) (Davis)
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The E-Class power amplifier was chosen to investigate this new technology because
of its common use in industrial Radio Frequency (RF) amplifiers from 3MHz to
10GHz (Sokal). The E-Class amplifier main components include; gate drive, FET,
voltage source, output load network and a load figure 2 (Sokal). The drain of the
FET has a large series inductor to a direct current (DC) voltage supply, and the gate
of the device is driven with a square wave. This gate drive puts the FET into
saturation because voltage gate to source (VGS) is greater than voltage source to
drain (VDS).
Figure 2. (Simple schematic of E-Class amplifier)(Sokal)
E-Class has several benefits; first, the drain voltage is close to zero during
conduction when the current is highest as seen in figure 3. Ohms law tells us that
power equals voltage times current, so when voltage is low the power is also low.
Second on the next half of the cycle the voltage is high when the current is zero
through the FET, this also calculates to a low power dissipation of the device.
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Figure 3. (Voltage and Current waveforms for the Drain of the FET)(Sokal)
The team has selected the EPC2012 eGaN FET from EPC based on power
output and size. The data sheet lists this component as 200 VDS and 3 amps drain-
to-source current maximum limits as seen in Table 1. Calculations show that this
device could generate about 60 watts of RF power (PhD. Gideon J.J. van Zyl). Since
the goal of the project is to generate 500 watts total, the power amplifier will
require 9-10 eGaN FETs operating individually and a RF combiner to sum the power
of all the stages.
Table 1. (EPC devices in production)(EPC)
There are three main benefits to use eGaN devices. The drain-to-source
resistance (Rds ON) is very low, and in most cases significantly lower than that of
comparable components as seen in figure 4. The eGaN FET also has significantly
lower gate charge than comparable semiconductor components figure 5. The eGaN
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devices are also much smaller in size. The semiconductor components are usually
SOIC-8 or DPAK which range from 31-70 mm2 for PCB layout. The eGaN device is
18.8 times smaller and has a surface area of 1.65 mm2 for its PCB layout. These
improved parameters allow for improved efficiency and smaller size over
equivalent semiconductor designs (PhD).
Table 2.
Semiconductor V DRAIN I DRAIN RDS Q GATE nC PACKAGE
VISHAY SI4490-DY 200 2.85 0.08 42 8-SOIC
FAIRCHILD FQD4N20TM 200 3 1.4 6.5 DPAK
FAIRCHILD FDS2670 200 3 0.13 43 8-SOIC
ROHM 2SK2887TL 200 3 0.9 8.5 DPAK
NXP PSMN165-200K 200 2.9 0.165 40 8-SOIC
FAIRCHILD FDS217ON3 200 3 0.128 36 8-SOIC
Figure 4.
(Davis)
0.08
1.4
0.13
0.9
0.165 0.128
0.1 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0 2 4 6 8
RE
SIS
TA
NC
E D
RA
IN
TO
SO
UR
CE
Si and eGaN FET
RESISTANCE OF COMMON FET'S
SI4490-DY
FQD4N20TM
FDS2670
2SK2887TL
PSMN165-200K
FDS217ON3
2012
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Figure 5.
Significant time and energy has been devoted this past semester to the
development of an E-Class amplifier using eGaN FETs. The team has learned some
valuable lessons when working with new technology. The devices that were chosen
for initial test were no longer available once the gate drive schematic was complete.
This caused a significant redesign of the gate drive and change the input circuitry for
the amplifier. The team has learned from this lesson and has now purchased
enough components to build a prototype and extras if device failures occur.
The first semester consisted of investigating the gate drive design and
modeling the amplifier. To build models of the amplifier, the device parameters
have been modeled in an E-Class amplifier using the simulation software Non Linear
Five (NL5). After the tasks associated with creating a schematic and modeling the
amplifier were completed, the second semester focused on building and testing the
design. The activities for the second semester started with the definition of the
components schematic and printed circuit board (PCB) layouts, and continued with
the procurement of parts and construction of the power portion of the prototype.
This includes most of the components from the drain of the eGaN FET to the output
of the amplifier. These tasks involved the completion of the power amplifier and
included the impedance matching network from the eGaN FET to the harmonic filter
network and the output transmission to the load. Thermal characteristics have been
closely monitored and evaluated for operation in manufactures specifications.
42
6.5
43
8.5
40 36
1.8 0
5
10
15
20
25
30
35
40
45
50
0 2 4 6 8
GA
TE
CH
AR
GE
nC
Si and eGaN FET
FET GATE CHARGE
SI4490-DY
FQD4N20TM
FDS2670
2SK2887TL
PSMN165-200K
FDS217ON3
2012
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Power measurement also was monitored as a requirement in the spring semester
and a voltage feedback loop will need to be designed to control the power delivered
to the load.
The completion of the prototype design and PCBs required high dedication.
The team completed hand loading the PCB boards for the gate drive and the power
board. Many of these steps required small surface-mount component soldering and
infrared soldering of the eGaN FETS. The team has also been very involved testing
the power amplifier for efficiency and operation.
Schematic
The schematic had to be transferred from NL5 to PCAD2004. This was
required to continue the project board layout, as the NL5 software we used for
modeling of the entire amplifier does not have a file format that we could transfer to
our schematic capture program PCAD2004. As we can see in (figure 6) the
amplifier was first modeled as a single stage. At this point we optimized tuning and
output power. Then we combined 4 FETs into a single combiner as shown in (figure
7) where this circuit was also optimized for the highest output power. The last step
we combined 16 single stages into one amplifier as shown in (figure 8). At this point
we created a net list that was required to continue forward to design a PCB.
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PCB Layout
The schematic capture program PCAD2004 is also used to design the
PCB. We had to create a net list from the schematic and import it into the PCB file.
The components were all arranged to be as close as possible to each other while still
allowing enough space to solder and install. The inductor values had been modeled
earlier, and we hand-built them to determine the layout size. The board was a
designed to be two layers, using 1oz copper. We also used a copper pour method on
the bottom layer to tie all the ground connections together with lowest possible
inductance. The board size is 3.075” x 4.250” and cost $49.04 on a quick two day
turn from Advanced Circuits. This price could be reduced significantly with
increased quantity and longer lead times.
Figure 9, PCB Layout
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Building
The E-Class amplifier PCB layout was completed with PCAD-2004.
The layout took three weeks and many hours. The inductors were all hand-wound
using two different mandrels (1/2” and 7/16” diameter), and measured for the
correct value. Different number of turns and different inner diameters created the
appropriate values. In figure 6 we can see the test fixture used connected to a
network analyzer. The frequency of operation was programmed into the analyzer
along with calibrating it for open, short, and 50 ohm load. Then all inductors we
created and measured to be correct values.
Figure 10, Inductor Test Fixture
The entire Bill of Materials (BOM) was ordered through DigiKey.
Component values from the simulations were transferred to the PCB layout. Then
we selected the appropriate size and value from DigiKey to order. Each component
was then had loaded and soldered manually. The triple buffers and eGaN FETs were
soldered using infrared. To accomplish this, a small amount of solder was placed on
each pad with a light coating of flux. Then the board was preheated with the solder
unit until it reached 110 °C. At this point the infrared was turned on for about 20
seconds to reflow the solder and adhere to the PCB. In figure 11 we can see the
infrared station with its white preheating base and the infrared light housing
hanging above.
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Figure 11, Infrared Soldering
Initial Test
Initial tests were performed with a digital multi meter (DMM) looking for
continuity to all components. This procedure checks solder joints and PCB traces
for open connections. Then the body diode of the eGaN FETS was verified with the
DMM to validate the solder joint under the component. The second test was to
apply 5V DC to the active devices (figure 12). There are ten buffer components that
were powered up to make sure they do not draw large amounts of current. Then a
13.56MHz 50% duty cycle square wave was injected into the SMA input connector.
With an oscilloscope probe we checked all the outputs of the buffers to verify
operation. At this point we went through a process of finding the correct load
impedance to match the first stage of the amplifier. The initial analysis showed us
around 29.5 ohms, when we were able to get a nice E-Class waveform the
impedance turned out to be 8.0 ohms (figure 13). This is probably due to the non-
linear drain to source capacitor found on the eGaN FET.
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Figure 12, Initial Loading of Board and basic test
Figure 13, Finding best impedance match value
Tuning
Initially the step or turn on voltage of the device was too high, as shown by
the red trace which represents the drain of the eGaN FET (figure 14). It was
necessary to adjust the impedance matching to make it look like (figure 15). In this
oscilloscope image we can see that the component rings back to zero volts when the
FET turns back on. This limits the stored energy in the output that has to be
dissipated by the FET and the component will run much cooler. We saw the
component temperature drop by 30 °C by retuning the output. This part of the
project required a lot of assistance from the technical leadership at Advanced
Energy, they have developed and tested many amplifiers and had the tribal
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knowledge to improve this units performance. As shown in (figure 16) the amplifier
is completely assembled.
Figure 14, Drain Waveform (Bad Tuning)
Figure 15, Drain Waveform (Good Tuning)
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Figure 16, Final Assembly
Ethical/Environmental Concerns
The E-Class power amplifier was built with all lead-free components.
However the components were all soldered with lead solder. Lead solder melts at a
relatively lower temperature (188 °C) compared to lead-free solder which melts at
217 °C. Lead solder is easier to work with and, because the eGaN FETs and the
buffers both have hidden solder pads, it was much easier to hand load this PCB
using lead. However, lead is a toxic material that must be handled safely and be
properly disposed. This project will have to be properly disposed of and recycled.
Advanced Energy has a PCB recycling program that will be responsible for recycling
the PCB and lead soldered components.
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Manufacturability
The eGaN amplifier has been a challenge because we had to hand-load all the
components. If this project were to be continued, it would be loaded at a printed
circuit board assembly (PCBA) shop. The inductors would have to all be wound at a
magnetic manufacturing facility and sorted by part numbers. If the boards were all
pre-assembled, then only power up and tuning would be required from a test
technician. Due to the tolerance stack up of all the components a test procedure
would have to be developed to assist the technician in tuning the impedance match
inductor directly after the FET and the combining network inductors. Changes in
tuning are done by stretching the inductors to reduce inductance and collapsing the
inductor to increase the inductance value. Potentially if the design was stabilized
the correct values could be loaded with no tuning required.
Marketability
The eGaN FET amplifier has many possible applications. The cell phone
industry and the semi-conductor industry both have several uses for high power RF
amplifiers. The semi-conductor manufactures use many RF power supplies to
produce integrated circuits (ICs). Although from my experience most of their
processes use more than 500 watts of RF power, the amplifier developed in this
project is built very modular and can be expanded upon with additional stages to
increase the total power. Currently the total budget spend on this amplifier was
$743.78, including 10 PCBs and about two full units worth of parts. We estimate
about $400 for a complete 500 watt RF section. The industry usually says for RF
power it is $2 per Watt of RF, so we could charge around $1000 for this supply. Our
bill of materials cost is around 40% of our sales price, this is in line with many
amplifier manufactures.
Project Continuation
The Gallium Nitride E-Class amplifier project collaboration with Advanced
Energy will not be supported for continuation. However future students could
possibly use the premise of the E-Class amplifier design and start a new project. The
development and study of amplifiers is very important and takes a lot of study and
work to get it correct. The design of the RF filter stage and combiner stage are
complex and difficult to complete successfully. Voltage and current measurements
are challenging to get correct values in a noisy RF environment. For all of these
reasons I would suggest any amplifier project to a future student. It is a great way to
challenge a student to work with real world situations and issues of being a power
engineer.
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Conclusion This project has completed its goals of delivering RF power into a broadband
50 ohm load. We have overcome difficulties soldering the small components and
purchasing new components that are often unavailable. The tuning of all sixteen
power stages and the five combining networks took many hours of work. This
project is has been a success and lots of fun learning about new technology and
developing something brand new.
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Works Cited
Davis, Sam. Enhancement Mode Gallium Nitride MOSFET Delivers Impressive Performance. 1 December 2012 <http://powerelectronics.com/power_semiconductors/power_mosfets/enhancement-mode-gallium-nitride-032010/index.html>. PhD, Alex Lidow. Gallium Nitride Technology Overview. 1 December 2012 <http://epc-co.com/epc/documents/papers/Gallium%20Nitride%20GaN%20Technology%20Overview.pdf>. PhD. Gideon J.J. van Zyl. High Power Solid State Amplifier Design. Design Book. Advanced Energy. Fort Collins: PhD. Gideon J.J. van Zyl, 2008. Sokal, Nathan O. CLASS-E HIGH-EFFICIENCY RF/MICROWAVE POWER AMPLIFIERS: PRINCIPLES OF OPERATION, DESIGN PROCEDURES, AND EXPERIMENTAL VERIFICATION . 1 December 2012 <http://www.cs.berkeley.edu/~culler/AIIT/papers/radio/Sokal%20AACD5-poweramps.pdf>.
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APPENDIX A
Glossary DPAK Common name for surface mount package eGaN Enhancement Mode Gallium Nitride EPC Efficient Power Conversion FET Field Effect Transistor IC Integrated Circuit Ids Current Drain to Source PCB Printed Circuit Board Rds Resistance Drain to Source RF Radio Frequency SOIC-8 Surface mount 8 pin package Vds Voltage Drain to Source Vgs Voltage Gate to Source
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APPENDIX B
Budget The budget for this project was expected to be $550.00. The final budget turned out to be $ 743.78. There were a few reasons for this difference, the first is the eGaN FET was different and the quantity needed was increased. The design was behind schedule and for this reason we had to order the PCB on a two day turn for the unit to be built in time for EE days. $213.38 Components $490.40 PCB $40 Miscellaneous (solder, magnet wire, flux) Table 3, Digikey order #1
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APPENDIX C
Gallium Nitride Power Amplifier Time Line
2012 August
20-Aug
27-Aug Adam Work on project plan
Adam Research equipment available
Adam Investigate E-Class topology
September
3-Sep Adam Choose a method of circuit modeling (NL5)
10-Sep
Adam Don Research Gallium Nitride Components
17-Sep
Adam Don Research Gallium Nitride Components
24-Sep Adam Order and receive components
October
1-Oct
Adam Jose Acquire part numbers and PCB component layout design
8-Oct Adam Test individual component input and output capacitance
15-Oct Adam Use variable frequency drive to see maximum operating point
22-Oct Adam Layout PCB for gate drive
29-Oct Adam Design for power board (RF Filter)
November
5-Nov
Adam Jose Layout the PCB for power board
12-Nov
Adam Don Work on report and build RF Filter
19-Nov
Thanksgiving Break
27-Nov Adam Work on oral presentation
Adam Work on report
December
3-Dec Adam Work on oral presentation
Adam Final revision of report
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Don
10-Dec Finals
Christmas Break
2013 January
21-Jan
Adam Jose Finish Layout for PCB power board
28-Jan Adam Order both driver and power board
February
4-Feb
Adam Jose Order components for project
11-Feb
Adam Jose Solder Components
18-Feb
Adam Jose Solder Components
25-Feb
Adam Don Initial power up and testing
March
4-Mar
Adam Don Deliver power and collect data on amplifier
11-Mar
Adam Don Deliver power and collect data on amplifier
18-Mar Adam Test thermal cooling requirements
25-Mar Adam Work on E-Days display
April
1-Apr Adam Work on E-Days display
8-Apr
Adam Jose Collect all equipment to demonstrate project
15-Apr Adam Present E-Days
22-Apr
29-Apr
May
6-May
13-May Finals
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Acknowledgment
I would like to thank my advisor Dr. Fernando Tomasel for his oversight and help this semester. I would also like to thank my team members Dr. Don Van Zyl and Jose Medina for their help and knowledge this semester, it would not have been possible without a great team. I am also truly appreciative for Advanced Energy’s contributions and the ability to work together on new technology.