G5500 7050(031015 1)

REVISED HISTORY

DATE ISSUE CONTENTS OF CHANGES S/W VERSION

13/MAY/2003 ISSUE 0.1 Initial Release

01/Sep./2003 ISSUE 0.2

The information in this manual is subject to change without notice and should not be construed as a commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes to equipment design as advances in engineering and manufacturing methods warrant.

This manual provides the information necessary to install, program, operate and maintain the G5500/7050.

-1-

-3-

Table of Contents1. INTRODUCTION.................................. 5

1.1 Purpose ............................................….

1.2 Regulatory Information ..........................

1.3 Abbreviations .........................................

2. General Performance .....................… 8

2.1 Product Name ................................…….

2.2 Supporting Standard ……………………..

2.3 Main Parts …………………………………

2.4 H/W Features …………………………….

2.5 S/W Features …………………………….

3. H/W Circuit Description ....................13

3.1 RF Transceiver General Description ……

3.2 Receiver Part …………………………….

3.3 Digital Baseband (DBB) Processor ………

3.4 Analog Baseband (ABB) Processor …...…

3.5 Camera Circuit ……..………………………

5

5

7

8

8

8

9

11

13

13

20

25

44

4. TROUBLE SHOOTING ................… 514.1 Main Components Placement(G5500) ...

Main Components Placement(G7050) ...

4.2 Main Components .....................…..........

4.3 Keypad Components Placement ............

4.4 Baseband Components ..……………..…

4.5 Power On Trouble …..........…………..….

4.6 Charging Trouble ........................…..…..

4.7 LCD Display Trouble ………....................

4.8 Receiver Trouble ………….....................

4.9 Microphone Trouble ………………………

4.10 Vibrator Trouble ……….…………………

4.11 Keypad Backlight Trouble …….…………

4.12 Slide Open/Close Trouble ……….………

4.13 SIM Detect Trouble …….....……………..

51

52

53

54

55

56

57

59

61

65

68

70

72

74

5. ASSEMBLY INSTRUCTION ………....102

5.1 Disassembly (G5500) .............................

5.2 Disassembly (G7050) …........………….

102

108

8. CIRCUIT DIAGRAM .............………... 129

8.1 BB ………..…………….........................

8.2 MEMORY, etc. …………………………….

8.3 MIDI, AUDIO ………….………………….8.4 I/O, Connector ……….…………….……

8.5 RF ………………………..….……..…….

8.6 CAMERA ………………………………...

8.7 KEYPAD ………………………………….

129

130

131

132

133

134

135

6. DOWNLOAD ……………………...……114

6.1 Download Setup .....................................

6.2 Download Procedure ………...….……….

114

115

7. SERVICE AND CALIBRATION …….. 122

4.14 Earphone Trouble ……….……………….

4.15 Infrared Data Association Trouble ……

4.16 Camera Trouble ………………………….

76

81

84

7.1 Service S/W ……....................................

7.2 Calibration ……………….…...….……….

122

125

9. PCB LAYOUT .............……………..... 137

-4-

Table of Contents10. ENGINEERING MODE ................... 141

11.1 Setting Method .................................….142

11. STANDALONE TEST ..................... 142

12.1 Exploded View .................................….

12.2 Accessory ………………………………..

12.3 Replacement Parts

<Mechanic components> ………………..

Replacement Parts

<Main components>………………………

143

145

146

148

12. EXPLODED VIEW & REPLACEMENT PART LIST.......... 143

1. Introduction

1.1 Purpose

This manual provides the information necessary to repair, calibration, description and download the features of the G5500/7050.

1.2 Regulatory Information

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons other than your company’s employees, agents, subcontractors, or person working on your company’s behalf) can result in substantial additional charges you’re your telecommunications services. System users are responsible for the security of own system. There are may be risks of toll fraud associated with your telecommunications system. System users are responsible for programming and configuring the equipment to prevent unauthorized use. LGE does not warrant that this product is immune from the above case but will prevent unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it. LGE will not be responsible for any charges that result from such unauthorized use.

A. Security

If a telephone company determines that the equipment provided to customer is faulty and possibly causing harm or interruption in service to the telephone network, it should disconnect telephone service until repair can be done. A telephone company may temporarily disconnect service as long as repair is not done.

B. Incidence of Harm

A local telephone company may make changes in its communications facilities or procedure. If these changes could reasonably be expected to affect the use of the G5500/7050 or compatibility with the network, the telephone company is required to give advanced written notice to the user, allowing the user to take appropriate steps to maintain telephone service.

C. Changes in Service

Maintenance limitations on the G5500/7050 must be performed only by the LGE or its authorized agent. The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining warranty.

D. Maintenance Limitations

-5-

The G5500/7050 complies with rules regarding radiation and radio frequency emission as defined by local regulatory agencies. In accordance with these agencies, you may be required to provide information such as the following to the end user.

E. Notice of Radiated Emissions

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.

F. Pictures

An G5500/7050 may interfere with sensitive laboratory equipment, medical equipment, etc. Interference from unsuppressed engines or electric motors may cause problems.

G. Interference and Attenuation

H. Electrostatic Sensitive Devices

Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.Following information is ESD handling:

• Service personnel should ground themselves by using a wrist strap when exchange system boards.

• When repairs are made to a system board, they should spread the floor with anti-static mat which is also grounded.

• Use a suitable, grounded soldering iron.• Keep sensitive parts in these protective packages until these are used.• When returning system boards or parts like EEPROM to the factory, use the protectivepackage as described.

ATTENTION

-6-

1.3 AbbreviationsFor the purposes of this manual, following abbreviations apply:

APC Automatic Power ControlBB Baseband

BER Bit Error RatioCC-CV Constant Current – Constant VoltageDAC Digital to Analog ConverterDCS Digital Communication SystemdBm dB relative to 1 milliwattDSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only MemoryEL Electroluminescence

ESD Electrostatic DischargeFPCB Flexible Printed Circuit BoardGMSK Gaussian Minimum Shift KeyingGPIB General Purpose Interface BusGSM Global System for Mobile CommunicationsIPUI International Portable User IdentityIF Intermediate Frequency

LCD Liquid Crystal DisplayLDO Low Drop OutputLED Light Emitting Diode

OPLL Offset Phase Locked LoopPAM Power Amplifier ModulePCB Printed Circuit BoardPGA Programmable Gain AmplifierPLL Phase Locked Loop

PSTN Public Switched Telephone NetworkRF Radio Frequency

RLR Receiving Loudness RatingRMS Root Mean SquareRTC Real Time ClockSAW Surface Acoustic WaveSIM Subscriber Identity ModuleSLR Sending Loudness Rating

SRAM Static Random Access MemorySTMR Side Tone Masking Rating

TA Travel AdapterTDD Time Division Duplex

TDMA Time Division Multiple AccessUART Universal Asynchronous Receiver/TransmitterVCO Voltage Controlled Oscillator

VCTCXO Voltage Control Temperature Compensated Crystal OscillatorWAP Wireless Application Protocol

-7-

2. General Performance2.1 Product Name

Item Feature Comment

Supporting Standard

E-GSM/ DCS Dual Bandwith seamless handoverPhase 2+SIM Toolkit : Class 1,2,3,A~E

Frequency Range

E-GSM TX : 880 – 915 MHzE-GSM RX : 925 – 960 MHzDCS 1800 TX : 1710 – 1785 MHzDCS 1800 RX : 1805 – 1880 MHz

-8-

G5500/7050: Support GPRS (Class 10)

2.2 Supporting Standard

ApplicationStandard

WAP 2.0 : YesMMS : YesJAVA : MIDP v1.0.3IrDA 1.3

G5500/7050

2.3 Main Parts: GSM Solution

Digital Baseband CALYPSO @39MHz (D751992GHH)

Analog Baseband IOTA (TWL3014CGGM)

RF Chip Aero (Multi slot) (Si4200-BM, Si4201-BM, Si4133T-BM)

-9-

2.4 H/W Features


Form Factor Slide Down LCD (65K Color)

Battery

CapacityStandard: Li-Ion, 860mAh

Packing Type: Hard Pack

Cell Size: Standard55(L)×33.7(W)×49.5(H)mm

Size Standard: 94×44×21.5mm L×W×H

Weight 89g With Battery

PCB Main PCB: 8Layers, 1tKeypad PCB: 2Layers, 0.6t

AVG TCVR current (mA)

Max : 260 mA (Power Level 5)Max : 120 mA (Power Level 19) Estimated

Standby Current 4.6mA @ Paging Period 9

Standby time Up to 150 hours @ Paging Period 9

Charging time Below 3 hr. @ Power Off / 860mAh

Talk time Min : 4hr @Power Level 7Min : 6hr @Power Level 12 @ 860mAh

RX sensitivity GSM 900 : -105 dBmDCS 1800 : -105 dBm

TX output power GSM 900 : 32 dBmDCS 1800 : 29 dBm

Class4 (GSM)Class1 (DCS)

GPRS compatibility GPRS Class 10

SIM card type Plug-In SIM - 3V

Display

- LCD : 65K Color-STN (128 X160)- Pixels : 0.219 x 0.219 mm- View Area : 30.54 x 36.04 mm - Active Area : 28.02 x 35.028 mm- Backlight : White LED

Status Indicator Yes (Red, Green)

Keypad

Alphanumeric Key : 12Function Key : 12Side Key : 2Total Number of Keys : 26

Function Key:4 Key Navigation & OK,F1, F2, SND, END/PWR,Clear, Book Mark (Camera), Voice Recording

-10-


Antenna Fixed Type

System connector 24 Pin

Ear Phone Jack 3 Pole (φ2.5mm)

PC synchronization Yes CDROM

Memory Flash : 128Mbit / SRAM : 64Mbit AMD

Speech coding FR, EFR, HR

Data & Fax Built in Data & Fax support

Vibrator Built in Vibrator

IrDA Built in IrDA PC sync support

MIDI (for BuzzerFunction) 40 Poly Buzzer Function By Using

MIDI IC

Voice Recording up to 90 sec 30sec x 3

Travel Adapter Yes

Camera Sensor VGA / CIS G7050 only

Options

Travel AdapterEar-MicrophoneHand StrapCigarette Lighter AdapterData CableHandsfree Car KitSimple Hands Free kit

TBDTBD

-11-

2.5 S/W Features


RSSI 0~5 level Antenna

Quick Access Mode Schedule/Ring Tone/PhonebookCamera/GPRS/Phonebook(G7050)

Battery Charging 0~3 level

Key Volume 0~5 level

Keypad Volume 0~5 level

Effect sound volume 0~5 level

Ring Volume 1~5 level

Time/Date Display Yes

Text Input T9

Multi-language Yes

PC Sync Schedule/Phonebook/SMS MS Scheduler & Outlook

Speed Dial Yes (2~9) Voice mail center → 1 key

Profile Yes

CLIP/CLR Yes

Phonebook 3 Number + 1 Memo + 1 e-mail Phone (Up to 255 entries)

Last Dial Number Yes (20)

Last Received Number Yes (20)

Last Missed Number Yes (10)

Search Number/Name Yes

Group 7 / User Editor

Fixed Dial Number Yes

Voice Memo 30 secs * 3

Call Remainder Yes

Network Selection Automatic / Manual

-12-


Mute Yes

Call Divert Yes

Call Barring Yes

Call Charge Yes

Call Duration Yes

SMS (EMS) 100

EMSSend/Receive/Save Yes Melody/Picture/Animation

MMS Yes

WAP Browser WAP 2.0

Java CLDC v1.0.3 / MIDP v1.0.3

Wall Paper Yes Max. 10 preset

Download Melody/Wallpaper (MMS) Over the WAP

Long Message Mac. 918 Character(6page*153)

Cell Broadcast Yes

Calendar Yes

Memo 20

World Clock Yes

Unit Convert Length/Surface/Volume/Weight

Fax & Data Yes

SIM Lock Yes Operator Dependent

SIM Toolkit Class 1,2,3

Camera

Image resolution : 640 x 480300 KB dynamic memory forimages : Max 100 photos (128 x 96)Max 4x zoom

G7050 only

Phone lock/Key lock Yes

Security DRM (Forward-lock only)

CPHS Yes

IM Yes G7050 for T-Mobile only

3. H/W Circuit Description3.1 RF Transceiver General Description

The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage supply part, and a VC-TCXO part.The Aero transceiver is composed of three RF chipsets, Si4200-BM[U502], Si4133T-BM[U505] and Si4201-BM[U503] which is a dual and triple-band GSM/GPRS wireless communications. This device integrated a receiver based on a low IF (100KHz) architecture and a transmitter based on modulation loop architecture. And, the synthesizer[U505] part employed the Silicon Labs Si4133T-BM, a complete dual band synthesizer with built in VCOs.The transceiver employed a 3 wire serial interface to allow an external system controller to write the control registers for dividers, receive path gain, power down setting, and other controls.

3.2 Receiver Part

The receiver part uses a low-IF receiver architecture that allows for the on-chip integration of thechannel selection filters, eliminating the external RF image reject filters and the IF SAW filterrequired in conventional super-heterodyne architecture. The Si4200-BM[U502] integrates threedifferential input LNAs that are matched to the 200 Ohm balanced-output SAW filters throughexternal LC matching networks. A quadrature image-rejection mixer downconverts the RF signalto a 100kHz intermediate frequency (IF) with the RFLO from the Si4133T-BM[U505]. The mixeroutput is amplified with an analog programmable gain amplifier (PGA) and quadrature IF signal isdigitized with high resolution A/D converters (ADCs). The Si4201-BM[U503] downconverts the ADCoutput to baseband with a digital 100kHz quadrature LO signal. Digital decimation and IIR filtersperform channel selection to remove blocking and reference interference signals. After channelselection, the digital output is scaled with digital PGA, which is controlled with the DGAIN[5:0] bitsin register 05h.The amplified digital output signal go through with DACs that drive a differentialanalog signal onto the RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADCinput baseband ICs.

Antenna Bar Number

-13-

Power (dBm)

Antenna Display

5 ≥ -85

4 ≥ -90

3 ≥ -95

2 ≥ -100

2 ≥ -105

1 < -105

Figure 1. RF Receiver Block

3.2.1. RF Front End

RF front end consists of Antenna Switch(FL501), dual band LNAs integrated in transceiver(U502).The Received RF signals (EGSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into the antenna or mobile switch. An antenna matching circuit is between the antenna and the mobile switch. The Antenna Switch(FL501) is used for control the Rx and TX paths. And, the input signals VC1 and VC2 of a FL501 are directly connected to baseband controller to switch either TX or RX path on. Ant S/W module(FL501) is an antenna switch module for dual band phone. The logic and current is given below Table 3-1.

-14-

Table 3-1. The Logic and Current

VC1

EGSM TX 0 V

DCS TX 2.5~3.0 V

EGSM/DCS RX 0 V

VC2

2.5~3.0 V

0 V

0 V

Current

10.0 mA max

10.0 mA max

< 0.1 mA

The receiver part uses a low-IF receiver architecture that allows for the on-chip integration of the channel selection filters, eliminating the external RF image reject filters and the IF SAW filter required in conventional super-heterodyne architecture. The Si4200-BM[U502] integrates three differential input LNAs that are matched to the 200 ohm balanced-output SAW filters through external LC matching networks.

ADCADC

ADCADC

RF

PLL

RF

PLL

IF

PLL

IF

PLL

Cha

nnel

Filt

erC

hann

el F

ilter DACDAC

DACDAC

100KHz100KHz

DIP

DIP

EGSM

DCS

PAMU504

RF3133

FL501Antenna Switch

13MHz

I

Q

U502/Si4200 U503/Si4201

U505/Si4133T÷2:GSM÷2:GSM

÷1:DCS÷1:DCS

0˚/90˚

0˚/90˚

RF1

RF2 IF

PGA PGA

U506VC-TCXO

EGSM

DCS

PCS

LNAFL502

FL503

Baseband(TI)

U102IOTA

+

U101Calypso(CO35)

Baseband(TI)

U102IOTA

+

U101Calypso(CO35)

A quadrate image-rejection mixer downconverts the RF signal to a 100kHz intermediate frequency (IF) with the RFLO from the Si4133T-BM[U505]. The RFLO frequency is between 1849.8 and 1918.8 MHz, and is divided by two in the Si4200 for EGSM modes. The RFLO frequency is between 1804.9 and 1879.9 MHz, and is divided by one in the Si4200 for DCS modes. The mixer output is amplified with an analog programmable gain amplifier (PGA), which is controlled with the AGAIN[2:0] bits in register 05h.The quadrate IF signal is digitized with high resolution A/D converters (ADCs). The Si4201-BM[U503] down-converts the ADC output to baseband with a digital 100kHz quadrate LO signal. Digital decimation and IIR filters perform channel selection to remove blocking and reference interference signals. The response of the IIR filter is programmable to a high selectivity setting(CSEL=0) or a low selectivity setting (CSEL=1). After channel selection, the digital output is scaled with digital PGA, which is controlled with the DGAIN[5:0] bits in register 05h.

3.2.2. IF

The amplified digital output signal go through with DACs that drive a differential analog signal onto the RXIP, RXIN, RXQP and RXQN pins to interface to standard analog ADC input baseband ICs.No special processing is required in the baseband for offset compensation or extended dynamic range.Compared to a direct-conversion architecture, the low-IF architecture has a much greater degree of immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing, 2nd order distortion of blockers, and device 1/f noise.

3.2.3. Demodulator and Baseband Processing

-15-

3.2.4. Synthesizer Part

The synthesizer IC, the Si4133T-BM[U505] is a monolithic CMOS integrated circuit that performs IF and RF synthesis. Two complete PLLs are integrated including VCOs, varactors, resonators, loop filters, reference and VCO dividers, and phase detectors. Differential outputs for the IF and RF PLLsare provided for direct connection to the Si4200-BM[U502] transceiver IC. The RF PLL uses two multiplexed VCOs.The RF1 VCO is used for Receive mode, and the RF2 VCO is used for Transmit mode. The IF PLL is used only during Transmit mode and uses a single VCO. The center frequency of each of the three VCOs on the Si4133T is set by connection of an external inductance(Lext). The IF and RF output frequencies are set by programming the N-Divider registers, N[RF1], N[RF2] and N[IF]. Programming the N-Divider register for either RF1 or RF2 automatically selects the proper VCO. The output frequency of each PLL is as follows:

fout = N * fø

A programmable divider at the XIN pin allows either a 13 or 26MHz from the external applied crystal oscillator. The RF PLL phase detector update rate(fø) can be programmed with the RFUP bit in register 31h to either fø = 100kHz or fø= 200kHz. The IF PLL always uses fø = 200kHz. Receive mode should use fø = 100kHz in DCS1800 and PCS1900 bands, and fø = 200kHz in the GSM850 and E-GSM 900 bands.

Transmit modes should always use fø = 200kHz. The IF and RF output frequencies are set by programming the N-Divider registers and also programmed via 3-wire interface with external system controller.

Figure 2. Synthesizer Block

-16-

3.2.5. Transmitter Part

The Transmitter part contains Si4200-BM[U502] active parts, Power Amp Module[U504] and Antennaswitch[FL501].The transmit section of Si4200-BM [U502] consists of an I/Q baseband upconverter, an offset phase-locked loop (OPLL) and two 50 ohm output buffers that can drive external power amplifiers.The RF GMSK outputs from the transmit VCO are fed directly to the RF power amplifiers.The peak output power and the profile of the transmitted burst are controlled by means of incorporated power control circuits inside of PA and DAC output. from the Baseband Controller. The PA outputs pass to the antenna connector via Antenna Switch.

IF

PLL

IF

PLL

Baseband(TI)

U102IOTA

+U101

Calypso(CO35)

Baseband(TI)

U102IOTA

+U101

Calypso(CO35)

13MHz

U505/Si4133TRF1

RF2 IF

U506VC-TCXO

IF_Lo(Tx)RF_Lo(Tx)

RF_Lo(Rx)

Figure 3. RF Transmit Block

The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals for the Transmit vector modulator. The modulator provides more than 40dBc of carrier and unwanted side-band. Rejection and produces a GMSK modulated signal. The baseband software is able to cancel out differential DC offsets in the I/Q baseband signals caused by imperfections in the D/A converters.The TX-Modulator implements a quadrature modulator. A quadrature mixer upconverts the differential I/Q signals with the IFLO to generate a SSB IF signal, which is filtered and used as the reference input to the OPLL. The Si4133T[U706] generates the IFLO frequency. The IFLO is divided by two to generate the quadrature LO signals for the quadrature modulator.

3.2.6. IF Modulator

-17-

3.2.7. OPLL

The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated TXVCO. The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its output is divided by 2for the GSM 850 and E-GSM 900 bands. The Si4133T generates the RFLO frequency between 1327and 1402 MHz. To allow a single VCO to be used for the RFLO, high-side injection is used for the GSM 850 and E-GSM 900 bands, and low-side injection is used for the DCS 1800 and PCS 1900 bands. Low-pass filters before the OPLL phase detector reduce the harmonic content of the quadraturemodulator and feedback mixer outputs. The cutoff frequency of the filters is programmable with the FIF[3:0] bits in register 04h. The OPLL requires no external duplexer to attenuate transmitter noise and spurious signals in the receive band. Additionally, the output of the transmit VCO (TXVCO) is a constant-envelope signal which reduces the problem of spectral spreading caused by non-linearity in the PA.

ΦDETΦ

DET

÷2÷2

DIP

DIP

PAMU504

RF3133

EGSM

DCS

I

Q

FL501Antenna Switch

Baseband(TI)

U102IOTA

+U101

Calypso(CO35)

Baseband(TI)

U102IOTA

+U101

Calypso(CO35)÷1÷1

÷2÷2

RF_Lo(Tx) IF_Lo(Tx)

PA_BAND

GATE_VC1

GATE_VC2

3.2.8. Power Amplifier

-18-

The RF3133 [U504] is a triple-band GSM/DCS/PCS power amplifier module that incorporates an indirect closed loop method of power control. The indirect closed loop is fully self-contained and it does not require loop optimization. It can be driven directly from the DAC output in the basebandcircuit. On-board power control provides over 37 dB of control range with an analog voltage input(Vramp). Efficiency is 55% at GSM and 52% at DCS.

Figure 4. Power Amp

3.2.9. 13MHz Clock

The 13 MHz clock(U506) consists of a TCXO(Temperature Compensated Crystal Oscillator) which oscillates at a frequency of 13 MHz. It is used within the Si4133T/Si4201 RF Main Chip, BB Analog chip-set(IOTA), Digital chip-set(Calypso G2).

Figure 5. VC-TCXO Circuit

3.2.10. Power Supplies and Control Signals

An external regulator(U508) is used to provide DC power to RF part. Every RF component except power amp module uses this external regulator.

Figure 6 External regulator Circuit

-19-

3.3 Digital Baseband (DBB) Processor

Figure 7. Top level block diagram of the Calypso G2(HERCROM400G2)

CALYPSO is a chip implementing the digital base-band processes of a GSM/GPRS mobile phone. This chip combines a DSP sub-chip (LEAD2 CPU) with its program and data memories, a Micro- -Controller core with emulation facilities (ARM7TDMIE), internal 8Kb of Boot ROM memory, 4M bit SRAM memory, a clock squarer cell, several compiled single-port or 2-ports RAM and CMOS gates.The chip will fully support the Full-Rate, Enhanced Full-Rate and Half-Rate speech coding.CALYPSO implements all features for the structural test of the logic (full-SCAN, BIST, PMT, JTAG boundary-SCAN).

3.3.1. General Description

-20-

CALYPSO architecture is based on two processor cores ARM7 and DSP using the generic RHEA bus standard as interface with their associated application peripherals.CALYPSO is composed from the following blocks:• ARM7TDMIE : ARM7TDMI CPU core• DSP subchip• ARM peripherals:

3.3.2. Block Description

General purpose peripherals

• ARM Memory Interface for external RAM, Flash or ROM• 4 Mbit Static RAM with write-buffer

Application peripherals

• ARM General purposes I/O with keyboard interface and two PWM modulation signals • UART 16C750 interface (UART_IRDA) with

→ IRDA control capabilities (SIR)→ Software flow control (UART mode).

• UART 16C750 interface (UART_MODEM) with→ Hardware flow protocol (DCD, CTS/RTS)→ Autobaud function

• SIM Interface.• TPU(Time Processing Unit) : Processing for GSM time base• TSP(Time Serial Port) : GSM data interface with RF and ABB

Memory Interface : External/Internal Memory InterfacenCS0 : FLASH1, 16bit access, 3 wait statenCS1 : FLAHS2, 16bit access, 3 wait statenCS2 : Ext SRAM, 16bit access, 3 wait statenCS3 : Main LCD(16bit access), OEL(8bit access) addressing, 3 wait state nCS4 : MIDI(8bit access), USB(8bit access) addressing, 3 wait statenCS6 : Int SRAM, 32bit access, 0 wait state

* Calypso is internally 39MHz machine (25ns machine cycle), so it requires 3 wait-state for 80ns access(25*4 = 100 ns).

-21-

3.3.3. External Devices connected to memory interface

Table 3-2. Memory interface

Device Name Maker WriteAccess Time

Read Access Time

FLASH1 AM50DL128CG70I AMD 70ns 70ns

SRAM AM50DL128CG70I AMD 70ns 70ns

LCD S6B33B0A SDI 50ns 50ns

Melody IC YMU762 Yamaha 50ns 80ns

Calypso uses this interface to control IOTA_CS(ABB Processor) and AERO(RF Processor) with GSM Time Base

3.3.4. RF Interface (TPU, TSP Block)

Table 3-3. RF Interface Spec.

TSP (Time Serial Port)

Resource Interconnection Description

TSPDO ABB & RF main Chip Control Data

TSPEN0 ABB ABB Control Data Enable Signal

TSPEN1 RF main Chip RF Control Data Enable Signal

TSP (Time Serial Port)

TSPACT00 PDNB RF main Chip Reset Signal

TSPACT01 PA_ON Power Amp ON signal

-22-

FLASH2 AM50DL128CG70I AMD 70ns 70ns

3.3.5. SIM Interface

SIM interface scheme is shown in (Figure 8). SIM_IO, SIM_CLK, SIM_RST ports are used to communicate DBB with ABB and the Charge Pump in ABB enables 1.8V/3V SIM operation.

SIM Interface

SIM_CLK SIM card reference clockSIM_RST SIM card async/sync resetSIM_IO SIM card bidirectional data lineSIM_PWCTRL SIM card power activationSIM_CD SIM card presence detection

Figure 8. SIM Interface

3.3.6. UART Interface

G5500/7050 has two UART Drivers as follow :

UART1 : Hardware Flow Control / Fax & Data ModemUART2 : Handsfree Control / SW trace or IrDA Modem

-23-

SIM_IOSIM_CLKSIM_RST

SIM_PWRCTRLSIM_CD

DBB ABB

VRSIM

DBBSIODBBSCKDBBSRST

SIMCLKSIMIO

SIMRST

SIM

VPPCLKIORST

V_IO

150p 22p

10k

V_SIM

1u

10kSIM_IO

SIM_CLKSIM_RST

SIM_PWRCTRLSIM_CD

DBB ABB

VRSIM

DBBSIODBBSCKDBBSRST

SIMCLKSIMIO

SIMRST

SIM

VPPCLKIORST

V_IO

150p 22p

10k

V_SIM

1u

10k

Figure 3-4. UART Interface spec.

UART MODEM (UART1)

Resource Name Description

TX_MODEM TXD Transmit Data

RX_MODEM RXD Receive Data

CTS_MODEM CTS Clear To Send

RTS_MODEM RTS Request To Send

GPIO 3 DSR Data Set Ready

-24-

UART IrDA (UART2)

Resource Name Description

TXIR_IRDA TX_IRDA Infra-Red Transmit Pulse

TX_IRDA TX Transmit Data(UART2)

RXIR_IRDA RX_IRDA Infra-Red Receive Pulse

RX_IRDA RX Receive Data(UART2)

SD_IRDA SD_IRDA IRDA transceiver Shutdown Mode

3.3.7. GPIO Map

In total 16 allowable resources, G5500/7050 is using 13 resources except 3 resources dedicated to SIM and Memory. G5500/7050 GPIO (General Purpose Input/Output) Map, describing application, I/O state, and enable level, is shown in below table.

Table 5. GPIO Map Table

I/O # Application I/O ResourceState

InactiveState

ActiveState

I/O (0) FLIP I GPIO HIGH (Open) LOW (Closed)

I/O (1) MIDI_INT I GPIO HIGH LOW

I/O (2) CAM_INT I GPIO HIGH LOW

I/O (3) DSR I GPIO HIGH LOW

I/O (4) LCD_ID I GPIO LOW HIGH

I/O (5) SIM_PWRCTRL O SIM HIGH HIGH

I/O (6) JACK_DETECT I GPIO LOW HIGH

I/O (7) LCD_RESET O GPIO HIGH LOW

I/O (8) SPK_EN O GPIO LOW(REC) HIGH(SPK)

I/O (9) CAM_HOLD O GPIO LOW HIGH

I/O (10) INDLED_R O GPIO LOW HIGH

I/O (11) INDLED_G O GPIO LOW HIGH

I/O (12) STROBE O GPIO RESERVED

I/O (13) HANDSFREE I GPIO HIGH LOW

I/O (14) NBHE O MEMORY

I/O (15) NBLE O MEMORY

-25-

3.4 Analog Baseband (ABB) Processor

IOTA is Analog Baseband (ABB) Chip supports GSM900, DCS1800, PCS1900, GPRS Class 10 withDigital Basband Chip (Calypso G2).IOTA processes GSM modulation/demodulation and power management operations.

Block Description• Audio Signal Processing & Interface• Baseband in-phase(I), quadrature(Q) Signal Processing• RF interface with DBB (time serial port) • Supply voltage regulation

3.4.1. General Description

-26-

• Battery charging control• Switch ON/OFF • 1.8V/3V SIM card Interface• 4 internal & 4external ADC channels

Figure 9. Top level block diagram of the IOTA(TWL3014CGGM)

The voice codec circuitry processes analog audio components in the voice uplink (VUL) path and applies this signal to the voice signal interface for eventual baseband modulation. In the voice downlink (VDL) path, the codec circuitry changes voice component data received from the voice serial interface (VSP) into analog audio.

3.4.2. Audio Signal Processing & Interface

-27-

Figure 10. Audio Interface Block Diagram

-28-

Figure 11. Uplink Path

The VUL path includes two input stages. The first stage is a microphone amplifier, compatible with electret microphones containing a FET buffer with open drain output. The microphone amplifier has a gain of typically 25.6 dB (±1 dB) and provides an external voltage of 2.0 V or 2.5 V to bias the microphone (MICBIAS). The auxiliary audio input can be used as an alternative source for higher level speech signals. This stage performs single-ended-to differential conversion and provides a programmable gain of 4.6 dB or 28.2 dB. The third stage is a headset microphone amplifier, compatible with electret microphones. The headset microphone amplifier has a gain of typically 18 dB and provides an external voltage of 2.0 V or 2.5 V to bias the headset microphone (HSMICBIAS). When one of the input stages (MICI, AUXI, HSMICP) is in use, the two other input stages are disabled and powered down. The resulting fully differential signal is fed to the analog-to-digital converter (ADC). The ADC conversion slope depends on the value of the internal voltage reference. Analog-to-digital conversion is performed by a third-order Σ-Δ modulator with a sampling rate of 1 MHz. Output of the ADC is fed to a speech digital filter, which performs the decimation down to 8 kHz and band-limits the signal with both low-pass and high-pass transfer functions. Programmable gain can be set digitally from -12 dB to +12 dB in 1-dB steps and is programmed with bits 4-0 (VULPG(4:0)) of the voicebanduplink register. The speech samples are then transmitted to the DSP via the VSP at a rate of 8 kHz. There are 15 meaningful output bits. Programmable functions of the VUL path, power-up, input selection, and gain are controlled by the BSP or the USP via the serial interfaces. The VUL path can be powered down by bit 0 (VULON) of the power down register.

3.4.3. Audio uplink processing

-29-

The VDL path receives speech samples at the rate of 8 kHz from the DSP via the VSP and converts them to analog signals to drive the external speech transducer. The digital speech coming from the DSP is first fed to a speech digital filter that has two functions. The first function is to interpolate the input signal and to increase the sampling rate from 8 kHz up to 40 kHz to allow the digital-to-analog conversion to be performed by an oversampling digital modulator. The second function is to band-limit the speech signal with both low-pass and high-pass transfer functions. The filter, the PGA gain, and the volume gain can be bypassed by programming bit 9 (VFBYP) in the voiceband control register 1. The interpolated and band-limited signal is fed to a second order Σ-Δ digital modulator sampled at 1 MHz to generate a 4-bit (9 levels) oversampled signal. This signal is then passed through a dynamic element matching block and then to a 4-bit digital-to-analog converter (DAC). The volume control and the programmable gain are performed in the voiceband digital filter. Volume control is performed in steps of 6 dB from 0 dB to -24 dB. In mute state, attenuation is higher than 40 dB. A fine adjustment of gain is possible from -6 dB to +6 dB in 1-dB steps to calibrate the system depending on the earphone characteristics. This configuration is programmed with the voiceband downlink control register.

3.4.4. Audio downlink processing

Figure 12. Downlink Path

Baseband codec is composed of baseband uplink path (BUL) and baseband downlink path (BDL).BUL makes GMSK (Gaussian Minimum Shift Keying) modulated signal which has In-phase (I) component and quadrature (Q) component with burst data from DBB. This modulated signal is transmitted through RF section via air.BDL process is opposite procedure of BUL. Namely, it performs GMSK demodulation with input analog I&Q signal from RF section, and then transmit it to DSP of DBB chip with 270.833kHz data rate through BSP.

3.4.5. Baseband Codec (BBC)

-30-

Figure 13. Baseband Codec Block Diagram

There are 7 LDO (Low Drop Output) regulators in ABB chip. The output of these 7 LDOs are as following table. (Figure14) shows the power supply related blocks of DBB/ABB and their interfaces in G5500/7050.

3.4.6. Voltage Regulation (VREG)

-31-

Figure 14. Power Supply Scheme

-32-

Table 3-6. LDO Output Table

Output Voltage Usage

VRDBB 1.5V Digital Core of DBB

VRIO 2.8V Peripheral devices

VRMEM 2.8V External memory

VRRAM 2.8V LCD & peripheral devices

VRABB 2.8V Analog Block of ABB

VRSIM 2.85V SIM card driver

VRRTC 1.5V RTC & 32kHz-crystal

ABB ADC block is composed of 4 internal ADC (Analog to Digital Converter) channels and 4 external ADC channel. This block operates charging process and other related process by reading battery voltage and other analog values.

3.4.7. ADC Channels

Table 3-7. ADC Channel Spec

ADC 8 Channels

Resource Name DescriptionVCHG VCHG

Charging ManagementVBAT VBAT

ICHG ICHG

VBACKUP VBACKUP Backup Battery

ADIN1 ADIN1 Not Used

ADIN2 BATT_TEMP Battery Detect

ADIN3 TEMPSENSE Temperature Sensing

ADIN4 HOOK_DETECT HOOK_DETECT

Charging block in ABB processes charging operation by using VBAT, ICHG value through ADC channel. Battery Block Indication and SPEC of G5500/7050 is as follow.

3.4.8. Charging

Figure 15. Battery Block Indication

4.2V~3.82V 3.82V~3.73V 3.73V~3.62V 3.62V~3.35V

1. Charging method: CC-CV2. Charger detect voltage: 4.0V3. Charging time: 3h4. Icon stop current: 100mA5. Charging current: 420mA6. CV voltage: 4.2V7. Cutoff current: 50mA8. Full charge indication current (icon stop current) : 100mA9. Recharge voltage: 4.16V10. Low battery alarm

a. Idle: 3.62Vb. Dedicated: 3.50V

11. Low battery alarm interval :a. Idle: 3minb. Dedicated:1min

12. Switch-off voltage: 3.35V13. Charging temperature ADC range

a. ~ -5 : not charging operation.b. -5 ~ 50 : charging.c. 50~ : not charging operation.

-33-

G5500/7050 Power State : Defined 4cases as follow

Power-ON : mobile is powered by main battery or backup battery. Power-OFF : mobile isn’t any battery. Switch-ON : mobile is powered and waken up from switch-off state. Switch-OFF : mobile is powered to maintain only the permanent function (ULPD).

To enter into Switch-ON state, one of followinf 4 condition is satisfied.

PWR-ON pushed after a debouncing time of 30ms. ON_REMOTE : After debouncing, when a falling edge is detected on RPWON pin. IT_WAKE_UP : When a rising edge is detected on RTC_ALARM pin. CHARGER_IC :When a charger voltage is above VBAT+0.4V on VCHG.

3.4.9. Switch On/Off

G5500/7050 using 128Mbit Flash + 64Mbit SRAM with 16 bit parallel data bus thru ADD01 ~ ADD22.

3.4.10. Memories

LCD module include: LCD: 128*160, 65,000 Color STN LCD LCD Backlight: White LED illumination and DC/DC converter Module

LCD module is connected to main board thru 26 pins FPCB.

3.4.11. Display & FPCB Interface

-34-

LCD connector Interface Spec.

Table 3-8 LCD connector Interface Spec.

No Pin Name Pin Description1 Backlight LCD Back Light

2 VBAT Battery Voltage

3 L_LCD_CS LCD Chip Select

4 LCD_RESET LCD Reset

5 L_A(1) Address Data Selection

6 L_WR LCD Write Control7 L_D(0) Data input

8 L_D(1) Data input

9 L_D(2) Data input

10 L_D(3) Data input













23 GND Data input

24 V_SRAM Power Supply (2.8V)

25 NC Reserved

26 LCD_ID LCD ID

-35-

3.4.12. Keypad Switching & Scanning

Table 3-9. Keypad Map

KBC0 KBC1 KBC2 KBC3 KBC4KBR0 [Vol_Down] [Vol_Up] [OK] [REC] [CAM]

KBR1 [1] [2] [3] [F2] []

KBR2 [4] [5] [6] [SEND] []KBR3 [7] [8] [9] [F1] []

KBR4 [*] [0] [#] [C] []

DBB supports 25 Key Map and Switch-ON Key is connected directly to ABB as (Figure16 ).

Figure 16. Keypad Scanning Scheme

-36-

3.4.13. Keypad back-light Illumination

There are 12 Deep Blue LEDs in Main Board for Keypad Backlight. Keypad Back-light is driven by ‘LEDB’ line from IOTA .

Figure 17. Keypad Back-light Scheme

-37-

3.4.14. LCD Illumination

There are 3 LEDs in the LCD module for LCD backlighting. DC-DC converter is mounted in LCD module.

Figure 18. LCD Back-light (LED_EN) Scheme

3.4.15. Audio Circuit

Figure 19. Microphone system

-38-

Microphone circuits

Main PCB

-39-

Keypad PCB

When a call is established, MICBIAS signal goes up to ‘2.5V’ in the G5500/7050. IOTA(ABB) provides both 2.0V and 2.5V for MICBIAS to circuit designer. VA102, VA103 are employed to enhance ESD immunity.

Figure 20. Ear-Jack interface

-40-

Head set Jack Interface

When ear-mic set or head set plug is inserted into the receptacle, JACK_DETECT signal change from ‘L’ to ‘H’. If hook button is pushed for a second to make a call, then HOOK_DETECT signal goes from ‘H’ to ‘L’. Also call end has same mechanism by pushing hook button on the Ear- microphone strap. Ordinarily detection of pushing hook button is established by signal de-bouncing for about 20ms.

-41-

Figure 21. Dual mode speaker system switch

Speaker Circuits

Single package dual analog switches are employed to support both voice and MIDI sound mode with one speaker. The speaker is designed to support both receiver and loud speaker characteristics. If the SPK_EN port sets ‘H’, then the speaker will operate as loud speaker. The other case, the SPK_EN port will remain ‘L’ state.

-42-

Figure 22. MIDI sound Circuit

MIDI SOUND circuit description

Midi synthesizer circuit includes YMU762B, external regulator(3.3V output)

-43-

The YMU762 has features as described below.

• Simultaneous generation of up to 40 tones:• Polyphonic synthesizer specification• Has built-in default tones for FM and Waveform table synthesizers in the ROM, and the tones can be downloaded to RAM.

• Stream replay with ADPCM/PCM• Software interrupt mechanism for external synchronization• Equipped with 8 bit parallel I/F for control from CPU• Equipped with speaker amplifier and equalizer circuit• Has built-in PLL to support inputting of master clock up to 20 MHz.• Contains a 16-bit stereophonic D/A converter.

3.5. Camera Circuit (G7050 only)

-44-

Under camera action mode, CLC344E wholly controls LCD by itself to execute camera functions, while, under bypass mode, CLC344E lets all LCD driver-related signals bypass it, as if it does not exist at all in the system.

Figure 23. Camera Circuit Block Diagram

Sensor Camera ASIC(CLC344E) LCD

C_SD[7:0]

C_HSC_VS

C_PCLKC_MCLK

C_RESET

C_SDAC_SCK

L_DA[17:0]

L_CS

L_WR

L_RD

L_ADS

DBB

M_S

D[5

:0]

M_S

D[1

5:0]

M_C

S[1:

0]

M_R

D

M_W

R

M_A

DS

M_H

OLD

M_I

NTR

3.5.1. Camera Chipset

General description of CLC344E Camera chipset.

• External Clock Source Up to 27 MHz• Internal Clock Divider 1/2, 1/3, 1/4 for Sensor Clock Output• Support Standard SRAM Interface (6bit Address & 16bit Data) for CPU Interface• 4 Mbit Stacked SRAM• Support LCD Signal By-pass Mode• Fully Hardwired JPEG and Motion-JPEG Codec• Support three General Port IO• 8 x 8 100pin BGA Package

-45-

Figure 24. CLC344E, Camera Chip Block Diagram

The camera IC, CLC344E, is controlled through _RD, _WR, CAM_INT, CAM_HOLD, CAM_RST, ADD[1-6], DATA[0-15] by PD751992GHH(DBB). In by-pass mode, CLC344E bypasses all LCD control signal from PD751992GHH(DBB) to LCD module. In operating mode, CLC344E samples the image data from camera sensor connected on CN601 through C_CD[0-7], C_MCLK, C_PCLK, C_HS, C_VS, C_SDA, C_SCK, C_RST signals and controls the LCD module through L_A(1), L_D[0-15], L_WR, L_LCD_CS.The camera power is provided by U602 ADP3330. It converts VBAT from battery to 2.85V

-46-

Table 3-10. CLC344E Interface

Port Name Description

_WR Write control to CLC344E or LCD module

_RD Read control. The phone do not read data from LCD chip

CAM_INT Interrupt to DBB. It can be set to level or edge interrupt

CAM_HOLD This signal determines the camera operation mode. Making high, disable all CLC344E functions

CAM_RST This signal resets the CLC344E

ADD[1-6] Address lines from DBB

DATA[0-15] Parallel data lines from DBB

V_CAM 2.8V power supply to CLC344E

C_D[0-7] Sensor Data bus

C_RST Sensor reset

C_PCLK Sensor input data sampling clock

C_MCLK Sensor clock

C_SDA IIC bus data line

C_SCK IIC bus clock line

C_PWDN Sensor power down control pin

L_D[0-15] Parallel data lines to LCD module

L_A[1] Address control LCD module

L_LCD_CS LCD chip select

L_WR Write control LCD data line

-47-

Figure 25. CLC344E, Camera Chip Circuit

-48-

Figure 26. LCD Connection Thru CLC344E, Camera chip

3.5.2. CMOS Image Sensor

General description of CIS Camera Module

• Optical Size: 1/4 inch • Unit Pixel: 5.6 μm X 5.6 μm• Effective Resolution: 640X480, VGA • 8.5mm X 9.5mm X 6.6mm module size • 8-bit CCIR656 (YCrCb) Video Output • VGA Output Capability • Programmable Gamma Correction • Auto White Balance and Auto Exposure Control • Horizontal and/or Vertical Mirror Output • Standby-Mode for Power Saving • Maximum 30 Frame per Second • Single Power Supply Voltage: 2.8V • I2C Type Control Interface

-49-

Figure 27. Camera Module Block Diagram

The Camera module is fully functional camera module with embedded lens. A low-noise low-power color CMOS image sensor, and an image signal processor, produce high-quality digital video output including CCIR656 format with maximum 30 frames per second for full frame readout. The CMOS image sensor, fabricated by SAMSUNG 0.35μm CMOS image sensor process technology which is dedicated to higher-sensitivity and lower-dark level compared to standard CMOS process technology and on-chip CDS and 10-bit column ADC circuit makes high signal-to-noise ratio with low power consumption. The image sensor, signal processor and some passive components are packed with IR-cut filter and lens units to have very small volume of whole camera system. It needs only 2.8V single power supply and a main clock supplied to operate. All the function can be controlled by control register setting through the standard 2-wire serial interface.

Pixel Array640(H)×480(V)

TimingController

10-b

it A

DC

Line Buffer

Pre Processor

LuminanceSignal

Processor

Post Processor

ChromaSignal

Processor

RISC Processor OutputFormatter

(AE,AWB Processor)

S5K433LA03CMOS Image Sensor

GN

DC

VDD

AC

VDD

DC

GN

DI

VDD

DI

S5C7322XImage Signal Processor

Lens Unit

I2C Bus

MCLK

VSYNCHSYNCPCLKDATA0-7

SDASCLSTBYRST

-50-

Figure 28. Camera Module Circuit

4. TROUBLE SHOOTING4.1 Main Components Placement (G5500)

-51-

CN602(LCD)

LED201

CN402(KEYPAD)

LCD AREA

VIB

J301

U504 SW202

SW201

U301

U302

CN403

U401CN401

U102

U101

U201U202

U503U502

U508

FL503FL502

U510

U303

SW501

FL501

U507U506

Q201

U203

U204

SPK

Q203

U505

BAT101

X101

4.1 Main Components Placement (G7050)

-52-

VIB

J301

U504 SW202

SW201

U301

U302

CN403

U401CN401

U102

U101

U201U202

X101

U507U506U503

U502U508

U505

FL503FL502

U510

FL501

SW501

U303

U601U602

Q601

LCD AREA

LED201

CN602(LCD)

CN402(KEYPAD)

CN601

Q201

U203

U204

SPK

Q203

BAT101

4.2 Main Components (Description)

-53-

LED201 Indicator LED U201 Memory(128M Flash+64M SRAM)

BAT101 Backup battery (3V) U202 IrDA port

CN401 IO connector U203 Indicate LED control switch

CN402 FPCB connector (Keypad) U204 Vibrator control TR

X101 Crystal (24MHz oscillator) U301 MIDI chipset (YMU762)

CN403 SIM card connector U302 Audio power source

CN602 Connector (LCD) U303 Receiver/Ear-mic select switch

FL501 Mobile switch U401 Charging current control TR

FL502 EGSM SAW Filter U502 Synthesizer IC (Si4200)

FL503 DCS SAW Filter U503 Synthesizer IC (Si4201)

J301 Ear-mic connector U504 PAM

Q201 Indicate LED control TR U505 Synthesizer IC(Si4133)

Q203 Power/slide control TR U506 AFC control VCXO(13MHz)

SPK Cable connector (Speaker) U507 PLL control OP-AMP

SW201 Side Key (down) U508 RF power source

SW202 Side Key (up) U510 Antenna Control

SW501 Antenna Switch VIB Cable connector (vibrator)

U101 Digital Baseband Chipset (Calypso) U102 Analog Baseband Chipset (IOTA)

LED201 Indicator LED U201 Memory(128M Flash+64M SRAM)

BAT101 Backup battery (3V) U202 IrDA port

CN401 IO connector U203 Indicate LED control switch

CN402 FPCB connector (Keypad) U204 Vibrator control TR

X101 Crystal (24MHz oscillator) U301 MIDI chipset (YMU762)

CN403 SIM card connector U302 Audio power source

CN601 Connector (Camera Sensor) U303 Receiver/Ear-mic select switch

FL501 Mobile switch U401 Charging current control TR

FL502 EGSM SAW Filter U502 Synthesizer IC (Si4200)

FL503 DCS SAW Filter U503 Synthesizer IC (Si4201)

J301 Ear-mic connector U504 PAM

Q201 Indicate LED control TR U505 Synthesizer IC(Si4133)

Q203 Power/slide control TR U506 AFC control VCXO(13MHz)

SPK Cable connector (Speaker) U507 PLL control OP-AMP

SW201 Side Key (down) U508 RF power source

SW202 Side Key (up) U510 Antenna Control

SW501 Antenna Switch VIB Cable connector (vibrator)

U101 Digital Baseband Chipset (Calypso) U102 Analog Baseband Chipset (IOTA)

G5500

G7050

U601 Camera chipset (CLL344E) U602 Camera block power source

4.3 Keypad Components Placement (Common)

-54-

KEYPADLED

KEYPADLED

KEYPADLED

KEYPADLED

(Hall Effect Switch)MICU101

CN101

4.4 Baseband Components

-55-

LCD FRONT PART LCD REAR PART

RECEIVER/SPK VIBTATOR

4.5 Power On Trouble

-56-

4.5.1 Power On Sequence

Connecting Battery

• Power-On Key Detection• PWON signal goes to ABB and then ABB reset DBB by ON_OFF signal• ON_OFF turn low(1.5V) to HIGH(2.8V) and it resets Calypso

4.5.2 Check Points

• Battery Voltage• Power-On Key Detection (PWON signal)• Outputs of LDOs

4.5.3 Trouble Shooting Setup

• Connect PIF-UNION to the phone• Set the TI-remote switch PIF-UNION off

4.5.4 Trouble Shooting Procedure

• Check Battery voltage• END_KEY Dome Switch condition• Check the output voltages of all LDOs

4.6 Charging Trouble

-57-

• Charging method : CC-CV• Charger detect voltage : Over 4.0V• Charging time : About 3hours • Charging current : 420mA • Cutoff current : 50mA• Low battery alarm

-. Idle : 3.62V-. Dedicated : 3.50V

4.2V~3.82V 3.82V~3.71V 3.71V~3.62V 3.62V~3.35V

• Switch-off voltage : 3.35V• Charging temperature adc range

-. ~ -5 : not charging operation. -. -5 ~ 50 : charging.-. 50~ : not charging operation.

Block Diagram

Charging Current

-58-

Charging Procedure

• Connecting TA & Charger Detection• Control the charging Current by ABB• Charging Current flows into the Battery

Check Points

• Connection of TA• Charging Current Path• Battery

Trouble Shooting Setup

Trouble Shooting Procedure

• Check the charger connector.• Check the charging current path.• Check the battery

START

I/O Connector(CN401)Is well-soldered?

Voltage at pin 4,6 of U401= 5.2V ?

U401, D401, R410Is well-soldered?

Voltage across R410 Is about 10~100mV ?

Resolder the CN401

Battery ok?

Charge is operating properly

The TA is out of orderChange the TA

Resolder U401, D401,R410

Replace U401, D401

Change the battery

Yes

Yes

Yes

Yes

Yes

No

No

No

No

No

• Connect Battery & TA to the handset.

4.7 LCD Display Trouble

-59-

Check soldering around connector

LCD Control Signals From Main Board

• Backlight, L_LCD_CS, LCD_RESET, L_WR, LCD_ID, L_A(1), L_D(0)~L_D(15)

Check Points

• The Assembly status of the LCD Module.• The Soldering of connectors• The FPCB which connects the LCD module with the main board.


• Connect PIF, and power on

-60-

START

NoPower is supplied tothe board?

Yes

Refer to Power On Trouble

Connection betweenModule and board is OK?

No Reconnect LCDModule

Yes

CN602 is soldered well?No

Resolder the CN602

Yes

Paths of LCD controlsignals are OK?

No ResolderR658, R619-R638

After changing the board,LCD Display is OK?

No The board is broken.Change the board.

LCD Module is out of order.Change the LCD Module.

Yes

Yes

4.8 Receiver Trouble

-61-

Block Diagram

Melody Generation

• U301(YMU762,MIDI) is controlled by DBB.• U301 generates 40poly MIDI sound and it is delivered to the speaker via U303 (analog SW) & connector socket.

Signals to the receiver

• RCV_P,RCV_N From ABB• SPK_RCVN, SPK_RCVP to Receiver via U303 (analog SW) & connector socket

Calypso(U101)

IOTA(U102)

YMU762(U301)

Control

RCV_P/RCV_N

RC filter

SPKP/SPKN

EAR_P/EAR_N

Analog SW(U303)

SPK_RCVP/SPK_RCVN

RECEIVER(SPK)

Check Points

• Audio signals from ABB• Audio signals to the receiver• Audio signal path• Check the sound level to the speaker.• Soldering of connector & speaker/receiver• Speaker/Receiver

-62-

Receiver Trouble Shooting Setup

• Initialize GSM MS test equipment.• Connect PIF-UNION and power on. • Make a test call to 112.• Set audio part at test equipment as PRBS or continuous wave, not echo.• Set the audio volume max.

Check the statesthese points !

Trouble shooting Procedure

• Check the audio signal levels at each point.• Check the soldering of the connector.• Check the soldering of the receiver.• Check the receiver.• Check the connection of socket.• Check receiver socket and cable states.

Speaker Trouble Shooting Setup

• Connect PIF to the phone, and power on. • Enter the engineering mode, and go to menu“Baseband → Alert → Ring”


• Check the voltage levels of power supplies.• Check all sound path.• Check the sound level to the speaker.• Check the speaker and the soldering and socket.

-63-

START

No

Yes

ABB is out of order.Change the board.

SPK_EN signal is low?No Resolder the U303.

Otherwise change it.

Yes

NoReconnect the cable

Does sine wave appearat R308, R309?

Connection betweencable and board is OK?

Twist pair cable of receiverIs OK?

Change the receiver

No Trouble

4.8.1. Receiver Trouble

No

Yes

Yes

Set audio part at test equipment as PRBS or continuous wave, not echo. Set the

audio volume max.

-64-

4.8.2. Speaker Trouble

START

No

Yes

No Reconnect receiver

Yes

Soldering of SPKis OK?

No Resolderthe SPK

Yes

Yes

Does sine wave appearat C306, C307?

Melody IC is out of order.Change the U301.

Connection betweenreceiver and board

is OK?

Speaker OK

SPK_EN signal is high?No Resolder the U303

otherwise Change it.

Yes

V_SRAM & V_IOis 2.8V?

No Resolder the U301otherwise Change it.

Enter into Engineering Mode andgo to menu “Baseband → Alert → Ring”

4.9 Microphone Trouble

-65-

Block Diagram

IOTA

Main Board

Keypad

-66-

Microphone Signal Flow

• MIC is enable by MICBIAS• MICBIAS, MICP, MICN signals to ABB

Check Points

• Microphone bias• Audio signal level of the microphone• Soldering of components• Connection of FPCB


• Initialize GSM MS test equipment.• Connect PIF-UNION to the phone, and power on.• Make a test call to 112. • Make a sound in front of the microphone

MIC BiasC325

MICNMICP


• Check the bias of the microphone.• Check the audio signal path. • Check the soldering.• Check the microphone.• Check the operation of FPCB

MIC BiasR116

MICN

MICP

MICP

MICN

The waveforms at MICP and MICN

AC voltages of the signals

-67-

START

No Resolder the R330, R321

A few hundredsof mV of signals are

measured ?

Yes

The soldering of R330, R321 is OK?

Yes

The voltage of R116is 2.5V?

The MIC is out of order.Change the MIC.

No

ABB is out of order.Change the board.

YESResolder the

L301, L302, C327, C330, C326, C331

and C328

The soldering of L301, L302, C327,C330, C326, C331

and C328 is OK?

Yes

The soldering of C105 is OK?

No

Resolderthe C105

No

Connection is between FPCB and

CN402 is OK?Connection is between FPCB and

CN101 is OK?Reconnection ofFPCB and Keypad

YesYes

No

Yes

No Reconnection ofFPCB and Keypad

No

Connect the handset to network equipment and

setup call.

Check the signal level at pin 1,2 of the MIC after putting audio signal into the MIC.

4.10 Vibrator Trouble

-68-

Block Diagram

Vibrator Operation

• Vibrator is controlled by MIDI chip• When vibrator signal is high, vibrator is enabled

Check Points

• VCC lines (V_IO) of MIDI chip• Vibrator signal path• The connection between the main board and vibrator module• The soldering of socket• The Vibrator (PORON t=2.5mm)


• Connect PIF to the phone, and power on. • Enter the engineering mode. • Go to menu “Baseband → Alert → Vibrator”


• Check vibrator signal• Check soldering of components• Check connection of cable-to-socket • Check vibrator PORON thickness

Vibrator

CheckPORON t=2.5mm

Vibrator Signal

Checksoldering !

-69-

START

No

Yes

Change the board

U204, R222, L201 aresoldered well ?

No Resolder the U204,R222, L201

Yes

Connection between cable and

socket is OK?

No Reconnection betweencable and socket

Yes

Cable of vibrator is OK? No

Signal of pin1 of U204 is OK?

Vibrator is out of order.Change the Vibrator.

Voltage of C308 is 2.8V

No

YesU301 is out of order

Not connectionChange the Vibrator.

Yes

Enter into Engineering Modeand select Vibrator

4.11 Keypad Backlight Trouble

-70-

Block Diagram

Backlight Operation

• The keypad LED backlight is controlled with KEY_LED signal.• KEY_LED signal from ABB.• The LEDs are forward biased and turned on.

Check Points

• KEY_LED signal• LEDs• Operation of FPCB


• Connect PIF-UNION to the phone, and power on. • Enter the engineering mode. • Go to menu “Baseband → Backlight → Keypad on”


• Check the soldering of components• Check the KEY_LED signal • Check LEDs

Check KEY_LED signal

R113,R114

Checksoldering !

-71-

Operation of FPCB is OK?

START

No

Yes

ABB is out of order.Change the Board.

Yes Replace the ALL LED.It is out of order.

No

Resolder the path of LED and Resistor.

The Voltage of KEY_LED signal

is about 0V?

Is there anything that resistor value across LED

is under 10Ω?

No

Yes

The path is OK?

The LED is out of order.Change the LED.

Yes

ABB is out of order.Change the Board.

Enter into Engineering Modeand select Keypad On

Power off and Measure the Resistor Value of all LEDs.

No

4.12 Slide Open/Close Trouble

-72-

Block Diagram

Flip Operation

• There is a magnet to detect the Flip status, opened or closed.• If a magnet is close to the hall-effect switch(U101), the voltage at pin 2 of U101 goes to 0V. Otherwise, VBAT.

• This Flip signal is delivered to DBB, and the status of Flip is reported.

Main Board

Flip Signal Status

L : Close (Magnetized)

H : Open (Not magnetized)

Keypad

-73-

START

No

Yes

Resolder the C102,C103, C204,R411

The VBAT is over 3.35V? No Refer to Power On Trouble.

Yes

The Flip signal is lowon magnetizing into U101?

No Replace the U101.U101 is broken.

Yes

The all paths connected to U101 are OK?

The DBB(Calypso) is broken.Change the board.

Operation of FPCB is OK? NO Change FPCB

Yes

4.13 SIM Detect Trouble

-74-

Block Diagram

Connection between SIM and DBB

• SIM_CLK, SIM_IO, SIM_RST

SIM_IOSIM_CLKSIM_RST

SIM_PWRCTRLSIM_CD

DBB ABB

VRSIMDBBSIODBBSCKDBBSRST

SIMCLKS IMIO

SIMRST

SIM

VPPCLKIORST

V_IO

150p 22p

10k

V_SIM

1u

10k

①

③⑥

Check Points

• Contact between SIM and socket-. Soldering of SIM socket


• Insert the SIM into socket -. Connect PIF to the phone, and power on.


• Check the power supply.-. Check the soldering of SIM socket.-. Check the SIM.

④

-75-

START

No

Yes

Resolder the CN403.

No Resolder theC403,C410,C402,R401

Yes

The SIM Card is OK?No SIM card is broken.

Change the SIM Card.

Yes

The soldering of SIM connectoris OK?

The ABB(IOTA) is broken.Change the board.

The all paths connected to CN403 are OK?

Insert the SIM Card

To U102(IOTA)

From U102(IOTA)

The direction of the audioSignal from ear-mic

4.14 Earphone Trouble

-76-

Block Diagram

Earphone Detecting Operation

• The DBB read JACK_DETECT port periodically and if the voltage of Pin1 of U304 goes to High and the voltage at “JACK_DETECT” 2.8V, it detects ear-jack inserted.

• The ABB operates A/D conversion continuously and if the voltage of “HOOK_DETECT” node goes to 0V, it detects hook switch is pushed.

DPSOUND

GNDGND

VCCMIC

EAR_JACK SPEC

CAM

EAR

Vcc

HSMICP N,C GND

D+ D- GND

HSO

Earphone Sending Path

• HSMICP is the audio signal from the microphone of the earphone.• L305, L303 and C318 make the path of the audio signal from the microphone of the earphone.• This audio signal is delivered to ABB(IOTA).

Earphone Receiving Path

• HSO is the audio signal from ABB(IOTA).

-77-

“HOOK_DETECT”signal(R319,C323)

The audio Signal to ear-mic (L316, C319)

The audio Signal from ear-mic (L303,L305,C318)

The audio Signal to ear-mic(L304)

“JACK_DETECT”signal (Pin1 of U304)

-78-

START

No1. Earphone detection problem

Can you hear the sound

from the earphone?

Yes

Soldering of C319,L304,L306

is OK?

No Resolder theC319,L304,L306

Does the Audio profile change

to the earphone mode?

The ABB is out of order.Change the board.

2. Sending Path problem

Yes

Soldering of J301is OK?

Resolder theJ301

Yes

The earphone is OK? Change the Earphone.

Yes

cf) PRBS : Pseudo Random Bit Sequence

Insert the earphone into the headset.

Set the audio part of test equipment to PRBS or continuous wave mode

No

No

No

-79-

No

Yes

Resolder theC687,R311, R665.

Yes

The Voltage at Pin1 of U304

is 0V?

The voltage at R316,R312

is 0.02V ~ 0.25V?

The soldering of C687,R311,

R665 is OK?

No

Yes

NoResolder the J301.The soldering of J301

is OK?

Yes


Resolderthe R316,R312

The soldering of R316,R312

is OK?

Yes


No Resolderthe U304

The soldering of U304is OK?

Yes

1. Earphone detection problem

No No

-80-

2. Sending Path problem

No Resolder theL303,L305

Yes

Yes

No Resolderthe C318

The soldering of C318

is OK?


The voltage at L303is 1.1V ~ 1.3V?

A few tens or hundreds

of mV of signals at C318are measured ?

No Resolderthe J301

The soldering of J301

is OK?

Yes

No

Yes

The earphone is OK? Change the Earphone.

Yes


Set audio part of the testequipment to the echo mode.

No

4.15 Infrared Data Association Trouble

-81-

Block Diagram

Infrared Signal Flow

• Infrared is enable by SD• TX_IRDA,RX_IRDA,SD_IRDA signals from DBB

Check Points

• Check the power supply.• Check the soldering of Components• Check the IrDA Transceiver

-82-


• Enter the engineering mode. • Go to menu ‘Baseband → IrDA Test’


• Check the SD,TX, RX signal.• Check the soldering.• Check the IrDA Transceiver.

Tx_IrDA

Rx_IrDA

SD_IrDA

Tx_IrDA

Rx_IrDA

Searching… Enabled (TX_IrDA)

Enabled(RX_IrDA)

-83-

START

No

Yes

Resolder the C202

NoChange the U201.

The soldering of U201 is OK?No

Resolder the U201.

Yes

The power is supplied to U202?

The DBB is broken.Change the board.

The signal “TX_IrDA, RX_IrDA”are measured?

Yes

Set configuration like Fig 1.Execute PCSync program

(ContentsBank.exe)

Figure 1.

Phone

PC IlluminationCone

30 Cm

4.16 Camera Trouble (G7050 only)

-84-

SETTING : Connect PIF, and set remote switch ON at PIF

Checking Flow

START

NoDoes the LCDitself has no trouble Go to the LCD trouble

Set the camera button ON

Check the voltage of Pin3 of Q601 is

2.85V

Check the voltage of Pin1 of

Q601 is 0V

No NoChange the main board

Is the connection of FPCB

with CN601 connector on PCB OK?


Q601 is 2.85V

No No NoCheck the voltage of Pin6 of

U602 is 2.8VChange

U602


U602 is >3.35V

NoCharge or

change battery

U602Check the soldering of CN601

on PCB

Check the soldering of serial resisters

of CN601

Does the image appears on LCD?

Camera will work properly

NoResolder CN601

NoResolder the resisters

NoChange the camera module

Yes

Yes

Yes

Yes

Yes

Yes

Yes

-85-

U602

FB616

CN601

Q601

C686

C633 19 1

20 2

1 3

U601

6 4

Test Points

RF Rx pass Trouble Shooting

-86-

CheckRegulator Circuit

CheckVCTCXO Circuit

CheckPLL Control

Signal

CheckANT SW & Mobile SW

CheckSAW Filter

Circuit

CheckRx I/Q

Re-download SW & Cal

E5515C : Test ModeCH62, 7 level setting (TCH)CH62, -60 dBm setting (BCCH)

Spectrum Analyzer settingOscilloscope setting

START

Checking Regulator Circuit (Rx pass continued)

-87-

2.85V?

Check Pin 1

Pin 6 High?

Check U101

No

No

Regulator circuit is OK See next page to check

VCTCXO circuit

Replace U508

Yes

Yes

Pin 1

Pin 6

U508

Ch1 : Pin 1

Ch2 : Pin 6

Checking VCTCXO Circuit (Rx pass continued)

-88-

13MHz ?

Check Pin 3 of X3

Pin 4 2.85V ?

Check U508

No

No

VCTCXO circuit is OKSee next page to checkANT SW & Mobile SW

Replace U506

Yes

Yes

Pin 3 Pin 4

Pin3 Pin4

Checking PLL Circuit (Rx pass continued)

-89-

Signal is normal?

Check S_CLK, S_EN, S_DATA

PLL circuit is OK.See nest page to check ANT SW & Mobile SW

Download SWNo

Yes S_ENS_DATA

S_CLK

S_EN S_DATAS_CLK S_EN S_DATA S_CLK

Checking ANT SW & Mobile SW (1) (Rx pass continued)

-90-

NoShort ?

No

Yes

Yes

Check SW501 Pin 1,2 withno RF cable connected

Check SW501 Pin 1,2 withRF cable connected

Open ?

Check VC1, VC2 of FL501

VC1=LowVC2=Low

Yes

Replace SW510

Replace SW501

No Replacethe board

Check RF Level FL501 Pin1,10

≥ -63dBm

ANT SW & Mobile SW is OK.See next page to check SAW

Yes

No ReplaceFL501

Rx standalone mode is needed

Checking ANT SW & Mobile SW (2) (Rx pass continued)

-91-

SW501 pin1

SW501 pin2

FL501 VC2

FL501 VC1

Checking SAW Filter Circuit (Rx pass continued)

-92-

≥ -65dBm

Check RF LevelFL502 Pin 4FL503 Pin 4

SAW Filter circuit is OK.See next page to check Rx I/Q

ReplaceFL502/FL503

No

Yes

FL502 pin4 FL503 pin4

Checking Rx I/Q (Rx pass continued)

-93-

I/Q is normal?

Check I/Q

Redownload the software& Calibration

Replace U503No

Yes

RXQPRXQN

RXIP

RXIN

RXQP RXIP

RF Tx pass Trouble Shooting

-94-

CheckRegulator Circuit

CheckVCTCXO Circuit

CheckPLL Control

Signal

CheckTx I/Q

CheckPAM Control

Signal

CheckANT SW &Mobile SW

Re-download SW & Cal

E5515C : Test ModeCH62, 7 level setting (TCH)CH62, -60 dBm setting (BCCH)

Spectrum Analyzer settingOscilloscope setting

START

Checking Regulator Circuit (Tx pass continued)

-95-

2.85V ?

Check Pin 1

Check U101

Regulator circuit is OK.

See next page to check

VCTCXO circuit

Yes

No

Pin 6 High ?

No

Replace U508Yes

U508Ch1 : Pin 1

Ch2 : Pin 6

Pin 6

Pin 1

Checking VCTCXO Circuit (Tx pass continued)

-96-

13MHz ?

Check Pin 3 of X3

Check U508

VCTCXO circuit is OK.

See next page to check

ANT SW & Mobile SW

Yes

No

Pin 4 2.85V ?

No

Replace U506Yes

Pin 3 Pin 4

파일

Pin3 Pin4

Checking PLL Circuit (Tx pass continued)

-97-

Signal is normal?

Check S_CLK, S_EN, S_DATA

PLL circuit is OK.See nest page to check ANT SW & Mobile SW

Download SWNo

YesS_ENS_DATA

S_CLK

S_EN S_DATAS_CLK S_EN S_DATA S_CLK

Checking Tx I/Q (Tx pass continued)

-98-

Normal?

Check I/Q

Redownload the software and calibration

Replace U102No

Yes

TXQN

TXQP TXIP

TXIN

TXIP TXQP

Checking PAM Control Signal (Tx pass continued)

-99-

Normal?

Check APC, RF2.85V,PA_ON, PA_BAND

Control signal is OK. See next page to Check ANT SW & Mobile SW

Download the SWNo

Yes

APC

PA_BAND

RF2.85V

PA_ON

PA_BAND PA_ON RF2.85V APC

Checking ANT SW & Mobile SW (1) (Tx pass continued)

-100-

No≥ -63dBm

No

Yes

Yes

Check RF Level FL501 Pin 3,5

Check VC1, VC2 of FL501

VC1=Low & VC2=High orVC1=High & VC2=Low ?

Check FL501 Pin 8

Replace U504

Replacethe board

≥ 20dBm

Check SW501 Pin 1,2 with no RF cable connected

Yes

Tx standalone mode is needed

Short ?

Check SW501 Pin 1,2 withRF cable connected

Yes

Open ?

ANT SW & Mobile SW is OK.Change the board

Yes

No ReplaceFL501

No ReplaceSW501

No ReplaceSW501

Checking ANT SW & Mobile SW (2) (Tx pass continued)

-101-

SW501 pin1

SW501 pin2

FL501 VC2

FL501 VC1

5.1 Disassembly (G5500)

5. ASSEMBLY INSTRUCTION

-102-

5.2 Disassembly (G7050)

-108-

6. DOWNLOAD6.1 Download Setup

Figure 6-1 Describes Download Setup

Preparation• Target Handset (G5500/7050)• Data kit• Battery• IBM compatible PC supporting RS-232 with Windows 98 or newer

If you use data kit, you should have a battery with the voltage above 3.7V.

6.1.1 In case of using the Data kit

6.1.2 In case of using the PIF

Preparation• Target Handset (G5500/7050)

• PIF • RS-232 Cable and PIF-to-Phone interface Cable • TA/Power Supply or Battery

• BM compatible PC supporting RS-232 with Windows 98 or newer

If you use battery, you should have a battery with the voltage above 3.7V.

-114-

6.2 Download Procedure

1. Execute Fluid_GUI.exe and select “Erase/Program flash” menu.

-115-

2. Click the “Add” button. Then, choose m0 file which is going to download.

-116-

3. You must choose three programming options in programming options box. One is to decide whether you erase entire flash. If m0 file which is going to download have the change of pcm structure for current target’s m0 file, you must erase entire flash memory. The second programming option is to decide whether you erase bootloader. It is recommended not to erase bootloader. The third is to decide whether you take delta-download, or not. If you use delta-download, You can save download time through comparing m0 and flash block, and not downloading flash block same with m0 file.

-117-

4. Press “Global Settings” menu. Choose a correct serial port and set the configuration as below.

-118-

5. After checking programming options, Click “Erase/Program” button. If you click “Erase/Program”button, you will be able to see that “(reset target)” is displayed in the “Output” window. And then if you push shortly the “Power key” of the mobile, downloading will be started.

-119-

6. Wait for downloading to be finished.

-120-

7. If downloading is finished, we can switch on the mobile. When you switch on the mobile first time after downloading, you must not remove the battery until switch-on procedure is completed. If you remove the battery before switch-on procedure is completed, we will not be able to save user data in the flash memory of the mobile.

-121-

7. SERVICE AND CALIBRATION7.1 Service S/W

7.1.1 Overview

This service S/W is used for Calibration and Standalone test.

7.1.2 Hardware and Software Environment

• More than 486 computer• 16Mbyte RAM• Remained more than 10Mbyte in Hard Disk Memory• Under Microsoft window 98 or more than

7.1.3 Software Installation

Unzip the phones service software provided where slide you want there are some files extracted in that slide. Start Setup.exe in Service software setup slide. RampTable.dat, default transmit ramping table, and rf_original_L300.epm, default calibration data, are located in window system slide so that these files are loaded automatically, if you execute LaputaService.exe.

7.1.4 Common Properties of Service Software

When you execute this program, you’ll see the below user interface window titledLAPUTA_Service Tool in figure 7-1. The LAPUTA_Service Tool has five main frames.

-122-

A. Target System Frame

This is for initializing the target phone. When you use this program to test G5500 phone, you have to initialize target at first. To initialize target phone, select target (G5500 is default) and COM port used at your computer and then click the Initialize button. If target initializing is ended successfully, the box in red below the initialize button will turn into green.

B. RX AGC Test Frame

At this part, you can control receiver path of target phone.

Serving Freq. Setting (TCH)

You can set TCH of phone. The number means ARFCN of Traffic channel. You can change thevalue by clicking arrow button by one step or just entering the number directly.

Beacon Freq. Setting (BCH)

You can set BCH of phone. The number means ARFCN of base station broadcasting channel.

AGC Value Setting

You can set AGC gain of phone. The number means gain of AGC amplifier in Rx path.

Power Measurement

The number means channel index according to pre-defined ARFCN. There are 12 pre-defined ARFCNswithin Rx band. 4 ARFCNs are for GSM and others for DCS. Clicking arrow button to change number, you can see TCH and BCH ARFCN changed automatically. PM window displays the power level measured in baseband chip. PM value is useful to calculate the received absolute power. The unit of PM is dBd.

PM Start

You can measure Rx power that target received from test equipment. When you click this buttonthe result of power measurement displayed at PM blank in Power Measurement frame. You canmeasure PM for all 12-channel indexes by changing Number and clicking PM Start.Calculate

You have to do this work after measuring PM for all 12-channel indexes. When you click this button, service software calculate the calibration data from measured 12 PM data.

Standalone

This button makes target operate in Rx mode continuously. Target will be operated under the condition that you set. During continuous receiving mode, label of Standalone button is changed to Stop.If you want stop receiving mode operating, click this button one more.

-123-

C. TX APC Test Frame

At this part, you can control transmit path of target phone.

Serving Freq. Setting (TCH)

You can set TCH of phone. The number means ARFCN of Traffic channel.

Beacon Freq. Setting (BCH)

You can set BCH of phone. The number means ARFCN of base station broadcasting channel.

Power Level Setting

First, you have to choose operating mode (GSM or DCS) according to TCH and BCH frequencythat you selected before. Then select the Level and adjust the DAC value. Level means GSM/DCS output power level. Usable range is 5 to 19 for GSM, 0 to 15 for DCS. DAC value is a factor to determine output power. Its variable range is 0 to 1023.

Uplink Normal Burst test

You can also control the traffic slot number be using by changing TCS value. Because GSM has8-time slot, TCS value varies 0 to 7. Patten is to select data format that is transmitted. You cansend all data 0, or 1 or repeating of 1010. But it is good to you to using the default value because data format doesn’t affect to RF characteristics.

Test

Transmitting is started when you click this button. During Transmitting, label of Test button is changed to Stop. If you want stop transmitting, click this button one more.

D. RF Parameter Download Frame

Saving epm file into Flash

When you have a epm file, contains calibrated data, and you want to download into target Flash,check Flash and click File Download button. Then you can see RF parameters Save window.Select epm file you want to save into Flash then click Open. During saving file into Flash, Thestatement bar indicating download process is displayed under the RF Parameter Download frame. As successfully ending download, information box will be appeared. Click Ok.

Saving Cal. Data to Flash

After Rx or Tx calibration, you can save the calibration results into Flash and epm file. Check Flash and click Calib Save button. Then you can see RF parameters Save window. Write the file name and click Save button.

-124-

E. User Command and Results Frame

Whenever you click button or make some event in service software, every ordered event is displayed in this frame. You can also see calibration results here.

F. Ramp shape button

This button is for burst shape table. But it is deactivated in service software.

7.2 Calibration

7.2.1 Overview

The calibration values of the phone reside on the Flash. The contents of the Flash can be read by the service software and saved as a file. This is advisable when there is need to retain that information, e.g. in view of replacement of the circuit. The program also enables writing the default parameters on the Flash, in which case all calibration steps should be carried out. The service software can’t control the equipment, so only manual calibration process is possible.

7.2.2 Equipment List

Table 7-1. Calibration Equipment List

Equipment for Calibration Type / Model Brand

Wireless Communication Test Set HP-8960,HP8922,CMU200, any other call equipment

RS-232 Cable and Test JIG

RF Cable

Power SupplyService S/W Laputa

PC (For Software Installation) Pentium Ⅱ class above 300MHz

-125-

7.2.3 Equipment Setup

Mobile Switch Cable

Power Supply GPIBCable

PCBattery Simulator

Jig

TA

Figure 7-1 Calibration Equipment List

GSM Test Set(8960)

GPIB Cable

7.2.4 Calibration steps

In order for the RSSI measurements to be within the GSM specifications, some calibration is necessary. Also, due to AGC implementation, some AGC specific constants need calibration. In total, three calibrations are required per receive band, AGC calibration, channel compensation and temperature compensation. Of these, temperature compensation is not needed in replacement of the circuit. In AGC calibration the reference power fed into the phone via permanent antenna connector is –74dBm. In channel compensation, the channel numbers in Rx band are;

A. RX Calibration

E-GSM band : 0, 40, 124, 975, and 1023.DCS band : 512, 574, 636, 700, 760, 822 and 885.

Procedure

a) Initialize phone by clicking Initialize button.b) Set the GSM test equipment CW mode and BCH and TCH of GSM test equipment ‘0’, same with

phone.c) Set the power of GSM test equipment ‘–74dBm’.d) Click the PM Start button, then the value, received power by phone, is displayed in PM measurement

window at service software.e) Change the BCH and TCH of phone by clicking the Number button and set the channel

(BCH & TCH) of equipment to be same.

-126-

f) Click the PM Start button.g) Repeat above procedure until the displayed number in Power Measurement window is 12.h) Click the Calculate button, then the service software calculate the channel compensation parameters.i) Saving updated calibration data into phone by clicking Calib Saving button.

NOTE

If the calibration does not done for all channels, 5 channels for EGSM900 and 7 channels forDCS1800, the service software reports, “Please execute after measuring the PM”.

B. TX Calibration

In order for the Tx power to be within the GSM specifications for each Tx level, some calibration is necessary. In total, four calibrations are required per transmit band, power calibration, channel compensation, temperature compensation and low voltage compensation. Of these, temperature compensation and low voltage compensation are not needed in replacement of the circuit and channel compensation is not needed because the transmit power is in GSM specification with enough margin In power compensation, the channel numbers used in Tx band are;

E-GSM band : 62.DCS band : 699.

And the target powers in dBm for each power level are;

Table 6-2 TX Target Powers

Power Level GSM DCS0 291 282 263 244 225 32 206 31 187 29 168 27 149 25 1210 23 1011 21 812 19 613 17 414 15 215 13 016 1117 918 719 5

-127-

Procedure

a) Initialize phone by clicking Initialize button.b) Set the BCH and TCH of the phone 62 for E-GSM900 and 699 for DCS1800. Of cause you have to

match test equipment’s BCH and TCH ARFCN with this value. For each power level, adjust the DAC value to get target power and click Test button. Then you can see the output power displayed on test equipment.

c) Saving updated calibration data into phone by clicking Calib Saving button.

7.2.5 Test JIG Operation

JIG Power

Equipment DescriptionPower Supply Usually 4.0V

DC Adaptor 9.5V, 500mA

JIG DIP Switch

Switch Number Name DescriptionSwitch 1 ADI_REMOTE In On state phone is awaked. Not used OFF state

Switch 2 TI_REMOTE In On state phone is awaked.Switch 3 VBAT Power is provided for phone from Power supply

Switch 4 PS Power is provided for phone from DC adaptor

JIG LED

LED Number Name DescriptionLED 1 POWER Power is provided for test JIG

LED 2 TA Indicate charging state of the phone battery with travel chargerLED 3 MON STATUS Indicate date transfer state through the UART IrDA

LED 4 UART STATUS Indicate date transfer state through the UART MODEM

Operation

1) Connect the RS232 serial cable between COM port of notebook and MON port of test JIG in general2) Set the power supply 4.0V3) set the 3rd of DIP SW ON state.4) set the 4th of DIP SW ON state.

DIP SW

ONOFF

1 2 3 4

5) Press the phone power key. If the remote power on is used, switch the 1st of DIP SWITCH ON.

-128-

- 129 -

MODEL

LG Electronics Inc.

NAME

Date

Notice No.

LG Electronics Inc.

Approved

BBDRAWING

Sheet/

7/8

V1.4

G5500/70501/6

Date

Checked

DRAWING

NO.

Sign & Name

Designer

Section

Name

Sheets

Iss.

V_RTC

2003

C1101u

R11610

V_ABB

10K

C10310p

R113

10K

R112

C124NA

0R117

_BSCAN

C1204.7u

20p

C104

0R104

R10610K

R103

100K

R11510K

TDO_0

TDO_1

TMS

VBAT

_F_WE

JTAG1

GND

JTAGEN

RPWON

TCK

TDI

10K

R110

1u

VBAT

C122

BAT101

100K

R102

R114NA

UPR

C1110.1u

V_SRAM

UPR

V_DBB

1uC109

C1194.7u

C1120.1u

220KR101

0.1u

TDO

C108V

SS

AN

G

A14

VS

SO

VS

SP

LLE

14

VS

SR

TC

C14

F11

VDRN13P14

VDX

M13VSFRX

VS

S1

B1

A10

VS

S10

VS

S11

A7

A2

VS

S12

F1

VS

S2

VS

S3

K1

P2

VS

S4

VS

S5

P4

N8

VS

S6

VS

S7

P10

P13

VS

S8

VS

S9

G14

E12

VD

D1

VD

D2

M1

P7

VD

D3

VD

D4

N14

VD

D5

B12 A

5V

DD

6

E11

VD

DA

NG

D14

VD

DR

TC

N5

VD

DS

_1_1

VD

DS

_1_2

L14

VD

DS

_2A

11D1

VD

DS

_MIF

1V

DD

S_M

IF2

G1

B6

VD

DS

_MIF

3V

DD

S_M

IF4

A4

VD

DS

_RT

CD

13

VD

D_P

LL

TSPACT5TSPACT6

K13K12

TSPACT7TSPACT8

K14

TSPACT9J11

J14TSPCLKX

H10TSPDI_IO4TSPDO

H11

TSPEN0H13H12

TSPEN1TSPEN2

H14G12

TSPEN3

C7

TX

IR_I

RD

A

C8

TX

_IR

DA

B9

TX

_MO

DE

M

VCLKRXN12

E1

SIM_CLKSIM_IO

G13

SIM_PWRCTRLF14

SIM_RSTG10

B10TCK

TC

SO

EN

A12

D10TDI

TDOC10

TMSE9

M12TSPACT0

M14TSPACT1

J12TSPACT10

J13TSPACT11

TSPACT2L12L13

TSPACT3TSPACT4

J10K11

NS

CS

1

F10ON_OFF

OS

C32

K_I

NC

13

OS

C32

K_O

UT

B13

RESPWRONZD12

A13

RF

EN

B2

RN

W

E8

RT

S_M

OD

EM

RX

IR_I

RD

AA

8

RX

_IR

DA

D8

RX

_MO

DE

MA

9

P9

SC

LKSD

IM

9K

8S

DO

B8

SD

_IR

DA

SIM_CDG11

F13

L8

NB

HE

F5

NB

LEE

4D11

NBSCAN

NC

S0

C2

C3

NC

S1

NC

S2

C1

D3

NC

S3

NC

S4

C11

B11NEMU0NEMU1

E10

E2

NF

OE

NF

WE

E3

N1NIBOOT

N2

NR

ES

ET

_OU

T_I

O7

NS

CS

0L9 N

9

KB

C3

KB

C4

M5

KB

R0

K6

KB

R1

M6

P6

KB

R2

N6

KB

R3

L6K

BR

4

LTL7N

10M

CS

I_C

LK_I

O11

MC

SI_

FS

YN

CH

_IO

12K

9

MC

SI_

RX

D_I

O10

M10

L10

MC

SI_

TX

D_I

O9

MCUDIN7M7

MCUDOMCUEN0

M8P8

MCUEN1_IO8MCUEN2_IO13

C5B5

DATA8

D5DATA9

D9

DS

R_M

OD

EM

EXT_FIQP1

EXT_IRQM3

F4

FD

P

M2

IDD

Q

IO0

N3

P3

IO1

IO2

L4 M4

IO3

B14IT_WAKEUP

KB

C0

N4

K5

KB

C1

KB

C2

L5P5

C12

CLK

TC

XO

E13

C9

CT

S_M

OD

EM

DATA0B7D7

DATA1

E5DATA10DATA11

B4C4

DATA12

D4DATA13DATA14

A3B3

DATA15

DATA2E7D6

DATA3DATA4

A6DATA5

C6E6

DATA6DATA7

D2

ADD3G4G2

ADD4

G3ADD5

H1ADD6ADD7

H3H2

ADD8ADD9

H4

P11

BC

LKR

BC

LKX

N11

K10BDR

BFSRL11

P12BFSX

M11BOX

K7

BU

F12

CLK

13M

_OU

TC

LK32

K_O

UT

F3ADD0ADD1

F2

ADD10H5

ADD11J1J2

ADD12ADD13

J3J4

ADD14ADD15

K3K2

ADD16ADD17

K4J5

ADD18ADD19

L1

G5ADD2

L2ADD20ADD21

L3ADD22

U101

C1070.1u

0.1uC113

TDO_ARM

100KR105

TP101

UPR1000pC101

_WR

4.7uC118

V_IO

V_IO

VBAT

0.1uC117C115

C10220p

0.1u 4.7uC121

V_RTC

0.1uC116

VIR

O2

B1

VLM

EM

F3

VLR

TC

C3

H10

VR

AB

B

VR

DB

BJ1

VR

EF

A8

VR

IO1

B2

VR

ME

MG

1F

1V

RR

AM

D1

VR

RT

C

VRSIMB4

H2

VS

DB

B

VX

RT

CC

1

C2

UP

R

E1VBACKUP

VB

AT

A4

C5

VB

AT

S

G9

VC

AB

B

VC

CS

D5

K1

VC

DB

B

VC

HG

A5

A2

VC

IO1

A1

VC

IO2

VCKK3

G2

VC

ME

M

F2

VC

RA

M

VDRF5H5

VDXVFS

G5

SIMCKC4B3

SIMIOSIMRST

D4

D8TCK

D7TDITDO

E7

TDRG3

TENH1J6

TEST3F6

TEST4

H8

TE

ST

RE

SE

TZ

TESTVG8

TMSE8

UDRK5J5

UDX

K6UEN

INT1H6

INT2E6D2

ITWAKEUP

LEDAB8

B10LEDB1

A10LEDB2LEDC

C8

MICBIASJ8H7

MICIN

J7MICIP

E3ONNOFF

PC

HG

B5

F8

PW

ON

RE

FG

ND

A7

RESPWONZD3

F7

RP

WO

N

H4DAC

F4DBBSCKDBBSIO

E5

DBBSRSTG4

EARNJ10

EARPJ9

G10

GN

DA

G6GNDAV

GN

DD

A3

GNDL1B9

GNDL2A9

K8HSMICBIAS

K7HSMICP

HSOH9

B7

IBIA

S

ICT

LD

6

K10AUXONAUXOP

K9

F10BDLIM

F9BDLIP

E9BDLQM

E10BDLQP

J3BDR

BDXJ2H3

BFSR

K2BFSX

D10BULIM

D9BULIP

BULQMC9

BULQPC10

CK

13M

E4

E2

CK

32K

TWL3014

U102

B6ADIN1ADIN2

A6

ADIN3C7C6

ADIN4

AFCJ4K4

APC

AUXIG7

MC-146X101

32.768KHz

12

3 4

R111100K

C1234.7u

GND

V_SIM

V_FLASH

TDI

UPR

C105 0.1u

C1060.1u

0.1uC114

TCK

R10910K

RPWONTMS

_WR

PC

M_S

YN

CS

TR

OB

IND

LED

_G

LEDC

LEDA

LCD_ID

A(12)A(11)A(10)

A(1)

CAM_HOLDPCM_TX

_CS1

_BSCANTDIVBATRPWONTDO_ARMTMSTCKTDO_WR

A(7)A(6)A(5)A(4)A(3)

A(22)A(21)A(20)

A(2)

A(19)A(18)A(17)A(16)A(15)A(14)A(13)

D(14)D(13)D(12)D(11)D(10)

D(1)D(0)

CTS

MCLK

JAC

K_D

ET

EC

T

A(9)A(8)

KB

C(0

)

DS

RC

AM

_IN

T

MIDI_INTFLIP

FDP

D(9)D(8)D(7)D(6)D(5)D(4)D(3)D(2)

D(15)

_BLE_BHE

HANDSFREESPK_EN

IND

LED

_R

BACKLIGHT

KB

R(4

)K

BR

(3)

KB

R(2

)K

BR

(1)

KB

R(0

)KB

C(4

)K

BC

(3)

KB

C(2

)K

BC

(1)

SD_IRDA

RXD

RX

RX_IRDA

RTS

_WR

RF_EN

ONNOFF

LCD_RESET

_RD

MIDI_CS_LCD_CS_RAM_CS

_CS0

_BSCAN

TXD

TX

TX_IRDA

S_EN

S_DATAS_CLK

ANTSW_BANDANTSW_TXRX

ANT_SWPA_BAND

PA_ONPDNB

TMS

TDO_ARMTDI

XO_EN

TCK

TDO

_BSCANTDI

VBATRPWON

PWON

PC

M_R

XP

CM

_CLK

TXINTXIP

TXQPTXQN

RXIN

RXQNRXQP

13MHz

TDO_ARMTMSTCK

VCHG

KBR(0:4)

D(0:15)

A(1:22)

KBC(0:4)

KEY_LED

MICP

SIM_CLKSIM_IOSIM_RST

TDO

PCHG

ICTL

RPWON

VCCSVBATS

BATT_TEMPTEMPSENSEHOOK_DETECT

AFCAPC

AUXIAUXONAUXOP

RXIP

RCV_NRCV_P

HSMICBIASHSMICPHSO

MICBIASMICN

8.CIRCUIT DIAGRAM

8.1 BB

- 130 -

8.2 MEMORY, etc.

VOL_DOWN

5

NO.

Designer

Iss. Notice No. Name

7/8Sheets

Memory, etc

LG Electronics Inc.

LG Electronics Inc.

MODEL

NAME

Sign & Name

2003

Approved

Checked

Date

R210

V1.4

2/6G5500/7050

DateSection

VOL_UP

DRAWING

DRAWING

Sheet/

100K

SI1304DL

D

G

S

VR205

4.7K

R21

7

Q203

L201

100nH

VIB 1

2

1uC204

2LEDK

RXD4

5SD

SHIELD8

3TXD

6VCC

R221 0

U202CIM-80S7B-T

GND7

LEDA1

V_IO

C21127p

R215

10K

68

R21

1

R219

10K

25

6

3

1

4

IMX9T110 Q201

0.1u

C209

0

R204R203

0

0.1uC201

R222

18

U204MDC3105LT1

GND2

1 VIN

VOUT3

10KR208

V_FLASH

4

VBAT

LED201SML-521MUWT86

12

3

VR203

5

10K

R21

4

VR202

5

V_FLASH

_RESET2

_UBD4

C6_WE

_WP_ACCC5

SP

625

E5B4

RY__BY2

VCCF1J5L5

VCCF2H9

VCCF3VCCPS

J6

VSS1B3

VSS2G3

VSS3J9L4

VSS4

J2_CE1FPS

H2_CEF1_CEF2

B5

C4_LB

H3_OE

D5_RESET1

L3

L2NC22

M10M9

NC23NC24

M2M1

NC25NC26

L9L8

NC27NC28

L7L6

NC29

A9NC3NC4

A10B2

NC5B6

NC6NC7

B7B8

NC8NC9

B9

RY__BY1

DQ7DQ8

K3

DQ9H4

A1NC1

NC10C2C9

NC11F5

NC12F6

NC13NC14

F9

NC15G5

NC16G6

NC17G8

NC18K2K6

NC19

NC2A2

NC20K9

NC21

C7

A9E7

CE2PSD6

J3DQ0

G4DQ1

DQ10J4

DQ11K5J7

DQ12DQ13

H7

DQ14K8H8

DQ15

K4DQ2

H5DQ3DQ4

H6

DQ5K7

DQ6G7J8

D8E8

A13A14

F8D9

A15G9

A16F4

A17E4

A18D7

A19

A2E2

E6A20

E9A21

D2A3A4

F3

A5E3

A6D3C3

A7A8

U201 AM50DL128CG70IG2

A0F2

A1

A10F7C8

A11A12

SP

624

47K

R22

0

47

R21

2

VR201

47K

R21

6

C210

0.1u

C202

VR204

1u

R207

0

33

R201

R20

9

NA

VBAT

0.1uC203

KBC(0)

KBR(0)

KBC(1)

INDLED_G

FLIP

RPWON

_RAM_CS

D(0)D(1)

D(4)D(5)

D(8)

D(10)

D(12)

D(14)

_CS1

LCD_RESET

VIBRATOR

A(4)

A(6)

A(8)

A(10)

D(11)

D(13)

D(15)

D(2)D(3)

D(6)D(7)

D(9)

_BLE

FDP

_WR

A(1)

A(3)

A(5)

A(7)

A(9)

A(11)

A(13)

A(15)

A(17)

A(19)

A(21)

_CS0

_RD

_BHE

RX_IRDA

SD_IRDA

TX_IRDA

INDLED_R

ONNOFF

A(2)

A(12)

A(14)

A(16)

A(18)

A(20)

A(22)

- 131 -

NO.

7/8

LG Electronics Inc.

Sheets

Iss.

NAME

DRAWING

MODEL

2003

Date

(2012)

Notice No.

Checked

Approved

G5500/70503/6

V1.4

(1608)

Date

Name

MIDI, Audio

Sign & Name

SPK_RCVN

SPK_RCVP

LG Electronics Inc.

Designer

Sheet/Section

DRAWING

1

2

34

5

C305

KJA-PH-3-0028

J301

V_SRAM

1u

510K

R31

2

VA

301

SP

304

5

7NC2

2NO1

10NO2

1V+

C319 10u

MAX4684EUBU303

COM13

COM29

GND6

4IN1

8IN2

NC1

C332NA

NAC329

NA

R331

C331

29

3_IRQ

31_RD

4_RST

28_WR

10p

13

EQ3 14

HPOUT_L10

HPOUT_R11

IOVDD32

2LEDMTR 19

NC5

6 PLLC

SPOUT117

SPOUT2 18

SPVDD 15

16SPVSS

VDD7

VREF9

8 VSS

_CS

U301

30A0

1CLK1

D027

D126

D225

D324

D42322

D521

D620

D7

12EQ1

EQ2

YMU762

R319

100

R31

3

10K

150pC328

SP

303

L302100nH

C_NOISE1

2DELAY

GND3 6

SENSE_ADJ

VIN4 5

VOUT

_ERROR7

8_SD

SI9182DH-33-T1U302

C3041000p

C32227p

100nHL304

C31

110

0p

C3091000p

C330

C339

0.1u

C33810p 10p

C32447p

C333NA

VBAT

47p

R308

27

C306

10pC313

C3362p

C3372p

1MR31

6

SP

301

0.1uC310

V_MIDI

1K

R321

R302

NC

0

R330

C323

C320

47p

47p

R301

39K

V_MIDI

R305

0

R66

5

3K

10pC312

100nHL306

100nHL305

0.01u

C301

0

R307

C32610p

VA

304

100nHL301

C327

0.1u

10uC315

R322

NA

15K

R31

1

R304 150K

10K

R31

4

10u

47p

C325

C316

C32127p

10pC334

C33510p

82KR303

390p

C302

100nHL303

C303

R310

1K

220n

SP

302

R306 3.3K

SPK1

2

GND

2

OUT

15

VCC

3 VIN+

4 VIN-MAX9075EXK-T

U304

C30747p

VA

303

4.7uC687

0.1uC318

VA

302

27

R309

0.1uC314

V_IO

0.1u

MIC_P

MIC_N

C308

D(0:7)

RCV_P

RCV_N

MICN

MIC_BIAS

VIBRATOR

D(0)D(1)D(2)D(3)D(4)D(5)D(6)D(7)

EAR_P

EAR_N

SPKP

SPKN

SPK_EN

EAR_N

EAR_P

LCD_RESET

SPKNSPKP

MCLK

MIDI_INT

LCD_RESET

_WR

MIDI_CS

A(1)_RD

MICBIAS

MICP

HSMICP

HSO

HSMICBIAS

HOOK_DETECT

JACK_DETECT

8.3 MMI, AUDIO

NO.Date

I/O, Connector

Sheet/

Name

Checked

Designer

Approved

LG Electronics Inc.

Sheets

DRAWING

Iss.

2003

Section

7/8

Notice No.

NAME

Date

V1.4

4/6G5500/7050

LG Electronics Inc.

MODEL

Sign & Name

DRAWING

R4100.2

FB401

C40710p

SP

408

10K

R40

4

R405

SP

401

1K

10uC404

VA

404

0.1u

SP

418

C402

2 4 6 8

1 3 5 7

RA

401

10K

220K

R412

C412 47p

57

VA

402

472468

13

SP

420

RA404

R401

10K

C41022p

SP

410

VA

416

FB402

VBAT

SP

402

2

20

21

22

23

24

3

4

5

6

7

8

9

SP

414

CN4021

10

11

12 13

14

15

16

17

18

19

VA

407

R409 51

SP

405

220K

R408

SP

411

C413100p

456789

VA

405

16171819

2

2021222324

25

262728

29

3

CN401

1

101112131415

2468

1357

47RA403

VA

413

D1 52D2

D3 1G

3S1

4

S26

SP

409

U401NDC652P

SP

404

VA

412

0

20K

R402

R407

C409

VA

401 1u

SP

412 0R406

2468

1357

RA402

47

33K

R40

3

SP

415

22n

C405

10uC408

VA

417

C411

VA

409

0.1u

150pC403

10KR411

VA

403

VA

411

VA

415

SP

416

2468

1357

CLK3

5GND

7IO2

RST

VCC1

VPP 6

47RA405

V_SIM

CN403

SIM_SOCKET

C40147p

CUS02

10p

D401

C406

SP

406

SP

419

VA

408

V_SIM

SP

417

SP

413

VA

414

SP

407

VA

410

SP

403

KBC(0)

FLIP

MIC_N

MIC_P

KEY_LED

MIC_BIAS

SIM_IO

AUXONAUXOP

VA

406

ICTL

VCHG

VCCS

VBATS

PCHG

PWON

KBR(0)

KBR(1)

KBR(2)

KBR(3)

KBR(4)

KBC(3)

KBC(4)

KBC(1)

KBC(2)

PCM_SYNCPCM_TX

PCM_CLKPCM_RX

BATT_TEMP

SIM_CLKSIM_RST

TDO_ARM

DSR

RPWON

TDITCKTMS

RXRXD

TXD

RTSCTS

HANDSFREE

TX

AUXI

8.4 I/O, Connector

- 132 -

- 133 -

H KANG

LG Electronics Inc.

Section

Approved

BY YANGDRAWING

Checked

Date

RF

Iss. Notice No.

MODEL

DRAWING

NO.

Designer

Sign & Name

Date

7/82003

LG Electronics Inc.Name

SheetsSheet/

NAME

0R503

MS YEOG5500/7050

5/6

V1.4

NAC504

R5071K

C53610p

C531

VBATT 4

8VCC1

VCC212

10VCC_OUT

6VRAMP

5VREG

560p

22G

ND

10

GN

D11

2324G

ND

1225

GN

D13

GN

D14

26

GN

D2

1415G

ND

3

GN

D4

16G

ND

51718

GN

D6

GN

D7

19

GN

D8

2021G

ND

9

7GSM_IN

GSM_OUT9

TX_ENABLE 3

VC

1

2

VC

2

11

U504TQM7M4014

2BAND_SELECT

DCS_IN 1

11DCS_OUT

GN

D1

13

LMSP54AA-097

FL501

8

AN

T

DCS_RX 1

DCS_TX 3

EGSM_RX 10

EGSM_TX 5GND1

4

GND26

GND37

GND49

GND512

GND613

820R512

NA

L50127nH

SE

NB

16

VD

DA

206

VD

DC

13XEN

XIN

71

9X

OU

T

C503

CK

N10 9

CK

P

1GND1

GN

D2

8

21G

ND

3

12ION

11IOP

14PDNB

5RXIN

4RXIP

3RXQN

2RXQP

SC

LK17 18

SD

I

15SDO

U503SI4201-BM

R530680

R518

200

C51122n

0

R50

2

470pC551

U508ADP3330

GND4

IN2

NR5

1OUT

3_ERR

_SD6

RF2.85V

C52122n

R520

1.5K

R501 0

R526 100

L5027.5nH

C50922n

RF2.85V

2.2uC544

C53822n

13MHzU506

1CTL

2GND

3OUT

VCC4

R533

4.7K

130R516

NAC518

10pC507

820R510

1000pC540

10pC542

C514

RF2.85V

0

1p

R534

C50

1

R524 15K

1.5p

33u

RF2.85V

C533

R523150

C506NA

RF2.85V 1MR517

1.2nHL507

100pC545

10pC543

VBAT

600FB501

C5471000p

10uC549

RF2.85V

RF2.85V

RF2.85V

RF2.85V

1

G13

G2

5G3

IN

2O1

4O2

6

22nC510

SAFSD1G84FA0T00R00FL503

NAC505

C50822n

C5521.8p

RFLB

17RFLC

16RFLD

RF

LON

23 24R

FLO

PS

CLK

1213S

DI

SD

O1011

SE

NB

5VDDD

VD

DI

28

VD

DR

25

7XIN

1

29G

ND

10

4GND2

6GND3

8G

ND

4

14G

ND

5

15GND6

18GND7

21GND8

GN

D9

22

3IFLAIFLB

2

26IF

LON

27IF

LOP

PD

NB

9

20RFLA

192

OUT

45

VCC

U505SI4133T-BM

GND1

SN74AHC1GU04DCKRU507

GND

3

IN

33pC527

R515130

100pC539

R513 820

ANT

RF2.85V

C516NA

150R522

100pC541

22nC520

C53422p

22nC529

R514

47

R505

RF2.85V

0

NAC524

R531

NA

1KR509

C522 1p

C51227p

L5054.7nH

R521

39

R529

270K

C523560p

L504

100p

NA

Y2

C546

NC7WZ08K8X

1A

1

5A

2

2B

16

B2

4G

ND

8V

CC

7Y

13

L508

U510

82nH

C517 1p

100R519

SW501

MHC-173

ANTG1 G2

G3 G4RF

22p

C519 1p

C548

L50627nH

R528

R504 0

C53547p

R511 820

NA

100R527

RF2.85V

C532

6

RF2.85V

FL502SAFSD942MFM0T00

G1

1

G2

3

G3

5

IN

2O1 4

O2

0

R508

10pC528

8TXQP

7

VDD123

VD

D2

14

32V

DD

3

26V

DD

4

IOP

28N

C1

29N

C2

PD

NB

31

RFIDN20

RFIDP19

RFIGN22

RFIGP21

RFIPN18

RFIPP17

13R

FLO

NR

FLO

P12

RFOD24

25R

FO

G

TXIN6

TXIP5

TXQN

3CKNCKP

4

16D

IAG

1D

IAG

215 11

GN

D1

27G

ND

2

GN

D3

30

GN

D4

33

10IF

LON

IFLO

P9

ION12

RF2.85V

SI4200-BMU502

L5034.7nH

100p

C515

22pC513

VBAT

R506

0

R532

0

1.5p

2.2u

C526

C550

RXIN

RXQP

RXIP

RXQN

ANTSW_BAND

ANTSW_TXRX

ANT_SW

XO_ENTEMPSENSE

APC

S_CLK

S_EN

AFC

RF_EN

PDNB

13MHz

S_DATA

TXQN

TXIP

TXQP

TXIN

PA_ON

PA_BAND

8.5 RF

Approved

Designer7/8

Checked

6/6

NO.

Sheet/

V1.4

LG Electronics Inc.

Section

DRAWINGDate

(1608)

Iss.

NAME

nobody

CAMERADRAWING

Sheets

LG Electronics Inc.

Date

(1608)

Name

Sign & Name

G5500/7050

(1608)

2003

Notice No.

MODEL

NC

C67

2

R61

2

27p

33p

C60

8

10K

R614

R663 680

0R

617

C67

627

p

1uC635

27p

C68

1

27p

C68

2

33p

C62

5

U602ADP3330

GND4

IN2

NR5

1OUT

3_ERR

_SD6

R61

8N

C

C_PWR

4.7KR607

R60

40

0.01uC602

NCR646

R60

1N

A

FB607

C66

827

p

C66

727

p

27p

C65

9

R641 NC

C639

LED601

A1

A2

K1

K22.2u

0R

606

C6340.1u

R640

FB

616

NC

C68

027

p

27p

C64

9

C61

17p

F6G6VDDI4

FB609

M_S

D7

M_S

D8

D10

M_S

D9

D9

A8

M_W

R_N

E2

SC

AN

_EN

B6

ST

RO

BE

TE

ST

_EN

E1

T_M

OD

E0

G1

VDDC1 D5E4VDDC2E5VDDC3

VDDC4 F4F5VDDC5

VDDC6 G5

D6VDDI1VDDI2 E6

VDDI3H

8J1

0M

_SA

4M

_SA

5H

9

G10

M_S

D0

G9

M_S

D1

D8

M_S

D10

M_S

D11

C10

M_S

D12

C8

A10

M_S

D13

M_S

D14

B10

M_S

D15

A9

F8

M_S

D2

M_S

D3

F10

F9

M_S

D4

M_S

D5

E10

E9

M_S

D6

E8

K5J5 L_DA9

A4 L_RD_N

A1 L_RESET

L_WR_NB3 C9MSM_CLK

G8

MS

_CS

M_A

DS

G7

B9

M_C

S_N

A7

M_H

OL

DM

_IN

TR

C7

B8

M_R

D_N

B7

M_R

ES

ET

M_S

A0

K9

K10

M_S

A1

J9M

_SA

2M

_SA

3

L_DA0L_DA1G3

L_DA10J6K6 L_DA11

L_DA12K7J7 L_DA13

L_DA14K8J8 L_DA15

L_DA16A5L_DA17A6

H3 L_DA2L_DA3J3

L_DA4K3H4 L_DA5

L_DA6K4J4 L_DA7

L_DA8

C_V

S

GND1 C5

GND2 C6D4GND3

GND4 D7E7GND5F7GND6

GND7 G4H5GND8

GND9 H6

B4

GP

IO_0

GP

IO_1

B5

C4

GP

IO_2

J2 LS_CS

A3 L_ADSL_CS_NA2

K2

CIS

_TY

PE

2

F1

C_D

0C

_D1

E3

F2

C_D

2C

_D3

F3

G2

C_D

4C

_D5

H1

H2

C_D

6

J1C

_D7

D3

C_H

S

C_M

CL

KB

2

C_P

CL

KC

1

C_P

WD

NC

3

C2

C_R

ST

D1

C_S

CK

D2

C_S

DA

B1

CLC344E

U601K

1C

IS_T

YP

E0

CIS

_TY

PE

1H

7H

10

C60

97p

27p

C64

4

680R637

C636470p

1uC640

27p

C65

4

C_PWR

0R

602

680R635

C65

527

p

2.2uC637

NCR648

C68610u

R642 NCR644 NC

C62

37p

TP602

10uC633

680R630R

613

10K

R649

33p

NC

C60

7

C61

933

p

TP603

V_FLASH

680R627

R625 680

27p

C65

0

C61

533

p

NC

V_CAM

R652

33p

C61

6 SI1305

D1

G

S

NCR639

Q601

C61

77p

R60810K

27p

C66

3

33p

C63

0C

631

33p

C62

2

R622

33p

680

27p

C66

9

R621

27p

680

C65

8

FB606

680R633

27p

C60

5

C67

1

33p

33p

C62

7

33p

C62

1

VOUT1VOUT2

2

_SD4

R650 NC

LM2750LDX-5.0U603

C+10

7C-

3GND1GND2

5

GND36

11GND4

VIN189

VIN2

1

VBAT

V_SRAM

NAR662

R623

39R615

680

C67

727

p

27p

C66

1

27p

VBAT

R631

C66

4

VBAT

680

R634 680

R624

C64

7

680

27p

27p

C65

2

R628 680

SP623

C66

627

p

C68

327

p

C67

327

p

C66

227

p

27p

C67

0

27p

R658

C66

5

V_CAM

680

27p

C67

4

FB605

C68

4

33p

27p

C61

2

C63

2

7p

C60

633

p

1314

1516

1718

19

220

34

56

78

9

CN601

1

10

1112

27p

C67

9

C67

8

V_CAM

7

8

9

27p

17

18

19

2

20

21

22

23

24

25

26

3

4

5

6

CN6021

10

11

12

1314

15

16

R616

V_CAM

NA

C61

333

p

NCR656

0.1uC601

FB601

NCR651

C61

07p

R653 NC

27p

C64

8

TP

601

FB614

33p

C61

4

680R620

R647 NC

R654 NC

27p

C65

1

7pC

604

C60

37p

NA

R60

3 C_PWR

27p

C_PWR

C62

0

V_CAM

C64

2

33p

R657 NC

C65

627

p

NCR655

C66

027

p

FB611

R60

5N

A

R609NA

FB603

FB615

FB602

680R619

C64

527

p

FB604

27p

C64

3

C63810u

7pC

628

R664NA

V_CAM

R643 NC

C62

633

p

C65

727

p

NCR645

R629 680

FB608

680

C62

933

p

R626

R632

R638

680

680

C6850.1u

33p

R636

C62

4

680

C65

327

p

7pC

618

27p

FB612

C64

6

FB613

FB610

C67

5

STROBE

27p

L_D(6)

L_D(15)L_D(14)

L_D(13)

L_D(10)

L_D(12)

L_D(11)

L_D(9)L_D(8)

LCD_ID

STROB

BACKLIGHT

L_LCD_CS

L_WR

LCD_RESET

L_D(1)

L_A(1)

L_D(0)

L_D(4)

L_D(2) L_D(3)

L_D(7)

L_D(5)

CA

M_H

OL

DL

CD

_RE

SE

T

C_SCK C_SDAC_RST

C_VSCD(6)CD(4)CD(2)CD(0)

13MHz

C_MCLKC_PCLK

CD(1)CD(3)CD(5)CD(7)C_HS

L_D(4)

L_D(9)

L_D(5)

A(2

)A

(1)

A(4

)A

(3)

A(5

)

A(1

)A

(6)

A(1)

STROBE

C_PWON

L_D(3)

L_D(7)

D(10)D(11)D(12)D(13)D(14)D(15)

_LCD_CS

_WRD(9)D(8)D(7)D(6)D(5)D(4)D(3)D(2)D(1)D(0) L_D(10)

L_D(11)L_D(12)L_D(13)

L_D(15)L_D(14)

L_LCD_CS

L_WRL_A(1)

L_D(8)

L_D(6)

D(3

)D

(4)

D(5

)D

(6)

D(7

)D

(8)

D(9

)D

(10)

D(1

1)D

(12)

D(1

3)D

(14)

D(1

5)_L

CD

_CS

_RD

_WR

CA

M_I

NT

L_LCD_CS

L_WRL_A(1)

C_HSC_RSTC_PCLKC_SDAC_SCK

C_MCLKC_VS

L_D(0)L_D(1)L_D(2)

CD(0)CD(1)CD(2)CD(3)CD(4)CD(5)CD(6)CD(7)

C_PWON

L_D(0)L_D(1)

L_D(10)L_D(11)L_D(12)L_D(13)L_D(14)L_D(15)

L_D(2)L_D(3)L_D(4)L_D(5)L_D(6)L_D(7)L_D(8)L_D(9)

D(0

)D

(1)

D(2

)

8.6 CAMERA

- 134 -

- 135 -

C108

2.4K

R11

6

Date

Sheet/

NO.

DRAWING

LG Electronics Inc.

Sheets

Designer

Approved

LG Electronics Inc.

Checked

NAME

DRAWING

MODEL

Sign & NameDateSection

Name

G5500/7050

KEYPAD

1/1

03/08/09 SMT (V1.1)

7/82003

nobody

Notice No.Iss.

47

0.1uC102

R10

9

MIC

1

8

SP

102

SP

103

UP

9

0.1u

C107

LD

105

5

VA

103

6

17

18

19

2

20

21

22

23

24

3

4

5

6

7

8

9

1

10

11

12 13

14

15

16

C10533p

CN101

47

R10

6

SP

106

47

R10

5

VA101

SP

109

RIGHT

2

SP

114

R10

2

4747

R10

1

LD

110

LD

109

LD

108

LD

106

47

R10

7

R10

8

47

SP

104

SP

101

F1

47

R10

3

OK

SHARP0 DOWN

7

LD

102

VBAT

3

SP

110

END

SP

108

4.7uC109

LD

107

LD

101

LD

103

4

VA

102

R10

4

47

R114

1KR118

VBAT

120

120

R113

LEFT

SP

105

F2

SP

107

SP

113C106

NA

NA

C103

C104

NA

0.1u

3G

ND

2O

UT

1V

DD

R115

U10

1

A32

12E

LH

STAR

10u

R11

0

47

SEND

CAMRECS

P11

2

SP

111

C

LD

104

MIC_P

KEY_LED

KBR(4) KBC(2)

KBC(3)

MIC_BIAS

MIC_N

MIC_P

MIC_BIAS

KBC(1)

KBC(2)

KBR(4)

KBR(3)

KBR(2)

KBC(3)

KBR(1)

KBC(4)

FLIP

MIC_N

FLIP

KBR(0)

KBC(0)

KBR(1)

KBC(4)

PWON

KBR(2)

KBC(1)KBR(3)

KEY_LED

KBR(0)

PWON

KBC(0)

8.7 KEYPAD

- 137 -

9. PCB LAYOUT

9. PCB LAYOUT

- 138 -

- 139 -

9. PCB LAYOUT

9. PCB LAYOUT

- 140 -

10. ENGINEERING MODEEngineering mode is designed to allow a service man/engineer to view and test the basic functions provided by a handset. The key sequence for switching the engineering mode on is “2945#*# “Select. Pressing END will switch back to non-engineering mode operation. Use Up and Down key to select a menu and press ‘select’ key to progress the test. Pressing ‘back key will switch back to the original test menu.

[1] All auto test

[2] Baseband test

[2-1] BACKLIGHT

[2-1-1] MAIN LCD ON/OFF

[2-1-2] SUB LCD ON/OFF

[2-1-3] KEYPAD ON/OFF

[2-2] LCD

[2-2-1] LCD AUTO

[2-2-2] LCD COLOR

[2-2-3] LCD CONTRAST

[2-2-4] 65K LCD TEST

[2-3] CAMERA (G7050 only)

[2-3-1] PREVIEW

[2-3-2] SETTING

[2-4] FONT

[2-4-1] FONT 8×10

[2-4-2] FONT 8×10 I

[2-4-3] FONT 8×16

[2-4-4] FONT 8×16 I

[2-4-5] FONT 8×16 B

[2-4-6] FONT 10×19

[2-4-7] FONT 13×20

[2-5] ALERT

[2-5-1] VIBRATOR

[2-5-2] RING

[2-5-3] EFFECT SOUND

[2-5-4] IMELODY TEST

[2-5-5] EMS SOUND

[2-5-6] VOLUME

[2-6] SERIAL PORT

[2-6-1] MODEM

[2-6-2] IrDA

[2-7] BATTERY INFO1

[2-8] AUDIO GAIN

[2-8-1] RECEIVER

[2-8-2] EAR MIC

[2-8-3] LOUD SPEAKER

[2-8-4] HANDSFREE

[2-8-5] DEFAULT VALUE

[2-9] IrDA TEST

[3] S/W VERS

[4] ENG MODE

[4-1] CELL ENVIRON

[4-2] LOCATION INFO

[4-3] LAYER1 INFO

[5] CALL TIMER

[6] FACTORY DEFAULT

-141-

11. STANDALONE TEST11.1 Setting Method

11.1.1 COM Port

In the “Dialog Menu”, select the values as explained below.• Port : select a correct COM port• Baudrate : 38400• Leave the rest as default values

11.1.2 Tx Test

• Select one of GSM or DCS Band and input appropriate channel.

1. Selecting Channel

a. Select either Power level or DAC value.b. Power level• Input appropriate value GSM (between 5~19) or DCS (between 0~15)c. DAC value• You may adjust directly the power level with DAC values.

2. Selecting APC

-142-

11.1.3 Rx Test

• Select one of GSM or DCS Band and input appropriate channel.

1. Selecting Channel

See if the value of RSSI is close to -60dBm when setting the value 40 AGC Value Setting.• Normal phone should indicate the value of RSSI close to -60dBm.

2. Automatic Gain Control and Instrument Power level

- 143 -

12. EXPLODED VIEW & REPLACEMENT PART LIST

12.1 Exploded View

12.2 Accessory

Level LocationNo. Description Part No. Specification SVC Color Remark

2 MHBY00 HANDSTRAP MHBY0001101 Neck Strap 400mm (CDMA,common use) Y Gray

2 SBPL00 BATTERY PACK,LI-ION SBPL0065889 3.7 V,850 mAh,1 CELL,PRISMATIC ,G5500 BATTERY(SV) Y Silver

2 SGDY00 DATA CABLE SGDY0004401 DK-20G, G7000 ,Cable bulk Y

2 SGEY00 EAR PHONE/EAR MIKE SET SGEY0003203 G4050 G4010 For USA ,3 POLE Design change Y

2 SRCY00 CDROM SRCY0001310 S/W ,NONE ,. ,650 MB,TMUK CD Y

2 SSAD00 ADAPTOR,AC-DC SSAD0007812 100-240V ,50 Hz,5.2 V,850 mA,CE ,AS-0496,UK PLUG,24P Y

2 SSAD00 ADAPTOR,AC-DC SSAD0007828 100-240V ,60 Hz,5.2 V,800 mA,CE,CB,GOST ,EUPLUG(24P),STD Y

-145-

12.3 Replacement Parts<Mechanic components>


1 GSM,BAR/FILP TGSM0014301 G7050 TMUSV SILVER N Silver

1 GSM,BAR/FILP TGSM0014801 G7050 TMDSV N Silver

2 APEY00 PHONE APEY0106201 G7050 TMUSV SILVER N Silver

2 APEY00 PHONE APEY0108201 G7050 TMDSV N Silver

3 ACGM00 COVER ASSY,REAR ACGM0025901 Y Silver

4 GMZZ00 SCREW MACHINE GMZZ0001901 1.4 mm,3.5 mm,MSWR3(BK) ,N ,STR ,- , t OFHEAD=1.0,DIA OF HEAD=3.1 Y 23

4 MCCC00 CAP,EARPHONE JACK MCCC0010601 G5500 Y Gray 20

4 MCIA00 CONTACT,ANTENNA MCIA0008501 G5500 Y Gold 21

4 MCJN00 COVER,REAR MCJN0015501 G5500 Y Silver 31

4 MDAK00 DECO,REAR MDAK0001901 G7050 Y Silver 24

4 MLEA00 LOCKER,BATTERY MLEA0011601 G5500 Y Silver 29

4 MPBZ00 PAD MPBZ0032701 G5500 Y Black 32

4 MSDB00 SPRING,COIL MSDB0001701 G7000 Y Pearl White 30

4 MTAB00 TAPE,PROTECTION MTAB0024301 G7050 N Silver

4 MTAZ00 TAPE MTAZ0020901 G7050 Y Silver 25

4 MTAZ01 TAPE MTAZ0022001 G7050 BG Y Bluish

Green34

4 MWAE00 WINDOW,CAMERA MWAE0000901 G7050 Y Silver 26

4 SNGF00 ANTENNA,GSM,FIXED SNGF0002302 3.0 ,-2 dBd,SILVER ,GSM+DCS Y 22

3 ACGQ00 COVER ASSY,SLIDE ACGQ0000401 Y Silver

4 ABGZ00 BUTTON ASSY ABGZ0001101 G7050 ENGLISH Y Silver 2

4 ACGK00 COVER ASSY,FRONT ACGK0028201 G7050 Y Silver 39

5 MBJL00 BUTTON,SIDE MBJL0009401 G5500 Y Silver 6

5 MCJK00 COVER,FRONT MCJK0018701 G5500 (SILVER) N Silver

5 MDAC00 DECO,SIDE MDAC0007301 Y Silver 8

5 MDAC01 DECO,SIDE MDAC0007501 Y Silver 37

5 MDAH00 DECO,RECEIVER MDAH0004301 G5500 N Silver

5 MFBB00 FILTER,RECEIVER MFBB0003401 G5500 Y Black 13

5 MGAD00 GASKET,SHIELD FORM MGAD0039401 G7050 Y Gold 41

5 MIAA00 INDICATOR,LED MIAA0009601 G5500 Y White 10

5 MMAA00 MAGNET,SWITCH MMAA0000601 LG-G510,511,512 common use, DIA : 3.0mm+1.5t Y Silver 42

5 MPBG00 PAD,LCD MPBG0014701 G5500 Y Black 15

5 MPBR00 PAD,BUTTON MPBR0001001 G5500 , ATTACHED (BUTTON,SIDE) Y Black 7

5 MPBZ00 PAD MPBZ0034201 G5500 Y Black 40

-146-


5 MTDA00 TUBE,LED MTDA0001901 G7050 EAUSV Y Black 11

5 MWAG00 WINDOW,IRDA MWAG0004201 G7050 EAUSV, BR Y 갈색 36

4 ACGR00 COVER ASSY,SLIDE(LOWER) ACGR0000301 G5500 (SILVER) Y Silver

5 MCJV00 COVER,SLIDE(LOWER) MCJV0000301 G5500 (SILVER) N Silver 44

5 MPBF00 PAD,FLEXIBLE PCB MPBF0003701 G5500 Y Black 46

5 MPBZ00 PAD MPBZ0034001 G5500, ATTACHED (SLIDE LOWER) Y Black 45

4 ACGS00 COVER ASSY,SLIDE(UPPER) ACGS0000301 G5500 (SILVER) Y Silver

5 MCJW00 COVER,SLIDE(UPPER) MCJW0000301 G5500 (SILVER) N Silver

5 MDAY00 DECO MDAY0006101 G5500 (SILVER) N Silver

5 MGAD00 GASKET,SHIELD FORM MGAD0039301 G7050 Y Gold 50

5 MPBH00 PAD,MIKE MPBH0005901 G5500 (SILVER) Y Black 49

4 ACGZ00 COVER ASSY ACGZ0009901 G7050 SILVER (LG LOGO) N Silver

5 MCJZ00 COVER MCJZ0027701 G7050 Y Silver 12

5 MTAB00 TAPE,PROTECTION MTAB0029301 G7050 N

4 ADCA00 DOME ASSY,METAL ADCA0014401 G5500 Y 3

4 GMZZ00 SCREW MACHINE GMZZ0011201 1.4 mm,2.0 mm,MSWR3(FNM) ,N ,STR ,- , G5500 Y 43

4 GMZZ01 SCREW MACHINE GMZZ0011601 1.7 mm,3.0 mm,MSWR3(FN) ,N ,STR ,- , Y Silver 28

4 MPBZ00 PAD MPBZ0035001 G7050 F-PCB ATTACH Y Black 48

4 MPFE00 PLATE,INSULATE MPFE0004301 G5500 Y 5

4 MSDD00 SPRING,PLATE MSDD0003401 G5500 Y Silver 38

3 SBCL00 BATTERY,CELL,LITHIUM SBCL0001002 3 V,1.2 mAh,COIN ,HOLDER TYPE (1.4t) Y

3 SVCY00 CAMERA SVCY0000201 CMOS ,VGA ,8.5*9.5*6.9, backward fixed Y 19

3 SVLM00 LCD MODULE SVLM0006401 128*160 ,37.2*48.9 ,65K CSTN, 28.02*35.028(AA),TM Y 35

3 GMZZ00 SCREW MACHINE GMZZ0011601 1.7 mm,3.0 mm,MSWR3(FN) ,N ,STR ,- , Y Silver

3 MCCF00 CAP,MOBILE SWITCH MCCF0011401 G5500 Y Gray 33

3 MCCH00 CAP,SCREW MCCH0017801 G5500 Y Gray 27

3 MLAK00 LABEL,MODEL MLAK0006301 LG (30.5x21.5 4-1R) N Pearl White

3 MPBZ00 PAD MPBZ0032601 G5500 , BK Y Black 17

3 MTAB00 TAPE,PROTECTION MTAB0024201 G5500 N

3 MWAC00 WINDOW,LCD MWAC0030701 G5500 Y 9

-147-

12.3 Replacement Parts<Main components>


4 SACY00 PCB ASSY,FLEXIBLE SACY0011401 G5500/7050 MAIN TO KEYPAD FPCB Y 47

5 CN101 CONNECTOR,BOARD TO BOARD ENBY0013501 24 PIN,0.4 mm,ETC ,AU , N

5 CN102 CONNECTOR,BOARD TO BOARD ENBY0002107 24 PIN,0.5 mm,ETC ,AU ,HEADER N

5 SPCY00 PCB,FLEXIBLE SPCY0018501 POLYI ,0.19 mm,DOUBLE , N

4 SAEY00 PCB ASSY,KEYPAD SAEY0022801 G5500 KEYPAD Y 4

5 SAEA00 PCB ASSY,KEYPAD,AUTO SAEA0008701 N

6 C102 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP Y


6 C105 CAP,CERAMIC,CHIP ECCH0000186 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP Y


6 C108 CAP,TANTAL,CHIP ECTH0001901 10 uF,6.3V ,M ,L_ESR ,1608 ,R/TP Y

6 C109 CAP,CHIP,MAKER ECZH0026301 4.7 uF,6.3V ,Z ,Y5V ,HD ,1608 ,R/TP Y

6 CN101 CONNECTOR,BOARD TO BOARD ENBY0013101 24 PIN,0.4 mm,ETC ,AU , N

6 LD101 DIODE,LED,CHIP EDLH0004502 BLUE ,1608 ,R/TP ,0.35T N










6 R101 RES,CHIP ERHY0000213 47 ohm,1/16W,J,1005,R/TP Y










6 R113 RES,CHIP ERHY0000222 120 ohm,1/16W,J,1005,R/TP N

6 R114 RES,CHIP ERHY0000222 120 ohm,1/16W,J,1005,R/TP N

-148-


6 R116 RES,CHIP ERHY0000248 2.4K ohm,1/16W,J,1005,R/TP N

6 R118 RES,CHIP ERHY0000241 1K ohm,1/16W,J,1005,R/TP Y

6 SPEY00 PCB,KEYPAD SPEY0017101 FR-4 ,0.6 mm,DOUBLE , Revision 1.1 N

6 U101 IC EUSY0129501 SC-74A FIT ,3 PIN,R/TP ,HALL EFFECT SWITCH N

6 VA101 RES,VARIABLE,ETC ERVZ0000101 ohm, PIN, ,SMD ,R/TP ,1005 SIZE CHIP VARISTOR Y



4 SJMY00 VIBRATOR,MOTOR SJMY0006101 3 V,.09 A,12*18 ,G5500 VIBRATOR Y 14

4 SUMY00 MICROPHONE SUMY0003802 FPCB ,-42 dB,4*1.5 , Y

4 SUSY00 SPEAKER SUSY0006204 ASSY ,8 ohm,87 dB,17 mm, Y 16

3 SAFY00 PCB ASSY,MAIN SAFY0075901 G7050 EUA, GPRS Phone Y 18

4 MLAB00 LABEL,A/S MLAB0000601 HUMIDITY STICKER N

4 SAFA00 PCB ASSY,MAIN,AUTO SAFA0027601 N

5 BAT101 CONN,JACK/PLUG,EARPHONE ENJE0003001 2 ,2 PIN,W3000 Back Up Battery Holder Y

5 C101 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP Y

5 C102 CAP,CERAMIC,CHIP ECCH0000114 20 pF,50V,J,NP0,TC,1005,R/TP Y

5 C103 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP Y






5 C109 CAP,CERAMIC,CHIP ECCH0000276 1 uF,10V,Z,Y5V,HD,1608,R/TP Y
















-149-









5 C302 CAP,CERAMIC,CHIP ECCH0000138 390 pF,50V,K,X7R,HD,1005,R/TP Y

5 C303 CAP,CERAMIC,CHIP ECCH0004902 220 nF,10V ,Z ,Y5V ,TC ,1005 ,R/TP Y















5 C319 CAP,CERAMIC,CHIP ECCH0003401 10 uF,6.3V ,Z ,Y5V ,HD ,2012 ,R/TP Y






5 C328 CAP,CERAMIC,CHIP ECCH0000130 150 pF,50V,J,SL,TC,1005,R/TP Y





5 C337 CAP,CERAMIC,CHIP ECCH0000174 2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP Y




-150-


5 C403 CAP,CERAMIC,CHIP ECCH0000130 150 pF,50V,J,SL,TC,1005,R/TP Y

5 C404 CAP,TANTAL,CHIP ECTH0000121 10 uF,10V,K,STD,3216,TP Y

5 C405 CAP,CERAMIC,CHIP ECCH0000179 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP Y





5 C410 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP N




5 C501 CAP,CERAMIC,CHIP ECCH0000103 1.5 pF,50V,C,NP0,TC,1005,R/TP Y








5 C514 CAP,CERAMIC,CHIP ECCH0000102 1 pF,50V,C,NP0,TC,1005,R/TP N








5 C526 CAP,CERAMIC,CHIP ECCH0000103 1.5 pF,50V,C,NP0,TC,1005,R/TP Y





5 C533 CAP,TANTAL,CHIP,MAKER ECTZ0000318 33 uF,10V ,M ,L_ESR ,ETC ,R/TP Y






-151-






5 C544 CAP,CERAMIC,CHIP ECCH0000379 2.2 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP Y






5 C550 CAP,CERAMIC,CHIP ECCH0000379 2.2 uF,6.3V ,K ,X5R ,HD ,2012 ,R/TP Y


5 C552 CAP,CERAMIC,CHIP ECCH0000178 1.8 pF,50V ,D ,NP0 ,TC ,1005 ,R/TP Y


























-152-








































-153-






















5 CN401 CONNECTOR,I/O ENRY0000901 24 PIN,0.5 mm,ETC , , Y

5 CN402 CONNECTOR,BOARD TO BOARD ENBY0002102 24 PIN,0.5 mm,ETC ,AU , Y

5 CN403 CONN,SOCKET ENSY0007602 6 PIN,ETC , , mm,Height 2.7mm Y

5 CN601 CONNECTOR,BOARD TO BOARD ENBY0013409 20 PIN,0.4 mm,ETC ,AU , Y

5 CN602 CONNECTOR,BOARD TO BOARD ENBY0011002 26 PIN,0.5 mm,ETC ,AU ,G5500 Y

5 D401 DIODE,SWITCHING EDSY0012101 US-FLAT ,30 V,1 A,R/TP ,2.5*1.25*0.6(t) Y

5 FB401 FILTER,BEAD,CHIP SFBH0007102 10 ohm,1005 ,Ferrite Bead Y


5 FB501 FILTER,BEAD,CHIP SFBH0000903 600 ohm,1005 , Y










-154-









5 FL501 FILTER,SEPERATOR SFAY0001901 880/960 ,1710/1880 ,1.3 dB,1.5 dB,30 dB,25 dB,ETC,5.4*4.0*1.8 Y

5 FL502 FILTER,SAW SFSY0012202 942.5 MHz,2.0*2.5*1.0 ,SMD , Y

5 FL503 FILTER,SAW SFSY0012302 1842.5 MHz,2.0*2.5*1.0 ,SMD , Y

5 J301 CONN,JACK/PLUG,EARPHONE ENJE0002301 3,5 PIN,G7000 EAR JACK 3 pole, 5 pin KSD Y

5 L201 RES,CHIP ERHY0000203 10 ohm,1/16W,J,1005,R/TP Y

5 L301 INDUCTOR,CHIP ELCH0005009 100 nH,J ,1005 ,R/TP , Y






5 L501 INDUCTOR,CHIP ELCH0009302 27 nH,S ,1005 ,R/TP ,COIL Y

5 L502 INDUCTOR,CHIP ELCH0009301 7.5 nH,S ,1005 ,R/TP ,COIL Y

5 L503 INDUCTOR,CHIP ELCH0001406 4.7 nH,S,1005,R/TP Y

5 L505 INDUCTOR,CHIP ELCH0005013 4.7 nH,S ,1005 ,R/TP , Y


5 L507 INDUCTOR,CHIP ELCH0001009 1.2 nH,S ,1005 ,R/TP , Y


5 LED201 DIODE,LED,CHIP EDLH0003401 RED, GREEN ,ETC ,R/TP ,SIZE 1315 , GSM DUALLED Y

5 Q201 TR,BJT,NPN EQBN0004801 SMT6 ,0.2 W,R/TP , Y

5 Q203 TR,FET,N-CHANNEL EQFN0005201 SOT-323 ,0.29 W,25 V,0.70 A,R/TP ,N-ChannelMOSFET Y

5 Q601 TR,FET,P-CHANNEL EQFP0004501 SOT-323 ,0.29 W,1.8 V,0.86 A,R/TP ,P-ChanelMOSFET Y








-155-




















5 R217 RES,CHIP ERHY0000254 4.7K ohm,1/16W,J,1005,R/TP Y


















5 R316 RES,CHIP ERHY0000296 1M ohm,1/16W,J,1005,R/TP Y


-156-






5 R403 RES,CHIP ERHY0000138 33K ohm,1/16W,F,1005,R/TP Y







5 R410 RES,CHIP ERHY0001102 0.2 ohm,1/4W ,F ,2012 ,R/TP Y












5 R510 RES,CHIP ERHY0000185 820 ohm,1/16W ,F ,1005 ,R/TP Y





5 R515 RES,CHIP ERHY0004301 130 ohm,1/16W ,J ,1005 ,R/TP Y

5 R516 RES,CHIP ERHY0004301 130 ohm,1/16W ,J ,1005 ,R/TP Y

5 R517 RES,CHIP ERHY0000296 1M ohm,1/16W,J,1005,R/TP Y







5 R524 RES,CHIP ERHY0000128 15K ohm,1/16W,F,1005,R/TP Y

-157-


5 R526 RES,CHIP ERHY0000106 100 ohm,1/16W,F,1005,R/TP Y


5 R528 THERMISTOR SETY0001201 NTC ,22 Kohm,SMD ,1.0*0.5 / NSM4 SERIES Y






















5 R627 FILTER,BEAD,CHIP SFBH0007101 120 ohm,1005 ,Ferrite Bead Y












5 R658 INDUCTOR,CHIP ELCH0005009 100 nH,J ,1005 ,R/TP , Y


-158-


5 R665 RES,CHIP ERHY0008203 3 Kohm,1/16W ,J ,1005 ,R/TP Y

5 RA401 RES,ARRAY,R ERNR0000403 10000 ohm, ohm,8 PIN,J ,1/32 W ,SMD ,R/TP Y




5 SPFY00 PCB,MAIN SPFY0050001 FR-4 ,0.95 mm,BUILD-UP 8 , FR4, 0.95 mm, SBL 8Layer, Revision 1.4 N

5 SPK CONNECTOR,BOARD TO BOARD ENBY0001802 2 PIN,1.27 mm,STRAIGHT ,SILVER , Y

5 SW201 SWITCH,TACT ESCY0002501 12 V,0.05 A,HORIZONTAL ,220 G,G5200 TACK S/W Y

5 SW202 SWITCH,TACT ESCY0002501 12 V,0.05 A,HORIZONTAL ,220 G,G5200 TACK S/W Y

5 SW501 CONN,RF SWITCH ENWY0000101 ANGLE ,SMD ,0.5 dB, Y

5 U101 IC EUSY0155201 179GHH PBGA ,179 PIN,R/TP ,CALYPSO / DIGITALBB CHIP Y

5 U102 IC EUSY0148001 100GGM PBGA ,100 PIN,BK ,ANALOG BB CHIP Y

5 U201 IC EUSY0160502 88-BALL FBGA ,88 PIN,R/TP ,128M (64M * 2) FLASH64M PSRAM N

5 U202 IC EUSY0122301 SURFACE MOUNT ,7 PIN,R/TP ,IRDA DATA 1.3LOW POWER TRANSCEIVER / 115.2kb/s Y

5 U203 IC EUSY0077301 SC70-6/SOT23-6 ,6 PIN,R/TP , Y

5 U204 IC EUSY0160401 SOT-23 ,3 PIN,R/TP ,DC MOTOR DRIVER /INTEGERATED RELAY Y

5 U301 IC EUSY0111601 32-PIN QFN ,32 PIN,R/TP ,MA-3 / 40 TONES / FM +WAVEFORM TABLE Y

5 U302 IC EUSY0077602 MSOP-8 ,8 PIN,R/TP ,250mA CMOS LDO WIHTERROR FLAG / 3.3V Y

5 U303 IC EUSY0119001 10 uMAX ,10 PIN,R/TP ,DUAL SPDT ANALOGSWITCHES Y

5 U304 IC EUSY0077701 SC70-5 ,5 PIN,R/TP , Y

5 U401 TR,FET,P-CHANNEL EQFP0003301 SOT-6 ,1.6 W,30 V,2.4 A,R/TP ,use for charge P-CHANNEL FET Y

5 U502 IC EUSY0144804 5*5 MLP32 ,32 PIN,R/TP , Y

5 U503 IC EUSY0144801 5*5 ,32 PIN,R/TP , Y

5 U504 PAM SMPY0004001 35 dBm,55 %,2 A,-50 dBc,25 dB,10.0 * 7.0 * 1.4 ,SMD , Y

5 U505 IC EUSY0144802 5*5 MLP28 ,28 PIN,R/TP , Y

5 U506 VCTCXO EXSK0000801 13.0 MHz, PPM,10 pF,SMD ,5.0*3.2*1.5 , Y

5 U507 IC EUSY0077201 SOT(DCK) ,5 PIN,R/TP , Y

5 U508 IC EUSY0076701 SOT-23-6 ,6 PIN,R/TP , Y

5 U510 IC EUSY0100502 8-LEAD US8 ,8 PIN,R/TP ,UHS DUAL 2-INPUT ANDGATE Y

5 U601 IC EUSY0156701 CSP (8mm*8mm) ,100 PIN,R/TP ,LCDCONTROLLER, JPEG ENCODER / DECODER Y

5 U602 IC EUSY0076701 SOT-23-6 ,6 PIN,R/TP , Y


-159-






















5 VIB CONNECTOR,BOARD TO BOARD ENBY0001802 2 PIN,1.27 mm,STRAIGHT ,SILVER , Y

5 VR201 VARISTOR SEVY0000702 14 V,10% ,SMD , Y





5 X101 X-TAL EXXY0015601 32.768 KHz,20 PPM,6 pF,65 Kohm,SMD ,6.9*1.4*1.3 , Y

-160-

G5500 7050(031015 1)

Documents

Transcript of G5500 7050(031015 1)