[G] Soft-Switching PS-PWM DC–DC Converter for Full-Load Range Applications

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010 2807 Soft-Switching PS-PWM DC–DC Converter for Full-Load Range Applications Jaroslav Dudrik, Member, IEEE, and Nistor-Daniel Trip, Member, IEEE Abstract—An improved soft-switching full-bridge phase-shifted pulsewidth modulation converter using insulated-gate bipolar transistors with a special auxiliary transformer is presented in this paper. Zero-voltage switching for leading leg and zero-current switching for lagging leg switches in the converter are achieved for full-load range from no load to short circuit by adding an active energy recovery clamp and auxiliary circuits. The new significant feature of the converter consists in suppression of circulating current also in short-circuit conditions. The proposed converter is very attractive for applications where short circuit and no load are the normal states of the converter operation, e.g., arc welding. The principle of operation is explained and analyzed, and experimental results are presented on a 3-kW 50-kHz laboratory converter model. Index Terms—Auxiliary transformer, phase-shifted pulsewidth modulation (PWM) (PS-PWM), soft switching, zero-voltage and zero-current switching (ZVZCS). I. I NTRODUCTION T HE high-frequency soft-switching pulsewidth modula- tion (PWM) converters are very suitable for high- voltage high-power applications where insulated-gate bipolar transistors (IGBTs) are mainly used as power switches. The phase-shifted PWM (PS-PWM) zero-voltage switching (ZVS) converters are often used in many applications because their topology permits all switching devices to operate under ZVS by using circuit parasitics such as power transformer leakage inductance and device junction capacitance. However, because of PS-PWM control, the converter has a disadvantage that circulating current flows through the power transformer and switching devices during freewheeling inter- vals [1]–[4]. The circulating current is a sum of the reflected output cur- rent and transformer primary magnetizing current. Due to the circulating current, the rms current stresses of the transformer and switching devices are still high compared with those of the conventional hard-switching PWM full-bridge converter. Manuscript received March 20, 2009; revised June 13, 2009; accepted October 26, 2009. Date of publication December 1, 2009; date of current version July 14, 2010. This work was supported in part by the Slovak Research and Development Agency under Project APVV-0095-07, by the Scientific Grant Agency of the Ministry of Education of the Slovak Republic under Con- tract VEGA 1/0099/09, and by the European Community, European Regional Development Fund. J. Dudrik is with the Department of Electrical, Mechatronic and Industrial Engineering, Faculty of Electrical Engineering and Informatics, Technical University of Košice, 042 00 Košice, Slovak Republic (e-mail: jaroslav. [email protected]). N.-D. Trip is with the Department of Electronics, University of Oradea, 3700 Oradea, Romania (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2009.2037100 Fig. 1. Principle of the ZVZCS converter operation. Fig. 2. Operation waveforms of ZVZCS PWM converter. To decrease the circulating current to zero and, thus, to achieve zero-current switching (ZCS), various snubbers, auxil- iary circuits, and/or clamps connected mostly at the secondary side of power transformer are applied. The snubbers and/or clamps are necessary to secure discon- nection of the secondary side of the power transformer, as it is shown in a very simplified version in Fig. 1. The disconnection is usually achieved by the application of reverse bias for the output rectifier when the secondary voltage of the transformer in the freewheeling interval becomes zero. The output rectifier (D 5 ,D 6 ) is then reverse biased, and the secondary windings of the transformer are disconnected. Consequently, both primary and secondary currents of the transformer become zero. Only a low magnetizing current circulates during the freewheeling interval, as shown in Fig. 2. 0278-0046/$26.00 © 2010 IEEE

Transcript of [G] Soft-Switching PS-PWM DC–DC Converter for Full-Load Range Applications

Page 1: [G] Soft-Switching PS-PWM DC–DC Converter for Full-Load Range Applications

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010 2807

Soft-Switching PS-PWM DC–DC Converterfor Full-Load Range ApplicationsJaroslav Dudrik, Member, IEEE, and Nistor-Daniel Trip, Member, IEEE

Abstract—An improved soft-switching full-bridge phase-shiftedpulsewidth modulation converter using insulated-gate bipolartransistors with a special auxiliary transformer is presented inthis paper. Zero-voltage switching for leading leg and zero-currentswitching for lagging leg switches in the converter are achieved forfull-load range from no load to short circuit by adding an activeenergy recovery clamp and auxiliary circuits. The new significantfeature of the converter consists in suppression of circulatingcurrent also in short-circuit conditions. The proposed converter isvery attractive for applications where short circuit and no load arethe normal states of the converter operation, e.g., arc welding. Theprinciple of operation is explained and analyzed, and experimentalresults are presented on a 3-kW 50-kHz laboratory convertermodel.

Index Terms—Auxiliary transformer, phase-shifted pulsewidthmodulation (PWM) (PS-PWM), soft switching, zero-voltage andzero-current switching (ZVZCS).

I. INTRODUCTION

THE high-frequency soft-switching pulsewidth modula-tion (PWM) converters are very suitable for high-

voltage high-power applications where insulated-gate bipolartransistors (IGBTs) are mainly used as power switches.

The phase-shifted PWM (PS-PWM) zero-voltage switching(ZVS) converters are often used in many applications becausetheir topology permits all switching devices to operate underZVS by using circuit parasitics such as power transformerleakage inductance and device junction capacitance.

However, because of PS-PWM control, the converter has adisadvantage that circulating current flows through the powertransformer and switching devices during freewheeling inter-vals [1]–[4].

The circulating current is a sum of the reflected output cur-rent and transformer primary magnetizing current. Due to thecirculating current, the rms current stresses of the transformerand switching devices are still high compared with those of theconventional hard-switching PWM full-bridge converter.

Manuscript received March 20, 2009; revised June 13, 2009; acceptedOctober 26, 2009. Date of publication December 1, 2009; date of currentversion July 14, 2010. This work was supported in part by the Slovak Researchand Development Agency under Project APVV-0095-07, by the ScientificGrant Agency of the Ministry of Education of the Slovak Republic under Con-tract VEGA 1/0099/09, and by the European Community, European RegionalDevelopment Fund.

J. Dudrik is with the Department of Electrical, Mechatronic and IndustrialEngineering, Faculty of Electrical Engineering and Informatics, TechnicalUniversity of Košice, 042 00 Košice, Slovak Republic (e-mail: [email protected]).

N.-D. Trip is with the Department of Electronics, University of Oradea, 3700Oradea, Romania (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2009.2037100

Fig. 1. Principle of the ZVZCS converter operation.

Fig. 2. Operation waveforms of ZVZCS PWM converter.

To decrease the circulating current to zero and, thus, toachieve zero-current switching (ZCS), various snubbers, auxil-iary circuits, and/or clamps connected mostly at the secondaryside of power transformer are applied.

The snubbers and/or clamps are necessary to secure discon-nection of the secondary side of the power transformer, as it isshown in a very simplified version in Fig. 1.

The disconnection is usually achieved by the application ofreverse bias for the output rectifier when the secondary voltageof the transformer in the freewheeling interval becomes zero.The output rectifier (D5,D6) is then reverse biased, and thesecondary windings of the transformer are disconnected.

Consequently, both primary and secondary currents of thetransformer become zero. Only a low magnetizing currentcirculates during the freewheeling interval, as shown in Fig. 2.

0278-0046/$26.00 © 2010 IEEE

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2808 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 3. Scheme of the proposed soft-switching PS-PWM dc–dc converter.

Thus, the rms currents of the transformer and switches areconsiderably reduced.

Hence, the converter achieves nearly ZCS for the laggingleg (transistors T2 and T3) due to the minimized circulatingcurrent during the interval of lagging leg transition and achievesZVS for the leading leg (transistors T1 and T4) due to thereflected output current (IO/n1 = IP , n1 = NP1/NS1) duringthe interval of leading leg transition.

Several active [4]–[12] and passive [12]–[22] more or lesscomplex snubber, clamp, and auxiliary circuits were developedto resolve the problem concerning the resetting of the primarycurrent of the transformer to achieve ZCS of the switches in theright leg of the converter.

The mentioned converters are usually very well adapted fornormal load and no load, whereas at short circuit, they do notsuppress freewheeling current and, thus, conduction and turnofflosses occur. Aside from that, the clamp voltage is almost equalor lower than the output voltage, and thus, the commutationbetween the output rectifier and clamp is rather long, particu-larly at low-output-voltage and high-current applications andhigh leakage inductance of the power transformer. To avoidthe aforementioned problems, a new topology of the followingzero-voltage and zero-current switching (ZVZCS) converterwas designed.

The basic mechanism of the operation of the proposed con-verter is nearly the same as that of the converter [6] and itsimproved version [7]. However, in contrast to this converter, theZVS of the leading leg at no-load conditions and the limitationof circulating current and, thus, ZCS of the lagging leg alsoat short circuit are achieved at the proposed converter [8] byadding simple auxiliary circuits.

The proposed converter is an improved version of converterdescribed in [9]. The main improvements consist in the newcharging of the clamp capacitor by a continuous current to

a value higher than the amplitude of the rectified secondaryvoltage. Consequently, a better performance of the converterwas achieved, particularly at short circuit and the states close toshort circuit. This is important for the current source applica-tions of the converter.

The auxiliary circuits and clamp contain only no-lossycomponents. They ensure required limitation of the circulatingcurrent and switching losses indeed, but they do not haveany other important back influence on the basic converteroperation.

II. POWER CIRCUITS OF THE PROPOSED CONVERTER

The proposed dc–dc converter shown in Fig. 3 consistsof capacitive voltage divider, high-frequency inverter, powertransformer, output rectifier, and output filter.

The main part of the converter includes a high-frequency full-bridge inverter consisting of the four ultrafast IGBTs T1−T4

and freewheeling diodes D1−D4. The secondary winding ofthe high-frequency step-down power transformer TR1 is con-nected through a fast recovery rectifier (D5,D6) to output filterconsisting of smoothing choke LO and capacitor CO.

The converter is controlled by PS-PWM (Fig. 4), and conse-quently, the zero-voltage turn-on of the transistors T1 and T4 inthe leading leg is reached. By connecting the capacitors C1 andC4 in parallel with transistors T1 and T4, the turnoff losses ofthe transistors T1 and T4 can be substantially reduced. By usingan energy recovery clamp consisting of MOSFET TS with itsbody diode DS and capacitor CS , the circulating current israpidly decreased during the freewheeling interval, achievingzero-current turnoff of the transistors T2 and T3. The leakageinductance of the power transformer TR1 works as a turn-onsnubber for the transistors T2 and T3; hence, their turn-on lossesare very low.

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DUDRIK AND TRIP: SOFT-SWITCHING PS-PWM DC–DC CONVERTER FOR FULL-LOAD RANGE APPLICATIONS 2809

Fig. 4. Operation waveforms of the converter.

Auxiliary circuits are needed in order to achieve soft switch-ing at no-load and short-circuit conditions. The auxiliary trans-former TR2 is the main part of the auxiliary circuits. Its primarywinding is connected between the midpoint of the leading leg(transistors T1 and T4) of the inverter and the midpoint of thecapacitive voltage divider CF1 and CF2. The transformer TR2

should have a considerably large air gap to ensure sufficientlyhigh magnetizing current and, at the same time, to preventcore saturation. The sawtooth magnetizing current im2 has toensure the charging or discharging of the capacitors C1 and C4,respectively, during the dead time of the transistors T1 and T4

(interval t1 − t2 in Fig. 4). The proper design of the capacitorsC1 and C4 and the auxiliary transformer TR2 ensure the zero-voltage turn-on of the transistors T1 and T4 not only at lightload but also at no-load conditions [1], [4], [9], [23], [24].

In order not to loose the zero-current turnoff of the transistorsT2 and T3 at short circuit, it is necessary to charge up thecapacitor Cs to the rated value of voltage. The clamp capacitorCs can be charged from the rectifier REC, which is connectedto the secondary winding of the auxiliary transformer TR2.The rate of the primary current fall and the value of no-loadoutput voltage of the converter can be adjusted by the turn’sratio n2 = NP2/NS2 of the auxiliary transformer TR2.

The active clamp in the secondary side, including transistorTS , is used to reset the primary current. The transistor TS

operates with a double-switching frequency. The control pulsesfor the transistor TS are easily derived from the control pulsesof the primary switches.

Normally, the current of the transistor TS commutates tofreewheeling diode DO. The overvoltages caused by parasiticinductances of the wires occur in the loop TS − CS DO at TS

turnoff.Therefore, the freewheeling diode DO should be connected

as close as possible to the clamp switch TS to minimizeovervoltage at TS turnoff.

Theoretically, the freewheeling diode DO is not necessary.However, if the freewheeling diode is omitted, the overvoltagesacross TS would be increased.

The other reason is the possibility to use the freewheelingdiode with lower rated voltage (Schottky diode) and, thus, withlower ON-state voltage compared with fast reverse-recoveryrectifying diodes. Consequently, lower conduction losses occur,and no current flows through secondary windings of the powertransformer. This is important in applications where freewheel-ing interval is long, e.g., at arc welding.

An additional function of the secondary clamp is the suppres-sion of oscillations at turn-on of the lagging leg transistors. Byusing nondissipative snubber to reduce the turnoff losses of thetransistor TS , the overall efficiency could be increased.

Although the auxiliary circuits, clamp, and snubber lookquite complex, they are very small and so is the additional cost.

III. OPERATION OF THE CONVERTER AT NO LOAD

AND SHORT CIRCUIT

The basic operation of the proposed soft-switching converterhas nine operating modes within each half cycle. The switchingdiagram and operation waveforms are shown in Fig. 4.

It is assumed that all components and devices are ideal.The basic operation of the converter at rated load is well

described in [9].In this paper, the description of the proposed converter is

focused on conditions at no load and short circuit.

A. Converter at No Load

The snubber capacitors C1 and C4 are connected in parallelwith transistors T1 and T4 in the leading leg of the converter.At no load, there is a problem with charging or dischargingsnubber capacitors, respectively.

For example, the capacitor C4 should be completely dis-charged (C1 completely charged) to prevent overcurrent at thefollowing turn-on of the transistor T4 during dead time of theleading leg (td1 = t1 − t2). Not fully discharged capacitor C4

at t2 can cause substantially increased turn-on losses as a resultof the discharging of the capacitor C4 into the transistor T4 atturn-on.

The magnetizing current of the power transformer is usuallytoo small for full charging or discharging of the capacitors C1

and C4 during dead time.Therefore, the minimum current should be set to ensure the

charging or discharging of capacitors C1 and C4 at no loadduring dead time td1 for the leading leg. Its value can becalculated from

Ich,min ≥ (C1 + C4) · Utd1

(1)

where C1 = C4.This condition must be fulfilled to obtain zero-voltage turnoff

of the leading leg transistors at no load.If the ratio U/Ich,min is constant, the discharging or charging

time tch,no load < td1 is independent on the input voltage U

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and simultaneously independent on the load current. From thatreason, the switch voltage sensing is not necessary.

The charging and discharging of the snubber capacitors canbe ensured by the magnetizing current Im2 of the auxiliarytransformer TR2. The gapped core of the transformer TR2

must be used to avoid core saturation by increased magnetizingcurrent.

The required magnetizing inductance of the auxiliary trans-former can be calculated as

Lm2 ≤ U · tC4 · Im2,max

(2)

where tC ≈ T/2 is the conduction time (nearly half of theperiod) of the switches T1 and T4 in the leading leg, andIm2,max ≥ Ich,min.

B. Converter at Short Circuit

In ZVZCS PS-PWM converters, there is a problem with thesuppression of the circulating current at short circuit and statesclose to short circuit. Therefore, in the proposed converter, theclamp capacitor CS is charged up from the secondary side ofthe auxiliary transformer TR2. The charging, being in progressduring the whole period except during the discharging interval(t2 − t5), is independent on the converter state.

It is assumed that CS is charged to a voltage higher thanthe output voltage UO. In this design, the inductance La islarge enough; thus, the charging current is smoothed and canbe considered constant.

Its magnitude ICSch,max is given by the value of the outputcurrent (Fig. 4)

Id2,max = ICSch,max ≈ const.

≈ 2T

(IO

2· (t3−t2)+IO · (t4−t3)+IO · (t5−t4)

).

(3)

After editing and substitution, (3) can be expressed as

Id2,max = ICSch,max ≈ const.

≈ 2T

(IO · tTS − I2

O · LL2

2UCS+ CSN · UCS

)(4)

where LL2 is the leakage inductance of the auxiliary trans-former, and CSN is the capacitance of the secondary turnoffsnubber for clamp switch TS , if the snubber is used.

IV. EXPERIMENTAL RESULTS

A laboratory model of the proposed PS-PWM dc–dc con-verter has been built and tested to verify its functions.

1) Parameters:a) output power P = 3 kW;b) input voltage U = 300 V;c) switching frequency fS = 50 kHz;d) inverter IGBT switches: G4PC50W;e) inverter freewheeling diodes: HFA25TB60.

Fig. 5. Construction of the power transformer TR1.

Fig. 6. Switch voltage uCE4 and switch current iC4 of the transistor T4 inthe leading leg; iC4: 10 A/div.

2) Transformer TR1 parameters:a) turn’s ratio n1 = 6, (NP1 = 12;NS1 = 2);b) magnetizing inductance Lm1 = 2.8 mH;c) leakage inductance LL1 = 3.4 μH;d) maximum magnetizing current Im1,max ≈ 0.25 A;e) construction: coaxial (Fig. 5); total weight: 4.2 kg;

universal transformer for the rated output power:about 20 kW at 50 kHz.

3) Transformer TR2 parameters:a) turn’s ratio n2 = 1.38, (NP1 = 33;NS1 = 24);b) magnetizing inductance Lm2 = 146 μH;c) leakage inductance LL2 = 4.3 μH;d) maximum magnetizing current Im2,max ≈ 4 A;e) construction: EC70 core; air gap δ = 1.5 mm; total

weight: 0.38 kg.4) Smoothing output inductance LO = 12 μH.5) Smoothing auxiliary inductance La = 78 μH.

The converter was examined as a current source for full-loadrange at an output current from zero up to 100 A.

The following oscillograms were made at resistive load.The switch voltage uCE4 and switch current iC1 in the

leading leg of the converter are shown in Fig. 6. The switch(transistor T4 including diode D4) is turned on under ZVS.Because of the leg symmetry, the transistor T1 works under thesame operating conditions.

The turnoff loss is reduced by capacitors C1 and C4 actingas the nondissipative turnoff snubbers, as it is evident in detailat the turnoff process in Fig. 7.

Fig. 8 shows the switch voltage uCE3 and switch current iC3

during turn-on and turnoff of the transistor T3 in the laggingleg of the converter. The transistor T3 is turned off under zerocurrent, as can be seen in the oscillogram.

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Fig. 7. Collector–emitter voltage vCE4 and collector current iC4 of thetransistor T4 in the leading leg—turnoff detail. iC4: 5 A/div.

Fig. 8. Switch voltage uCE3 and switch current iC3 of the transistor T3 inthe lagging leg; iC3: 10 A/div.

Fig. 9. Primary voltage up2 and primary current ip2 of the auxiliary trans-former TR2 at no load; ip2: 5 A/div.

The oscillogram also shows a significant decrease of theturn-on losses caused by the leakage inductance of the powertransformer. The leakage inductance in this case operates asa turn-on snubber, decreasing the rate of rise of the transistorcollector current in the lagging leg of the converter.

The primary voltage up2 and primary current ip2 of theauxiliary transformer TR2 at no load are shown in Fig. 9. Themaximum magnetizing current Im2,max is set to approximately4 A, and thus, the ZVS of transistors in the leading leg isensured independently on the load. This is confirmed by theoscillogram in Fig. 10, where the switch voltage uCE4 andswitch current iC4 of the transistor T4 in the leading leg atno load are shown. In terms of charging or discharging of thesnubber capacitors C1 and C4, respectively, no load is the worststate for the leading leg transistors. However, in this case, zero-voltage turnoff at no load is ensured by the proper design of themagnetizing current Im2 of the auxiliary transformer.

Fig. 10. Switch voltage uCE4 and switch current iC4 of the transistor T4 inthe leading leg at no load; iC4: 5 A/div.

Fig. 11. Primary current iP1 of TR1 and discharging current iCSdisch of theclamp capacitor CS ; iP1: 10 A/d; iCSdisch: 50 A/d.

Fig. 12. Rectified secondary voltage ud1 of the power transformer TR1 anddiode current iD5 of the output rectifier; iD5: 50 A/div.

Fig. 11 shows the primary current iP1 of TR1 and thedischarging current iCSdisch of the clamp capacitor CS at theoutput load current IO = 80 A.

The circulating current is reduced, and only a small mag-netizing current flows during the freewheeling interval throughthe primary winding of the power transformer TR1 as a resultof discharging current iCSdisch rise.

As it is evident from the discharging current waveform, amuch shorter time for the discharging current iCSdisch would besufficient for the achievement of circulating current limitationat these conditions.

Fig. 12 shows the rectified secondary voltage of the powertransformer TR1 and diode current iD5 of the output rectifier.The duty cycle of the rectified voltage ud1 is higher than that ofthe primary as a result of capacitor CS discharging during theconduction of power switch TS .

Clamp voltage uCS and discharging clamp current iTS areshown in Fig. 13. The average value of the clamp voltageis about 80 V, while the rectified secondary voltage is only

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2812 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 13. Clamp voltage uCS and discharging clamp current iTS ; iTS :50 A/div.

Fig. 14. Primary voltage uP1 and primary current iP1 at short circuit withexternal charging of the capacitor CS ; iP1: 20 A/div.

Fig. 15. Primary voltage uP1 and primary current iP1 at short circuit whenthe capacitor CS is not charged by TR2; iP1: 20 A/div.

50 V; see Fig. 12. The clamp voltage ripple depends on thevalue of the clamp capacitor CS and output current IO.

The primary voltage uP1 and primary current iP1 at shortcircuit with external charging of the capacitor CS are shownin Fig. 14. The circulating current is totally suppressed. Only asmall magnetizing current flows through the primary windingof the power transformer.

For comparison, the same waveforms at short circuit areshown in Fig. 15, when capacitor CS is not charged by theauxiliary transformer TR2. Therefore, the voltage of the clampcapacitor CS at short circuit in this case is not high enoughto fully suppress the circulating current. Consequently, theconduction and turnoff losses of the IGBTs would be increased.

The oscillogram in Fig. 16 illustrates the ZVS for the leadingleg transistors at short circuit (see also Figs. 6 and 7). The ZCSof the lagging leg switches at short-circuit documents Fig. 17.

The reduction of switching losses is evident from Figs. 6–8and the conduction losses from Figs. 8, 14, and 17. It resultsin an increased efficiency of the converter. The measured effi-

Fig. 16. Switch voltage uCE4 and switch current iC4 of the transistor T4 inthe leading leg at short circuit; iC4: 20 A/div.

Fig. 17. Switch voltage uCE3 and switch current iC3 of the transistor T4 inthe lagging leg at short circuit; iC4: 20 A/div.

Fig. 18. Efficiency of the converter.

ciency at full load was little over 93% (Fig. 18). This is rathera high value of efficiency for the converter with relatively lowoutput voltage and high output current.

V. DISCUSSION

The proposed converter seems to be very attractive for high-power applications, where short circuit and no load are thenormal states of the converter operation, e.g., arc welding.

At arc welding applications, the rating output voltage is quitelow; on the other hand, the output current is relatively high.

For reliable arc ignition, sufficiently high no-load outputvoltage (in comparison with arc voltage) is necessary to beensured. This is important particularly at arc welding of rust-resistant steel, which needs higher no-load voltage for properwelding process [4], [25].

This is possible to achieve by adjusting the output voltageof the auxiliary transformer to the required value. For thispurpose, the output voltage of the auxiliary transformer TR2

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can be substantially higher than the secondary voltage of thepower transformer TR1, for example, twice or more. Then, itis possible to choose higher turn’s ratio NP1/NS1 of the powertransformer and thus decrease both its primary current and size.Consequently, the current rating of the IGBTs in the invertercan be lower.

The leakage inductance of the power transformer should beas low as possible so that the rise and fall times (commutationtimes) of the clamp switch TS were kept short. Moreover, thehigher output voltage of the auxiliary transformer, to whichvalue charges the clamp capacitor, can help for this purpose.

The energy stored in the leakage inductance of the powertransformer is recovered to the load contrary to interestingsolution with auxiliary transformer in [10], where leakageinductance energy is returned back to the input source and, thus,circulating reactive energy in the converter is increased.

The duty cycle loss of the rectified voltage due to outputrectifier commutation is compensated by increasing the dutycycle to near unity, determined by the clamp switch TS turn-on time in interval tTS (Fig. 4). This duty cycle boost effect ofthe clamp can also help to improve the overall efficiency.

The certain disadvantage of this topology is the factthat voltage rating of the secondary switches must be in-creased simultaneously with an increase of the clamp capacitorvoltage UCS .

For lower switching frequencies (e.g., 20 kHz), the differencebetween the size of the power transformer TR1 and the auxil-iary transformer TR2 is quite big. However, if the switchingfrequency rises, the difference is reduced. It is necessary tofind the optimum between the sizes of the power and auxiliarytransformers in each application. Of course, both transformerscontribute to the output power.

The commutation time between rectifying diodes D5 andD6 and clamp switch TS depends on the value of the leakageinductance LL1 of the power transformer TR1.

The shorter is the commutation time, the smaller is theauxiliary transformer TR2.

The better situation is at converters with higher output volt-age and, thus, lower output current. The auxiliary circuits andclamp can be much smaller.

VI. CONCLUSION

Using the combination of the energy recovery clamp andsimple auxiliary circuits, promising results have been obtainedfor a full range of the load current from no load to short circuitin the proposed high-frequency PS-PWM full-bridge converterwith ZVZCS. All power switches operate under ZVS or ZCS,and only nondissipative components and auxiliary circuits areutilized in the converter. Soft switching and reduction of circu-lating currents in the proposed converter have been achieved forfull-load range.

The main new features of the proposed converter consist inthe following:

1) suppression of the circulating current also in short circuit,which is advantageous in dc current source applications;

2) independent charging of the clamp capacitor to the de-sired value;

3) simple facility to increase no-load output voltage, e.g., forarc welding applications;

4) possibility to decrease the primary current and size of thepower transformer for arc welding (or similar) purposes;

5) independent charging and discharging of the capacitors inthe leading leg. Therefore, switch voltage sensing is notnecessary.

ACKNOWLEDGMENT

The authors would like to thank the R&D Operational Pro-gram Center of Excellence of Power Electronics Systems andMaterials for their components.

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Jaroslav Dudrik (M’08) received the M.S. andPh.D. degrees in electrical engineering from theTechnical University of Košice, Košice, SlovakRepublic, in 1976 and 1987, respectively.

He is currently a Full Professor of electricalengineering with the Department of Electrical,Mechatronic and Industrial Engineering, Faculty ofElectrical Engineering and Informatics, TechnicalUniversity of Košice, where he is engaged in teach-ing and research. His primary interest is powerelectronics. His fields of research include dc-to-dc

converters, high-power soft-switching converters, converters for renewableenergy sources, and control theory of converters.

Nistor-Daniel Trip (M’05) received the M.S. degreein applied electronics from the Technical Universityof Cluj-Napoca, Cluj-Napoca, Romania, in 1993 andthe Ph.D. degree in electronics and telecommunica-tions engineering from the University “Politehnica”of Timisoara, Timisoara, Romania, in 2004.

Since 1993, he has been with the Department ofElectronics, University of Oradea, Oradea, Romania,where he is currently a Professor, teaching and do-ing research activities. His research interests includeindustrial and power electronics, dc-to-dc hard- and

soft-switching converters, as well as applications with microcontrollers anddigital signal processors.