4,096 (＝2 )

±4 LSB1,000,000 rad/sec

1.5 ms 　　　　　 (180°　　　　 )±0.2°(max) / 10,000 rpm

±45° ＋ Ａ,Ｂ,Ｚ＋＋5Ｖ±10％（60 mA max.）

ー40℃　～　＋125℃

R

AU6803 AU6804

7mm□

9.5 mArms,10 kHz

12

2

240,000 rpm 180,000rpm

□9.0±0.2

□7.0±0.1

36 25

37 24

13(0.22)

12

0.13 M

1

48

0.5

BA

S

0.5±

0.2

0.1 S

(8.0

)

1.5+0.2－0.1

FeaturesCompact size, Light weight, Low costPackage area :1/2 (compared to AU6802N1)Advanced failure check functionsEnhanced error detection functions(Square sum, Wire cut, PLL unlock, Over-temp)BIST Built-ln Self Test functionsExcitation Amp (currency controlled) incorporatedAll-in-one concept to reduce total system costCan handle Sine/Cosine DC resolver signals

Applications1.Velocity/Position controls in Automobiles, Trains, and Vehicles2.Feedback controls in industrial robots and machines

Outline

Overview

New

SpecificationsItemsResolutionMax Angular velocityConversion AccuracyMax Angular AccelerationSettling TimeResponsibilityAllowable Phase ShiftOutput SignalsPower supply voltageResolver Excitation Power SupplyOutline DimensionsOperating Temperature

Values

(CLK 10MHz)

(typical) step input

12 bit Binary True Logic Parallel Serial I/F

(Current-controlled excitation amplifier incorporated)Pin pitch : 0.5mm

AU6803 is delivered after burn-in, while AU6804 without burn-in. Both function the same way except the burn-in process.

(for automobiles) (for general use)

Angular Signal Converter IC●Resolver Signal → Digital Signal

Newly developed R/D conversion method " Twin-PLL" Compact, and Low CostHigh speed 12 bit R/D (resolver to digital) conversion IC

This is a 12 bit analog to digital conversion IC, which takes insignal from resolvers, the high-reliability absolute angularsensor, and outputs real-time 12 bit position data.The newly developed signal processing technology enhancesrange of applications with its high performance and usabilityin a cost-competitive way.

(CLK 10MHz)

48 pin LQFP (7×7×1.5t),

VCC LFUI LFUO LFLI LFLO VELP VELN VDD

D11D10D9D8D7D6D5D4D3D2D1D0PRTYCSBINHB(RD)

ABZ

SSCSSSDTSCKSCSBDATA

VCO

PSG

VCO

PSG

BISTVLD ERRSTB ERR ERRHLD DGND

Self-diagnosis(Built-In Selftest)

AGND CLKIN

RGND

VRR

R1R2

S2

S4

S2S4

S1

S3

S1S3

COSMNT Buf

BufSINMNT

(sinθ・sinωt)

(cosθ・sinωt)

No

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

LFUO

VELN

VELP

VCC

SINMNT

COSMNT

AGND

S3

S1

S2

S4

RGND

R2

VRR

R1

BISTVLD

A/O

A/O

A/O

ー

A/O

A/O

ー

A/I

A/I

A/I

A/I

ー

A/O

ー

A/O

D/I

No

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

CLKIN

SSDT

SSCS

DATA

SCSB

PRTY

SCK

DGND

D11

D10

D9

D8

D7

D6

D5

D4

D/I

D/I

D/I

D/O(BUS)

D/I

D/O(BUS)

D/I

ー

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

No

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

D3

D2

D1

D0

VDD

INHB(RD)

ERRHLD

ERRSTB

ERR

A

B

Z

CSB

LFLO

LFLI

LFUI

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

ー

D/I

D/O(I)

D/I

D/O(I)

D/O

D/O

D/O(I)

D/I

A/O

A/I

A/I

Functional Block Diagram

SINE WAVE

GENERATOROscillator Failure

DetectionSerial I/F

Registers

COUNTER

COUNTER

Analog Signal Processing I/O

INTERFACE

Pin Description

LPF output(U)

Velocity output

Velocity output

Analog PS

SIN monitor

COS monitor

Analog GND

S3 input

S1 input

S2 input

S4 input

Exciting amplifier GND

Exciting output R2

Exciting amplifier PS

Exciting output R1

BISIT operation control

Clock input

Serial setting data

Serial setting CS

Serial data

Serial CSB

Parity / Test output

Serial clock

Digital GND

ERRCD3/ 1

ERRCD2/ 2

ERRCD1/ 3

ERRHLD/ 4

ERR/ 5

－/　6

Phase-W/φ7

Phase-V/φ8

Phase-U/φ9

Phase-Z/φ10

Phase-B/φ11

Phase-A/φ12

Digital PS

Inhibit

Error(Hold)

Error reset

Error output

Pulse output of phase A

Pulse output of phase B

Z/Test output

Chip selection

LPF output (L)

LPF input (L)

LPF input (U)

Notes : 1. "No." in corresponding to the terminal pin number. 2. The classification of signals is as follows. ・A/I : Analog input ・A/O : Analog output ・D/I : Digital input ・D/O : Digital output ・D/O ( I ) : Digital output (Adding the input internally) ・D/O (BUS) : Digital output (3-state output)

T12-1660.1,000. 2008.12

Specifications are subject to change without notice.

Name ofsignals

φ

φ

φ

φ

φ

φ

08.12,

HEAD OFFICE :1879 Oyasumi, Iida-City, Nagano-Pref, 395-8515 JAPANPHONE : ＋81-265-21-1800FAX : ＋81-265-21-1861

TAMAGAWA TRADING CO.,LTD.A COMPANY OF TAMAGAWA SEIKI CO.,LTD.

URL http: //www.tamagawa-seiki.co.jp

WARRANTYTamagawa Seiki warrants that this product is free from defects in material orworkmanship under normal use and service for a period of one year from the date of shipment from the factory.This warranty, however, excludes incidental andconsequential damages caused by careless use of the product by the user. Even after the warranty period, Tamagawa Seiki offers repair service, with charge, in order to maintain the quality of the product. The MTBF(mean time between failures)of ourproduct is quite long;yet,the predictable failure rate is not zero. The user is advised,therefore,that multiple safety means be incorporated in your system or product so as to prevent any consequential troubles resulting from the failure of our product.

IS

O９００１

IS

O

００１４１

Certificatee

Certificate on Head office

TOKYO OFFICE :3-19-9 Shinkamata, Ohta-Ku, Tokyo 144-0054, JAPANPHONE : ＋81-3-3731-2131FAX : ＋81-3-3738-3134

SALES OFFICE :1-595-1 Haba-Cho, Iida City, Nagano-Pref, 395-0063 JAPANPHONE : ＋81-265-56-5423FAX : ＋81-265-56-5427

Digital Signal Processing

Classifi-cation Remarks Name of

signalsClassifi-cation Remarks Name of

signalsClassifi-cation

Remarks

4,096 (＝2 )

±4 LSB1,000,000 rad/sec

1.5 ms 　　　　　 (180°　　　　 )±0.2°(max) / 10,000 rpm

±45° ＋ Ａ,Ｂ,Ｚ＋＋5Ｖ±10％（60 mA max.）

ー40℃　～　＋125℃

R

AU6803 AU6804

7mm□

9.5 mArms,10 kHz

12

2

240,000 rpm 180,000rpm

□9.0±0.2

□7.0±0.1

36 25

37 24

13(0.22)

12

0.13 M

1

48

0.5

BA

S

5.0±

0.2

0.1 S

(8.0

)

1.5+0.2－0.1

FeaturesCompact size, Light weight, Low costPackage area :1/2 (compared to AU6802N1)Advanced failure check functionsEnhanced error detection functions(Square sum, Wire cut, PLL unlock, Over-temp)BIST Built-ln Self Test functionsExcitation Amp (currency controlled) incorporatedAll-in-one concept to reduce total system costCan handle Sine/Cosine DC resolver signals

Applications1.Velocity/Position controls in Automobiles, Trains, and Vehicles2.Feedback controls in industrial robots and machines

Outline

Overview

New

SpecificationsItemsResolutionMax Angular velocityConversion AccuracyMax Angular AccelerationSettling TimeResponsibilityAllowable Phase ShiftOutput SignalsPower supply voltageResolver Excitation Power SupplyOutline DimensionsOperating Temperature

Values

(CLK 10MHz)

(typical) step input

12 bit Binary True Logic Parallel Serial I/F

(Current-controlled excitation amplifier incorporated)Pin pitch : 0.5mm

AU6803 is delivered after burn-in, while AU6804 without burn-in. Both function the same way except the burn-in process.

(for automobiles) (for general use)

Angular Signal Converter IC●Resolver Signal → Digital Signal

Newly developed R/D conversion method " Twin-PLL" Compact, and Low CostHigh speed 12 bit R/D (resolver to digital) conversion IC

This is a 12 bit analog to digital conversion IC, which takes insignal from resolvers, the high-reliability absolute angularsensor, and outputs real-time 12 bit position data.The newly developed signal processing technology enhancesrange of applications with its high performance and usabilityin a cost-competitive way.

(CLK 10MHz)

48 pin LQFP (7×7×1.5t),

VCC LFUI LFUO LFLI LFLO VELP VELN VDD

D11D10D9D8D7D6D5D4D3D2D1D0PRTYCSBINHB(RD)

ABZ

SSCSSSDTSCKSCSBDATA

VCO

PSG

VCO

PSG

BISTVLD ERRSTB ERR ERRHLD DGND

Self-diagnosis(Built-In Selftest)

AGND CLKIN

RGND

VRR

R1R2

S2

S4

S2S4

S1

S3

S1S3

COSMNT Buf

BufSINMNT

(sinθ・sinωt)

(cosθ・sinωt)

No

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

LFUO

VELN

VELP

VCC

SINMNT

COSMNT

AGND

S3

S1

S2

S4

RGND

R2

VRR

R1

BISTVLD

A/O

A/O

A/O

ー

A/O

A/O

ー

A/I

A/I

A/I

A/I

ー

A/O

ー

A/O

D/I

No

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

CLKIN

SSDT

SSCS

DATA

SCSB

PRTY

SCK

DGND

D11

D10

D9

D8

D7

D6

D5

D4

D/I

D/I

D/I

D/O(BUS)

D/I

D/O(BUS)

D/I

ー

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

No

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

D3

D2

D1

D0

VDD

INHB(RD)

ERRHLD

ERRSTB

ERR

A

B

Z

CSB

LFLO

LFLI

LFUI

D/O(BUS)

D/O(BUS)

D/O(BUS)

D/O(BUS)

ー

D/I

D/O(I)

D/I

D/O(I)

D/O

D/O

D/O(I)

D/I

A/O

A/I

A/I

Functional Block Diagram

SINE WAVE

GENERATOROscillator Failure

DetectionSerial I/F

Registers

COUNTER

COUNTER

Analog Signal Processing I/O

INTERFACE

Pin Description

LPF output(U)

Velocity output

Velocity output

Analog PS

SIN monitor

COS monitor

Analog GND

S3 input

S1 input

S2 input

S4 input

Exciting amplifier GND

Exciting output R2

Exciting amplifier PS

Exciting output R1

BISIT operation control

Clock input

Serial setting data

Serial setting CS

Serial data

Serial CSB

Parity / Test output

Serial clock

Digital GND

ERRCD3/ 1

ERRCD2/ 2

ERRCD1/ 3

ERRHLD/ 4

ERR/ 5

－/　6

Phase-W/φ7

Phase-V/φ8

Phase-U/φ9

Phase-Z/φ10

Phase-B/φ11

Phase-A/φ12

Digital PS

Inhibit

Error(Hold)

Error reset

Error output

Pulse output of phase A

Pulse output of phase B

Z/Test output

Chip selection

LPF output (L)

LPF input (L)

LPF input (U)

Notes : 1. "No." in corresponding to the terminal pin number. 2. The classification of signals is as follows. ・A/I : Analog input ・A/O : Analog output ・D/I : Digital input ・D/O : Digital output ・D/O ( I ) : Digital output (Adding the input internally) ・D/O (BUS) : Digital output (3-state output)

T12-1660.1,000. 2008.12

Specifications are subject to change without notice.

Name ofsignals

φ

φ

φ

φ

φ

φ

08.12,

HEAD OFFICE :1879 Oyasumi, Iida-City, Nagano-Pref, 395-8515 JAPANPHONE : ＋81-265-21-1800FAX : ＋81-265-21-1861

TAMAGAWA TRADING CO.,LTD.A COMPANY OF TAMAGAWA SEIKI CO.,LTD.

URL http: //www.tamagawa-seiki.co.jp

WARRANTYTamagawa Seiki warrants that this product is free from defects in material orworkmanship under normal use and service for a period of one year from the date of shipment from the factory.This warranty, however, excludes incidental andconsequential damages caused by careless use of the product by the user. Even after the warranty period, Tamagawa Seiki offers repair service, with charge, in order to maintain the quality of the product. The MTBF(mean time between failures)of ourproduct is quite long;yet,the predictable failure rate is not zero. The user is advised,therefore,that multiple safety means be incorporated in your system or product so as to prevent any consequential troubles resulting from the failure of our product.

IS

O９００１

IS

O

００１４１

Certificatee

Certificate on Head office

TOKYO OFFICE :3-19-9 Shinkamata, Ohta-Ku, Tokyo 144-0054, JAPANPHONE : ＋81-3-3731-2131FAX : ＋81-3-3738-3134

SALES OFFICE :1-595-1 Haba-Cho, Iida City, Nagano-Pref, 395-0063 JAPANPHONE : ＋81-265-56-5423FAX : ＋81-265-56-5427

Digital Signal Processing

Classifi-cation Remarks Name of

signalsClassifi-cation Remarks Name of

signalsClassifi-cation

Remarks