FROM ANALOG TO DIGITAL DOMAIN

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FROM ANALOG TO DIGITAL DOMAIN Dr.M.A.Kashem Asst. Professor, CSE,DUET

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FROM ANALOG TO DIGITAL DOMAIN. Dr.M.A.Kashem Asst. Professor, CSE,DUET. TOPICS. 1.Analog vs. digital: why, what & how 2.Digital system example 3.Sampling & aliasing 4.ADCs: performance & choice 5.Digital data formats. Analog. Digital. - PowerPoint PPT Presentation

Transcript of FROM ANALOG TO DIGITAL DOMAIN

Page 1: FROM ANALOG  TO DIGITAL DOMAIN

FROM ANALOG TO DIGITAL DOMAIN

Dr.M.A.KashemAsst. Professor, CSE,DUET

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TOPICSTOPICS

1. Analog vs. digital: why, what & how

2. Digital system example

3. Sampling & aliasing

4. ADCs: performance & choice

5. Digital data formats

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Analog & digital signalsAnalog & digital signals

Continuous functionContinuous function V of continuouscontinuous variable t (time, space etc) : V(t).

Analog

Discrete functionDiscrete function Vk of

discretediscrete sampling variable tk,

with k = integer: Vk = V(tk).

Digital

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Uniform (periodic) sampling. Sampling frequency fS = 1/ tS

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Digital vs analog proc’ingDigital vs analog proc’ing

Digital Signal Processing (DSPing)

• More flexible.

• Often easier system upgrade.

• Data easily stored.

• Better control over accuracy requirements.

• Reproducibility.

AdvantagesAdvantages

• A/D & signal processors speed: wide-band signals still difficult to treat (real-time systems).

• Finite word-length effect.

• Obsolescence (analog electronics has it, too!).

LimitationsLimitations

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DSPing: aim & toolsDSPing: aim & tools

Software• Programming languages: Pascal, C / C++ ...

• “High level” languages: Matlab, Mathcad, Mathematica…

• Dedicated tools (ex: filter design s/w packages).

Applications• Predicting a system’s output.

• Implementing a certain processing task.

• Studying a certain signal.

• General purpose processors (GPP), -controllers.

• Digital Signal Processors (DSP).

• Programmable logic ( PLD, FPGA ).

Hardware real-time real-time DSPingDSPing

FastFast

FasterFaster

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Digital system exampleDigital system example

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Sometimes steps missing

- Filter + A/D

(ex: economics);

- D/A + filter

(ex: digital output wanted).

General scheme

Topics of Topics of this lecture.this lecture.

Digital Processing

Filter

Antialiasing

A/D

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Digital system implementationDigital system implementation

• Sampling rate.

• Pass / stop bands.

KEY DECISION POINTS:KEY DECISION POINTS:Analysis bandwidth, Dynamic

range

• No. of bits. Parameters.

1

2

3Digital

Processing

A/D

Antialiasing Filter

ANALOG INPUTANALOG INPUT

DIGITAL DIGITAL OUTPUTOUTPUT

• Digital format.

What to use for processing? See slide “DSPing aim & tools”

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SamplingSamplingHow fast must we sample a continuous signal to preserve its info content?

Ex: train wheels in a movie.

25 frames (=samples) per second.

Frequency misidentification due to low sampling frequency.

Train starts wheels ‘go’ clockwise.

Train accelerates wheels ‘go’ counter-clockwise.

1

Why?Why?

* Sampling: independent variable (ex: time) continuous discrete.

Quantisation: dependent variable (ex: voltage) continuous discrete.

Here we’ll talk about uniform sampling.

**

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Sampling - 2Sampling - 2

__ s(t) = sin(2f0t)

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f0 = 1 Hz, fS = 3 Hz

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sk (t) = sin( 2 (f0 + k fS) t ) , k s(t) @ fS represents exactly all sine-waves sk(t) defined by:

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The sampling theoremThe sampling theorem

A signal s(t) with maximum frequency fMAX can be recovered if sampled at frequency fS > 2 fMAX .

Condition on fS?

fS > 300 Hz

t)cos(100πt)πsin(30010t)πcos(503s(t)

F1=25 Hz, F2 = 150 Hz, F3 = 50 Hz

F1 F2 F3

fMAX

Example

1

Theo*

* Multiple proposers: Whittaker(s), Nyquist, Shannon, Kotel’nikov.

Nyquist frequency (rate) fN = 2 fMAX or fMAX or fS,MIN or fS,MIN/2Naming getsconfusing !

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Frequency domain (hints) Frequency domain (hints)

Time & frequencyTime & frequency: two complementary signal descriptions. Signals seen as “projected’ onto time or frequency domains.

Warning: formal description makes use of “negative” frequencies !

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BandwidthBandwidth: indicates rate of change of a signal. High bandwidth signal changes fast.

EarEar + brain act as frequency analyser: audio spectrum split into many narrow bands low-power sounds detected out of loud background.

Example

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Sampling low-pass signals Sampling low-pass signals

-B 0 B f

Continuous spectrum (a) Band-limited signal:

frequencies in [-B, B] (fMAX = B).(a)

-B 0 B fS/2 f

Discrete spectrum No aliasing (b) Time sampling frequency

repetition.

fS > 2 B no aliasing.

(b)

1

0 fS/2 f

Discrete spectrum Aliasing & corruption (c)

(c) fS 2 B aliasing !aliasing !

Aliasing: signal Aliasing: signal ambiguity in frequency ambiguity in frequency domaindomain

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Antialiasing filterAntialiasing filter

-B 0 B f

Signal of interest

Out of band noise Out of band

noise

-B 0 B fS/2 f

(a),(b) Out-of-band noise can

aliase into band of interest. Filter it Filter it

before!before!

(a)

(b)

-B 0 B f

Antialiasing fi lter Passband

f requency

(c)

Passband: depends on bandwidth of interest.

Attenuation AMIN : depends on

• ADC resolution ( number of bits N).

AMIN, dB ~ 6.02 N + 1.76

• Out-of-band noise magnitude.

Other parameters: ripple, stopband frequency...

(c) Antialiasing Antialiasing filterfilter

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Under-sampling (hints) Under-sampling (hints)1

Using spectral replications to reduce Using spectral replications to reduce sampling frequency fsampling frequency fSS req’ments. req’ments.

m

BCf2Sf1m

BCf2

m , selected so that fS > 2B

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0 fC

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Bandpass signal centered on f C

-fS 0 fS 2fS f fC

AdvantagesAdvantages

Slower ADCs / electronics Slower ADCs / electronics needed.needed.

Simpler antialiasing filters.Simpler antialiasing filters.

fC = 20 MHz, B = 5MHz

Without under-sampling fS > 40 MHz.

With under-sampling fS = 22.5 MHz (m=1);

= 17.5 MHz (m=2); = 11.66 MHz (m=3).

ExamplExamplee

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Over-sampling (hints)Over-sampling (hints)1

fOS = over-sampling frequency,

w = additional bits required. fOS = 4w · fS

Each additional bit implies over-sampling by a factor of four. Each additional bit implies over-sampling by a factor of four.

It works for:

- white noisewhite noise with amplitude sufficient to change the input signal randomly from sample to sample by at least LSB.

- Input that can take all values between two ADC bits.

Caveat

Oversampling : sampling at frequencies fS >> 2 fMAX .

Over-sampling & averaging may improve ADC resolution

( i.e. SNR, see )2

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(Some) ADC parameters (Some) ADC parameters

1. Number of bits N (~resolution)

2. Data throughput (~speed)

3. Signal-to-noise ratio (SNR)

4. Signal-to-noise-&-distortion rate (SINAD)

5. Effective Number of Bits (ENOB)

6. Spurious-free dynamic range (SFDR)

7. Integral non-linearity (INL)

8. Differential non-linearity (DNL)

9. …

NB: Definitions may be slightly manufacturer-dependent!NB: Definitions may be slightly manufacturer-dependent!

Different Different applications have applications have different needs.different needs.

2

Static distortionStatic distortion

Dynamic distortionDynamic distortion

Imaging / video

Communication

Radar systems

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ADC - Number of bits NADC - Number of bits NContinuous input signal digitized into 2N levels.

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Uniform, bipolar transfer function Uniform, bipolar transfer function (N=3)(N=3)

Quantisation stepQuantisation step q =V FSR

2N

Ex: VFSR = 1V , N = 12 q = 244.1 V

LSBLSB

Voltage ( = q)

Scale factor (= 1 / 2N )

Percentage (= 100 / 2N )

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Quantisation errorQuantisation error

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ADC - Quantisation errorADC - Quantisation error2

Quantisation Error eq in

[-0.5 q, +0.5 q].

eq limits ability to resolve small signal.

Higher resolution means lower eq.

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SNR of ideal ADCSNR of ideal ADC2

)qRMS(e

inputRMS10log20idealSNR (1)

Also called SQNR

(signal-to-quantisation-noise ratio)

Ideal ADC: only quantisation error eeqq

(p(e)p(e) constant, no stuck bits…)

eeqq uncorrelated with signal.

ADC performance constant in time.

AssumptionsAssumptions

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FSRVT

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ωtsin2

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1inputRMS

Input(t) = ½ VInput(t) = ½ VFSRFSR sin( sin( t). t).

12N2

FSRV

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q/2-qdeqep2

qe)qRMS(e

eeqq

Error value

pp((ee)) quantisation error probability density

1 q

q 2

q 2

(sampling frequency fS = 2 fMAX)

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SNR of ideal ADC - 2 SNR of ideal ADC - 2

[dB]1.76N6.02SNRideal (2)Substituting in (1) :

One additional bit SNR increased by 6 dBOne additional bit SNR increased by 6 dB

2

Actually (2) needs correction factor depending on ratio between sampling freq

& Nyquist freq. Processing gain due to oversampling.

- Real signals have noise.

- Forcing input to full scale unwise.

- Real ADCs have additional noise (aperture jitter, non-linearities etc).

Real SNR lower Real SNR lower because:because:

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Real ADCs: parametersReal ADCs: parameters

SNRSNR:: (sine_in RMS)/(ADC out_noise RMS), with

out_noise = output - (DC + first 5 input harmonics) output components.

SINADSINAD:: (sine_in RMS)/(ADC out_noise_2 RMS), with

out_noise_2 = output - (DC output component).

12-bit ADC chip, 68 dB SINAD in specs ~ 11-bit ideal ADC.

Example

2

ENOBENOB : : N from (2) when setting SNR ideal = SINAD,

i.e. ENOB = (SINAD – 1.76 dB) / 6.02. Actual number of bit available to an equivalent ideal ADC

SNRSNR and SINADSINAD often confused in specs.

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ADC selection dilemmaADC selection dilemmaSpeed & resolution:Speed & resolution:

a tradeoff.a tradeoff.

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High resolution (bit #)

- Higher cost & dissipation.

- Tailored onto DSP word width.

High speed

- Large amount of data to store/analyse.

- Lower accuracy & input impedance.

**

** DIFFICULTDIFFICULT area moves down &

right every year. Rule of thumb: 1 bit improvement every 3 years.

may increase SNR.

2Oversampling & averagingOversampling & averaging (see ).

DitheringDithering ( = adding small random noise before quantisation).

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Digital data formatsDigital data formats

Important bases: 10 (decimal)10 (decimal), 2 (binary)2 (binary), 8 (octal), 16 (hexadecimal).

Positional number system with basePositional number system with base b:

[ .. a2 a1 a0 . a-1 a-2 .. ]b = .. + a2 b 2 + a1 b 1 + a0 b 0 + a-1 b -1 + a-2 b -2+ ..

Integer part

Fractional part

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Early computers (ex: ENIAC) mainly base-10 machines. Mostly turned binary in the ’50s.

a) less complex arithmetic h/w;

BenefitsBenefits b) less storage space needed;

c) simpler error analysis.

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Decimal arithmeticDecimal arithmetic

BUBUTT

Increasing number of applications requires decimal

arithmetic. Ex: Banking, Financial Analysis.

IEEE 754,1985: binary floating point arithmetic standard specified

IEEE 854,1987: standard expanded to include decimal arithmetic.

• Common decimal fractional numbers only approximated by binary numbers. Ex: 0.1 infinite recurring binary fraction.

• Non-integer decimal arithmetic software emulation available butbut often too slow.

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Fixed-point binaryFixed-point binaryRepresent integer or

fractional binary numbers.

NB: Constant gap between numbers.Binary Binary

representationrepresentation

Fractional point (DSPs)

15 14 ... 0

MSB LSB

Sign bit

-4 100-3 111-3 0000 000

-3 101-2 110-2 0011 001

-2 110-1 101-1 0102 010

-1 111 0 100 0 0113 011

0 000 0 000 1 1004 100

1 001 1 001 2 1015 101

2 010 2 010 3 1106 110

3 011 3 011 4 1117 111

Two’s complement

Sign-Magnitude

Offset-Binary

Unsigned integer

Ex: 3-bit formats

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Decimal equivalentDecimal equivalent

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Floating-point binaryFloating-point binary

Formats & methods for binary floating-point arithmetic.

IEEE 754 standard

Definition of IEEE 754 standard between 1977 and 1985. De facto standard before 1985 !

Note: NOTNOT the easiest h/w choice!

Wide variety of floating point hardware in ‘60s and ‘70s,

different ranges, precision and rounded arithmetic.

William Kahan: “Reliable portable software was becoming more expensive to develop than anyone but AT&T and the Pentagon could afford”.

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PROBLE

M

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Floating-point binary - 2 Floating-point binary - 2IEEE 754 standard

NB: Variable gap between numbers. Large numbers large gaps; small numbers

small gaps.

31 30 23 22 0

fes

MSB LSB

e = exponent, offset binary, -126 < e < 127

s = sign, 0 = pos, 1 = neg

f = fractional part, sign-magnitude + hidden bit

Single (32 bits)

Double (64 bits)

Double-extended ( 80 bits)

Precision

Coded number x = (-1)s · 2e · 1.fSingle precision range

Max = 3.4 · 1038

Min = 1.175 · 10-38

3

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Finite word-length effects Finite word-length effects

Dynamic rangeDynamic rangedBdB = 20 log10

largest valuesmallest value

Fixed point ~ 180 dB

Floating point ~1500 dB

High dynamic range wide data set representation with no overflow.

NB: Different applications have different needs. Ex: telecomms: 50 dB; HiFi audio: 90 dB.

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OverflowOverflow : arises when arithmetic operation result has one too

many bits to be represented in a certain format.

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Finite word-length effects - 2 Finite word-length effects - 2

Round-off error estimate:Round-off error estimate:

Relative errorRelative error = (floating - actual value)/actual value (depends on base).

The smaller the base, the tighter the error estimate.

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• For integersFor integers within ±16.8 million range: single-precision floating point gives no round-off error.

• OutsideOutside that range, integers are missing: gaps between consecutive floating point numbers are larger than integers.

Round-offRound-off: error caused by rounding math calculation result to nearest quantisation level.

Big concern forBig concern for

real numbersreal numbers.0.1 not exactly represented (falls 0.1 not exactly represented (falls

between two floating point numbers).between two floating point numbers).

Example

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ReferencesReferences

1. On bandwidth, David Slepian, IEEE Proceedings, Vol. 64, No 3, pp 291 - 300.

2. The Shannon sampling theorem - Its various extensions and applications: a tutorial review, A. J. Jerri, IEEE Proceedings, Vol. 65, no 11, pp 1565 – 1598.

3. What every computer scientist should know about floating-point arithmetic, David Goldberg.

4. IEEE Standard for radix-independent floating-point arithmetic, ANSI/IEEE Std 854-1987.

PapersPapers

1.Understanding digital signal processing, R. G. Lyons, Addison-Wesley Publishing, 1996.

2.The scientist and engineer’s guide to digital signal processing, S. W. Smith, at http://www.dspguide.com.

3.Discrete-time signal processing, A. V. Oppeheim & R. W. Schafer, Prentice Hall, 1999.

BooksBooks

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COFFEE BREAKCOFFEE BREAK

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