FR30-RAM-Stack-Board Documentation · 2006-06-12 · d) The left 7-segment digit of the...

Documentation FR RAM Stack Board

FR30-RAM-Stack-BoardDocumentation

Part-Number: FR-RAM-STACK1-100P-M06

Fujitsu Mikroelektronik GmbHAm Siebenstein 6-10

63303 Dreieich-Buchschlag, Germany

Revision: 1.1Date: 30/7/99


Contents

Hardware description of FR30-Ram-Stack-Board ______________________________________ 3

Overview ____________________________________________________________________________ 3

Jumper settings _______________________________________________________________________ 3

Running the FR-RAM-Stack as normal ROMless device______________________________________ 4

Assembly drawing of FR30-Ram-Stack-Board ______________________________________________ 5

Schematics of FR30-Ram-Stack-Board ____________________________________________________ 6

PAL Equations________________________________________________________________________ 8

Testsoftware project ______________________________________________________________ 9

Software Installation ___________________________________________________________________ 9

Hardware Setup______________________________________________________________________ 10

Test Software for FR-RAM-Stack _______________________________________________________ 12


Hardware description of FR30-Ram-Stack-Board

Overview

The FR-RAM-STACK-Board is an essential part of the FR in-circuit emulator system. It fits into the100 pin QFP socket of the MB91101PF (FPT-100P-M06 package) which is designed into any targethardware. It carries the FR30 V-chip MB91V101, 1 Mbyte of SRAM for emulation purposes, acrystal clock source and the address decoding logic.

• FR-RAM-STACK-Board is used for ICE debugging• Offers 1 Mbyte of emulation memory• Selectable clock source• Part number is FR-RAM-STACK1-100P-M06

It enables everyone to make hardware debugging with the in-circuit-emulator even if there is no RAMmemory on the target system itself. Therefore the board offer 1 Mbyte of SRAM mapped on thebottom 1Mbyte of the complete address space. This memory can only be accessed via CS0.

MB91V101

QFP100 socketto target system

1Mbyte RAMPal

Connectorfor ICE

Figure 1: FR-RAM-Stack-Board

Jumper settings

FRx selection (JP3)For FR30 devices, e.g. MB91101, this jumper must be left open.

Reset source (JP7)Jumper JP7 decides, if the reset-signal RSTX of the V-chip is controlled from the emulator (default)or from the users target system.

RES J7

USR / EML

Figure 2: Reset source selection


RAM enable / disable (JP4-5)If the user does not want to use the memory of the RAM stack, it is possible to disable the RAMcompletely. However it is enabled by default.

RAMJP4

DIS / EN

JP5

Figure 3: RAM enable / disable

Clock source (JP1-2)The clock source for the V-chip can either come from the stack or from the target system below. Thisselection is done by setting JP1 and JP2 in the appropriate position (default = STK).

CLKJP1

STK / TGT

JP2

Figure 4: CLK source selection

HSTX (Hardware standby) (JP6, JP8)The user can force a hardware-standby reset (HSTX) very easily by shortening JP6 (HSTX) and JP8(GND).

CLK Testpin (TP10)To verify, if the MCU is operating at the desired clock frequency, the clock of the external businterface is put on this testpin.

Mode-PinsThe FR-RAM-Stack-Board sets the mode-pins of the MB91101 hard to MD0,1,2 = 100, whichcorresponds to external bus mode with 16bit width. The jumperfield LB1-3 on the bottom side of theupper FR-RAM-Stack-Board gives you the flexibility to modify these default connections.

Running the FR-RAM-Stack as normal ROMless device

You can also use the FR-RAM-Stack and the Starterkit without incircuit emulator. The V-chip thenbehaves as a normal romless device, as the MB91101.Therefore set the reset-jumper JP7 to USR (user reset) and disable the RAM with JP4 and JP5.Finally also disconnect the DSU connector CON3.


Assembly drawing of FR30-Ram-Stack-Board


Schematics of FR RAM Stack Board (lower board)


Schematics of FR RAM Stack Board (upper board)


PAL Equations

*IDENTIFICATION FRSTACK-Board Control Pal, Vers. 1.0

*COMMENT Controls CS0

*X-NAMES CS0X,A20,A21,A22,A23,A24;

*Y-NAMES CS_TS, !Chip select Target system CS_RAM; !Chip select Emulation RAM

*FUNCTION-TABLE$ (A[24..20]) , CS0X : CS_TS, CS_RAM; 00h , 1 : 1, 1; 00h , 0 : 1, 0; 01h..1Fh , 1 : 1, 1; 01h..1Fh , 0 : 0, 1; REST : 1, 1;

*BOOLEAN-EQUATES

*PALTYPE = GAL16V8;

*RUN LIST = EQUATIONS, PINOUT, FUSEPLOT, PLOT; PROG = JEDEC; TESTVECTORS = GENERATE;

*PINSCS0X = 7;A20 = 2;A21 = 3;A22 = 4;A23 = 5;A24 = 6;

CS_TS = 19;CS_RAM = 18;

*END


Testsoftware project

This chapter describes how to setup the FR-incircuit-emulator and how to run two software projectswith the FR-Starterkit plus the FR-Ram-Stack-Board. The following components are necessary inorder to continue with the next steps:

• FR-Ram-Stack-Board “FR-RAM-STACK1-100P-M06”

• FR-Starterkit

• Emulator main unit MB2197-01

• FR20/30 DSU Cable MB2197-10

• MB90V101

• Power-supply 7,5V DC, 400mA (not included)

• IBM PC with Windows 3.1x or higher

• Fujitsu’s Micros CD-ROM V3.1 or higher

Software Installation

If you haven´t installed SoftuneWorkbench for 32-Bit Microcontrollers on your PC yet, please installnow from the Micro-CD-ROM V3.1.

Now simply copy the provided software projects fromthe CD-drive:\StarterKit\ FR-Stack\Test-Projects\*.* onto your local harddisc.

Ram_STK1: Program to test the lower half megabyte of SRAMRam_STK2: Program to test the upper half megabyte of SRAM

To check, if your configuration is correct, start “Build” and make sure that no error messages are left.


Hardware Setup

This section shows how to setup the hardware of the FR-RAM-STACK-Board, the FR-Starterkit andthe FR-in-circuit emulator.

a) Open the QFP-100 Socket of the FR-Starterkit carefully using a screwdriver and remove theMB91101PF.

b) Place the lower board of the FR-RAM-Stack-Board onto the QFP100 socket of the FR-Starterkitand fix it in the right orientation using the provided screws, as it is shown below. The pin numbersare also indicated on the lower RAM-Stack-Board.

FR-RAM-Stack(lower Board)

DSUB9

Hea

der

JP6

Hea

der

JP5

F E

PIN 1

7 Segment display

FR-Starterkit

Figure 5: Stack orientation¢ NOTE : There are two different sockets types available. If you use the socket with the twocenter-screws, be sure to use the right screws (M2.5 total length=12mm). QFP-Sockets with thecorner-screws will need four M2 screws, total length=11mm (included in FR-RAM-STACK1-M06).

c) Insert the evaluation chip MBV91101 (BGA 135-pin type) in the socket of the upper FR-RAM-Stack and put it on top of the lower board.. After that, insert the upper part of the stack carefullyon top of the lower part, which is already fixed on the board.The target system is now prepared to be connected to the emulator debugging unit.¢ NOTE : If you intend to remove the Stack from the FR-Starterkit later on, DO NOT simplypull on the the upper FR-RAM-Stack, you might damage the QFP-socket on the FR-Starterkit.Use tools, e.g. screwdriver or pliers, to hold the lower FR-RAM-Stack down and to overcome theconnectors insertion force.

d) Main Unit : Connect the RS232-cable (DB25-sideÙMB2197-01; DB9ÙPC COM-port ) and thepower-cable (220V). For a LAN-connection (optional) refer to the manual.


Figure 6: Rear side of ICE

e) DSU (Debug Support Unit) : Insert the blue connecter towards the main unit and secure the clips.

Figure 7: DSU connector of ICE

f) Connect DSU to Target System : Open the DSU connector on both sides, insert the flat cable(gold contacts upwards) and close the connector tightly.

Figure 8: DSU connector

g) Turn on the Main Unit (MB2197-01), then power up the target system (be sure the AC-adapter isset to 7.5 V and + is on the shield Ù see manual of Starterkit_FR). After powering up the targetsystem, always press the blue “user” reset-button on the Starterkit to make sure the SRAMs areaccessable. On the Main Unit, “Power” and “Ready” should light up now.

h) If you start your FR emulator the first time you have to download the correct monitor into theemulator main unit by using “Monitor Loader” from the Windows-Start-menu. Select the“20DSU2.HEX”-monitor file and click on Start to download the file to the MB2197-01.


Test Software for FR-RAM-Stack

Two projects are provided with the FR-RAM-Stack-Board for test purposes, Ram_STK1 andRam_STK2.Ram_STK1 is testing the lower half of SRAM from 1´0000hex up to 7´FFFFhex, while the code itselfis executed from 8´0000hex upwards (CS0 area). Note that the first page of 64kBytes cannot beaccessed, because all the FR internal resources are located in that area.After that, Ram_STK2 can be executed from 6´0000hex (CS0 area) to test the upper half megabyte ofSRAM, located between 8´0000hex and F´FFFFhex.The next two figures gives you an overview:

RAM_STK1

0000 0000

0000 FFFF0001 0000

0007 FFFF0008 0000

000F FFFF Reset Vector

First 64kByte Page

TEST AREA0.5MB

0.5MB

Test program in CS0 area

RAM_STK2

0000 0000

0000 FFFF0001 0000

0007 FFFF0008 0000

000F FFFF Reset Vector

First 64kByte Page

TEST AREA

0.5MB

0.5MB

Test program in CS0 area 0006 0000

Figure 9: Memory mapping for RAM_STK1 and RAM_STK2 project

To do so,a) start SoftuneWorkbench and open the provided Ram_STK1 project (“Project” Ù “Open Project”)b) Select “Build” to recompile, assemble and link the project.c) Start the Emulator debugger software RUN the program.d) The left 7-segment digit of the FR-Starterkit counts up the tested and verified 64kByte pages.

Therefore the program should count up to “7” according to seven tested pages.e) After stopping execution you´ll find the program inside an endless loop in the RAM_STK1.c

module. Scroll some lines up and watch the variable error_cnt. The contents of this variableshould be “0”, which means every single byte could be written and read correctly.

f) Repeat step a) to e) with the project RAM_STK2. The number of tested pages, which aredisplayed on the LED is 8 this time.

FR30-RAM-Stack-Board Documentation · 2006-06-12 · d) The left 7-segment digit of the...

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