FPGA PLB Evaluation using FPGA PLB Evaluation using Quantified Boolean Quantified Boolean SatisfiabilitySatisfiability

FPGA PLB Evaluation using FPGA PLB Evaluation using Quantified Boolean Quantified Boolean SatisfiabilitySatisfiability

Andrew C. Ling M.A.Sc. CandidateAndrew C. Ling M.A.Sc. CandidateUniversity of TorontoUniversity of Toronto

Deshanand P. Singh Ph.D. Deshanand P. Singh Ph.D. Altera CorporationAltera Corporation

Professor Stephen D. Brown Professor Stephen D. Brown Altera Corporation Toronto Altera Corporation Toronto University of TorontoUniversity of Toronto

Background: FPGABackground: FPGA

Background: K-LUTBackground: K-LUT

Background: K-Input PLBBackground: K-Input PLB

The 3-input PLB below CANNOT implement The 3-input PLB below CANNOT implement any arbitrary any arbitrary 33-input function-input function

Background: K-Input PLB Background: K-Input PLB

MotivationMotivation

The cost of implementing a circuit in an The cost of implementing a circuit in an FPGA is directly proportional to the number FPGA is directly proportional to the number of PLBs required to implement the of PLBs required to implement the functionality of the circuit.functionality of the circuit.

Decreasing the number of PLBs may allow a Decreasing the number of PLBs may allow a circuit to be realized in a smaller FPGA.circuit to be realized in a smaller FPGA.

The PLB architecture has a significant The PLB architecture has a significant impact on the number of PLBs required to impact on the number of PLBs required to realize a particular circuit.realize a particular circuit.

PLB Evaluation in terms of AreaPLB Evaluation in terms of Area

Clever PLB designs are necessary to Clever PLB designs are necessary to capture the majority of the functions capture the majority of the functions encountered in typical circuits.encountered in typical circuits.

Extract set of Extract set of kk-Input functions from a large -Input functions from a large set of circuits.set of circuits.

Examine the percentage of functions that Examine the percentage of functions that map into the PLB structure.map into the PLB structure.

Function Mapping ProblemFunction Mapping Problem

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

QSAT QSAT ??

Defined over a set of variables, V

Background: The Propositional Satisfiability (SAT) problemBackground: The Propositional Satisfiability (SAT) problem

Given a formula, f :Given a formula, f :

))()(( cbacacba

C1 C2 C3

a=b=c=1

(a,b,c)

(C1,C2,C3) Comprised of a conjunction of clauses

Each clause is a disjunction of literals of the variables V

Example :Example :

SAT: Seek an assignment of to the variables, V, which SAT: Seek an assignment of to the variables, V, which sets the Boolean formula to ‘1’.sets the Boolean formula to ‘1’.

Defined over a set of variables, V

Background: The Quantified Satisfiability (QSAT) problemBackground: The Quantified Satisfiability (QSAT) problem

Given a formula, f :Given a formula, f :

))()(( cbacacba

C1 C2 C3

b=c=1

a = {0,1}

(a,b,c)

(C1,C2,C3) Comprised of a conjunction of clauses

Each clause is a disjunction of literals of the variables V

Example :Example :

QSAT: Seek an assignment of to the variables, V, QSAT: Seek an assignment of to the variables, V, which sets the which sets the quantifiedquantified Boolean formula (QBF) to ‘1’. Boolean formula (QBF) to ‘1’.

Quantifiers exist on variables VQuantifiers exist on variables V

AAEE

abc

Function Mapping ProblemFunction Mapping Problem

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

QSAT QSAT ??

Construction of CNFConstruction of CNF

T. Larrabee, “Test pattern generation using Boolean satisfiability," TCAD, 1992 (Plaisted's and Greenbaum's encoding which is based on Tseitin's work)

Creates a Characteristic Function for circuits

x1x2

g

xx11xx22gg ff

0000 00 11

0101 00 11

1010 00 11

1111 00 00

0000 11 00

0101 11 00

1010 11 00

1111 11 11

f=(x2+¬g) (x1+¬g) (¬x2+¬x1+g)

Construction of CNF (cont’d)Construction of CNF (cont’d)

x1x2 g

x3

z1

f AND= (x2+¬z1) (x1+¬z1) (¬x2+¬x1+ z1)

f f OROR= (= (¬¬xx33+g+g) () (¬¬zz11+g+g) () (xx33+z+z11+ + ¬¬gg))

f total= fAND ffOR OR

= (x2+¬z1) (x1+¬z1) (¬x2+¬x1+ z1) ( (¬¬xx33+g+g) () (¬¬zz11+g+g) () (xx33+z+z11+ + ¬¬gg))

Function Mapping ProblemFunction Mapping Problem

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

QSAT QSAT ??

Formulating Function Mapping ProblemFormulating Function Mapping Problem

Can function Can function ff be implemented in circuit be implemented in circuit gg ? ? Does there exist a configuration to Does there exist a configuration to gg such that for all inputs to such that for all inputs to gg, , ff is is

equivalent to equivalent to gg

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

??

Formulating Function Mapping ProblemFormulating Function Mapping Problem

Derive characteristic function Derive characteristic function HH for circuit for circuit gg Replace all instances of Replace all instances of g g in in HH with with ff

– HH[[gg//ff]] ((g g ≡≡ f f ))– ff is equivalent to is equivalent to gg

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

??

Formulating Function Mapping ProblemFormulating Function Mapping Problem

Does there exist a configuration to Does there exist a configuration to gg such that such that for all inputs to for all inputs to gg, , ff is equivalent to is equivalent to gg ? ?

((g g ≡≡ f f ))

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

??

Formulating Function Mapping ProblemFormulating Function Mapping Problem

Does there exist a configuration to Does there exist a configuration to gg such that such that for all inputs to for all inputs to gg, , ff is equivalent to is equivalent to gg ? ?

ll11…l…lmm xx11…x…xnn((g g ≡≡ f f ))

AAEE

xx11xx22xx33ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

??

Formulating Function Mapping ProblemFormulating Function Mapping Problem

Express as a QBF with inputs (Express as a QBF with inputs (xx11…x…xnn) and ) and configuration bits (configuration bits (ll11…l…lmm) )

ll11…l…lmm xx11…x…xnn ((g g ≡≡ f f ))

AAEExx11xx22xx33

ff

000000 00001001 00010010 11011011 00100100 11101101 11110110 11111111 11

QSAQSATT

Results: Evaluation of PLBsResults: Evaluation of PLBs

Given a circuit, extract 1000 Given a circuit, extract 1000 kk-input functions-input functions kk == number of inputs to PLB == number of inputs to PLB Determine number of functions that map into PLB using QSATDetermine number of functions that map into PLB using QSAT Find a fit percentageFind a fit percentage

Results: Evaluation of PLBsResults: Evaluation of PLBs

ConclusionsConclusions

Novell function mapping technique based on Novell function mapping technique based on QSAT.QSAT.

We can use this technique to evaluate PLB We can use this technique to evaluate PLB architectures based on area.architectures based on area.

Future WorkFuture Work

Speed up QSAT, use ALL-solution SAT solvers Speed up QSAT, use ALL-solution SAT solvers or better QBF solversor better QBF solvers

Cannot evaluate area efficiency without Cannot evaluate area efficiency without looking at routing architecturelooking at routing architecture

Use “Don’t Cares” when mapping functionsUse “Don’t Cares” when mapping functions Use genetic algorithms to create candidate Use genetic algorithms to create candidate

PLBs, then pipe architectures to our PLB PLBs, then pipe architectures to our PLB evaluator toolevaluator tool

Questions?Questions?