FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through...

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Copyright 2006 - Galt Design, Inc. Copyright 2006 - Galt Design, Inc. FPGA PID DC Motor FPGA PID DC Motor Controller Controller Galt Design, Inc. Galt Design, Inc.

Transcript of FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through...

Page 1: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

FPGA PID DC Motor FPGA PID DC Motor ControllerController

Galt Design, Inc.Galt Design, Inc.

Page 2: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

Short DescriptionShort Description

• PID control of DC Motor through PWM pulsing of H_BridgePID control of DC Motor through PWM pulsing of H_Bridge

• Takes input from Quadrature decoder for position informationTakes input from Quadrature decoder for position information

• PID, deadband, integrator_limit,PID, deadband, integrator_limit, ramping, timeout settings ramping, timeout settings availableavailable

• Available in both Verilog and VHDL HDL codeAvailable in both Verilog and VHDL HDL code

• Can be used in both FPGA and ASIC designsCan be used in both FPGA and ASIC designs

• DC Motor Timeout detector. Shuts down drive if motor jams.DC Motor Timeout detector. Shuts down drive if motor jams.

Page 3: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

PID Thermal controller FPGA

DC_motor H-Bridge

Quadrature

CPU interface

2

1PID DC Motor Controller

PID motor controller FPGA Example

Quadrature counter

Requested position, parameters

32

Done Interrupt

Page 4: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

PID Motor Control DiagramPID Motor Control Diagram

- Accumulator

Positive or Negative

PWM pulses to DC Motor

H-bridge

Error*

*

I term

P term

* D term

Derivative Gain

Register

Integral Gain Register

Proportional Gain

Register

Temperature Setpoint Register

Quadrature Encoder

Input

Page 5: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

Example FPGA Code OrganizationExample FPGA Code Organization

Quadrature_decoder.vQuadrature_decoder.v

Pid_controller.vPid_controller.v

Dc_motor_timeout.vDc_motor_timeout.v

dc_motor_control.vdc_motor_control.v

Page 6: FPGA PID DC Motor Controller Galt Design, Inc.. Short Description PID control of DC Motor through PWM pulsing of H_Bridge PID control of DC Motor through.

Copyright 2006 - Galt Design, Inc.Copyright 2006 - Galt Design, Inc.

Contact informationContact information

Contact us with questions or for a quote:Contact us with questions or for a quote:

[email protected]