FPGA Cryptocurrency Miner - UTDesign › wp-content › uploads › ... · Erik Jonsson School of...
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Background At its current rate, the Bitcoin network alone, according to some of the most recent estimates, uses over 70 terawatt hours (TWh) of electricity per year – that’s enough energy to power over 6 million houses in the U.S. [1]. Hundreds of cryptocurrencies like Bitcoin use computationally intensive algorithms – called hashing algorithms – to generate and validate their transaction histories, called their blockchains. Costly Application Specific Integrated Circuits, or ASICs, reign supreme in industry when it comes to sheer hashing performance. Problem Can anything be done about the high power use of cryptocurrency networks? What happens if a fixed ASIC is not feasible for a currency’s hashing algorithm?? With the rampant expansion of crypto over the past half-decade, and the high cost, high time of development, and low wide implementation of high-power ASIC miners across currencies, there exists a need to implement a low power, moderate efficiency miner to outperform high-end Graphics Processor Units (GPUs) in times of ASIC absence. Objectives Create an FPGA-based cryptocurrency miner that is: Modular for ease of changing currencies/high-level hashing algorithms. SHA-256 is an excellent, widely used algorithm. Low power in order to be cost-feasible and scalable. Superior to GPUs in order to reign supreme in performance when ASIC implementation is not feasible. Board Implementation • Implemented open-source VHDL code containing the major functionalities of the SHA-256 hashing algorithm[2] • Scalable hashing through many parallel instances of the hashing algorithm module • Incorporated UART serial communication module in order to communicate to/from the board through terminal • Created and implemented multiple finite-state machines for the module’s hashing operation and serial communication, allowing quick deployment of VHDL code Figure 1 – Parallel array instance SHA-256 hashing module Figure 2 – Vivado Design Niko Carbonell [EE], Martin Martinez [EE], Michael Morton [EE], Zach Peterson [EE] [email protected], [email protected], [email protected], [email protected] Erik Jonsson School of Engineering & Computer Science The University of Texas at Dallas A modular power-efficient approach to crypto- mining using the SHA-256 Hashing Algorithm Faculty Advisor: Dr. Dinesh Bhatia UTDesign II: Fall 2018 FPGA Cryptocurrency Miner Ethics Ethics Statement: We did not infringe on any copyright in the making of this project, and cited all sources where others’ work was referenced. Sources [1] “Bitcoin Energy Consumption Index.” Digiconomist, digiconomist.net/bitcoin-energy-consumption. Accessed 18 July 2018 [2] “A simple SHA-256 implementation in VHDL”, http://github.com/skordal/sha256 Results and Performance Metrics • The team was successfully able to implement the SHA-256 hashing algorithm on the Xilinx VC707 Development board, successfully computing the SHA-256 hash of the desired input • The team achieved hashing rates of ~660 Khash/s at 50MHz for a single hash instance, and an equivalent hash rate of 50Mhash/s for an array of 80 instances, outputting a single array instance’s result over serial UART each 2^20th successful parallel hash • After scaling the performance and implementing an array of instances of the hashing algorithm, the overall performance rivals the rate of industry leading GPUs Scalability • Due to the initial outstanding performance on the VC707 board after implementation of just one SHA-256 hash, the module was parallelized and made to compute the hash of over 50 concurrent SHA-256 inputs • Our single instantiation also has estimated power consumption of 2.6 MHash/Watt, with the potential for scaling at factor as more instantiations of SHA-256 are added. • With less than 1% of the board in use for computing 1 hash continuously, when running 80 concurrent instances of the hashing algorithm we were seeing closer to 35-40% of the board being in use. This indicates more room for improvement and an increased hash rate. Conclusion The team was able to successfully implement the SHA-256 hashing algorithm on the Xilinx VC707 FPGA Development board. In addition to the successful implementation, we maximized the hashing capability of the VC707 by instantiating a high amount of hashing modules on the board, resulting in close to 50 MHash/s while also consuming a significantly low amount of power. The implementing of multiple modules and increasing throughput allows for the FPGA to beat the top tier graphics cards in hashing rates, which have shown to produce up to 32 Mhash/s. Our implementation paves the way to the optimization of cryptocurrency hashing algorithms for currency mining. Power (Mh/s) GTX1080 Ti 250W 32 VC707 (80 SHA-256 instances) .251W 50 GTX 1050 Ti 42W 15
Transcript of FPGA Cryptocurrency Miner - UTDesign › wp-content › uploads › ... · Erik Jonsson School of...
BackgroundAt its current rate, the Bitcoin networkalone, according to some of the most recentestimates, uses over 70 terawatt hours(TWh) of electricity per year – that’s enoughenergy to power over 6 million houses in theU.S. [1]. Hundreds of cryptocurrencies likeBitcoin use computationally intensivealgorithms – called hashing algorithms – togenerate and validate their transactionhistories, called their blockchains. CostlyApplication Specific Integrated Circuits, orASICs, reign supreme in industry when itcomes to sheer hashing performance.
ProblemCan anything be done about the high power
use of cryptocurrency networks?What happens if a fixed ASIC is not feasible for
a currency’s hashing algorithm??With the rampant expansion of crypto overthe past half-decade, and the high cost, hightime of development, and low wideimplementation of high-power ASIC minersacross currencies, there exists a need toimplement a low power, moderate efficiencyminer to outperform high-end GraphicsProcessor Units (GPUs) in times of ASICabsence.
Objectives Create an FPGA-based
cryptocurrency miner that is:
Modular for ease of changingcurrencies/high-level hashing algorithms.SHA-256 is an excellent, widely usedalgorithm.
Low power in order to be cost-feasibleand scalable.
Superior to GPUs in order to reignsupreme in performance when ASICimplementation is not feasible.
Board Implementation• Implemented open-source VHDL code containing the major
functionalities of the SHA-256 hashing algorithm[2]
• Scalable hashing through many parallel instances of the hashingalgorithm module
• Incorporated UART serial communication module in order tocommunicate to/from the board through terminal
• Created and implemented multiple finite-state machines for themodule’s hashing operation and serial communication, allowingquick deployment of VHDL code
Figure 1 – Parallel array instance SHA-256 hashing module
Figure 2 – Vivado Design
Niko Carbonell [EE], Martin Martinez [EE], Michael Morton [EE], Zach Peterson [EE][email protected], [email protected], [email protected], [email protected]
Erik Jonsson School of Engineering & Computer ScienceThe University of Texas at Dallas
A modular power-efficient approach to crypto-mining using the SHA-256 Hashing Algorithm
Faculty Advisor:Dr. Dinesh BhatiaUTDesign II: Fall 2018
FPGA Cryptocurrency Miner
EthicsEthics Statement: We did not infringe on any copyright in the making of this project, and cited
all sources where others’ work was referenced.
Sources[1] “Bitcoin Energy Consumption Index.” Digiconomist, digiconomist.net/bitcoin-energy-consumption. Accessed 18 July 2018[2] “A simple SHA-256 implementation in VHDL”, http://github.com/skordal/sha256
Results and Performance Metrics
• The team was successfully able to implement the SHA-256 hashingalgorithm on the Xilinx VC707 Development board, successfullycomputing the SHA-256 hash of the desired input
• The team achieved hashing rates of ~660 Khash/s at 50MHz for asingle hash instance, and an equivalent hash rate of 50Mhash/s foran array of 80 instances, outputting a single array instance’s resultover serial UART each 2^20th successful parallel hash
• After scaling the performance and implementing an array ofinstances of the hashing algorithm, the overall performance rivalsthe rate of industry leading GPUs
Scalability• Due to the initial outstanding performance on the VC707 board after
implementation of just one SHA-256 hash, the module wasparallelized and made to compute the hash of over 50 concurrentSHA-256 inputs
• Our single instantiation also has estimated power consumption of 2.6MHash/Watt, with the potential for scaling at factor as moreinstantiations of SHA-256 are added.
• With less than 1% of the board in use for computing 1 hashcontinuously, when running 80 concurrent instances of the hashingalgorithm we were seeing closer to 35-40% of the board being in use.This indicates more room for improvement and an increased hash rate.
ConclusionThe team was able to successfully implement the SHA-256 hashing algorithm on the Xilinx VC707 FPGA Development board. In addition to the successful implementation,
we maximized the hashing capability of the VC707 by instantiating a high amount of hashing modules on the board, resulting in close to 50 MHash/s while also consuming a
significantly low amount of power. The implementing of multiple modules and increasing throughput allows for the FPGA to beat the top tier graphics cards in hashing rates,
which have shown to produce up to 32 Mhash/s. Our implementation paves the way to the optimization of cryptocurrency hashing algorithms for currency mining.
Power (Mh/s)
GTX1080 Ti 250W 32
VC707 (80 SHA-256 instances)
.251W 50
GTX 1050 Ti 42W 15
