Floorplanning

Professor Lei Helhe@ee.ucla.edu

http://eda.ee.ucla.edu/

Problem Formulation

Given , for each block Bi

Area of Bi wihi=Ai

Aspect ratio of Bi

(continuous or discrete)

Connectivity

Determine: for each block location (xi,yi), and dimension (wi, hi)

min total area interconnections

ii

ii rh

s w

5

113

7

42

10

Slicing Floorplan and General Floorplan

non-slicing floorplanSlicing Tree

1 2h

v

h

74vv

3 h65

Slicing floorplan

1

2

35

6

4 7

Overview of This Chapter

Module orientation problem

Slicing floorplan design

Non-slicing floorplan design

student presentation

Area Utilization Area utilization

Depends on how nicely the rigid modules’ shapes are matched

Soft modules can take different shapes to “fill in” empty slots

Floorplan sizing

1

7 6

23

4

5

m1

m7

m6 m5

m2 m

4m

3

m1

m7

m6 m5

m2 m

4m

3

m7

m7

m1

m7

Area = 20x22 = 440 Area = 20x19 = 380

Slicing Floorplan Sizing Bottom-up process

Has to be done per floorplan perturbation Requires O(n) time (N is the # of shapes of all

modules)

V

L R

H

T B

bi aiyjxj

bi+ yj

max(ai, xj)

bi ai

max(bi, yj)

ai+ xj

yjxj

Slicing Floorplan Sizing Simple case: all modules are hard macros

No rotation allowed, one shape only

17x16

m1

9x15

m7

m6

9x7

m5

8x16

8x11m2

m4

m3

4x11

1234567

167 2345

234 5167

43

6 27 34

4x7 5x4

8x8

4x8

3x6 4x5

7x5

13

4

5

2

67

Slicing Floorplan Sizing General case: all modules are soft macros

Stockmeyer’s work (1983) for optimal module orientation

Non-slicing = NP complete Slicing = polynomial time solvable with dynamic

programming Phase 1: bottom-up

Input: floorplan tree, modules shapes Start with sorted shapes lists of modules Perform Vertical_Node_Sizing & Horizontal_Node_Sizing When get to the root node, we have a list of shapes.

Select the one that is best in terms of area Phase 2: top-down

Traverse the floorplan tree and set module locations

Sizing ExampleAA BB a1 a2 a3

4x6 5x5 6x4

b1

b2

b3

3x4

2x7

4x2

6x7 7x7 8x7

b1a1 b1a2

b1a3

7x6 8x5 9x4

b2a1

b2a2 b2a3

8x6 9x5 10x4

b3a1

b3a2

b3a3

Stockmeyer AlgorithmProcedure Vertical_Node_SizingInput: Sorted lists L = {(a1, b1), ... , (as,bs)}, R = {(x1, y1), ... ,

(xt, yt)}, where ai < aj, bi > bj, xi < xj, yi > yj (for all i < j)

Output: A sorted list H = {(c1, d1), ... , (cu,du)},where u ≤ s + t - 1, ci < cj, di > dj (for all i < j)

BeginH := Øi := 1, j := 1, k = 1while (i ≤ s) and (j ≤ t) do

(ck, dk) := (ai + xj, max(bi, yj)) H := H U {(ck, dk)}k := k + 1 if max(bi, yj) = bi then i := i + 1 if max(bi, yj) = yj then j := j + 1

Complexity of the Algorithmn= # of leaves = 2 * # of modules

d=depth of the tree

Running time= O(nd)

Storage = O(n)

because, at depth k, sum of the lengths of the lists =O(n) time to construct these lists =O(n) configurations stored at this node can be

release as soon as the node is processed

Extension

Each module has k possible shapes

Running time and storage O(nkd)

depth k

Floorplan using Simulated Annealing

References

1. D.F. Wong and C.L. Liu

A New Algorithm for Floorplan Design

23rd IEEE/ACM Design Automation Conference 1986,

P101-107

2. D.F. Wong and C.L. Liu

Floorplan Design for Rectangular and L-shaped modules

ICCAD-87 P520-523

3. D.F. Wong, H.W. Lceng, C.L. Liu

Simulated Annealing for VLSI Design

Kluwer Academic Publishers 1988 P31-71

Basic Ingredients for S.A.

Solution space

Neighborhood Structure

Cost Function

Annealing Schedule

Representation of Solutions

1

6

3 5

24

7

+

++1 6

3 5

2 7 4

16+35 2+74+

Corresponding Slicing Tree May Not Unique

13

24

1 +

3 2

4

1

+

3 2

4

132+4 132+4

+

••• ++ •••

+

••• •••

Normalization: do not allow following slicing trees

Normalized Polish Expressions

16+35 2+ 74+

# of operands = 4

# of operators = 2

…….. = 7

…….. = 5

Total length =2n-1

Permutation of { 1, 2, …, n} and # of operators =n-1

# of operators < # of operands at every position

No consecutive operators of the same type (due to normalization)

Neighborhood Structure

The moves:

M1: swap adjacent operands

M2: Complement some chain of operators

M3: swap 2 adjacent operand and operator

Chain: +++….. or ++….

16+35 2+ 74+

chains

Examples of Neighboring Solutions

1 2 3 + 4 5 +

1 2 4 + 3 5 +

1 2 4 + 3 5 +

1 2 4 3 + 5 +

1 2 + 4 3 5 +

1 2 4 3 5 + +

1 2 + 4 3 5 + +

2

53 41

53

24

13

241

5

32

4

1

5

1

53

2

4

32

415

54

2 31

M1

M3

M3

M3

M2

M2

Cost Function

32 41 5 A

),(),(),(

jicjidAAEji

w

35

21 4

35

21 4

35

21 4

A=minimum area

ijijdcw

:W Wirelength:

Computing cost function

+

+

7

4

10 8 9

++

1 6 2

3 5

6

1

2

3 5

4

10 89

7

byaxii , b yax

ii ,

a ybxii ,

b yaxii ,

or

b, yaxii , Ayx

ii

Ayxii

a, ybxii , Ayx

ii

or

Computing Cost Function(Cont’d)

+

4

++

1 6 2

3 5

+

7

10 8 9

Summary Floorplan is a very important step for design planning Floorplan may be performed before synthesis of each block

(at RTL level) Slicing floorplan allows efficient representation and

optimization Module orientation and sizing problem can be solved easily Good results using SA on Polish expression representation

Recent progress non-slicing floorplanning via Sequence pair representation Floorplanning and system design co-optimization