Final Designs of Online Active DAQ

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    Design of online interactive DAQ & control system for

    embedded real time application.

    This paper describes the design and implementation of a wireless sensor network for

    greenhouse environment monitoring. The sensor network was deployed in a commercial

    geoponic greenhouse that produces lettuces in a tropical environment. The sensor node was

    developed using off-the-shelf components and consists of sensors, a micro-controller and a

    low-powered Zigbee module. Real- time data enabled the operators to characterize the

    operating parameters of the greenhouse and also to respond immediately to any changes in

    the controlled- parameters. The sensor network achieved data transmission rates of more

    than 70%.

    Appropriate environmental conditions are necessary for optimum plant growth, improved

    crop yields, and efficient use of water and other resources. Automating the data acquisition

    process of the soil conditions and various climatic parameters that govern plant growth

    allows information to be collected at high frequency with less labor requirements. The

    existing systems employ PC or LCD systems for keeping the user continuously informed of

    the conditions inside the greenhouse; but are unaffordable, bulky, difficult to maintain and

    less accepted by the technologically unskilled workers.

    The objective of this project is to design a simple, easy to install, microcontroller-based

    circuit to monitor and record the values of temperature, sunlight of the natural environment

    that are continuously modified and controlled in order to optimize them to achieve maximum

    plant growth and yield. The controller used is a low power, cost efficient chip manufactured

    by ATMEL of on-chip memory It communicates with the various sensor modules in real-timein order to control the light, aeration and drainage process efficiently inside a greenhouse by

    actuating a cooler, fogger, dripper and lights respectively according to the necessary

    condition of the crops. Here the data can be read through the wireless ZIGBEE. The sensor

    network is developed by ZIGBEE. Also, the use of easily available components reduces the

    manufacturing and maintenance costs. The design is quite flexible as the software can be

    changed any time. It can thus be tailor-made to the specific requirements of the user. This

    makes the proposed system to be an economical, portable and a low maintenance solution for

    greenhouse applications, especially in rural areas and for small scale agriculturists.

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    BLOCK DIAGRAM:

    ZIGBEE

    TRANSMITTER

    ANALOG

    TO

    DIGITAL

    CONVERTER

    LDR

    ZIGBEE

    RECEIVER

    LEVEL

    CONVERTERPOWER

    SUPPLY

    PERSONAL

    COMPUTER

    MICRO

    CONTROLLER

    TEMPERATURE

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    LIST OF CONTENTS

    CHAPTER TITLE PAGE NO

    CHAPTER 1 INTRODUCTION

    1.0 WHAT IS DATA ACQUISITION

    1.1 DIFFERENT TYPES OF DATA ACQUISITION

    1.2 NETWORKING

    1.3 AIM OF THE PROJECT

    CHAPTER 2 WORKING PRINCIPLE

    2.0 BLOCK DIAGRAM OF DATA ACQUISITION

    2.1 CIRCUIT DESCRIPTION

    CHAPTER 3 DESIGN PROCEDURE

    3.0 POWER SUPPLY

    3.1 INTRODUCTION TO MICROCONTROLLERS

    3.2 I2C PROTOCOL

    3.3 LIGHT DEPENDENT RESISTORS

    3.4 EEPROM

    3.5 TEMPERATURE SENSOR3.6 LCD

    CHAPTER 4 SOURCE CODE OF THE PROJECT

    CHAPTER 5 ADVANTAGES AND APPLICATIONS

    5.0 ADVANTAGES OF USING A DATA

    ACQUISITION FOR COLLECTING DATA

    5.1 DATA LOGGING VERSUS DATA ACQUISITION

    5.2 APPLICATIONS

    CHAPTER 6 CONCLUSION AND FUTURE DIRECTIONS

    APPENDIX

    BIBLIOGRAPHY

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    CHAPTER 1

    INTRODUCTION

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    INTRODUCTION TO DATA ACQUISITION:

    WHAT IS A DATA ACQUISITION?

    A Data Acquisition is an electronic instrument used to take measurements fromsensors and store those measurements for future use. Some common measurements include

    temperature, pressure, current, velocity, strain, displacement, and other physical phenomena.

    This includes many data acquisition devices such as plug-in boards or serial communication

    systems which use a computer as a real time data recording system. However, most instrument

    manufacturers consider a data Acquisition a stand alone device that can read various types of

    electrical signals and store the data in internal memory for later download to a computer.

    Data loggers vary between general purpose types for a range of measurement applications to

    very specific devices for measuring in one environment only. It is common for general purpose types

    to be programmable however many remains as static machines with only a limited number of

    changeable parameters. Electronic data loggers have replaced chart records in many applications.

    1.1 DIFFERENT TYPES OF DATA ACQUISITION:

    The differences between various data loggers are based on the way that data is

    recorded and stored. The basic difference between the two data logger types is that one type

    allows the data to be stored in a memory, to be retrieved at a later time, while the other type

    automatically records the data on paper, for immediate viewing and analysis. Many data

    loggers combine these two functions, usually unequally, with the emphasis on either the

    ability to transfer the data or to provide a printout of it.

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    1.2 HOW CAN NETWORKING BE USED FOR EXTENSIVE

    CQUISITION REQUIREMENTS?

    For users who must acquire data over many locations, and wish to have a single

    collection/recording point, networking is a truly viable solution. With a network, one central

    location is responsible for data storage and recording; data is collected by remote units in

    various locations, and then fed to this master unit for storage/recording. This is a great

    convenience, in that an operator can retrieve the data from one location, rather than having to

    go to each individual site for collection.

    1.3 AIM OF PROJECT:

    To capture the data (Temperature, Sunlight etc) by using sensors for maintaining the

    process control systems automatically.

    COMPONENTS REQUIRED:

    HARDWARE:

    oMicrocontroller (AT89S52)oEEPROM (24LC64)oTemperature Sensor (DS 1621)oMulti 10 PotoLimit switchoLCD

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    CHAPTER 2

    WORKING PRINCIPLE

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    2.0 BLOCK DIAGRAM:

    LIMIT

    Fig 1: BLOCKDIAGRAM OF DATA ACQUISITION

    DISPLAY

    EMBEDDED CONTROLERLDR

    TEMP.

    TRANSDUCER

    EPROM

    KEY BOARD

    POWER SUPPLY

    MULTI TURN

    POT

    LIMIT SWITCH

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    2.1 CIRCUIT DESCRIPTION:

    A soft ware program written in Embedded C is loaded in the embedded controller,

    using a suitable temperature transducer (DS1621 is a Digital Thermometer and Thermostat

    which measures temperature with out any external components from -55C to +125C in

    0.5C incrementsand Converts it to digital word in less than 1 second). temperature of the

    plant (normally a boiler) is measured and it is given as input to the embedded controller, and

    this value is compared with the set temperature value which is already kept in the controller if

    it exceeds the set value the LDR will be activated and the date and time at which it occurs

    will be stored in the EEPROM which is kept externally.

    Similarly the output of the multi turn pot indicates the changes in pressure. This

    analog signal is given as input to the micro controller which will be converted as digital

    signal using the built in ADC peripheral of the embedded controller this value is compared

    with the set temperature value which is already kept in the controller if it exceeds the set

    value the LDR will be activated and the date and time at which it occurs will be stored in the

    EEPROM. Simultaneously the system will give a siren as indication this will go off if

    unattended, in this manner the system can store as many as 255 records in the memory as

    and when the operator want this details can be accessed using a key board and it will bedisplayed in the LCD display. A regulated power supply of required voltage is provided to

    power up the circuit.

    The hardware is assembled and tested for proper functioning .the programming of

    micro controller involves writing the program on a PC. This may be done in either C or

    Assembly. The program if written in C is compiled to generate the Hex file. The Hex file

    needs to be in the INTEL Hex format. If program is written in assembly, it is compiled to

    produce the obj file. Subsequently a linker is used to generate the appropriate INTEL Hex

    file. Then this is programmed in to the micro controller using a programmer. The

    programmed micro controller is appropriately called the firmware for the data logger.

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    CHAPTER 3

    DESIGN PROCEDURE

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    3.0 POWER SUPPLY

    Fig: POWER SUPPLY

    STEP DOWN TRANSFORMER:

    The step down transformer is used to step down the main supply voltage from 230V AC to

    lower value. This 230V AC voltage cannot be used directly, thus it is stepped down. The transformer

    consists of primary and secondary coils. To reduce or step down the voltage the transformer is

    designed to contain less number of turns in its secondary core. The output from the secondary coil is

    also in AC form. Thus the conversion from AC to DC is essential. This conversion is achieved by

    using the rectifier circuit.

    RECTIFIER:The rectifier circuit is used to convert the AC voltage into its corresponding DC voltage.

    There are half wave and full wave rectifiers available for this specific function. The most important

    simple device used in rectifier circuit is the diode the simple function of the diode is to conduct when

    forward biased and not to conduct in reverse bias. The efficient circuit used is the full wave bridge

    rectifier circuit. The output voltage of the rectifier is in ripple form. The ripples from the obtained DC

    voltages are removed by using the filter circuit.

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    INPUT FILTER:

    Capacitors are used as filters. The ripples from the DC voltage are removed and pure DC

    voltage is obtained. The primary action performed by capacitor is charging and discharging; it charges

    in positive half cycle of the AC voltage and discharges during the negative half cycle. So it allows

    only the AC voltage and does not allow DC voltage. This filter is fixed before the regulator thus the

    output is free from ripples.

    REGULATOR UNIT:

    Regulator regulates the output voltage to be always constant. The output voltage is

    maintained constant irrespective of the fluctuations in the input AC voltage. When the internal

    resistance of the power supply is greater than 30ohms the output gets fluctuated. Thus this can be

    successfully reduced here. The regulators are mainly classified for low voltage and for high voltage.

    Positive regulatorregulates the positive voltage.

    Negative regulatorregulates the negative voltage.

    FIXED POSITIVE VOLTAGE REGULATORS:

    Fig: VOLTAGE REGULATOR

    The series 78XX regulators provide fixed regulated voltages from +5V to +24V. Figure

    shows how one such IC, a 7805, is connected to provide voltage regulation with output from this unit

    of +5V DC. An unregulated input voltage Vi is filtered by capacitor Ci and connected to the ICs IN

    terminal. The ICs OUT terminal provides a regulated +5V, which is filtered by capacitor Co (mostly

    for any high frequency noise). The third terminal of IC is connected to ground (GND). While the

    input voltage may vary over some permissible voltage range and the output load may vary over some

    acceptable range, the output voltage remains constant within specified voltage variation limits. These

    limitations are spelled out in the manufacturers specification sheets.

    A table of positive voltage regulated ICs is provided in the following table:

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    POSITIVE VOLTAGE REGULATOR IN 7800 SERIES:

    IC PART OUTPUT

    VOLTAGE(V)

    MINIMUM Vi(V)

    7805 +5 7.3

    7806 +6 8.3

    7808 +8 10.5

    7810 +10 12.5

    7812 +12 14.6

    7815 +15 17.7

    7818 +18 21.0

    7824 +24 27.1

    OUTPUT FILTER:

    The filter circuit is often fixed after the regulator circuit. Capacitor is most often used as filter.

    The principle of the capacitor is to charge and discharge. It charges during the positive half cycle of

    the AC voltage and discharges during the negative half cycle. So it allows only the AC voltage and

    does not allow the DC voltage. This filter is fixed after the regulator circuit to filter any of the possibly

    found ripples in the output received finally. The output at this stage is 5V and is given to the micro

    controller PIC16F877.

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    INTRODUCTION TO MICROCONTROLLER

    Micro controller is a true computer on a chip the design incorporates all of the

    features found in a microprocessor CPU: arithmetic and logic unit, stack pointer,

    program counter and registers. It has also had added additional features like RAM,

    ROM, serial I/O, counters and clock circuit.

    Like the microprocessor, a microcontroller is a general purpose device, but

    one that is meant to read data, perform limited calculations on that data and

    control its environment based on those calculations. The prime use of a

    microcontroller is to control the operation of a machine using a fixed programthat is stored in ROM and that does not change over the lifetime of the system.

    The design approach of a microcontroller uses a more limited set of single

    byte and double byte instructions that are used to move code and data from

    internal memory to ALU. Many instructions are coupled with pins on the IC

    package; the pins are capable of having several different functions depending on

    the wishes of the programmer.

    The microcontroller is concerned with getting the data from and on to its

    own pins; the architecture and instruction set are optimized to handle data in bit

    and byte size.

    4.2 8051 Architecture

    The generic 8051 architecture supports a Harvard architecture, which

    contains two separate buses for both program and data. So, it has two distinctive

    memory spaces of 64K X 8 size for both programmed and data.

    It is based on an 8 bit central processing unit with an 8 bit Accumulator and

    another 8 bit B register as main processing blocks. Other portions of the

    architecture include few 8 bit and 16 bit registers and 8 bit memory locations.

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    4.4 Block Diagram of 8051

    Figure 4.1 - Block Diagram of the 8051 Core

    So, very soon Intel introduced the 8051 devices with re-programmable type of

    Program Memory using built-in EPROM of size 4K X 8. Like a regular EPROM,

    this memory can be re-programmed many times. Later on Intel started

    manufacturing these 8031 devices without any on chip Program Memory.

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    4.5 Functional Blocks of 8051

    4.6 Properties of Extra pins in 8051

    ALE/PROG: Address Latch Enable output pulse for latching the low byte of

    the address during accesses to external memory. ALE is emitted at a constant rate

    of 1/6 of the oscillator frequency, for external timing or clocking purposes, even

    when there are no accesses to external memory.

    PSEN : Program Store Enable is the read strobe to external Program Memory.

    When the device is executing out of external Program Memory, PSEN is activated

    twice each machine cycle (except that two PSEN activations are skipped duringaccesses to external Data Memory). PSEN is not activated when the device is

    executing out of internal Program Memory.

    EA/VPP: When EA is held high the CPU executes out of internal Program

    Memory (unless the Program Counter exceeds 0FFFH in the 80C51). Holding EA

    low forces the CPU to execute out of external memory regardless of the Program

    Counter value.

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    In the 80C31, EA must be externally wired low. In the EPROM devices, this

    pin also receives the programming supply voltage (VPP) during EPROM

    programming.

    XTAL1: Input to the inverting oscillator amplifier.

    XTAL2: Output from the inverting oscillator amplifier.

    4.7 Port Pin Alternate Function

    P3.0- RxD (serial input port)

    P3.1 -TxD (serial output port)

    P3.2 -INT0 (external interrupt 0)

    P3.3- INT1 (external interrupt 1)

    P3.4 -T0 (timer 0 external input)

    P3.5 -T1 (timer 1 external input)

    P3.6 -WR (external data memory write strobe)

    P3.7 -RD (external data memory read strobe)

    VCC: -Supply voltage

    VSS: -Circuit ground potential

    All four ports in the 89C51 are bidirectional. Each consists of a latch (Special

    Function Registers P0 through P3), an output driver, and an input buffer. The

    output drivers of Ports 0 and 2, and the input buffers of Port 0, are used in accesses

    to external memory. In this application, Port 0 outputs the low byte of the external

    memory address, time-multiplexed with the byte being written or read. Port 2

    outputs the high byte of the external memory address when the address is 16 bits

    wide. Otherwise, the Port 2 pins continue to emit the P2 SFR content.

    All the Port 3 pins are multifunctional. They are not only port pins, but also serve

    the functions of various special features as listed below:

    Port Pin Alternate Function

    P3.0 RxD (serial input port)

    P3.1 TxD (serial output port)

    P3.2 INT0 (external interrupt)

    P3.3 INT1 (external interrupt)

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    P3.4 T0 (Timer/Counter 0 external input)

    P3.5 T1 (Timer/Counter 1 external input)

    P3.6 WR (external Data Memory write strobe)

    P3.7 RD (external Data Memory read strobe)

    4.8 Criteria for choosing a Microcontroller

    1. The first and foremost criteria for choosing a microcontroller are that it must

    meet task at hands efficiently and cost effectively. In analyzing the needs of a

    microcontroller based project we must first see whether it is an 8-bit, 16-bit or 32-

    bit microcontroller and how best it can handle the computing needs of the task

    most effectively. The other considerations in this category are:

    (a) Speed: The highest speed that the microcontroller supports.

    (b) Packaging: Is it 40-pin DIP or QPF or some other Packaging format?

    This is important in terms of space, assembling and Prototyping the end

    product.

    (c) Power Consumption: This is especially critical for battery powered products.

    (d) The amount of RAM and ROM on chip.

    (e) The number of I/O pins and timers on the chip.

    (f) How easy it is to upgrade to higher performance or lower

    power Consumption versions.(g) Cost per unit: This is important in terms of final product in

    Which a microcontroller is used.

    2. The second criteria in choosing a microcontroller are how easy it is to

    develop products around it. Key considerations include the availability of an

    assembler, debugger, a code efficient C language compiler, emulator, technical

    support and both in house and outside expertise. In many cases third party vendor

    support for chip is required.

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    3. The third criteria in choosing a microcontroller is it readily available in

    needed quantities both now and in future. For some designers this is even more

    important than first two criterias. Currently, of leading 8bit microcontrollers, the

    89C51 family has the largest number of diversified (multiple source) suppliers. By

    suppliers meant a producer besides the originator of microcontroller in the case of

    the 89C51, which was originated by Intel, several companies are also currently

    producing the 89C51. Viz: INTEL, ATMEL, These companies include PHILIPS,

    SIEMENS, and DALLAS-SEMICONDUCTOR. It should be noted that Motorola,

    Zilog and Microchip Technologies have all dedicated massive resource as to

    ensure wide and timely availability of their product since their product is stable,

    mature and single sourced. In recent years they also have begun to sell the ASIC

    library cell of the microcontroller.

    5.1 Description of AT89C51

    The Philips microcontrollers described in this data sheet are high-performance

    static 80C51 designs. They are manufactured in an advanced CMOS process and

    contain a non-volatile Flash program memory. They support both 12-clock and 6-

    clock operation. The P89C51X2 and P89C52X2/54X2/58X2 contain 128 byte

    RAM and 256 byte RAM respectively, 32 I/O lines, three 16-bit counter/timers, a

    six-source, four-priority level nested interrupt structure, a serial I/O port for either

    multi-processor communications, I/O expansion or full duplex UART, and on-chip

    oscillator and clock circuits.

    In addition, the devices are static designs which offer a wide range of operating

    frequencies down to zero. Two software selectable modes of power reduction

    idle mode and power-down modeare available. The idle mode freezes the CPU

    while allowing the RAM, timers, serial port, and interrupt system to continue

    functioning.

    The power-down mode saves the RAM contents but freezes the oscillator,

    causing all other chip functions to be in operative. Since the design is static, the

    clock can be stopped without loss of user data. Then the execution can be resumed

    from the point the clock was stopped.

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    5.2 Features of AT89C51

    AT89C51 Central Processing Unit4 Kbytes Flash (P89C51X2)

    8 Kbytes Flash (P89C52X2)

    16 Kbytes Flash (P89C54X2)

    32 Kbytes Flash (P89C58X2)

    128 byte RAM (P89C51X2)

    256 byte RAM (P89C52/54X2/58X2)

    Boolean processor Fully static operation

    12-clock operation with selectable 6-clock operation (via software or viaparallel programmer).

    Memory addressing capability Up to 64 Kbytes ROM and 64 Kbytes RAM

    Power control modes: Clock can be stopped and resumed Idle mode Power-down mode

    Two speed ranges

    0 to 20 MHz with 6-clock operation

    0 to 33 MHz with 12-clock operation

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    LQFP, PLCC or DIP package Extended temperature ranges Dual Data Pointers Three security bits Four interrupt priority levels Six interrupt sources Four 8-bit I/O ports Full-duplex enhanced UART

    Framing error detection

    Automatic address recognition Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2

    (capture and compare)

    Programmable clock-out pin

    Asynchronous port reset

    Low EMI (inhibit ALE, slew rate controlled outputs, and 6-

    Clock mode)

    Wake-up from Power Down by an external interrupt

    5.3 Block Diagram of AT89C51

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    5.4 General Description of AT89C51

    The P89C51X2/P89C52X2/P89C54X2/P89C58X2 FLASH reliably stores

    memory contents even after 10,000 erase and program cycles. The cell is designed

    to optimize the erase and programming mechanisms. In addition, the combination

    of advanced tunnel oxide processing and low internal electric fields for erase and

    programming operations produces reliable cycling.

    Features

    FLASH EPROM internal program memory with Chip Erase

    Up to 64 byte external program memory if the internal program memory is

    disabled (EA = 0)

    Programmable security bits

    10,000 minimum erase/program cycles for each byte

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    10 year minimum data retention

    Programming support available from many popular vendors

    Oscillator characteristics

    Using the oscillator, XTAL1 and XTAL2 are the input and output, respectively,

    of an inverting amplifier. The pins can be configured for use as an on-chip

    oscillator, as shown in the logic symbol. To drive the device from an external

    clock source, XTAL1 should be driven while XTAL2 is left unconnected.

    However, minimum and maximum high and low times specified in the data sheet

    must be observed.

    Clock Control Register (CKCON)

    This device provides control of the 6-clock/12-clock mode by both an SFR

    bit (bit X2 in register CKCON) and a Flash bit (bit FX2, located in the Security

    Block). When X2 is 0, 12-clock mode is activated. By setting this bit to 1, the

    system is switching to 6-clock mode. Having this option implemented as SFR bit,

    it can be accessed anytime and changed to either value. Changing X2 from 0 to 1

    will result in executing user code at twice the speed, since all system time intervals

    will be divided by 2. Changing back from 6-clock to 12-clock mode will slow

    down running code by a factor of 2.

    The Flash clock control bit (FX2) activates the 6-clock mode when

    programmed using a parallel programmer, super coding the X2 bit (CKCON.0).

    Please also see Table 2 below.

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    A 50% duty cycle clock can be programmed to be output on P1.0. This pin,

    besides being a regular I/O pin, has two alternate functions. It can be programmed:

    1. To input the external clock for Timer/Counter 2, or

    2. To output a 50% duty cycle clock ranging from 61 Hz to 4 MHz at a 16 MHz

    operating frequency in 12-clock mode (122 Hz to 8 MHz in 6-clock mode).

    To configure the Timer/Counter 2 as a clock generator, bit C/T2 (in T2CON)

    must be cleared and bit T20E in T2MOD must be set. Bit TR2 (T2CON.2) also

    must be set to start the timer. The Clock-Out frequency depends on the

    oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H,

    RCAP2L) as shown in this equation: Oscillator Frequency

    n_ (65536RCAP2H, RCAP2L)

    Where:

    n = 2 in 6-clock mode, 4 in 12-clock mode.

    (RCAP2H, RCAP2L) = the content of RCAP2H and RCAP2L

    Taken as a 16-bit unsigned integer.

    In the Clock-Out mode Timer 2 roll-overs will not generate an interrupt. This is

    similar to when it is used as a baud-rate generator. It is possible to use Timer 2 as a

    baud-rate generator and a clock generator simultaneously.

    RESET

    A reset is accomplished by holding the RST pin HIGH for at least two machine

    cycles (24 oscillator periods in 12-clock and 12 oscillator periods in 6-clock

    mode), while the oscillator is running. To insure a reliable power-up reset, the RST

    pin must be high long enough to allow the oscillator time to start up (normally a

    few milliseconds) plus two machine cycles, unless it has been set to 6-clock

    operation using a parallel programmer.

    5.5 Timer 0 and Timer 1 Operation

    The Timer or Counter function is selected by control bits C/T in the

    Special Function Register TMOD. These two Timer/Counters have four operating

    modes, which are selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are

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    the same for both Timers/Counters. Mode 3 is different. The four operating modes

    are described in the following text.

    Mode 0

    Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is

    an 8-bit Counter with a divide-by-32 prescaler. Figure 2 shows the Mode 0

    operation. In this mode, the Timer register is configured as a 13-bit register.

    As the count rolls over from all 1s to all 0s, it sets the Timer interrupt flag

    TFn. The counted input is enabled to the Timer when TRn = 1 and either GATE =

    0 or INTn = 1. (Setting GATE = 1 allows the Timer to be controlled by external

    input INTn, to facilitate pulse width measurements). TRn is a control bit in the

    Special Function Register TCON (Figure 3).

    The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn.

    The upper 3 bits of TLn are indeterminate and should be ignored. Setting the run

    flag (TRn) does not clear the registers. Mode 0 operation is the same for Timer 0

    as for Timer 1. There are two different GATE bits, one for Timer 1 (TMOD.7) and

    one for Timer 0 (TMOD.3).

    Mode 1

    Mode 1 is the same as Mode 0, except that the Timer register is being run

    with all 16 bits.

    Mode 2

    Mode 2 configures the Timer register as an 8-bit Counter (TLn) with

    automatic reloads, as shown in Figure 4. Overflow from TLn not only sets TFn,

    but also reloads TLn with the contents of THn, which is preset by software. The

    reload leaves THn unchanged. Mode 2 operation is the same for Timer 0 as for

    Timer 1.

    Mode 3

    Timer 1 in Mode 3 simply holds its count. The effect is the same as setting

    TR1 = 0. Timer 0 in Mode 3 establishes TL0 and TH0 as two separate counters.

    The logic for Mode 3 on Timer 0 is shown in Figure 5. TL0 uses the Timer 0

    control bits: C/T, GATE, TR0, and TF0 as well as pin INT0. TH0 is locked into a

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    timer function (counting machine cycles) and takes over the use of TR1 and TF1

    from Timer 1. Thus, TH0 now controls the Timer 1 interrupt.

    Mode 3 is provided for applications requiring an extra 8-bit timer on the

    counter. With Timer 0 in Mode 3, an 80C51 can look like it has three

    Timer/Counters. When Timer 0 is in Mode 3, Timer 1 can be turned on and off by

    switching it out of and into its own Mode 3, or can still be used by the serial port

    as a baud rate generator, or in fact, in any application not requiring an interrupt.

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    TIMER 2 OPERATION

    Timer 2

    Timer 2 is a 16-bit Timer/Counter which can operate as either an event timer or

    an event counter, as selected by C/T2 in the special function register T2CON (see

    Figure 6). Timer 2 has three operating modes: Capture, Auto-reload (up or down

    counting), and Baud Rate Generator, which are selected by bits in the T2CON as

    shown in Table 4.

    Capture Mode

    In the capture mode there are two options which are selected by bit EXEN2 in

    T2CON. If EXEN2=0, then timer 2 is a 16-bit timer or counter (as selected by

    C/T2 in T2CON) which, upon overflowing, sets bit TF2, the timer 2 overflow bit.

    This bit can be used to generate an interrupt (by enabling the Timer 2 interrupt bit

    in the IE register).

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    If EXEN2=1, Timer 2 operates as described above, but with the added feature

    that a 1-to-0 transition at external input T2EX causes the current value in the

    Timer 2 registers, TL2 and TH2, to be captured into registers RCAP2L and

    RCAP2H, respectively.

    In addition, the transition at T2EX causes bit EXF2 in T2CON to be set, and

    EXF2 (like TF2) can generate an interrupt (which vectors to the same location as

    Timer 2 overflow interrupt. The Timer 2 interrupt service routine can interrogate

    TF2 and EXF2 to determine which event caused the interrupt). The capture mode

    is illustrated in Figure 7 (There is no reload value for TL2 and TH2 in this mode.

    Even when a capture event occurs from T2EX, the counter keeps on counting

    T2EX pin transitions or osc/12 (12-clock Mode) or osc/6 (6-clock Mode) pulses).

    Baud Rate Generator Mode

    Bits TCLK and/or RCLK in T2CON (Table 4) allow the serial port transmit and

    receive baud rates to be derived from either Timer 1 or Timer 2. When TCLK= 0,

    Timer 1 is used as the serial port transmit baud rate generator. When TCLK= 1,

    Timer 2 is used as the serial port transmit baud rate generator.

    RCLK has the same effect for the serial port receive baud rate. With these

    two bits, the serial port can have different receive and transmit baud rates one

    generated by Timer 1, the other by Timer 2. Figure 11 shows the Timer 2 in baud

    rate generation mode. The baud rate generation mode is like the auto-reload mode,

    in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit

    value in registers RCAP2H and RCAP2L, which are preset by software. The baud

    rates in modes 1 and 3 are determined by Timer 2s overflow rate given below:

    Modes 1 and 3 Baud Rates _ Timer 2 Overflow Rate 16 The timer can be

    configured for either timer or counter operation. In many applications, it is

    configured for timer operation (C/T2=0). Timer operation is different for Timer

    2 when it is being used as a baud rate generator.

    Usually, as a timer it would increment every machine cycle (i.e., 1/6 the

    oscillator frequency in 6-clock mode or 1/12 the oscillator frequency in 12-clock

    mode). As a baud rate generator, it increments at the oscillator frequency in 6-

    clock mode or at 1/2 the oscillator frequency in 12-clock mode.

    Thus the baud rate formula is as follows:

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    Where:

    n = 16 in 6-clock mode, 32 in 12-clock mode.

    (RCAP2H, RCAP2L)= The content of RCAP2H and RCAP2L taken as a 16-bit

    unsigned integer.

    The Timer 2 as a baud rate generator mode shown in Figure 11 is valid only if

    RCLK and/or TCLK = 1 in T2CON register. Note that a rollover in TH2 does not

    set TF2, and will not generate an interrupt.

    Thus, the Timer 2 interrupt does not have to be disabled when Timer 2 is in the

    baud rate generator mode. Also if the EXEN2 (T2 external enable flag) is set, a 1-

    to-0 transition in T2EX (Timer/counter 2 trigger input) will set EXF2 (T2 external

    flag) but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2).

    Therefore when Timer 2 is in use as a baud rate generator, T2EX can be used as an

    additional external interrupt, if needed. When Timer 2 is in the baud rate generator

    mode, one should not try to read or write TH2 and TL2. As a baud rate generator,

    Timer 2 is incremented every state time (osc/2) or asynchronously from pin T2;

    under these conditions, a read or write of TH2 or TL2 may not be accurate. The

    RCAP2 registers may be read, but should not be written to; because a write might

    overlap a reload and cause write and/or reload errors. The timer should be turned

    off (clear TR2) before accessing the Timer 2 or RCAP2 registers. Table 5 shows

    commonly used baud rates and how they can be obtained from Timer 2.

    .

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    Summary of Baud Rate Equations

    Timer 2 is in baud rate generating mode. If Timer 2 is being clocked through pin

    T2 (P1.0) the baud rate is:

    If Timer 2 is being clocked internally, the baud rate is:

    Where:

    n = 16 in 6-clock mode, 32 in 12-clock mode.

    fOSC= Oscillator Frequency

    To obtain the reload value for RCAP2H and RCAP2L, the above

    Equation can be rewritten as:

    Timer/Counter 2 Set-up

    Except for the baud rate generator mode, the values given for

    T2CON do not include the setting of the TR2 bit. Therefore, bit TR2 must be set,

    separately, to turn the timer on. See Table 6 for set-up of Timer 2 as a timer.

    Also see Table 7 for set-up of Timer 2 as a counter

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    NOTES:

    1. Capture/reload occurs only on timer/counter overflow.

    2. Capture/reload occurs on timer/counter overflow and a 1-to-0 transition on

    T2EX (P1.1) pin except when Timer 2 is used in the baud rate generator mode.

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    3.2I2C PROTOCOL

    HISTORY OF THE I2C BUS

    The I2C bus was developed in the early 1980's by Philips Semiconductors. Its original

    purpose was to provide an easy way to connect a CPU to peripheral chips in a TV-set. IC is a

    multi-master serial computer bus used to attach low-speed peripherals to a motherboard,

    embedded system, or cell phone. The name stands for Inter-Integrated Circuit and is

    pronounced I-squared-C and also, I-two-C.

    THE I2C BUS PROTOCOL

    The I2C bus physically consists of 2 active wires and a ground connection. The active

    wires, called SDA and SCL, are both bi-directional. SDA is the Serial data line, and SCL is

    the Serial clock line.

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    Every device hooked up to the bus has its own unique address, no matter whether it is

    an MCU, LCD driver, memory, or ASIC. Each of these chips can act as a receiver and/or

    transmitter, depending on the functionality. Obviously, an LCD driver is only a receiver,

    while a memory or I/O chip can be both transmitter and receiver.The I2C bus is a multi-

    master bus. This means that more than one IC capable of initiating a data transfer can be

    connected to it. The I2C protocol specification states that the IC that initiates a data transfer

    on the bus is considered the Bus Master. Consequently, at that time, all the other ICs are

    regarded to be Bus Slaves As bus masters are generally microcontrollers, let's take a look at

    a general 'inter-IC chat' on the bus. Lets consider the following setup and assume the MCU

    wants send data to one of its slaves.

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    OPERATION:

    First, the MCU will issue a START condition. This acts as an 'Attention' signal to all

    of the connected devices. All ICs on the bus will listen to the bus for incoming data.

    Then the MCU sends the ADDRESS of the device it wants to access, along with an

    indication whether the access is a Read or Write operation (Write in our example). Having

    received the address, all IC's will compare it with their own address. If it doesn't match, they

    simply wait until the bus is released by the stop condition (see below). If the address matches,

    however, the chip will produce a response called the ACKNOWLEDGEMENT signal.

    Once the MCU receives the acknowledge, it can start transmitting or receiving

    DATA. In our case, the MCU will transmit data. When all is done, the MCU will issue the

    STOP condition. This is a signal that the bus has been released and that the connected ICs

    may expect another transmission to start any moment.

    We have had several states on the bus in our example: START, ADDRSS,

    ACKNOWLEDGEMENT, DATA and STOP. These are all unique conditions on the bus.

    Before we take a closer look at these bus conditions we need to understand a bit about the

    physical structure and hardware of the bus.

    THE I2C BUS HARDWARE STRUCTURE

    As explained earlier, the bus physically consists of 2 active wires called SDA (data)

    and SCL (clock), and a ground connection.

    Both SDA and SCL are initially bi-directional. This means that in a particular device,

    these lines can be driven by the IC itself or from an external device. In order to achieve this

    functionality, these signals use open collector or open drain outputs (depending on the

    technology).

    The bus interface is built around an input buffer and an open drain or open collector

    transistor. When the bus is IDLE, the bus lines are in the logic HIGH state (note that external

    pull-up resistors are necessary for this which is easily forgotten). To put a signal on the bus,

    the chip drives its output transistor, thus pulling the bus to a LOW level. The "pull-up

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    resistor" in the devices as seen in the figure is actually a small current source or even non-

    existent.

    I2C Bus Events: The START and STOP conditions:

    Prior to any transaction on the bus, a START condition needs to be issued on the bus.

    The start condition acts as a signal to all connected IC's that something is about to be

    transmitted on the bus. As a result, all connected chips will listen to the bus.

    After a message has been completed, a STOP condition is sent. This is the signal for

    all devices on the bus that the bus is available again (idle). If a chip was accessed and has

    received data during the last transaction, it will now process this information (if not already

    processed during the reception of the message).

    START: The chip issuing the Start condition first pulls the SDA (data) line low, and next

    pulls the SCL (clock) line low.

    STOP: The Bus Master first releases the SCL and then the SDA line.

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    A single message can contain multiple Start conditions. The use of this so- called"repeated start" is common in I2C.

    A Stop condition always denotes the END of a transmission. Even if it is issued inthe middle of a transaction or in the middle of a byte. It is "good behavior" for a

    chip that, in this case, it disregards the information sent and resumes the "listening

    state", waiting for a new start condition.

    I2C BUS EVENTS: TRANSMITTING A BYTE TO A SLAVE:

    Once the start condition has been sent, a byte can be transmitted by the MASTER to

    the SLAVE.

    This first byte after a start condition will identify the slave on the bus (address) and

    will select the mode of operation. The meaning of all following bytes depends on the slave.

    As the I2C bus gained popularity, it was soon discovered that the number of available

    addresses was too small. Therefore, one of the reserved addresses has been allocated to a new

    task to switch to 10-bit addressing mode. If a standard slave (not able to resolve extended

    addressing) receives this address, it won't do anything (since it's not its address).

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    If there are slaves on the bus that can operate in the extended 10-bit addressing mode,

    they will ALL respond to the ACK cycle issued by the master. The second byte that gets

    transmitted by the master will then be taken in and evaluated against their address.

    I2C BUS EVENTS: RECEIVING A BYTE FROM A SLAVE:

    Once the slave has been addressed and the slave has acknowledged this, a byte can

    be received from the slave if the R/W bit in the address was set to READ (set to '1').

    The protocol syntax is the same as in transmitting a byte to a slave, except that now

    the master is not allowed to touch the SDA line. Prior to sending the 8 clock pulses needed to

    clock in a byte on the SCL line, the master releases the SDA line. The slave will now takecontrol of this line. The line will then go high if it wants to transmit a '1' or, if the slave wants

    to send a '0', remain low.

    All the master has to do is generate a rising edge on the SCL line (2), read the level on

    SDA (3) and generate a falling edge on the SCL line (4). The slave will not change the data

    during the time that SCL is high. (Otherwise a Start or Stop condition might inadvertently

    be generated.)

    During (1) and (5), the slave may change the state of the SDA line.

    In total, this sequence has to be performed 8 times to complete the data byte. Bytes

    are always transmitted MSB first

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    The meaning of all bytes being read depends on the slave. There is no such thing as a

    "universal status register". You need to consult the data sheet of the slave being addressed to

    know the meaning of each bit in any byte transmitted.

    I2C BUS EVENTS: GETTING ACKNOWLEDGE FROM A SLAVE:

    When an address or data byte has been transmitted onto the bus then this must be

    acknowledged by the slave(s). In case of an address: If the address matches its own then that

    slave and only that slave will respond to the address with an ACK. In case of a byte

    transmitted to an already addressed slave then that slave will respond with an ACK as well.

    The slave that is going to give an ACK pulls the SDA line low immediately after

    reception of the 8th bit transmitted, or, in case of an address byte, immediately after

    evaluation of its address. In practical applications this will not be noticeable.

    This means that as soon as the master pulls SCL low to complete the transmission of

    the bit (1), SDA will be pulled low by the slave (2).

    The master now issues a clock pulse on the SCL line (3). The slave will release the

    SDA line upon completion of this clock pulse (4).

    The bus is now available again for the master to continue sending data or to generate a

    stop condition.

    In case ofdata being written to a slave, this cycle must be completed before a stop

    condition can be generated. The slave will be blocking the bus (SDA kept low by slave) until

    the master has generated a clock pulse on the SCL line.

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    I2C BUS EVENTS: GIVING ACKNOWLEDGE TO A SLAVE:

    Upon reception of a byte from a slave, the master must acknowledge this to the

    slave device.

    The master is in full control of the SDA and the SCL line.

    After transmission of the last bit to the master (1) the slave will release the SDA line.

    The SDA line should then go high (2). The Master will now pull the SDA line low (3) .

    Next, the master will put a clock pulse on the SCL line (4). After completion of this

    clock pulse, the master will again release the SDA line (5).The slave will now regain control

    of the SDA line (6).

    If the master wants to stop receiving data from the slave, it must be able to send a

    stop condition.

    Since the slave regains control of the SDA line after the ACK cycle issued by the

    master, this could lead to problems.

    Let's assume the next bit ready to be sent to the master is a 0. The SDA line would be

    pulled low by the slave immediately after the master takes the SCL line low. The master now

    attempts to generate a Stop condition on the bus. It releases the SCL line first and then tries to

    release the SDA line - which is held low by the slave. Conclusion: No Stop condition has

    been generated on the bus.

    This condition is called a NACK: Not acknowledge.

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    I2C BUS EVENTS: NO ACKNOWLEDGE (FROM SLAVE TO

    MASTER):

    This is not exactly a condition. It is merely a state in the data flow between master and

    slave.

    If, after transmission of the 8th bit from the master to the slave the slave does not pull

    the SDA line low, then this is considered a No ACK condition.

    This means that either:

    The slave is not there (in case of an address) The slave missed a pulse and got out of sync with the SCL line of the master. The bus is "stuck". One of the lines could be held low permanently.

    In any case the master should abort by attempting to send a stop condition on the bus.

    APPLICATIONS

    IC is appropriate for peripherals where simplicity and low manufacturing cost are more

    important than speed. Common applications of the IC bus are:

    Reading configuration data from SPD EEPROMs on SDRAM, DDR SDRAM, DDR2SDRAM memory sticks (DIMM) and other stacked PC boards

    Supporting systems management for PCI cards, through a SMBus 2.0 connection. Accessing NVRAM chips that keep user settings. Accessing low speed DACs. Accessing low speed ADCs. Changing contrast, hue, and color balance settings in monitors (Display Data

    Channel).

    Changing sound volume in intelligent speakers. Controlling OLED/LCD displays, like in a cell phone. Reading hardware monitors and diagnostic sensors, like a CPU thermostat and fan

    speed.

    Reading real time clocks.

    http://en.wikipedia.org/wiki/Serial_Presence_Detecthttp://en.wikipedia.org/wiki/SDRAMhttp://en.wikipedia.org/wiki/DDR_SDRAMhttp://en.wikipedia.org/wiki/DDR2_SDRAMhttp://en.wikipedia.org/wiki/DDR2_SDRAMhttp://en.wikipedia.org/wiki/DIMMhttp://en.wikipedia.org/wiki/NVRAMhttp://en.wikipedia.org/wiki/Digital-to-analog_converterhttp://en.wikipedia.org/wiki/Analog-to-digital_converterhttp://en.wikipedia.org/wiki/Display_Data_Channelhttp://en.wikipedia.org/wiki/Display_Data_Channelhttp://en.wikipedia.org/wiki/Organic_light-emitting_diodehttp://en.wikipedia.org/wiki/Liquid_crystal_displayhttp://en.wikipedia.org/wiki/Real-time_clockhttp://en.wikipedia.org/wiki/Real-time_clockhttp://en.wikipedia.org/wiki/Liquid_crystal_displayhttp://en.wikipedia.org/wiki/Organic_light-emitting_diodehttp://en.wikipedia.org/wiki/Display_Data_Channelhttp://en.wikipedia.org/wiki/Display_Data_Channelhttp://en.wikipedia.org/wiki/Analog-to-digital_converterhttp://en.wikipedia.org/wiki/Digital-to-analog_converterhttp://en.wikipedia.org/wiki/NVRAMhttp://en.wikipedia.org/wiki/DIMMhttp://en.wikipedia.org/wiki/DDR2_SDRAMhttp://en.wikipedia.org/wiki/DDR2_SDRAMhttp://en.wikipedia.org/wiki/DDR_SDRAMhttp://en.wikipedia.org/wiki/SDRAMhttp://en.wikipedia.org/wiki/Serial_Presence_Detect
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    Turning on and turning off the power supply of system components.A particular strength of IC is that a microcontroller can control a network of device chips

    with just two general-purpose I/O pins and software.

    Peripherals can also be added to or removed from the IC bus while the system is running,

    which makes it ideal for applications that require hot swapping of components.

    http://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Hot_swappinghttp://en.wikipedia.org/wiki/Hot_swappinghttp://en.wikipedia.org/wiki/Microcontroller
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    3.3 LIGHT DEPENDENT RESISTOR

    INTRODUCTION:

    An LDR (Light dependent resistor), as its name suggests, offers resistance in response to the

    ambient light. The resistance decreases as the intensity of incident light increases, and vice

    versa. In the absence of light, LDR exhibits a resistance of the order of mega-ohms which

    decreases to few hundred ohms in the presence of light. It can act as a sensor, since a varying

    voltage drop can be obtained in accordance with the varying light. It is made up of cadmium

    sulphide (CdS).

    An LDR has a zigzag cadmium sulphide track. It is a bilateral device, i.e., conducts in both

    directions in same fashion.

    A Light Dependent Resistor (aka LDR, photoconductor, or photocell) is a device which has

    a resistance which varies according to the amount of light falling on its surface.

    A typical light dependent resistor is pictured above together with (on the right hand side) its

    circuit diagram symbol. Different LDR's have different specifications, however theLDR's we

    sell in the REUK Shop are fairly standard and have a resistance in total darkness of 1 MOhm,

    and a resistance of a couple of kOhm in bright light (10-20kOhm @ 10 lux, 2-4kOhm @ 100.

    `

    http://www.reuk.co.uk/buy-MINI-LDR.htmhttp://www.reuk.co.uk/buy-MINI-LDR.htmhttp://www.reuk.co.uk/buy-MINI-LDR.htmhttp://www.reuk.co.uk/buy-MINI-LDR.htmhttp://www.reuk.co.uk/REUK-Products-For-Sale.htmhttp://www.reuk.co.uk/REUK-Products-For-Sale.htmhttp://www.reuk.co.uk/buy-MINI-LDR.htmhttp://www.reuk.co.uk/buy-MINI-LDR.htm
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    Uses for Light Dependent Resistors

    Light dependent resistors are a vital component in any electric circuit which is to be turned on

    and off automatically according to the level of ambient light - for example, solar powered

    garden lights, and night security lighting.

    An LDR can even be used in a simple remote control circuit using the backlight of a mobile

    phone to turn on a device - call the mobile from anywhere in the world, it lights up the LDR,

    and lighting (or a garden sprinkler) can be turned on remotely!

    Light Dependent Resistor Circuits

    There are two basic circuits using light dependent resistors - the first is activated by

    darkness, the second is activated by light. The two circuits are very similar and just require

    an LDR, some standard resistors, a variable resistor (aka potentiometer), and any small

    signal transistor

    In the circuit diagram above, theLED lights up whenever the LDR is in darkness. The 10K

    variable resistor is used to fine-tune the level of darkness required before the LED lights up.

    The 10K standard resistor can be changed as required to achieve the desired effect, although

    any replacement must be at least 1K to protect the transistor from being damaged by

    excessive current.

    http://www.reuk.co.uk/electric-circuit.htmhttp://www.reuk.co.uk/Solar-Powered-Irrigation.htmhttp://www.reuk.co.uk/Resistor-Colour-Codes.htmhttp://www.reuk.co.uk/buy-VARIABLE-RESISTORS.htmhttp://www.reuk.co.uk/What-is-a-Transistor.htmhttp://www.reuk.co.uk/buy-5MM-RED-LED.htmhttp://www.reuk.co.uk/buy-5MM-RED-LED.htmhttp://www.reuk.co.uk/buy-5MM-RED-LED.htmhttp://www.reuk.co.uk/What-is-a-Transistor.htmhttp://www.reuk.co.uk/buy-VARIABLE-RESISTORS.htmhttp://www.reuk.co.uk/Resistor-Colour-Codes.htmhttp://www.reuk.co.uk/Solar-Powered-Irrigation.htmhttp://www.reuk.co.uk/electric-circuit.htm
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    By swapping the LDR over with the 10K and 10K variable resistors (as shown above), the

    circuit will be activated instead by light. Whenever sufficient light falls on the LDR

    (manually fine-tuned using the 10K variable resistor), the LED will light up.

    Using an LDR in the Real World

    The circuits shown above are not practically useful. In a real world circuit, the LED (and

    resistor) between the positive voltage input (Vin) and the collector (C) of the transistor would

    be replaced with the device to be powered.

    Typically arelayis used - particularly when the low voltage light detecting circuit is used to

    switch on (or off) a 240V mains powered device. A diagram of that part of the circuit is

    shown above. When darkness falls (if the LDR circuit is configured that way around),

    the relay is triggered and the 240V device - for example a security light - switches on.

    http://www.reuk.co.uk/Relays-and-Renewable-Energy.htmhttp://www.reuk.co.uk/Relays-and-Renewable-Energy.htmhttp://www.reuk.co.uk/Relays-and-Renewable-Energy.htmhttp://www.reuk.co.uk/Relays-and-Renewable-Energy.htm
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    3.5 TEMPERATURE TRANSDUCER

    DS-1621

    TRANSDUCER : A transducer is a device, usually electrical, electronic, electro-

    mechanical, electromagnetic, photonic, or photovoltaic that converts one type of energyor

    physical attribute to another for various purposes including measurement or information

    transfer (for example,pressure sensors).

    TYPES OF TRANSDUCERS:

    ELECTROMAGNETIC: Antenna- converts electromagnetic waves into electric current and vice versa. Cathode ray tube (CRT) - converts electrical signals into visual form Fluorescent lamp, light bulb - converts electrical power into visible light Magnetic cartridge- converts motion into electrical form PhotodetectororPhotoresistor(LDR) - converts changes in light levels into resistance

    changes

    ELECTROCHEMICAL: PH probes Electro-galvanic fuel cell

    ELECTROMECHANICAL: Electro active polymers Galvanometer MEMS Rotary motor, linear motor Vibration powered generator Potentiometer when used for measuring position Load cell converts force to mV/V electrical signal using strain gauge

    http://en.wikipedia.org/wiki/Electricityhttp://en.wikipedia.org/wiki/Electricityhttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Electro-mechanicalhttp://en.wikipedia.org/wiki/Electro-mechanicalhttp://en.wikipedia.org/wiki/Electro-mechanicalhttp://en.wikipedia.org/wiki/Electromagnetichttp://en.wikipedia.org/wiki/Electromagnetichttp://en.wikipedia.org/wiki/Electromagnetichttp://en.wikipedia.org/wiki/Photonichttp://en.wikipedia.org/wiki/Photonichttp://en.wikipedia.org/wiki/Photovoltaichttp://en.wikipedia.org/wiki/Photovoltaichttp://en.wikipedia.org/wiki/Energyhttp://en.wikipedia.org/wiki/Energyhttp://en.wikipedia.org/wiki/Pressure_sensorhttp://en.wikipedia.org/wiki/Pressure_sensorhttp://en.wikipedia.org/wiki/Pressure_sensorhttp://en.wikipedia.org/wiki/Antenna_%28radio%29http://en.wikipedia.org/wiki/Antenna_%28radio%29http://en.wikipedia.org/wiki/Fluorescent_lamphttp://en.wikipedia.org/wiki/Fluorescent_lamphttp://en.wikipedia.org/wiki/Light_bulbhttp://en.wikipedia.org/wiki/Magnetic_cartridgehttp://en.wikipedia.org/wiki/Magnetic_cartridgehttp://en.wikipedia.org/wiki/Photodetectorhttp://en.wikipedia.org/wiki/Photodetectorhttp://en.wikipedia.org/wiki/Photoresistorhttp://en.wikipedia.org/wiki/Photoresistorhttp://en.wikipedia.org/wiki/Photoresistorhttp://en.wikipedia.org/wiki/Photoresistorhttp://en.wikipedia.org/wiki/Photodetectorhttp://en.wikipedia.org/wiki/Magnetic_cartridgehttp://en.wikipedia.org/wiki/Light_bulbhttp://en.wikipedia.org/wiki/Fluorescent_lamphttp://en.wikipedia.org/wiki/Antenna_%28radio%29http://en.wikipedia.org/wiki/Pressure_sensorhttp://en.wikipedia.org/wiki/Energyhttp://en.wikipedia.org/wiki/Photovoltaichttp://en.wikipedia.org/wiki/Photonichttp://en.wikipedia.org/wiki/Electromagnetichttp://en.wikipedia.org/wiki/Electro-mechanicalhttp://en.wikipedia.org/wiki/Electro-mechanicalhttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Electricity
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    ELECTROACOUSTIC: Geophone - convert a ground movement (displacement) into voltage Gramophone pick-up Hydrophone - converts changes in water pressure into an electrical form Loudspeaker, earphone - converts changes in electrical signals into acoustic form Microphone - converts changes in air pressure into an electrical signal Piezoelectric crystal - converts pressure changes into electrical form Tactile transducer

    ELECTROSTATIC: Electrometer

    THERMOELECTRIC: RTD Resistance Temperature Detector Thermocouple Peltier cooler Thermistor (includes PTC resistor and NTC resistor)

    RADIO ACOUSTIC: Receiver (radio) Eiger-Mller tube used for measuring radioactivity.

    TEMPERATURE TRANSDUCER USED:

    DS 1621 Digital Thermometer and Thermostat.

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    WHY DS1621??

    DS1621 is a Digital Thermometer and Thermostat which measures temperature with

    out any external components from -55C to +125C in 0.5C incrementsand Converts it to

    digital word in less than 1 second. Temperature is read as a 9-bit value (2-byte transfer). It

    also providesa wide power supply range of 2.7V to 5.5V.It is available in 8-pin DIP or SO

    package (150mil and 208mil) with a price of 200-300. DS1621 well supports I2c

    communication protocol.

    Because of all the available features and considering its low cost we can say it best

    suits the application of DATA LOGGER.

    PIN ASSIGNMENT

    PIN DESCRIPTION

    SDA - 2-Wire Serial Data Input/Output A0 - Chip Address Input

    SCL - 2-Wire Serial Clock A1 - Chip Address InputGNDGround A2 - Chip Address Input

    TOUT - Thermostat Output Signal VDD - Power Supply Voltage

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    DESCRIPTION:

    The DS1621 Digital Thermometer and Thermostat provides 9-bit temperature

    readings, which indicate the temperature of the device. The thermal alarm output, TOUT, isactive when the temperature of the device exceeds a user-defined temperature TH. The output

    remains active until the temperature drops below user defined temperature TL, allowing for

    any hysteresis necessary.

    User-defined temperature settings are stored in nonvolatile memory so parts may be

    programmed prior to insertion in a system. Temperature settings and temperature readings are

    all communicated to/from the DS1621 over a simple 2-wire serial interface.

    DETAILED PIN DESCRIPTION :

    OPERATION:

    MEASURING TEMPERATURE:-

    A block diagram of the DS1621 is shown in Figure 1.The DS1621 measures

    temperature using a band gap-based temperature sensor. A delta-sigma analog-to digital

    converter (ADC) converts the measured temperature to a digital value that is calibrated in C;for F applications, a lookup table or conversion routine must be used.

    The temperature reading is provided in a 9-bit, twos complement reading by issuing

    the READ TEMPERATURE command. The data is transmitted through the 2-wire serial

    interface, MSB first. The DS1621 can measure temperature over the range of -55_C to

    +125_C in 0.5_C increments.

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    Figure 1. DS1621 FUNCTIONAL BLOCK DIAGRAM

    Table 2. TEMPERATURE/DATA RELATIONSHIPS

    Since data is transmitted over the 2-wire bus MSB first, temperature data may be

    written to/read from the DS1621 as either a single byte (with temperature resolution of 1_C)

    or as two bytes. The second byte would contain the value of the least significant (0.5_C) bit

    of the temperature reading as shown in Table 1.Note that the remaining 7 bits of this byte

    are set to all "0"s

    .

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    Temperature is represented in the DS1621 in terms of a _C LSB, yielding the

    following

    9-bit format:

    TEMPERATURE, TH, and TL FORMAT FOR T= -25_C

    OPERATION AND CONTROL

    The DS1621 must have temperature settings resident in the TH and TL registers for

    thermostatic operation. A configuration/status register also determines the method of

    operation that the DS1621 will use in a particular application, as well as indicating the status

    of the temperature conversion operation.

    The configuration register is defined as follows:

    Where

    DONE = Conversion done bit. 1 = Conversion complete, 0 = Conversion inprogress.

    THF = Temperature High Flag. This bit will be set to 1 when the temperature isgreater than or equal to the value of TH. It will remain 1 until reset by writing 0

    into this location or removing power from the device. This feature provides a method

    of determining if the DS1621 has ever been subjected to temperatures above TH

    while power has been applied.

    TLF = Temperature Low Flag. This bit will be set to 1 when the temperature is lessthan or equal to the value of TL. It will remain 1 until reset by writing 0 into this

    location or removing power from the device. This feature provides a method of

    determining if the DS1621 has ever been subjected to temperatures below TL while

    power has been applied.

    NVB = Nonvolatile Memory Busy flag. 1 = Write to an E2 memory cell in progress,0 =nonvolatile memory is not busy. A copy to E2 may take up to 10 ms.

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    POL = Output Polarity Bit. 1 = active high, 0 = active low. This bit isnonvolatile.

    1SHOT = One Shot Mode. If 1SHOT is 1, the DS1621 will perform onetemperature conversion upon receipt of the Start Convert T protocol. If 1SHOT is 0,

    the DS1621 will continuously perform temperature conversions. This bit is

    nonvolatile.

    X = Reserved.2-WIRE SERIAL DATA BUS

    The DS1621 supports a bi-directional 2-wire bus and data transmission protocol. A

    device that sends data onto the bus is defined as a transmitter, and a device receiving data as a

    receiver. The device that controls the message is called a master." The devices that are

    controlled by the master are slaves." The bus must be controlled by a master device, which

    generates the serial clock (SCL), controls the bus access, and generates the START and

    STOP conditions. The DS1621 operates as a slave on the 2-wire bus.

    Connections to the bus are made via the open-drain I/O lines SDA and SCL.

    The following bus protocol has been defined (See Figure 4):

    Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is

    HIGH. Changes in the data line while the clock line is high will be interpreted as

    control signals.

    Accordingly, the following bus conditions have been defined:

    Bus not busy: Both data and clock lines remain HIGH. Start data transfer: A change in the state of the data line, from HIGH to LOW,

    while the clock is HIGH, defines a START condition.

    Stop data transfer: A change in the state of the data line, from LOW to HIGH, whilethe clock line is HIGH, defines the STOP condition.

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    Data valid: The state of the data line represents valid data when, after a STARTcondition, the data line is stable for the duration of the HIGH period of the clock

    signal. The data on the line must be changed during the LOW period of the clock

    signal. There is one clock pulse per bit of data.

    Within the bus specifications a regular mode (100 kHz clock rate) and a fast mode (400 kHz

    clock rate) are defined. The DS1621 works in both modes.

    Acknowledge: Each receiving device, when addressed, is obliged to generate anacknowledge after the reception of each byte. The master device must generate an

    extra clock pulse which is associated with this acknowledge bit.

    A device that acknowledges must pull down the SDA line during the acknowledge

    clock pulse in such a way that the SDA line is stable LOW during the HIGH period of

    the acknowledge related clock pulse. Of course, setup and hold times must be taken

    into account. A master must signal an end of data to the slave by not generating an

    acknowledge bit on the last byte that has been clocked out of the slave. In this case,

    the slave must leave the data line HIGH to enable the master to generate the STOP

    condition.

    Figure 4. DATA TRANSFER ON 2-WIRE SERIAL BUS

    Figure 4 details how data transfer is accomplished on the 2-wire bus. Depending upon

    the state of the R/W bit, two types of data transfer are possible:

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    1. Data transfer from a master transmitter to a slave receiver. The first bytetransmitted by the master is the slave address. Next follows a number of data bytes.

    The slave returns an acknowledge bit after each received byte.

    2. Data transfer from a slave transmitter to a master receiver. The master transmitsthe first byte, the slave address. The slave then returns an acknowledge bit. Next

    follows a number of data bytes transmitted by the slave to the master. The master

    returns an acknowledge bit after all received bytes other than the last byte. At the end

    of the last received byte, a not acknowledge is returned.

    The master device generates all of the serial clock pulses and the START and STOP

    conditions. A transfer is ended with a STOP condition or with a repeated START condition.

    Since a repeated START condition is also the beginning of the next serial transfer, the bus

    will not be released

    COMMAND SET

    Data and control information is read from and written to the DS1621 in the format

    shown in Figure 5. To write to the DS1621, the master will issue the slave address of theDS1621 and the R/Wbit will be set to 0. After receiving an acknowledge, the bus master

    provides a command protocol. After receiving this protocol, the DS1621 will issue an

    acknowledge and then the master may send data to the DS1621. If the DS1621 is to be read,

    the master must send the command protocol as before and then issue a repeated START

    condition and the control byte again, this time with the R/W bit set to 1 to allow reading of

    the data from the DS1621. The command set for the DS1621 as shown in Table 3 is as

    follows:

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    ABSOLUTE MAXIMUM RATINGS*

    Voltage on Any Pin Relative to Ground -0.5V to +6.0V

    Operating Temperature Range -55_C to +125_C

    Storage Temperature Range -55_C to +125_C

    Soldering Temperature See IPC/JEDEC J-STD-020A specification

    Supply voltage range 2.7V to 5.5V

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    DC ELECTRICAL CHARACTERISTICS (-55C to +125C; VDD = 2.7V

    to 5.5V)

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    TIMING DIAGRAM:

    RECOMMENDED DC OPERATING CONDITIONS

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    AC ELECTRICAL CHARACTERISTICS (-55C to +125C; VDD = 2.7V to 5.5V)

    * Refer Note 3 In Appendix-C

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    3.6 LCD LIQUID CRYSTAL DISPLAY

    INTRODUCTION:

    A liquidcrystal display (LCD) is a thin, flat display device made up of any number of

    color or monochrome pixels arrayed in front of a light source or reflector. It is often utilized

    in battery-powered electronic devices because it uses very small amounts of electric power.

    OVERVIEW:

    Each pixelof an LCD typically consists of a layer of molecules aligned between two

    transparentelectrodes, and two polarizing filters, the axes of transmission of which are (in

    most of the cases) perpendicular to each other. With no liquid crystal between the polarizing

    filters, light passing through the first filter would be blocked by the second (crossed)

    polarizer.

    The surfaces of the electrodes that are in contact with the liquid crystal material are

    treated so as to align the liquid crystal molecules in a particular direction. This treatment

    typically consists of a thin polymer layer that is unidirectionally rubbed using, for example, a

    cloth. The direction of the liquid crystal alignment is then defined by the direction of rubbing.

    Electrodes are made of a transparent conductor called "ITO" or Indium Tin Oxide.

    Before applying an electric field, the orientation of the liquid crystal molecules is

    determined by the alignment at the surfaces. In a twisted nematic device (still the most

    common liquid crystal device), the surface alignment directions at the two electrodes are

    perpendicular to each other, and so the molecules arrange themselves in a helical structure, or

    twist. Because the liquid crystal material is birefringent, light passing through one polarizing

    filter is rotated by the liquid crystal helix as it passes through the liquid crystal layer,

    allowing it to pass through the second polarized filter. Half of the incident light is absorbed

    by the first polarizing filter, but otherwise the entire assembly is transparent.

    When a voltage is applied across the electrodes, a torque acts to align the liquid

    crystal molecules parallel to the electric field, distorting the helical structure (this is resisted

    by elastic forces since the molecules are constrained at the surfaces). This reduces the

    rotation of the polarization of the incident light, and the device appears gray. If the applied

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    voltage is large enough, the liquid crystal molecules in the center of the layer are almost

    completely untwisted and the polarization of the incident light is not rotated as it passes

    through the liquid crystal layer. This light will then be mainly polarized perpendicular to the

    second filter, and thus be blocked and the pixel will appear black. By controlling the voltage

    applied across the liquid crystal layer in each pixel, light can be allowed to pass through in

    varying amounts thus constituting different levels of gray.

    LCD USED:

    In this project we are making use of 20 character X 40 line LCD module with LED

    backlight DMC20481

    BLOCK DIAGRAM

    FIG: BLOCK DIAGRAM OF LCD MODULE

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    FEATURES:

    Interface with 8-bit or 4-bit MPU is available. 192 kinds of alphabets, numerals, symbols and special characters can be displayed by

    built-in character generator (ROM).

    Other preferred characters can be displayed by character generator (RAM). Various functions of instruction are available by programming: Clear display cursor at home on/off cursor blink character Shift display shift cursor Read/write display data. Etc. Compact and light weight design which can be easily assembled in devices. Single power supply +5V drive (except for extended temp. type) Low power consumption.

    PIN ASSIGNMENT:

    Pin No. Symbol Level Function

    1 Vss -

    Power Supply

    0V(GND)

    2 Vcc - +5V

    3 VEE - For LCD Drive

    4 RS H/L

    Register Select Signal

    Register H : Data InputSelect L : Instruction Input

    5 R/W H/L

    H : Data Read (Module-MPU)

    L : Data Write (Module-MPU)6 E H,H-L Enable Signal (No Pull-Up Resistor)

    7 DB0 H/L

    Data Bus Line

    8 DB1 H/L

    9 DB2 H/L

    10 DB3 H/L

    11 DB4 H/L

    12 DB5 H/L

    13 DB6 H/L

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    TIMING CHART:

    Item Standard Value Unit

    Min. Typ. Max.

    Enable Cycle Time 1000 - ns

    Enable Pulse Width, High Level 450 - ns

    Enable Rise and Decay Time - - 25 ns

    Address Setup Time, RS, R/W-E 140 - ns

    Data Delay Time - - 320 nsData Setup Time 195 - ns

    Data Hold Time(Write Operation) 10 - ns

    Data Hold Time(Read Operation) 20 - ns

    Address Hold Time 10 - ns

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    CHAPTER 4.

    SOURCE CODE OF THE PROJECT

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    #include

    #include

    #include

    #include

    #include

    #define d P1#define EOC_c() while(intr==1)

    sbit DQ=P2^0;

    sbit rd=P3^3;

    sbit wr=P3^4;

    sbit intr=P3^5;

    sbit Light=P3^6;

    sbit fan=P3^7;

    unsigned char Read_Temperature (void);

    void LCD_integer(unsigned char n);unsigned char adc();

    void h2a(unsigned char n);

    void main(void)

    {

    unsigned char p,s=0;

    unsigned char b;

    InitSerial();

    LCD_init();

    d=0xff;

    intr=1;

    LCD_cmd(0x0c);

    while(1)

    {

    b=adc();

    LCD_cmd(0x01);

    LCD_str("lgt intesity:");

    serial_trans_str("lgt intnsty:");

    LCD_cmd(0x8d);

    h2a(b);

    p=owTouchReset();if(p)

    {

    LCD_cmd(0xc0);

    LCD_str("no sensor");

    }

    else

    {

    s=Read_Temperature();

    s=s-3;

    LCD_cmd(0xc0);LCD_str("TEMP:");

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    serial_trans_str("TEMP:");

    LCD_cmd(0xc5);

    LCD_integer(s);

    LCD_dis('c');

    }

    if(s>35){

    LCD_cmd(0xc0);

    LCD_str("Fan is on:");

    fan=1;

    }

    else

    {

    LCD_cmd(0xc0);

    LCD_str("Fan is off:");

    fan=0;

    }if(b>4)|(THV

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    return TZ;

    }

    void LCD_integer(unsigned char n)

    {

    unsigned char z;unsigned char num[8];

    unsigned char l;

    l=0;

    while(n>0)

    {

    z=n%10;

    num[l++]=z;

    n=n/10;

    }

    while(l-->0)

    {LCD_dis(num[l]+48);

    serial_trans(num[l]+48);

    }

    }

    void delay( unsigned int z)

    {

    unsigned int i,j;

    for(i=0;i

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    t=t%10;

    n=n%10;

    LCD_dis(temp+48);

    serial_trans(temp+48);

    LCD_dis(t+48);

    serial_trans(t+48);LCD_dis(n+48);

    serial_trans(n+48);

    }

    }

    unsigned char adc()

    {

    unsigned char a;

    rd=1;

    wr=0;delay(1);

    wr=1;

    while(intr==1);

    rd=0;

    a=d;

    delay(1);

    intr=1;

    return a;

    }

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    CHAPTER 5

    ADVANTAGES & APPLICATIONS

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    5.0 ADVANTAGES OF USING A DATA ACQUISITION FOR

    COLLECTING DATA:

    A data acquisition is an attractive alternative to either a recorder or data acquisition

    system in many applications. When compared to a recorder, data loggers have the ability to

    accept a greater number of input channels, with better resolution and accuracy. Also, data

    loggers usually have some form of on-board intelligence, which provides the user with

    diverse capabilities. For example, raw data can be analyzed to give flow rates, differential

    temperatures, and other interpreted data that otherwise would require manual analysis by the

    operator.

    The major difference between a data acquisition and a recorder, however, is the way

    the data itself is stored, analyzed and recorded. A common recorder accepts an input, and

    compares it to a full scale value. The pen arm is then deflected across the recording width, to

    produce the appropriate ratio of the actual input to the full scale input.

    For example, using a recorder with a 1 Volt full scale, an input of 0.5 Volts would

    move the pen 0.5/1 or 50% of the distance across the recording width. In comparison, a data

    logger accepts an input which is fed into an analog-to-digital converter prior to analysis and

    storage. This method has advantages in accuracy and resolution, while only a recorder can

    provide a truly continuous trend recording.

    5.1 DATA LOGGING VERSUS DATA ACQUISITION:

    The terms data logging and data acquisition are often used interchangeably. However,

    in a historical context they are quite different. A data logger is a data acquisition

    system, but a data acquisition system is not necessarily a data logger.

    Data loggers typically have slower sample rates. A maximum sample rate of 1 Hz may beconsidered to be very fast for a data logger, yet very slow for a typical data acquisition

    system.

    Data loggers are implicitly stand-alone devices, while typical data acquisition system mustremain tethered to a computer to acquire data. This stand-alone aspect of data loggers implies

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    on-board memory that is used to store acquired data. Sometimes this memory is very large to

    accommodate many days, or even months, of unattended recording. This memory may be

    battery-backed static random access memory, flash memory or EEPROM. Earlier data

    loggers used magnetic tape punched paper tape, or directly viewable records such as strip

    chart recorders.

    Given the extended recording times of data loggers, they typically feature a time-and date-stamping mechanism to ensure that each recorded data value is associated with a date and

    time of acquisition. As such, data loggers typically employ built-in real-time clocks whose

    published drift can be an important consideration when choosing between data loggers.

    Data logger range from simple single-channel input to complex multi-channel instruments.Typically, the simpler the device the less programming flexibility. Some more sophisticated

    instruments allow for cross-channel computations and alarms based on predetermined

    conditions. The newest of data loggers can serve web pages, allowing numerous people to

    monitor a system remotely.

    The unattended and remote nature of many data logger applications implies the need in someapplications to operate from a DC power source, such as battery. Solar power may be used to

    supplement these power sources. These constraints have generally led the data logger industry

    to ensure that the devices they market are extremely power efficient relative to computers. In

    many cases they are required to operate in harsh environmental conditions where computers

    will not function reliably.

    This unattended nature also dictates that the data loggers must be extremely reliable. Sincethey may operate for long periods nonstop with little or no human supervision, and may be

    installed in harsh or remote locations, it is imperative that so long as they have power, they

    will not fail to log data for any reason. Manufacturers go to great length to ensure that the

    devices can be depended on in these applications. As such data loggers are almost completely

    immune to the problems that might affect a general-purpose computer in the same

    application, such as program crashes and the instability of some operating systems.

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    5.2 APPLICATIONS OF DATA ACQUISITION:

    Unattended weather station recording (such as wind speed / direction, temperature, relativehumidity, solar radiation)

    Unattended hydrographic recording (such as water level, water depth, water flow, water PH,water conductivity).

    Unattended soil moisture level recording. Unattended gas pressure recording. Road traffic counting. Measure temperatures (humidity etc) of perishables during shipments.

    Process monitoring for maintenance and troubleshooting applications Wild life research. Measure vibration handling (drop height) environment of distribution packaging. Tank level monitoring. Deformation monitoring of any object with geodetic or geotechnical sensors controlled by an

    automatic deformation monitoring system.

    Environmental monitoring.

    Vehicle testing Monitoring of relay status in railway signaling. For science education enabling measurement, scientific investigation and an appreciation

    of change.

    Record trend data at regular intervals in veterinary vital signs monitoring

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    CHAPTER 6.

    CONCLUSION &

    FUTURE DIRECTIONS

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    CONCLUSION:

    Data Acquisition is not limited for any particular application, it can be used any where

    in a process industries with little modifications in software coding according to the

    requirements. This concept not only ensures that our work will be usable in the future but

    also provides the flexibility to adapt and extend, as needs change.

    Basically, Data Acquisition is a stand alone device but we can even connect it to a PC

    by using RS232.We can also use Agilent VEE Pro software which is a graphical

    programming environment optimized for use with electronic instruments for providing the

    lab view of the parameters measured using Data Acquisition

    FUTURE DIRECTIONS:

    Data Acquisition are changing more rapidly now than ever before. The original model

    of a stand alone data logger is changing to one of a device that collects data but also has

    access to wireless communications for alarming of events, automatic reporting of data and

    remote control. Data Acquisition are beginning to serve web pages for current readings e-

    mail their alarms and FTP their daily results into databases or direct to the users.

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    BIBLIOGRAPHY

    TEXT BOOKS REFERED:

    1. AVR Microcontroller and Embedded Systems by ALI MAZIDI

    2. ATMEL AVR microcontroller primer: programming and interfacing

    3. AVR CONTROLLER Data sheets

    4. Hand book for Digital ICs from Analogic Devices

    WEBSITES VIEWED:

    www.atmel.com www.beyondlogic.org www.dallassemiconductors.com www.maxim-ic.com www.alldatasheets.com www.howstuffworks.com www.digi.com www.wikipedia.com