Fig1: component of Demo Set. Fig2:Load Map of M16C Family.

Glaphic LSI

Change LSIfor BNC signal

Analog RGB connector

ＶＲＡＭ

Decode J PEG datasand disply datas usedanalog RGB

Include Software library for M16C/ 62

* J PEG Encode* J PEG Decode* FAT16

M16C/62M(10MHz@3V)

SRAM

RS232C connector

compact flashinterface

Power supply（8V-12V)

Buttery(9V)Or

ArtificialRefine LSI

(M6270G)

Pixel Size160x144xRGB

RGB data (160 x 144 x 3)

Stores JPEG encode data

RESET SW

POWER SW

compact flash

Support for on-boardprogramming

Flash Rewriting connector

BNC connector

Fig1:component of Demo Set

M16C/21Built-in FLDC

M16C/22Built-in LCDC

M16C/24Built-in USB

ASSP progression

M16C/6NBuilt-in CAN

M16C/6VBuilt-in OSD

M16C/6KBuilt-in

Keyboardcontroller

M16C/6110MHz[100nsec]

5MIPSASSP progression, ASCP progression

M32C/8XASSP progressionASCP progression


15MIPS

M32C/10060MHz[16.7nsec]

True 32-bit

M32C/81Processing capability

increase30MHz[33nsec]

23MIPS

M16C/6216MHz[62.5nsec]

8MIPS


8MIPS


8MIPS


8MIPSM16C/6HTeletext

CPU performance

M32C/82Enhanced peripheral30MHz[33nsec]

23MIPS

M32C/83Enhanced

communication30MHz[33nsec]

23MIPS

: New product

: Under development

: Planning Stage

[ ] : Minimum instruction execution time

MIPS : VAXMIPS ( No optimisation )

MIPS for the future chips are target figures.

Seriesprogression

Pro

cess

ing

ca

pa

city

to

op

era

ting

fre

qu

en

cy r

atio

Pro

cess

ing

ca

pa

city

to

po

we

r d

issi

pa

tion

ra

tio

Pro

gra

m s

ize

eff

icie

ncy

EM

I &

EM

S p

erf

orm

an

ce

Pe

riph

era

l fu

nct

ion

s

Ava

ilab

le m

em

ory

Lo

w-v

olta

ge

op

era

tion


5MIPS


8MIPS

M16C/62x24MHz[41.7nsec]

12MIPS

M32C/8X60MHz[16.7nsec]Speed increase

M32C/10X100MHz[10nsec]Speed increase

M16C/xxASSP progressionASCP progression

M16C/1XASSP progressionASCP progression

16MHz operationLow-voltage versionsMemory progression

Fig2:Load Map of M16C Family

SRAM

Compact Flash

RS232CDriver

SW LED

RS232C

Lens

M16C/62M

UART

UART

Port

SI/O

PortPort

ArtificialRefine LSI

(M6270G)

Flash Rewritingconnector

Graphics LSI

RAM

LSI whichchange to

BNCsignal

Analog RGBconnector

BNCconnector

M16C SystemBus

Fig3 ： Block of Demo Set

Special Functions Registers Area

Internal (20KByte)ＲＡＭ

Reserve Area

Graphic IC Area

Compact Flash card Area(MF0064M-04BAXX)

Reserve Area

External SRAM Area

Internal FLASH ROM Area(256K Bytes)

H０００００

H００４００

6 H００００

H０８０００

H２８０００

H３００００

C H００００

Address

FFFFFH

Fig4:Memory Map

b7

b6

b5

b4

b3

b2

b1

b0

b7

b6

b5

b4

b3

b2

b1

b0

Sytem Clock(Timer Output)

Request Send Clock(CTS)

Send Clock(SI/ O Clock)

Send Data(SI/ O Data)

(DMA Request)

(M16C/ 62 Signal)

1MHz(1us)4us

5MHz (200ns)1.6us/ 1byte

b7

b6

b5

b4

b3

b2

b1

b0

RequestSI/ O Clock

SetDMA request

Start DMA(send External SRAM from SI/ O)

> 3/ 8 times

272ms( times of receiving RGB data) End point of receiving RGB data

Fig5:Timing chart of receiving RGB data

Capture RGB data

Input SW

Select?

JPEG Decode

Send to PC

Capture RGB data

JPEG Decode

JPEG Encode

Read DOS file in Flash Card

JPEG Encode

Write to Graphic ICWrite DOS file to Flash Card

Write to Graphic IC

: Use JPEG Library

: Use FAT Library

Fig6:General Flow of Demo Program

Special Functions Registers Area

Graphic IC Area

Compact Flash card Area(MF0064M-04BAXX)

Reserve Area

00000H

00400H

06000H

08000H

28000H

30000H

C0000H

Address

FFFFFH

04E3AH

Demo Program Work Area(About 18.5K Bytes)

Free Area in RAM

RGB Strage AreaJ PEG Strage Area etc(About 156.5K Bytes)

57428H

Initial data ofC lunguage

(About 47K Bytes)

D0000H

Intarnal ROM Area(256K Bytes)

Intarnal RAM Area(20K Bytes)

Free Area in External RAM

Free Area in ROM

DBBA4H

Demo Program Area(About 111K Bytes)

Fig7:Memory Map of Demo Program

InputPicture

DCT Quantization Huffman Coding

Quantization Table Huffman Coding Table

JPEGData

Library

DTC (Discrete Cosine Transform): Each pixel component converted into the frequency domain by two dimension operationQuantization: Divide and round DTC coefficient on quantization table (Non-reversable)Huffman Coding: The most probable data in a quantized result assigned to fewer bits.

Note) The created quantization table and Huffman table are taken in into the compressed JPEG data.

(Note)

YCbCr Format

(Note)

Fig8 ： JPEG Encode Processing

OutputData

InverseDCT

InverseQuantization

HuffmanDecoding

QuantizationTable

Huffman Table

J PEGData

YCbCrFormat

Fig9 ： JPEG Decode Processing

Demo Program

FAT Library(FAT control programs)

Compact FlashDriver

Interface

MELCARDMITSUBISHI

Flash ATA64MB

OtherStorageDevice

Other DeviceDriver

Interface

Fig10 ： Structure of FAT Library

: Include Demo program

Fig1: component of Demo Set. Fig2:Load Map of M16C Family.

Documents

Transcript of Fig1: component of Demo Set. Fig2:Load Map of M16C Family.