Field Effect Transistor (FET)

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Field Effect Transistor (FET). Introduction. Field Effect Transistor (FET). Junction Field Effect Transistor (JFET). Metal Oxide Semiconductor FET (MOSFET). Depletion Type MOSFET. Enhancement Type MOSFET. Junction Field Effect Transistor (JFET). n-channel JFET. p-channel JFET. - PowerPoint PPT Presentation

Transcript of Field Effect Transistor (FET)

Slide 1

Field Effect Transistor (FET)1IntroductionField Effect Transistor (FET)Junction Field Effect Transistor (JFET)Metal Oxide Semiconductor FET(MOSFET)Depletion TypeMOSFETEnhancement TypeMOSFET2Junction Field Effect Transistor (JFET) n-channel JFET

p-channel JFET

3JFET IntroductionJFET is always operated with the gate source p-n junction reversed biased.

4JFET IntroductionChannel width and thus the channel resistance can be controlled by varying the gate voltage.

JFET biased for constructionGreater VGG narrows the channel Less VGG widens the channel

Water analogy for the JFET control5JFET Characteristics and ParametersFor VGS = 0 v, the value of VDS at which ID becomes essentially constant is the pinch-off voltage (Vp) and is denoted as IDSS.Breakdown occurs at point C when ID begins to increase very rapidly with any further increase in VDS .

6VGS controls ID.

The value of VGS that makes ID approximately zero is the cutoff voltage VGS(off). The JFET must operate between VGS = 0 and VGS(off) . 7Transfer Characteristics William Bradford Shockley derived a relationship between ID and VGS which is known as Shockleys equation and is given by

The above equation suggests that when VGS = 0, ID = IDSS.When VGS = Vp, ID = 0

8Transfer curve from the drain characteristics

9ExampleThe following parameters are obtained from a certain JFET datasheet: VP = -8 v and IDSS = 5 mA. Determine the values of ID for each value of VGS ranging from 0 v to -8 v in 1 v steps. Plot the transfer characteristic curve from these data.Solution:

1010

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VGSID12FET BiasingThe following relations can be applied to the dc analysis of most of the FET amplifiers:13

JFET Biasing: Fixed Bias Circuit14

JFET Biasing: Fixed Bias Circuit15

Circuit for dc analysisFixed Bias CircuitGS Loop:Apply KVL

16

Apply the Shockleys Equation:

Plot Shockleys equation:

Fixed Bias CircuitQ-Point:17

Fixed Bias CircuitDS Loop

18

Also note that

In addition

Example: Determine the following for the given Fig.VGSQ (b) IDQ (c) VDS (d) VD (e) VG (f) VS.Solution:(a) VGSQ = -VGG = -2 V19

(b)(c)

(d) VD = VDS = 4.75 V(e) VG = VGS = -2 V(f) VS = 0 VJFET Biasing: Self Bias Configuration

20Self Bias Circuit: DC Analysis

21

Self-bias Circuit for dc analysis21JFET Self Bias CircuitIG = 0IS = ID From GS Loop: -VGS = VRSor VGS = -ISRSSubstituting IS = IDVGS = -IDRS.22

JFET Self Bias CircuitShockley Equation:

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JFET Self Bias Circuit: Q-Point Self-Bias Line:Since VGS = -IDRS .If ID = 0 then VGS = 0and ID = IDDS/2 (say), then VGS = -IDDS RS /2Superimposing this straight line on the transfer curve, we get Q-point as shown in the Fig.

24Self Bias lineTransfer Curve(Shockley equation)24JFET Self Bias CircuitDS Loop: Using KVL

Substituting IS = ID,

or

In addition

25

JFET Self Bias Circuit: Example 1Determine the following: VGSQ , IDQ, VDS, VS, VG, and VD.Solution:Step 1: Draw the self bias line: VGS = - IDRS , When ID = 0, VGS = 0.Choosing ID = 4 mA, VGS = -4mA1 k = -4 vThe line is drawn below:

26VGS (volts) JFET Self Bias Circuit: Example 1Step 2: Plot the Shockley equation: (IDSS = 8mA, VP = -6v)

27VGS0-1-3 -4-5-6ID (mA)85.5520.880.220ID (mA)

JFET Self Bias Circuit: Example 1Step 3: Show the Shockley curve and the self bias line on the same graph paperFrom the graph, VGSQ = -2.6 v, IDQ = 2.6 mA 28

ID (mA)VGS (volts)Self bias lineShockley CurveQ-Point

JFET Self Bias Circuit: Example 1Step 4: Find the remaining quantities: VDS = VDD ID(RS + RD ) = 20 2.6mA( 1 k + 3.3 k) = 8.82 vVS = IDRS = (2.6mA)(1k) = 2.6 vVG = 0 vVD = VDS + VS = 8.82 + 2.6 = 11.42 v (or VD = VDD IDRD = 11.42 v)

29JFET Biasing: Voltage Divider Circuit30

JFET Biasing: Voltage Divider Circuit dc analysis31

VG

Applying KVL,

or

But VRS = ISRS = IDRSTherefore

Voltage Divider Circuit: Q-PointBias Line:(i) When ID = 0VGS = VG IDRS = VG (0)(RS)VGS = VG(ii) When VGS = 0

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Plot this line along with the Shockley Curve, as shown in the Figure.JFET Biasing: Voltage Divider Circuit dc analysis33

VG

From DS Loop:

Voltage Divider Circuit: ExampleDetermine the following:IDQ and VGSQ.VDVSVDSVDG.

34Voltage Divider Circuit: Example 1Solution: IDSS = 8 mA, Vp = -4 v. Shockley Equation:

Bias Line: 35

VGS -4-2-10ID mA024.58

When ID = 0, VGS = 1.82 v For VGS = 0, ID = 1.82/1.5k = 1.21 mA36

From the Figure, IDQ = 2.4 mA, VGSQ = -1.8 v VD = VDD - IDRD = 16 (2.4mA)(2.4k) = 10.24 v(c) VS = IDRS = 16 (2.4mA)(2.4k) = 10.24 v(d) VDS = V DD ID(RD + RS ) = 16 (2.4mA)(2.4k + 1.5k) = 6.64 v (e) VDG = VD - VG = 10.24 1.82 = 8.42 vVoltage Divider Circuit: Example 2For the given network, DetrmineVG.(b) IDQ and VGSQ.VD and VS.VDSQ .Solution:(a)

(b) IDSS = 10mA, Vp = -3.5 v

37

38VGS (volts)-3.5-2-10ID (mA)01.85.110

Bias Line: VGS = VG IDRS = 2.16 ID(1.1k)When ID = 0, VGS = 2.6 vWhen VGS = 0, I = 2.16/1.1k = 2mAFrom the graph, we see thatIDQ = 3.3 mA, VGSQ = -1.5 v(c) VD = VDD IDQRD = 20 - (3.3mA)(2.2k) = 12.74 v VS = IDRS = 3.63 v(d) VDSQ = VDD IDQ(RD +RS ) = 9.11 v

Metal-Oxide -Semiconductor Field Effect Transistor (MOSFET)39MOSFETDepletion Type MOSFETEnhancement-Type MOSFETN- Channel Depletion-Type MOSFET40Construction of D-MOSFET(n-Channel)

The foundation of this type of FET is the substrate (p-type material). The source and drain terminals are connected through metallic contacts to n doped regions linked by an n channel.The gate is also connected to a metal contact surface but remains insulated from the n-channel by a SiO2 layer.Basic Operation and Charactersitics of N Channel D-MOSFET 41

I D= I S= IDSS VGS = 0When VGS = 0 and VDS is applied, the drain current ID = IDSS flows through the circuit due to the free electrons of the n-channel.41Basic Operation and Characterstics of N-Channel D-MOSFET 42When VGS < 0, recombination between electrons and holes occurs. The more negative the bias, the higher the rate of combination. The resulting level of ID is reduced and becomes zero at pinch-off voltage.

Electrons repelled by negative Potential at gate.42Basic Operation and Charactersitics of D-MOSFET 43When VGS > 0, the gate will draw additional electrons from the p-substrate due to the reverse leakage current and the drain current increases at a rapid rate.

43Example: Sketch the transfer characteristics for an n-channel depletion type MOSFET with IDSS = 10 mA and Vp = -4 v.Solution: 44

VGS -4-2-10+1ID (mA)02.55.61015.6The curve is plotted on the next slide. 4445Gate Source VoltageDrain Current (A)

P-Channel depletion type MOSFET46

Symbols47

N-Channel P-Channel

Example1: For the n-channel depletion type MOSFET of the Fig., determine (a) IDQ and VGSQ.(b) VDS.Solution: Shockley Equation:4818 v

VGS-3-2-101ID (mA)00.72.7610.7

Bias Line:

49

When ID = 0, VGS = 1.5,When VGS = 0, ID = VG/RS = 1.5/750 = 2 mA From the graph, IDQ = 3.1 mA, VGSQ = -0.8 vVDS = VDD ID(RD + RS) = 10.1 vExample2: Determine the following for the given network. (a) IDQ and VGSQ (b) VD.Solution:(a) Shockley Equation:50

VGS-8-6-5-4-2012ID(mA)00.51.1252.004.58.0010.12512.5Bias Line:VGS = -IDRS. When VGS = 0, ID = 0.When ID = 2.5 mA (say)VGS = -2.510-3 2.4 1000 = -6V

51

ID (mA)VGS (volts)From the graph paperVGSQ = 4.3 V, ID = 1.7mA(b) VD = VDD ID RD = 20 (1.7mA)(6.2k) = 9.46 VShockleyEquationBias LineQ-Point51Example 3: For the following network, determine (a) IDQ and VGSQ (b) VDS and VS.Solution: Shockley Equation:52

VGS-8-6-5-4-2012ID(mA)00.51.1252.004.58.0010.12512.5Bias Line:VGS = -VSS IDRS.When ID = 0VGS = -(-4) = 4 VWhen VGS = 0ID = -VSS/RS = 4/0.39k = 10.26 mAFrom the graphVGSQ 0.5 V, IDQ 9mA(b) VDS = VDD IDQ(RD + RS) = 7.69 V VS = -VGSQ = -0.5V53

ID (mA)VGS (volts)Shockley EquationBias LineQ-PointN-Channel Enhancement Type MOSFETThe construction of an enhancement type MOSFET is quite similar to that of the depletion type MOSFET except for the absence of a channel between the drain and source terminals.When VGS = 0, ID = 0 because the n-channel is absent.54

Basic Operation and Characteristics of an n-Channel E-MOSFETWhen VGS > 0 & VDS > 0,A depletion region is creatednear the SiO2 layer void ofholes.As VGS increases, theconcentration of electronsnear the SiO2 increases and there is some flow between drain and source.The level of VGS that results in thesignificant increase in ID iscalled the Threshold Voltage (VT).55

Basic Operation and Characteristics of an n-Channel E-MOSFETIf VGS > VT is constant and VDS is increased, ID will Increase and will reach saturation.

56Drain Characteristics of an n-channel enhancement-type MOSFET57

Transfer characteristics for n-channel enhancement type MOSFET from the drain characteristics. 58

where

p-Channel enhancement-type MOSFET59

Symbols60

Feedback Biasing of n-Channel e-MOSFET61

Equations:

From the above equations, we get

Feedback Biasing of n-Channel e-MOSFET62

Example: Determine IDQ and VDSQ for the enhancement-type MOSFET of the following.Solution: For