Ferranti push for bigger share of 16-bit market

This time last year, Ferranti had just announced their entry into the micro- processor business with news of the 16-bit F100L, the first wholly Euro- pean designed and developed micro- processor. Although things have re- mained quiet since then, new deve- lopments now in the offing add greatly to the attractions of using the Ferranti chip in applications demanding fast 16-bit operation.

New developments A microcomputer development system is well forward in development, and the first of a series of external function chips, a fast multiply/divide unit, is currently nearing completion, and is due to be available in the first quarter of 1978. All interface and control functions for connection to the F100L are designed on-chip, and it is expected to aid applications such as digital signal processing. Likewise, a special clock pulse and power supply IC will be available soon to simplify applica- tion and keep off-chip power dissipa- tion to a minimum.

The F100L currently has no second source but the manufacturing division of Ferranti in Manchester is building and commissioning a second wafer production facility at a nearby location which is expected to be

available for volume production later in 1978.

Design project

The design project began in the early 1970s. An internal survey of the various Ferranti Division's requirements ruled out an 8-bit processor, as this word size did not have the systems capability that Ferranti needed for the their markets. A good proportion of their business required a large instruc- tion set with good bit-handling facili- ties, something that early 8-bit micro- processors did not have. Other design criteria were the ability to function fast, and in harsh environ- mental conditions for military applications such as on-line jet-engine control - factors which ruled out MOS technology, and made Ferranti consider the bipolar process. Conven- tional bipolar technology offered the necessary speed and reliability charac- teristics but involved three or four extra masks and more costly production pro- cesses than MOS technology, and so attention was focused on a simplified bipolar process, collector-diffusion- isolation, which Ferranti had been experimenting with since 1971, and which was beginning to yield fast chips which approached MOS complexity. This process was considered suitable for economic production and was

adopted for the design specification. The UK Ministry of Defence were

attracted by this specification, and saw it as a solution for their growing requirements in this area. This led to the eventual development project being cofunded; the F 100L is capable of operating in the full military tempera- ture range of -55°C to + 125°C. One other strong influence on the final design shape was that the processor and interface system should be a true 'microsystem', achieved by keeping down the number of processor pins and cutting down the need for large quantities of TTL interface logic by basing the interface chips as far as possible on LSI technology.

An asynchronous I/O bus in which the data/address fines were multi- plexed was adopted for this purpose. This eliminated the need for a large 40-plus pin package, while keeping a good data-transfer rate and interrupt- handling capabilities.

More power

For the future, Ferranti see no diffi- culty in uprating the processor. Improvements in design and manufac- turing techniques enable a version of the processor to be produced with a fully parallel internal function unit. This alone would significantly increase its speed and power while keeping it compatible with earlier serial versions. Volume production is now beginning, and Ferranti have adopted projection printing rather than the more common

Keith Dixon, head of microprocessor marketing and equipment sales

Seriol function uni t - -

Seriol register control-

Progrom counter

Operond register-

Accumulotor r e g i s t e r _ _

control

le' 3nd control

on

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Close-up view of the architecture. The F I OOL microprocessor is 0.23 in square, and includes 6 ft of aluminium track interconnecting approximately 7000 components

448 microprocessors

method of contact printing. Instead of holding the mask in physical contact with its slice, which typically results in damage after a few print runs, a specially developed lens and photo- graphic emulsion enables one set of masks to last almost indefinitely, and, importantly, allow the company to build up fault data on the masks and thus constantly produce a high- quality yield. A new slice-cleaning tech- nique is also being used; chemical scrubbing has been replaced by a

simple technique which aquaplanes a brush over this slice.

These new developments add up to a fresh, professional assault on a sec- tion of the 16-bit market by Ferranti. New chips, such as the fast multiply/ divide unit, will put pressure on competitors, and extra manufactur- ing capacity will provide a strong base to supply markets. It is good to see a British company competing with the American giants, and the head of Ferranti's Microprocessor Marketing

Unit at Bracknell, Keith Dixon, sees these new moves as a direct con- tradiction to recent suggestions that Britain should concentrate on applications of microprocessors rather than their manufacture.

One big contract has already been landed by the company, the fare col- lection terminals for British Rail which will eventually require around 5000 processors and 20000 interface sets. Another 200 systems are currently under evaluation by companies.

HARDWARE

FIOOL

The F100L microprocessor is a single- address, single-accumulator, 16-bit central processor, with 2's-complement fixed-point arithmetic. 153 separate instructions are available for use, and these fall into six main categories: arithmetic and logical, shifts, bit tests and jumps, link stack (for interrupt handling), double-length (32-bit) instructions, and external functions, a type of instruction which provides a gateway to permit external logic to perform functions to augment the instruction set.

Four addressing modes available are: direct, pointer indirect, immediate data, and immediate indirect for access of up to 32 kwords of memory. Direct and pointer indirect use a single-word inst- ruction format, immediate data and immediate indirect use a double- or multiple-word format.

Three types of processor are available with different temperature specifications and varying clock speeds: 0 to 70°C with an 8MHz clock rate, -30°C to 85°C at 6MHz, and the full military version operating from -55°C to +125°C at 3.5 and 5MHz. Instruc- tion times vary from around 1 to 6/1s in the commercial version, typical exe- cution times being of the order of 3.S/as.

Interface set Two types of LSI chips comprise the several-purpose interface set - the FI 11 L control interface chip and the F112L data interface chip. One FI 11L chip and two F112L chips provide the CPU with the ability to handle a wide

range of data transfer, interrupt and control requirements. Operation in any of five modes is possible: memory mode, peripheral mode (to handle DMA transfers and interrupts), buffer mode for driving a fully terminated I/O bus, SPU (special processing unit) mode for handling external function devices, and bus extension mode.

The processor and interface sets are supplied in 40-pin packages. In 100- off quantities, the commercial version CPU (0 - 70°C temperature operating range) costs £39, and an interface set ( IX F111L, 2X FI12L) costs £18.

Uncommitted logic arrays These chips provide the means to add custom-designed interface logic to microprocessors (see product review, Microprocessors, June 1977). Each ULA has 225 cells consisting of three transistors and five resistors. Specific connection patterns are dictated by the user, a connection layer mask is made from this to commit the array, and the required number of circuits is produced.

Microcomputer development systems Ferranti are currently checking out the first inhouse prototypes of FIOOL- based microcomputers. In conjunction with resident software, these micro- computers will be available from October 1977 onwards as development systems, and will enable both software and hardware development to be performed on an F100L system.

SOFTWARE Currently, program development is undertaken thrgugh a host compu- ter, although development systems will

be available shortly. The software is FORTRAN based, and can be hosted on any suitable system with a FORT- RAN compiler. It is also available on the timesharing bureau of ADP Net- work Services, and will shortly become available on the National CSS and Honeywell Mk III systems. The F100 Assembler translates assembly-language program segments into an intermediate code - the F100 Link Editor links these segments and adds addresses to form an executable object-code program - the F 100 Simulator enables program and system testing. For users implementing their own host-machine installation of the crossproduct software (normally sup- plied on paper tape), the F100 Source Checker enables read-in errors to be detected before compilation.

Resident versions of the Assembler and Link Editor to run on the F100L Development Systems will be avail- able in October 1977. A debug package is also available enabling user programs to be checked out on the F100L sys- tem.

The range of available software has just been expanded to include a CORAL 66 compiler from Systems Designers Ltd (Frimley, UK). Program segments written in CORAL 66 are translated into F100 assembly language from which the AsSembler and Link Editor can generate the object program. This is scheduled for release for use on ICL 1900 host computers during October 1977, although there is no reason why this compiler cannot be implemented on any suitable host computer that has a CORAL 66 compiler. A resident version to run on an FI00L develop- ment system will follow early in 1978.

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