FEE2006, Perugia Simultaneous Photon Counting and Charge Integrating Readout Electronics for X-ray...

FEE2006, Perugia

Simultaneous Photon Counting and Charge Integrating Readout Electronics

for X-ray Imaging

Hans Krüger, University of Bonn, Germany

University of Bonn: Michael Karagounis, Manuel Koch, Edgar Kraft, Hans Krüger, Norbert Wermes

University of Mannheim: Peter Fischer, Ivan Peric

Philips Research Laboratories Aachen: Christoph Herrmann, Augusto Nascetti, Michael Overdick, Walter Rütten

L A BSilizium Labor Bonn

S I

Hans Krüger, University of Bonn 2FEE2006, Perugia


S I

Photon counting • limited to count rates < 10 MHz / pixel• Quantum limited noise statistics

Charge integration• High photon flux • does not reach quantum limited resolution at low photon flux

Motivation

photon counter integrator sim. counting and integrating (CIX)

# photons yes no yes

total energy no yes yes

low flux yes no yes

high flux no yes yes

spectral information

no no yes (mean photon energy)



S ICounting and Integrating X-ray Detection (CIX)

signal intensity

Photon counter

more information more information from the same x-ray dosagefrom the same x-ray dosage

Integrator



S IPixel Concept

Preamp

Integrating Channel

Conversion Layer

Counting Channel

Total deposited energy

Number of absorbed photons

Mean photonenergy



S I

Implementation



S IPrototype chip CIX 0.1

chip features:

• AMS 0.35 µm CMOS technology

• area per electronics channel: 100 µm 547 µm

• linear arrangement of 17 cells(no bump bond pads) 2 test pixels with access to sub-circuits, e.g. preamplifier analog output

• in-pixel signal generation circuits(design for testability)

• low noise digital logic (low-swing differential current steering logic, DCL)



S IPixel Cell Block Diagram

Photon counting- preamp with continuous reset- replication of feedback current

sourced to the integrator

Charge integration (I to F converter)- comparator output triggers charge

pump (synchronous)- constant charge packet removed from

integrator feedback capacitor Cint

- number of pump cycles and timestamps for first and last cycle stored

Signal simulation- switched capacitor and switched

current charge injection circuits- internal/external dc current source



S IIntegrator: Charge Packet Counting

fclk = 8 MHzpump cycles = 2Time = 2560Imeas [pkts./clk] = 1/2560= 0,0004

fclk = 8 MHzpump cycles = 2Time = 853

Imeas [pkts./clk] = 1/853

= 0,0012

Time320µs

Time(1/3)*320µs

Frame=320µs

small current

larger current

UCINT

UCINT

t

t



S IFeedback Circuit

feedbackfeedback

(fast)(fast)

leakage current compensationleakage current compensation

(slow)(slow)

3 differential pairs:• continuous reset of the CSA feedback capacitor• signal replication to source the integrator• leakage current compensation



S ICharge injection circuits (chopper)

• chopper 1+2: switched capacitors (~10 fF), connected to preamplifier input• current chopper:

switched current source (800 nA max.), connected to preamplifier or integrator inputminimal pulse duration ~30 ns

• leakage current simulation• up to five load capacitors (~100 fF each) connected to preamplifier input

Se

lLo

ad

0..4

VDDChopper

/Le

akS

imE

nIL

eakS

imN

ICurrInjN

CascBias

StrCurr

/AmpCurrInjEn

/IntCurrInjEn

IntInVDDChopper

/Str1

/ChInjEn

VCal

Cinj

/Str2

Chopper 1

AGNDAGND

Chopper 2

to integrator

to preamplifier

current chopper

Leakagecurrent

simulation

Inputcapacitancesimulation

VDDA



S IIntegrator and Charge Pumps

• switched capacitor charge pump: dQ = (VDDA - VIntRef) · 240 fF, typical charge packet 1.8 · 106 e- (i.e. 140 60 keV photons or 170 photons at 120 keV tube spectrum)1.7µA maximal current throughput (at 6 MHz clock rate)

• switched current charge pumppacket size controlled by IPump bias DAC and clock rate

• VIntTh controls charge pump trigger level

VIntRef

VDDA 300f

240fChPumpResChPump

IPumpP

/CurrPump

Integrator

VIntTh

CompOut

CurrPump

Comparator

current pump capacitive pump

/Reset



S IDifferential Current Mode Logic

Differential pair with constant bias current Ibias

- loads generate low voltage swings by I to U conversion

An ‘ideal’ load characteristic:- Vhi level fixed at maximum possible

input voltage (~VDD-Vth –VDsat)

- Vlow level fixed by the voltage swing required to ‘fully’ switch the current in the cell (~200 mV)

- plateau at ½ Ibias guarantees equal rise and fall times

- and all this independent of the absolute value of Ibias to match given loads and speed requirements

LoadI U

LoadI U

out

out

Ibias

in in

VhiVlo

½ Ibias

Iload

Vload

'ideal' load characteristic

Ibias

CML principle (inverter)

P. Fischer, E. Kraft, “Low swing differential logic for mixed signal applications”, Nucl. Instr. Meth. A 518 (2004) 511-514



S IImplementation of the load circuit

Approximation of the ideal load circuit- NMOS operated as a current source with

adjustable voltage VSS- diode connected NMOS (or pn-diode) to ground

Vhi increases only little with Ibias

Differential swing can be adjusted through VSS

bias

VSS GND

in

VhiVlo

½ Ibias

Iload

Vload

LoadI U

0,0 0,1 0,2 0,3 0,4 0,50,0

0,5

1,0

1,5

2,0

DAC=15/31

VSS

=0V, Bias A V

SS=0V, Bias B

VSS

=0.2V, Bias A V

SS=0.2V, Bias B

I load

[µA

]

Vload

[V]

measured load characteristic



S I

Measurements



S IPhoton Counter Performance

minimum operational threshold

500 e

equivalent noise charge 180 e + 79 e / 100 fF

maximum count rate 6 (12) MHz with static (dynamic) leakage current compensation

double pulse resolution >100 ns



S IIntegrator Noise Performance

perfect

12-bit ADC

discretisation limit

Poisson SNR limit



S IImpact of the Feedback Circuit

DIRECT injectionDIRECT injection

via feedbackvia feedback

noise performance not optimal but Poisson statistics limits SNR for real X-ray photon detection (60 keV X-rays, CdTe sensor, 320 µs frame time):

- 100 pA 23 ph, sqrt(23) = 4,8- 1 nA 226 ph, sqrt(226) = 15- 10 nA 2260 ph, sqrt(2260) = 48

Poisson SNR limit



S ITotal Dynamic Range

photon counter

integrator

overlap region

6 MHz max.

pulse frequency

3 pA

66 pA

12 nA

200 nA

a single pulse



S IReconstruction of the Mean Photon Energy

total energy / photon counttotal energy / photon count

integrator lower limit

photon counter

overload

original pulse size



S ISummary

A readout scheme which is capable of simultaneous counting and integrating absorbed X-ray quanta has been proposed and implemented

The multi-stage feedback circuit of the pre-amplifier mirrors the signal current to the integrator and provides leakage current compensation

A prototype chip has been submitted and tested and showed the feasibility of the concept

The simultaneous operation is fully functional though still impaired by the excess noise of the (not optimized) feedback network

A new test chip has been submitted and is currently under study

Acknowledgements:Edgar Kraft for the animated ppt – sildes

References:• E. Kraft et al., “Counting and Integrating Readout for Direct Conversion X-ray Imaging - Concept,

Realization and First Prototype Measurement”, Proceedings of the IEEE 2005 NSS/MIC• P. Fischer, E. Kraft, “Low swing differential logic for mixed signal applications”,

Nucl. Instr. Meth. A 518 (2004) 511-514

FEE2006, Perugia Simultaneous Photon Counting and Charge Integrating Readout Electronics for X-ray...

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