FE-I4 Test SetupHardware Needs: Boards &

Interfaces

March 1st 2010, Marlon Barbero

Boards / Interface , March 1st 2010 2

FE-I4 Wafer Probing• FE-I4 wafer probing:

adapter card

probe card

FE-I4 wafer level tests

FE-I4 compatible

Connector

extension board

Boards / Interface , March 1st 2010 3

Stand-alone FE-I4 test card

• FE-I4 single chip test card:

adapter card

single chip card

FE-I4Single FE-I4 test card

Note: might replace Spartan3 board by Virtex4 + 32Mb SRAM

Connector

extension board

Boards / Interface , March 1st 2010 4

Goal today• Work towards definition of interface:

– connector.– adapter card.

… to fit both wafer probing test needs and single chip test card needs.

Boards / Interface , March 1st 2010 5

Power• FE-I4 power

domains:– VDDA1 (1.4V).– VDDA2 (1.4V).– VDDD1 (1.2V).– VDDD2 (1.2V).– VDDDPLL.– VDDDT3.– VEFUSE (3.3V).– VDD_Efuse.

• Extension Card inputs:VDDA1.VDDA2.VDDD1.VDDD2.VDDD2 or indep?VDDD1.VEFUSE.VDDD2.

indiv. analog power on/offindiv. digital

power on/off

Boards / Interface , March 1st 2010 6

Digital IO• LVDS in:

– 40MHz_clock_in.– command_in.– AUX_clock_in.

• LVDS out:– data out.

• CMOS in:– Trig In.– RA1bar, RA2bar (tied together?).– RD1bar, RD2bar (tied together?).

• Skipped– (3-lvds) module

chip 1 in (-2 / -3).

– (3-cmos) chip address.

Boards / Interface , March 1st 2010 7

2nd row & Analog IO• 2nd Row:

– DisVbnA, DisVbnB, TdacVbp… (22 total) (some over-writtable?)

• FE-I4 Analog Output:– Analog 1 test out (-2 / -3).– Ireference out.– Vreference out.

• Analog Input:– Ireference in.– Vreference out (override).

• in digiIO: LVDSinBias 1 (-2).

• Skipped– sensor bias (???).

• FE-I4 analog out: Options pin headers / routed back / ADC.

• Injection:– analog injection IO:

Chopper + DAC? (step or level?)

– digital inject IO (?).

• FE-I4 analog in: Options locally defined / DAC + jumpers.

Boards / Interface , March 1st 2010 8

Probe & tests• Efuse:

– Efuse_SR_clock.– Efuse_SR_out.– Efuse_Sel & Efuse_SR_RN.

• capmeasure:– clock is the Efuse_clock.– analog out: capmeasure_current.

• CMOS:– Bypass_ctrl.– Load_global_latches 1 (-2).– Global pulse.– InMUXselect & InMUX.– CMOSout.

Boards / Interface , March 1st 2010 9

Summary• summar

y

adapter card

power

- regulator- domain EN-connector-sensing ADC

LV

DS

extension board, 2 flavorsConnector

FE

-I4

pin headers

analog IO

mux ADC

DACI2

C,

SP

I

selected Analog????

cmos

lvds

level shifter

CM

OS

cmos 3.3V

lvds

Boards / Interface , March 1st 2010 10

Interface / Connector Grand Total

• power: 5• lvds in: 3• lvds out: 1 • cmos in: 17• cmos out: 4

(no pix_SR_out?)

• I2C, SPI: 2-4

Analog for Single Chip Card:• go to pin header, no ADC.• input to FE-I4 locally defined.• few selected analog go to

interface card ADC?• Chopper + DAC.• Note: High Voltage section

on extension card. Analog for Wafer Probing:• ADC & DAC?• Not all analog test signal

probed?• Which overwrites are

necessary?

Boards / Interface , March 1st 2010 11

Analog

Summary Analog:• output: 27 22 “2nd row”, 3 analog test out, 1

Ireference out, 1 Icapmeasure.• input: 3 2 LVDSinBias (for 2 groups), 1

Ireference in.• input/output: 2 Vreference out & overwrite.

Injection pulse in / out.

Other:• External NTC for reference needed on extension

card?