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© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN
7711 Ballast C
ontrol IC
March 2007
FAN7711 Rev. 1.0.2
FAN7711Ballast Control ICFeatures
Floating Channel for Bootstrap Operation to +600V
Low Start-up and Operating Current: 120μA, 3.2mA
Under-Voltage Lockout with 1.8V of Hysteresis
Adjustable Run Frequency and Preheat Time
Internal Active ZVS Control
Internal Protection Function (Latch Mode)
Internal Clamping Zener Diode
High Accuracy Oscillator
Soft-Start Functionality
ApplicationsElectronic Ballast
Description The FAN7711, developed using Fairchild’s unique high-voltage process, is a ballast control integrated circuit (IC)for a fluorescent lamp. FAN7711 incorporates apreheating / ignition function, controlled by an user-selected external capacitor, to increase lamp life. TheFAN7711 detects switch operation from after ignitionmode through an internal active Zero-Voltage Switching(ZVS) control circuit. This control scheme enables theFAN7711 to detect an open-lamp condition, without theexpense of external circuitry, and prevents stress onMOSFETs. The high-side driver built into the FAN7711has a common-mode noise cancellation circuit thatprovides robust operation against high-dv/dt noiseintrusion.
Ordering Information
8-DIP8-SOP
Part Number Package Pb-Free Operating Temperature Range Packing MethodFAN7711N 8-DIP
Yes -25°C ~ 125°C
Tube
FAN7711M8-SOP
Tube
FAN7711MX Tape & Reel
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 2
Typical Application Diagrams
Figure 1. Typical Application Circuit for Compact Fluorescent Lamp
Internal Block Diagram
Figure 2. Functional Block Diagram
VDD
RT
CPH
GND
Main Supply
R1
R2
R3D5
D6
R4
R5
L1
C3C2
VB
HO
VS
LO
Q1
Q2
C4 C6
C7
C5D7
D1 D2
D3 D4
C1
FAN77116
7
8
54
3
2
1
Lamp
FAN7711 Rev. 1.00
U1
3V 5V
CPH
IPH
IPH*
IRT
IPH=0.6*IRT
0A
4V
IPH*
OSCILLATOR
CPH
DEAD-TIME Control
5V/3V
S
R
Q
QSDL SDH RESET
SYSHALT
ADAPTIVE ZVS ENABLE LOGIC
VDDH/VDDLSH
VDDH/VDDLSH
SDLSDH
SHO
RT-
PULS
EG
EN
ERA
TOR
NoiseCanceller
S
R
Q
Q
UVLO
VB
SET
RESET
DELAY
15V SHUNTREGULATOR
RT
CPH
VDD
VS
HO
VB
IRT
LOW-SIDE GATE DRIVER
PRE-HEAT Control
HIGH-SIDE DRIVER
UVLO
S
R Q
Q
TSDBIAS
BGR
SYSHALT
UVLO SDH
SDL
10V REG
Reference
VD
D sense
CPH<3V
Yes
No
2μA
12μA
OUTPUTTRANSITION
SENSING
ADAPTIVE ZVS CONTROLLER
BIAS & SYSTEM LATCH
GND
LO
FAN7711 Rev. 1.00
8
7
6
5
4
3
2
1
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 3
Pin Configuration
Figure 3. Pin Configuration (Top View)
Pin DefinitionsPin # Name Description
1 VDD Supply voltage
2 RT Oscillator frequency set resistor
3 CPH Preheating time set capacitor
4 GND Ground
5 LO Low-side output
6 VS High-side floating supply return
7 HO High-side output
8 VB High-side floating supply
FAN7711YWW
1 2 3 4
8 7 6 5
VDD RT CPH GND
VB HO VS LO
FAN7711 Rev. 1.00
(YWW : Work Week Code)
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 4
Absolute Maximum RatingsStresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. Theabsolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Note: 1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD
pin of this device.
Symbol Parameter Min. Typ. Max. UnitVB High-side floating supply -0.3 625 V
VS High-side floating supply return -0.3 600 V
VIN RT, CPH pins input voltage -0.3 8 V
ICL Clamping current level 25 mA
dVS/dt Allowable offset voltage slew rate 50 V/s
TA Operating temperature range -25 125 °C
TSTG Storage temperature range -65 150 °C
PD Power dissipation8-SOP 0.625
W8-DIP 1.2
θJA Thermal resistance (junction-to-air)8-SOP 200
°C/W8-DIP 100
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 5
Electrical CharacteristicsVBIAS (VDD, VBS) = 15.0V, TA = 25°C, unless otherwise specified.
Symbol Characteristics Condition Min. Typ. Max. UnitSupply Voltage SectionVDDTH(ST+) VDD UVLO positive going threshold VDD increasing 12.4 13.4 14.4
VVDDTH(ST-) VDD UVLO negative going threshold VDD decreasing 10.8 11.6 12.4
VDDHY(ST) VDD-side UVLO hysteresis 1.8
VCL Supply clamping voltage IDD =10mA 14.8 15.2
IST Start-up supply current VDD = 10V 120 200 μA
IDD Dynamic operating supply current 50kHz, CL = 1nF 3.2 mA
High-Side Supply Section (VB-VS)VHSTH(ST+) High-side UVLO positive going threshold VBS increasing 8.5 9.2 10.0
VVHSTH(ST-) High-side UVLO negative going threshold VBS decreasing 7.9 8.6 9.5
VHSHY(ST) High-side UVLO hysteresis 0.6
IHST High-side quiescent supply current VBS = 14V 50 μA
IHDHigh-side dynamic operating supply current 50kHz, CL = 1nF 1 mA
ILK Offset supply leakage current VB = VS = 600V 45 μA
Oscillator SectionVMPH CPH pin preheating voltage range 2.5 3.0 3.5 V
IPHCPH pin charging current during preheating VCPH = 1V 1.25 2.00 2.85
μAIIG CPH pin charging current during ignition VCPH = 4V 8 12 16
VMO CPH pin voltage level at running mode 7.0 V
fPRE Preheating frequency RT = 80kΩ, VCPH = 2V 72 85 98 kHz
fOSC Running frequency RT = 80kΩ 48.7 53.0 57.3 kHz
DTMAX Maximum dead time VCPH = 1V, VS = GND during preheat mode 3.1 μs
DTMIN Minimum dead time VCPH = 6V, VS = GND during run mode 1.0 μs
Output SectionIOH+ High-side driver sourcing current PW = 10μs 250 350
mAIOH- High-side driver sinking current PW = 10μs 500 650
IOL+ Low-side driver sourcing current PW = 10μs 250 350
IOL- Low-side driver sink current PW = 10μs 500 650
tHOR High-side driver turn-on rising time CL = 1nF, VBS = 15V 45
nstHOL High-side driver turn-off rising time CL = 1nF, VBS = 15V 25
tLOR Low-side driver turn-on rising time CL = 1nF, VBS = 15V 45
tLOL Low-side driver turn-off rising time CL = 1nF, VBS = 15V 25
VS(2)
Maximum allowable negative VS swing range for signal propagation to high-side output
-9.8 V
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 6
Electrical Characteristics (Continued)
VBIAS (VDD, VBS) = 15.0V, TA = 25°C, unless otherwise specified.
Note:2. This parameter, although guaranteed, is not 100% tested in production.
Symbol Characteristics Condition Min. Typ. Max. UnitProtection SectionVCPHSD Shutdown voltage
VRT = 0 after run mode2.6 V
ISD Shutdown current 250 μA
TSD Thermal shutdown(2) 165 °C
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 7
Typical Characteristics
Figure 4. Start-Up Current vs. Temp. Figure 5. Preheating Current vs. Temp.
Figure 6. Ignition Current vs. Temp. Figure 7. Operating Current vs. Temp.
Figure 8. High-Side Quiescent Current vs. Temp. Figure 9. Shutdown Current vs. Temp.
-40 -20 0 20 40 60 80 100 12080
100
120
140
160
180
200
I ST [μ
A]
Temperature [°C]-40 -20 0 20 40 60 80 100 120
1.0
1.5
2.0
2.5
3.0
I PH [μ
A]
Temperature [°C]
-40 -20 0 20 40 60 80 100 1208
10
12
14
16
I IG [μ
A]
Temperature [°C]-40 -20 0 20 40 60 80 100 120
2.0
2.5
3.0
3.5
4.0
I D
D [m
A]
Temperature [°C]
-40 -20 0 20 40 60 80 100 1200
20
40
60
80
100
I HST
[μA
]
Temperature [°C]-40 -20 0 20 40 60 80 100 1200
100
200
300
400
I SD [μ
A]
Temperature [°C]
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 8
Typical Characteristics (Continued)
Figure 10. VDD UVLO vs. Temp. Figure 11. VBS UVLO vs. Temp.
Figure 12. VDD Clamp Voltage vs. Temp. Figure 13. Shutdown Voltage vs. Temp.
Figure 14. Running Frequency vs. Temp. Figure 15. Preheating Frequency vs. Temp.
-40 -20 0 20 40 60 80 100 12010.410.811.211.612.012.412.813.213.614.014.4
Temperature [°C]
VD
DTH
[V] ST+
ST-
-40 -20 0 20 40 60 80 100 1208.0
8.4
8.8
9.2
9.6
10.0
Temperature [°C]
V HST
H [V
] ST+
ST-
-40 -20 0 20 40 60 80 100 12014.8
15.0
15.2
15.4
15.6
15.8
16.0
16.2
VC
L [V]
Temperature [°C]-40 -20 0 20 40 60 80 100 120
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
V
CPH
SD [V
]
Temperature [°C]
-40 -20 0 20 40 60 80 100 12048
50
52
54
56
58
f OSC
[kH
z]
Temperature [°C]-40 -20 0 20 40 60 80 100 120
70
75
80
85
90
95
100
f PRE [k
Hz]
Temperature [°C]
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 9
Typical Characteristics (Continued)
Figure 16. Minimum Dead Time vs. Temp. Figure 17. Maximum Dead Time vs. Temp.
-40 -20 0 20 40 60 80 100 1202.0
2.4
2.8
3.2
3.6
4.0
DT M
AX [μ
s]
Temperature [°C]-40 -20 0 20 40 60 80 100 120
0.6
0.8
1.0
1.2
1.4
1.6
1.8
DT M
IN [μ
s]
Temperature [°C]
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 10
Typical Application Information1. Under-Voltage Lockout (UVLO) FunctionThe FAN7711 has UVLO circuits for both high-side andlow-side circuits. When VDD reaches VDDTH(ST+), UVLOis released and the FAN7711 operates normally. AtUVLO condition, FAN7711 consumes little current, notedIST. Once UVLO is released, FAN7711 operates normallyuntil VDD goes below VDDTH(ST-), the UVLO hysteresis.At UVLO condition, all latches that determine the statusof the IC are reset. When the IC is in the shutdownmode, the IC can restart by lowering VDD voltage belowVDDTH(ST-).
FAN7711 has a high-side gate driver circuit. The supplyfor the high-side driver is applied between VB and VS. Toprotect the malfunction of the driver at low supplyvoltage, between VB and VS, FAN7711 provides anadditional UVLO circuit between the supply rails. If VB-VS is under VHSTH(ST+), the driver holds low-state to turnoff the high-side switch, as shown in Figure 18. As longas VB-VS is higher than VHSTH(ST-) after VB-VS exceedsVHSTH(ST+), operation of the driver continues.
2. OscillatorThe ballast circuit for a fluorescent lamp is based on theLCC resonant tank and a half-bridge inverter circuit, asshown in Figure 18. To accomplish Zero-VoltageSwitching (ZVS) of the half-bridge inverter circuit, theLCC is driven at a higher frequency than its resonantfrequency, which is determined by L, CS, CP, and RL,where RL is the equivalent lamp's impedance.
Figure 18. Resonant Inverter Circuit Based onLCC Resonant Tank
The transfer function of LCC resonant tank is heavilydependent on the lamp impedance, RL, as illustrated inFigure 19. The oscillator in FAN7711 generates effectivedriving frequencies to assist lamp ignition and improvelamp life longevity. Accordingly, the oscillation frequencyis changed in the following sequence:
Preheating freq.->Ignition freq.-> Normal running freq.
Before the lamp is ignited, the lamp impedance is veryhigh. Once the lamp is turned on, the lamp impedancesignificantly decreases. Since the resonant peak is veryhigh due to the high-resistance of the lamp at the instantof turning on the lamp, the lamp must be driven at higherfrequency than the resonant frequency, shown as (A) inFigure 19. In this mode, the current supplied by theinverter mainly flows through CP. CP connects bothfilaments and makes the current path to ground. As aresult, the current warms up the filament for easyignition. The amount of the current can be adjusted bycontrolling the oscillation frequency or changing thecapacitance of CP. The driving frequency, fPRE, is calledpreheating frequency and is derived by:
After the warm-up, the FAN7711 decreases thefrequency, shown as (B) of Figure 19. This actionincreases the voltage of the lamp and helps thefluorescent lamp ignite. The ignition frequency isdescribed as a function of CPH voltage, as follows:
where VCPH is the voltage of CPH capacitor.
Equation 2 is valid only when VCPH is between 3V to 5Vbefore FAN7711 enters running mode. Once VCPHreaches 5V, the internal latch records the exit fromignition mode. Unless VDD is below VDDTH(ST-), thepreheating and ignition modes appear only once duringlamp start transition.
Finally, the lamp is driven at a fixed frequency by anexternal resistor, RT, shown as (C) of Figure 19. If VDD ishigher than VDDTH(ST+) and UVLO is released, thevoltage of RT pin is regulated to 4V. This voltage adjuststhe oscillator's control current according to the resistanceof RT. Because this current and an internal capacitor setthe oscillation frequency, the FAN7711 does not needany external capacitors.
The proposed oscillation characteristic is given by:
Even in the active ZVS mode, shown as (D) in Figure 19,the oscillation frequency is not changed. The dead-timeis varied according to the resonant tank characteristic.
High-sidedriver
Low-sidedriver
Dead-timecontroller
Oscillator
RT
FAN7711
CPH
VDD
VDC
L CS
CP
equivalent lamp impedance
RL
LCC resonant tankFilament
VDD
RT
CPH
VB
HO
VS
LOGND
FAN7711 Rev. 1.00
(EQ 1).PRE OSCf 1 6 f= ×
(EQ 2)( )IG CPH OSCf 0.3 5-V 1 f⎡ ⎤= × + ×⎣ ⎦
(EQ 3)9
OSC4 10f
RT×
=
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 11
Figure 19. LCC Transfer Function in Terms of Lamp Impedance
3. Operation ModesFAN7711 has four operation modes: (A) preheatingmode, (B) ignition mode, (C) active ZVS mode, and (D)shutdown mode, depicted in Figure 20. The modes areautomatically selected by the voltage of CPH capacitor,shown in Figure 20. In modes (A) and (B), the CPH actsas a timer to determine the preheating and ignition times.After the preheating and ignition modes, the role of theCPH is changed to stabilize the active ZVS controlcircuit. In this mode, the dead time of the inverter isselected by the voltage of CPH. Only when FAN7711 isin active ZVS mode is it possible to shut off the wholesystem using CPH pin. Pulling the CPH pin below 2V inactive ZVS mode, causes the FAN7711 to entershutdown mode. In shutdown mode, all active operationis stopped, except UVLO and some bias circuitry. Theshutdown mode is triggered by the external CPH controlor the active ZVS circuit. The active ZVS circuitautomatically detects lamp removal (open-lampcondition) and decreases CPH voltage below 2V toprotect the inverter switches from damage.
Figure 20. Operation Modes
3.1 Preheating Mode (t0~t1)
When VDD exceeds VDDTH(ST+), the FAN7711 startsoperation. At this time, an internal current source (IPH)charges CPH. CPH voltage increases from 0V to 3V inpreheating mode. Accordingly, the oscillation frequencyfollows the Equation 4. In this mode, the lamp is notignited, but warmed up for easy ignition. The preheatingtime depends on the size of CPH:
According to preheating process, the voltage across thelamp to ignite is reduced and the lifetime of the lamp isincreased. In this mode, the dead time is fixed at itsmaximum value.
3.2 Ignition Mode (t1~t2)
When the CPH voltage exceeds 3V, the internal currentsource to charge CPH is increased about six times largerthan IPH, noted as IIG, causing rapid increase in CPHvoltage. The internal oscillator decreases the oscillationfrequency from fPRE to fOSC as CPH voltage increases.As depicted in Figure 20, lowering the frequencyincreases the voltage across the lamp. Finally, the lampignites. Ignition mode is defined when CPH voltage liesbetween 3V and 5V. Once CPH voltage reaches 5V, theFAN7711 does not return to ignition mode, even if theCPH voltage is in that range, until the FAN7711 restartsfrom below VDDTH(ST-). Since the ignition modecontinues when CPH is from 3V to 5V, the ignition time isgiven by:
In this mode, dead time varies according to the CPHvoltage.
0dB
20dB
40dB
RL=100k
RL=1k
RL=500
Preheatingfrequency
(A)
(B)
(C)
(D) Dead-time control modeat fixed frequency
RL=10k
Running frequency
FAN7711 Rev. 1.00
1
2
3
4
5
6
7
8
(A) Preheating Mode
(B) Ignition Mode
time
CPH voltage [V]
0
OscillationFrequency
Preheating Frequency:fPRE
Running Frequency:fOSC
time
Preheating Mode
Running Mode
IgnitionMode
(C) Active ZVS Mode
123 0Dead Time[μs]
(D) Shutdownmode
CPH
voltage varies byactive ZVS control
circuit
DT M
AX
DT M
IN
t0 t1 t2 t3
FAN7711 Rev. 1.00
(EQ 4)[ .]preheatPH
3 CPHf SecI
×=
(EQ 5)[ .]ignitionIG
2 CPHt SecI
×=
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 12
3.3 Running and Active Zero-Voltage Switching(AZVS) Modes (t2~)
When CPH voltage exceeds 5V, the operating frequencyis fixed to fOSC by RT. However, active ZVS operation isnot activated until CPH reaches ~6V. The FAN7711prepares for active ZVS operation from the instant CPHexceeds 5V during t2 to t3. When CPH becomes higherthan ~6V at t3, the active ZVS operation is activated. Todetermine the switching condition, FAN7711 detects thetransition time of the output (VS pin) of the inverter. Fromthe output-transition information, FAN7711 controls thedead time to meet the ZVS condition. If ZVS is satisfied,the FAN7711 slightly increases the CPH voltage toreduce the dead time and to find optimal dead time,which increases the efficiency and decreases thethermal dissipation and EMI of the inverter switches. IfZVS fails, the FAN7711 decreases CPH voltage toincrease the dead time. CPH voltage is adjusted to meetoptimal ZVS operation. During the active ZVS mode, theamount of the charging/discharging current is the sameas IPH. Figure 21 depicts normal operation waveforms.
Figure 21. Typical Transient Waveform from Preheating to Active ZVS Mode
3.4 Shutdown Mode
If the voltage of capacitor CPH is decreased below~2.6V by an external application circuit or internalprotection circuit, the IC enters shutdown mode. Oncethe IC enters shutdown mode, this status continues untilan internal latch is reset by decreasing VDD belowVDDTH(ST-). Figure 22 shows an example of externalshutdown control circuit.
Figure 22. External Shutdown Circuit
The amount of the CPH charging current is the same asIPH, making it possible to shut off the IC using smallsignal transistor. FAN7711 provides active ZVSoperation by controlling the dead time according to thevoltage of CPH. If ZVS fails, even at the maximum deadtime, FAN7711 stops driving the inverter.
The FAN7711 thermal shutdown circuit senses thejunction temperature of the IC. If the temperatureexceeds ~160°C, the thermal shutdown circuit stopsoperation of the FAN7711.
The current usages of shutdown mode and under-voltage lockout status are different. In shutdown mode,some circuit blocks, such as bias circuits, are kept alive.Therefore, the current consumption is slightly higherthan during under-voltage lockout.
4. Automatic Open-Lamp Detection
FAN7711 can automatically detect the open-lampcondition. When the lamp is opened, the resonant tankfails to make a closed-loop to the ground, as shown inFigure 23. The supplied current from the VS pin is usedto charge and discharge the charge pump capacitor, CP.Since the open-lamp condition means resonant tankabsence, it is impossible to meet ZVS condition. In thiscondition, the power dissipation of the FAN7711, due tocapacitive load drive, is estimated as:
where f is driving frequency and VDC is DC-link voltage.
6V5V
3V2V
Active ZVS activated
Dead time settling
Preheating period(Filament warm-up)
Ignition Running modeActive ZVS mode
CPH
VDD
VDDTH(ST+)
VDDTH(ST-)
time
time
time0V
OUT
time0V
Lamp Voltage
t=1/fOSC
Zoom-in
Dead time
Perfect ZVS
t=1/fOSC t=1/fOSC t=1/fOSC
FAN7711 Rev. 1.00
CPHShutdown Q1
3
4
CPH
GND
FAN7711
FAN7711 Rev. 1.00
(EQ 6)2Dissipation P DC
1P C V f W2
[ ]= × × ×
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 13
Figure 23. Current Flow When the Lamp is Open
Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz,respectively; the power dissipation reaches about 2.4Wand the temperature of FAN7711 is increased rapidly. Ifno protection is provided, the IC can be damaged by thethermal attack. Note that hard-switching condition duringthe capacitive-load drive causes lots of EMI.
Figure 24 illustrates the waveforms during the open-lamp condition. In this condition, the charging anddischarging current of CP is directly determined byFAN7711 and considered hard-switching condition. TheFAN7711 tries to meet ZVS condition by decreasingCPH voltage to increase dead time. If ZVS fails and CPHgoes below 2V, even though the dead time reaches itsmaximum value, FAN7711 shuts off the IC to protectagainst damage. To restart FAN7711, VDD must bebelow VDDTH(ST-) to reset an internal latch circuit, whichremembers the status of the IC.
Figure 24. CPH Voltage Variation in Open-Lamp Condition
5. Power SupplyWhen VDD is lower than VDDTH(ST+), it consumes verylittle current, IST, making it possible to supply current tothe VDD pin using a resistor with high resistance (Rstart inFigure 25). Once UVLO is released, the currentconsumption is increased and whole circuits areoperated, which requires additional power supply forstable operation. The supply must deliver at least severalmA. A charge pump circuit is a cost-effective method tocreate an additional power supply and allows CP to beused to reduce the EMI.
Figure 25. Local Power Supply for VDD Using a Charge Pump Circuit
As presented in Figure 25, when VS is high, the inductorcurrent and CCP create an output transition with theslope of dv/dt. The rising edge of VS charges CCP. At thattime, the current that flows through CCP is:
This current flows along the path (1). It charges CVDD,which is a bypass capacitor to reduce the noise on thesupply rail. If CVDD is charged over the threshold voltageof the internal shunt regulator, the shunt regulator isturned on and regulates VDD with the trigger voltage.
When VS is changing from high to low state, CCP isdischarged through Dp2, shown as path (2) in Figure 26.These charging/discharging operations are continueduntil FAN7711 is halted by shutdown operation. Thecharging current, I, must be large enough to supply theoperating current of FAN7711.
The supply for the high-side gate driver is provided bythe boot-strap technique, as illustrated in Figure 26.When the low-side MOSFET connected between VS andGND pins is turned on, the charging current for VB flowsthrough DB. Every low VS gives the chance to charge theCB. Therefore CB voltage builds up only when FAN7711operates normally.
High-sidedriver
Low-sidedriver
Dead-timecontroller
Oscillator
RT
FAN7711
CPH
CVDD
VDC
L CS
CP
equivalent lamp impedance
RL
LCC resonant tankFilament Open
VDD
RT
CPH
VB
HO
VS
LOGND
CB
CCP
DB
Dp2Dp1
Charge PumpFAN7711 Rev. 1.00
6V5V
3V2V
Active ZVS activated
AutomaticShutdown
Preheating period(Filament warm-up)
Ignition period
Running mode
Active ZVS mode
CPH
VDD
VDDTH(ST+)VDDTH(ST-)
OUT
time
time
time0V
Shutdownmode
ShutdownRelease Restart
FAN7711 Rev. 1.00
FAN7711
VDC
L CS
CP
equivalent lamp impedance
RL
LCC resonant tankFilament Open
VDD
RT
CPH
VB
HO
VS
LOGND
CB
Ccp
DB
Dp2Dp1
Charge Pump
Shunt regulator
+
Rstart
CVDD
(1)
(2)
dv/dt
FAN7711 Rev. 1.00
CPdvI Cdt
≅ × (EQ 7)
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 14
When VS goes high, the diode DB is reverse-biased andCB supplies the current to the high-side driver. At thistime, since CB discharges, VB-VS voltage decreases. IfVB-VS goes below VHSTH(ST-), the high-side drivercannot operate due to the high-side UVLO protectioncircuit. CB must be chosen to be large enough not to fallinto UVLO range due to the discharge during a half ofthe oscillation period, especially when the high-sideMOSFET is turned on.
Figure 26. Implementation of Floating Power Supply Using the Bootstrap Method
FAN7711
VDC
L CS
CP
equivalent lamp impedance
RL
LCC resonant tankFilament Open
VDD
RT
CPH
VB
HO
VS
LOGND
CB
CCP
DB
Dp2Dp1
Charge Pump
Shunt regulator
+
Rstart
CVDD
Bootstrap circuit
Charging path
FAN7711 Rev. 1.00
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 15
Design Guide1. Start-up CircuitThe start-up current (IST) is supplied to the IC throughthe start-up resistor, Rstart. Once operation starts, thepower is supplied by the charge pump circuit. To reducethe power dissipation in Rstart, select Rstart as high aspossible, considering the current requirements at start-up. For 220VAC power, the rectified voltage by the full-wave rectifier makes DC voltage, as shown in Equation8. The voltage contains lots of AC component due topoor regulation characteristic of the simple full-waverectifier:
Considering the selected parameters, Rstart must satisfythe following equation:
From Equation 9, Rstart is selected as:
Note that if choosing the maximum Rstart, it takes longtime for VDD to reach VDDTH(st+). Considering VDD risingtime, Rstart must be selected as shown in Figure 30.
Another important concern for choosing Rstart is theavailable power rating of Rstart. To use a commerciallyavailable, low-cost 1/4Ω resistor, Rstart must obey thefollowing rule:
Assuming VDC=311V and VCL=15V, the minimumresistance of Rstart is about 350kΩ.
When the IC operates in shutdown mode due to thermalprotection, open-lamp protection, or hard-switchingprotection, the IC consumes shutdown current, ISD,which is larger than IST. To prevent restart during thismode, Rstart must be selected to cover ISD currentconsumption. The following equation must be satisfied:
From Equations 10 - 12; it is possible to select Rstart:
(1) For safe start-up without restart in shutdown mode:
(2) For safe start-up with restart from shutdown mode:
If Rstart meets Equation 14, restart operation is possible.However, it is not recommended to choose Rstart at thatrange because VDD rising time could be long and itincreases the lamp's turn-on delay time, as depicted inFigure 27.
Figure 27. VDD Build-upFigure 28 shows the equivalent circuit for estimatingtstart. From the circuit analysis, VDD variation versus timeis given by:
where CVDD is the total capacitance of the bypasscapacitors connected between VDD and GND.
From Equation 15, it is possible to calculate tstart bysubstituting VDD(t) with VDDTH(ST+):
In general, Equation 16 can be simplified as:
Accordingly, tstart can be controlled by adjusting thevalue of Rstart and CVDD. For example, if VDC=311V,Rstart=560k, CVDD=10µF, Ist=120µA, and VDDTH(ST+)=13.5V, tstart is about 0.33s.
Figure 28. Equivalent Circuit During Start
(EQ 8)[ ] [ ]DCV 2 220 V 311V= × ≅
(EQ 9)( )DC DDTH STST
start
V VI
R+−
>
(EQ 10)( )DC DDTH STstart
ST
V VR
I+−
>
(EQ 11)( )2DC CL
start
V V 1 WR 4
[ ]−
<
(EQ 12)( )DC DDTH STstart
SD
V VR
I+−
>
( ) ( )2 DC DDTH STDC CL start
SD
V V4 V V R
I+−
− < < (EQ 13)
(EQ 14)( ) ( )DC DDTH ST DC DDTH ST
startSD ST
V V V VR
I I+ +− −
< <
FAN7711 Rev. 1.00
VCLVDDTH(ST+)
VDDTH(ST-)
VDD
time
tstart
0
( )( )/( )( ) start VDDt R CDD DC start STV t V R I 1 e− ⋅= − ⋅ − (EQ 15)
(EQ 16)DC start ST DDTH STstart start VDD
DD start ST
V R I Vt R C
V R I( )ln +− ⋅ −
= − ⋅ ⋅− ⋅
( )
( )
start VDD DDTH STstart
DC start ST DDTH ST
R C Vt
V R I V+
+
⋅ ⋅≈
− ⋅ − (EQ 17)
IST
VDD
RT
CPH
GND
Rstart
CVDD
FAN7711 Rev. 1.00
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 16
2. Current Supplied by Charge PumpFor the IC supply, the charge pump method is used inFigure 29. Since CCP is connected to the half-bridgeoutput, the supplied current by CCP to the IC isdetermined by the output voltage of the half-bridge.
When the half-bridge output shows rising slope, CCP ischarged and the charging current is supplied to the IC.The current can be estimated as:
where DT is the dead time and dV/dt is the voltagevariation of the half-bridge output.
When the half-bridge shows falling slope, CCP isdischarged through Dp2. Total supplied current, Itotal, tothe IC during switching period, t, is:
From Equation 19, the average current, Iavg, supplied tothe IC is obtained by:
For the stable operation, Iavg must be higher than therequired current. If Iavg exceeds the required current, theresidual current flows through the shunt regulatorimplemented on the chip, which can cause unwantedheat generation. Therefore, CCP must be selectedconsidering stable operation and thermal generation.
For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavgis ~7.8mA; it is enough current for stable operation.
Figure 29. Charge Pump Operation
3. Lamp Turn-on TimeThe turn-on time of the lamp is determined by supplybuild-up time tstart, preheating time, and ignition time;where tstart has been obtained by Equation 17. When theIC's supply voltage exceeds VDDTH(ST+) after turn-on orrestart, the IC operates in preheating mode. Thisoperation continues until CPH pin's voltage reaches ~3V.In this mode, CPH capacitor is charged by IPH current,as depicted in Figure 30. The preheating time isachieved by calculating:
The preheating time is related to lamp life (especiallyfilament); therefore, the characteristics of a given lampshould be considered when choosing the time.
Figure 30. Preheating TimerCompared to the preheating time, it is almost impossibleto exactly predict the ignition time, whose definition is thetime from the end of the preheating time to ignition. Ingeneral, the lamp ignites during the ignition mode.Therefore, assume that the maximum ignition time is thesame as the duration of ignition mode, from 3V until CPHreaches 5V. Thus, ignition time can be defined as:
Note that, at ignition mode, CPH is charged by IIG, whichis six times larger than IPH. Consequently, total turn-ontime is approximately:
VDD Build-Time + Preheating Time + Ignition Time =
DCCP CP
VdVI C Cdt DT
= ≈ (EQ 18)
(EQ 19)total CP DCI I DT C V= ⋅ = ⋅
(EQ 20)total CP DCavg CP DC
I C VI C V f
t t⋅
= = = ⋅ ⋅
VDC
To VDDCCP Dp1
Dp2CVDD
Idp1
f=1/t
Half-bridge output
Idp1
Dp1
Dp2Idp1=0
DT:dead time
Charging mode Discharging mode
To VDD
CVDD
CCP
FAN7711 Rev. 1.00
(EQ 21)preheatPH
CPHt 3I
=
VDD
RT
CPH
GNDCPH
IPH
FAN7711 Rev. 1.00
( )ignitionIG IG
CPH CPHt 5 3 2I I
= − = (EQ 22)
(EQ 23)( ) [ .]ignitionIG IG
CPH CPHt 5 3 2 SecI I
= − =
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 17
4. PCB Guide lineComponent selection and placement on the PCB is veryimportant when using power control ICs. Bypass theVCC to GND as close to the IC terminals as possible witha low-ESR/ESL capacitor, as shown in Figure 31. Thisbypassed capacitor (Cbp) can reduce the noise from thepower supply parts, such as start-up resistor and chargepump.
The signal GND must be separated from the powerGND. So, the signal GND should be directly connectedto the rectify capacitor using an individual PCB trace.
In addition, the ground return path of the timingcomponents (CPH, RT) and VDD decoupling capacitorshould be connected directly to the IC GND lead and notvia separate traces or jumpers to other ground traces onthe board. These connection techniques prevent high-current ground loops from interfering with sensitivetiming component operations and allow the entire controlcircuit to reduce common-mode noise due to outputswitching.
Figure 31. Preheating Timer
HOT
PGND
SGND
Cbp
CphRT
One point SGND
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 18
Typical Application Diagram
Figure 32. Application Circuit of 32W Two Lamps
VDD
RT
CPH
R50
D50
D51
R55
R57
L3
VB
HO
VS
LO
M2
M3
C53C57
C58
D52
D7
C5
Lamp
D1 D2
D3 D4
C1 C2
C3
C4
FUSE
GND
8
7
6
5
1
2
3
4
OUT
GND
ZCDCS
MOT
INV
COMP
VCC
ACINPUT
R1
R4
C7
R5
R9
R10
C11
D6
M1
FAN
7711
8
7
6
5
1
2
3
5
L2 C55
C56Lamp
NTC
VDC
R3
L1
R12
R11
R13
R54
TNR
R8
R58
R56
FAN7711 Rev. 1.00
RectifiedWaveform
RectifiedWaveform
FAN7529
C6
D5
C8
C10C9
R51
R52
C51 C50
R53C52
C54
R6
R7
R2
ZD 1
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 19
Component List for 32W Two Lamps
Part Value Note Part Value NoteResistor C55 15nF/630V Miller Capacitor
R1 330kΩ 1/2W C56 2.2nF/1kV Miller Capacitor
R2 750kΩ 1/4W C57 15nF/630V Miller Capacitor
R3 100Ω 1/2W C58 2.2nF/1kV Miller Capacitor
R4 20kΩ 1/4W DiodeR5 47Ω 1/4W D1 1N4007 1kV,1A
R6 10kΩ 1/4W D2 1N4007 1kV,1A
R7 50kΩ 1/4W D3 1N4007 1kV,1A
R8 47kΩ 1/4W D4 1N4007 1kV,1A
R9 0.3Ω 1W D5 UF4007 Ultra Fast,1kV,1A
R10 1MΩ 1/4W D6 UF4007 Ultra Fast,1kV,1A
R11 1MΩ 1/4W D7 1N4148 100V,1A
R12 12.6kΩ 1/4W,1% D50 UF4007 Ultra Fast,1kV,1A
R13 220kΩ 2W D51 UF4007 Ultra Fast,1kV,1A
R50 150kΩ 1/4W D52 UF4007 Ultra Fast,1kV,1A
R51 150kΩ 1/4W ZD1 IN4746A Zener 18V, 1W
R52 150kΩ 1/4W MOSFETR53 90kΩ 1/4W,1% M1 FQPF5N60C 500V,6A
R54 10Ω 1/4W M2 FQPF5N50C 500V,5A
R55 47Ω 1/4W M3 FQPF5N50C 500V,5A
R56 47kΩ 1/4W FuseR57 47Ω 1/4W Fuse 3A/250V
R58 47kΩ 1/4W TNRCapacitor TNR 471
C1 47nF/275VAC Box Capacitor
C2 150nF/275VAC Box Capacitor NTCC3 2200pF/3kV Ceramic Capacitor NTC 10D-09
C4 2200pF/3kV Ceramic Capacitor Line FilterC5 0.22µF/630V Miller Capacitor LF1 40mH
C6 12nF/50V Ceramic Capacitor TransformerC7 22µF/50V Electrolytic Capacitor L1 0.94mH(75T:10T) EI2820
C8 1µF/50V Ceramic Capacitor InductorC9 1µF/50V Ceramic Capacitor L2 3.2mH(130T) EI2820
C10 0.1µF/50V Ceramic Capacitor L3 3.2mH(130T) EI2820
C11 47µF/450V Electrolytic Capacitor ICC50 10µF/50V Electrolytic Capacitor U1 FAN7711 Fairchild Semiconductor
C51 1µF/50V Ceramic Capacitor U2 FAN7529 Fairchild Semiconductor
C52 0.47µF/25V Ceramic Capacitor,5%
C53 100nF/50V Ceramic Capacitor
C54 470pF/1kV Ceramic Capacitor
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 20
Component List for 20W CFL
Note:3. Refer to the typical application circuit provided in Figure 1.
Part Value Note Part Value NoteResistor Diode
R1 560kΩ 1/4W D1 1N4007 1kV/1A
R2 90kΩ 1/4W D2 1N4007 1kV/1A
R3 10Ω 1/4W D3 1N4007 1kV/1A
R4 47Ω 1/4W D4 1N4007 1kV/1A
R5 47Ω 1/4W D5 UF4007 1kV/1A,Ultra Fast
D6 UF4007 1kV/1A,Ultra Fast
Capacitor D7 UF4007 1kV/1A,Ultra Fast
C1 22µF/250V Electrolytic Capacitor InductorC2 10µF/50V Electrolytic Capacitor L1 2.5mH (280T) EE1616S
C3 470nF/25V Miller Capacitor MOSFETC4 100nF/25V Miller Capacitor Q1 FQPF1N50C 500V,1A
C5 470pF/630V Miller Capacitor Q2 FQPF1N50C 500V,1A
C6 33nF/630V Miller Capacitor ICC7 3.9nF/1kV Miller Capacitor U1 FAN7711 Fairchild Semiconductor
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 21
Package Dimensions8-SOPDimensions are in millimeters unless otherwise noted.
Figure 33. 8-Lead Small Outline Package (SOP)
4.9
2±0
.20
0.1
94
±0.0
08
0.4
1±0
.10
0.0
16
±0.0
04
1.2
7
0.0
50
5.72
0.225
1.55 ±0.20
0.061 ±0.008
0.1~0.25
0.004~0.001
6.00 ±0.30
0.236 ±0.012
3.95 ±0.20
0.156 ±0.008
0.50 ±0.20
0.020 ±0.008
5.1
3
0.2
02
MA
X
#1
#4 #5
0~8°
#8
0.5
6
0.0
22
()
1.80
0.071
MA
X0.1
0
MA
X0.0
04
MAX
MIN
+0.1
0
-0.0
50.1
5
+0.0
04
-0.0020.0
06
January 2001, Rev. A
sop8_dim.pdf
FAN
7711 Ballast C
ontrol IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.comFAN7711 Rev. 1.0.2 22
Package Dimensions8-DIPDimensions are in inches and [millimeters] unless otherwise noted.
Figure 34. 8-Lead Dual In-Line Package (DIP)
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN
7711 Ballast C
ontrol IC
FAN7711 Rev. 1.0.2 23