FAN5098Two Phase Interleaved

Synchronous Buck Converter

By Ed Torrente

EE136

APPLICATION Programmable synchronous multi-

phase DC-DC controller IC. Can deliver 40A of output current

when designed with proper components.

Functions as a frequency PWM step down regulator with High Efficiency mode (E*) at light load.

FEATURES Programmable output form 800mV

to 1.550V in 15mV steps using an integrated 5-bit DAC.

Two interleaved synchronous phases with maximum performance

100ns response time Built-in current sharing between

phases.

FEATURES

Programmable Active Droop (Voltage Positioning)

Switching frequency can be programmed from 100kHz to 1MHz per phase

Integrated high-current gate drivers

FEATURES

Integrated Power Good, OV, UV, Enable/Soft Start functions

Drives N-channel MOSFETs Operation optimized for 12V High efficiency mode (E*) at light

load

INTENDED MARKET

This programmable step-down power supply is intended for the AMD Athlon and Hammer microprocessors.

CIRCUIT DIAGRAM

BLOCK DIAGRAM

CIRCUIT ANALYSIS Consists of

comparators feeding into signal conditioning amplifiers that provides the input to the digital control block.

The signal conditioning section accepts inputs from a current sensor and a voltage sensor.

Signal conditioning

amplifier

Signal conditioning amplifierComparators

CIRCUIT ANALYSIS The voltage

sensor amplifies the difference between the VFB signal and the reference voltage of the DAC and presents the output to each of the conditioning blocks.

Voltage sensor

VFB

CIRCUIT ANALYSIS The current control path

for each phase takes the difference between PGND and SW pins when the low-side MOSFET is on, reproducing the voltage across the MOSFET and thus the input current. It represents the resulting signal to the comparators, adding its signal to the voltage amplifier signal with a certain gain resulting in two signals being added.

PGND

SW

CIRCUIT ANALYSIS The sum is then

presented to the Signal conditioning blocks along with the oscillator ramp signal, which provides the main PWM control to the digital control block.

CIRCUIT ANALYSIS The oscillator ramps are

180° out of phase from each other such that the two phases are on alternately.

The digital control blocks takes the signal from the Signal conditioning amplifiers to provide the appropriate pulses to the HDRV and LDRV output pins for each phase.

MEASUREMENTS(Light load efficiency)

During light load, current will flow away from its output and towards the input.

This reverse current flow is seen as a positive voltage on the low-side MOSFET.

MEASUREMENTS(Normal Operation)

High-side Gate during normal operation

Note the 180° out of phase for fast transient response.

DEVICE SELECTION Requires N-

channel Enhancement mode FETs.

RDS,(on)<10mΩ Drain-Source

voltage rating>15V

DEVICE SELECTION(Gate Resistors)

Use the gate resistors are mandatory for all MOSFETs and should be placed as close as possible to the MOSFETs.

Gate resistors also limits power dissipation inside the IC which would result in switching frequency limitations.

DEVICE SELECTION(Inductors)

In choosing the inductor value there is a trade-off between the allowable ripple voltage and required transient response.

Choosing a smaller inductor value will be best since it will produce greater ripple while producing better transient response.

Typical values of inductors are 1.3μH at an oscillator frequency of 600kHz.

DEVICE SELECTION(Output Filter Capacitors )

Output bulk capacitor helps determine the output ripple and its transient response time.

Most commonly used are electrolytics for their low cost and low ESR.

The output capacitance should also include a number of small value ceramic capacitors preferably 0.1μF and 0.01μF.

CONCLUSION Capable of producing up to 40A of

current to supply the microprocessor.

RDS,(on)<10mΩ while most competitors have RDS,(on) =20mΩ.

Competitors include Texas Instrument, Maxim, and National Semiconductor.

ACKNOWLEDGEMENTS

Professor Zhou Mr. Cosimo Friolo Ms.Trina Noor Professor Ghadiri Fairchild Semiconductor