United States Patent [191 Hasegawa

Illllllllllllllllllllllllllllllllllll|||||Illllllllllllllllllllllllllllllll US005355519A

Patent Number: 5,355,519 Oct. 11, 1994 Date of Patent:

[11]

[45]

[54] FADING SIMULATION METHOD AND FADING SIMULATOR

[75] Inventor: Junichi Hasegawa, Kawasaki, Japan

[73] Assignee: Fujitsu Limited, Kawasaki, Japan [21] Appl. No.: 114,686 [22] Filed: Aug. 31, 1993

[30] Foreign Application Priority Data Mar. 4, 1993 [JP] Japan ................................ .. 5-043760

[51] Int. Cl.5 ........................................... .. H0413 17/00

[52] US. Cl. . . . . . . . . . . . . . . . . .. 455/52.3; 455/677

[58] Field of Search ..................... .. 455/52.l, 52.3, 65, 455/671, 67.3, 67.6, 304, 306

[56] References Cited FOREIGN PATENT DOCUMENTS

0111435 6/1984 Japan .

OTHER PUBLICATIONS

A Multipath Fading Simulator for Mobile Radio by Arredondo et al.

Primary Examiner-—Reinhard J. Eisenzopf Assistant Examiner-Mary M. Lin

[57] ABSTRACT The invention provides a fading simulator method and a fading simulator by which the attenuation ratio is not varied and the fading characteristic of a wide band can be realized stably even when the notch frequency sweeps. A fading simulator is interposed between a transmitter and a receiver, and a signal from the trans mitter is inputted to ?rst and second path arti?cial cir cuits of the fading simulator. In the ?rst path arti?cial circuit, the attenuation amount of a ?rst variable attenu ator is controlled to control the amplitude of the signal passing therethrough, and the signal is delayed by a ?rst delay circuit. Meanwhile, in the second path arti?cial circuit, a variable phase shifter is controlled to control the phase of the signal passing therethrough, and the attenuation amount at a second variable attenuator is controlled in accordance with a signal obtained by addi tion of an amplitude characteristic leveling amplitude correction value to an amplitude control signal, where after the passing signal is delayed by a second delay circuit. The signals from the ?rst and second path arti ?cial circuits are composed by a composer, and the thus composed signal is inputted to the receiver.

14 Claims, 16 Drawing Sheets

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US. Patent Oct. 11, 1994 Sheet 12 of 16 5,355,519

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5,355,519 1

FADING SIMULATION METHOD AND FADING SIlVIULATOR

BACKGROUND OF THE INVENTION

This invention relates to a fading simulation method and a fading simulator.

Digital radio communication sometimes suffers from an error caused by distortion in waveform arising from selective fading wherein the level drops in a particular frequency since it employs frequencies of a band wider than that of FM (frequency modulation) communica tion. Therefore, it is necessary to con?rm a perfor mance of a radio equipment with regard to fading in advance by way of testing, and to this end, a fading simulator is used in such a manner as seen in FIG. 14. Referring to FIG. 14, a fading simulator 82 is interposed between a transmitter 81 and a receiver 83. A transmis sion signal from the transmitter 81 is inputted to the fading simulator 82, in which waveform distortion simi lar to that which is caused by fading is applied to the transmission signal to arti?cially cause fading. The out put of the fading simulator 82 is received by the receiver 83 thereby to conduct a performance test of the radio system with regard to fading. FIG. 15 is a block diagram showing a general con

struction of such fading simulator. Referring to FIG. 15, the fading simulator includes a distributor 91 for distributing an input signal. A ?rst path 201 is formed from a circuit from the distributor 91 to a composer 98 by way of a ?rst variable attenuator 92, a delay compen sator 93 and a delay element 94 while a second path 202 is formed from another circuit from the distributor 91 to the composer 98 by way of an in?nite phase shifter 95, a second variable attenuator 96 and another delay ele ment 97.

Here, the ?rst variable attenuator 92 attenuates the amplitude of a signal passing the ?rst path 201, and the delay compensator 93 and the delay element 94 set a delay time for a signal passing the ?rst path 201. The in?nite phase shifter 95 varies the phase of a

signal passing the second path 202 to vary the notch frequency of fading. The second variable attenuator 96 attenuates the amplitude of a signal passing the second path 202. The delay element 97 sets the delay time of a signal passing the second path 202. The composer 98 composes signals from the ?rst and

second paths 201 and 202. The fading simulator shown in FIG. 15 further includes a variable attenuator 99 for attenuating the amplitude of a signal composed by the composer 98 to vary the gain between the input and the output of the fading simulator. The fading simulator further includes a control sec

tion 100 which includes phase control means 101, ?rst amplitude control means 102, second amplitude control means 103 and level control means 104. The phase control means 101 controls the in?nite

phase shifter 95 to control the phase of a signal passing the second path 202. The ?rst amplitude control means 102 controls the

amount of attenuation of the ?rst variable attenuator 92 to control the amplitude of a signal passing the ?rst path 201. The second amplitude control means 103 controls the amount of attenuation of the second variable attenu ator 96 to control the amplitude of a signal passing the second path 202.

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2 The level control means 104 controls the amount of

attenuation of the amplitude of a signal at the variable attenuator 99.

In the fading simulator of the construction described above, an input signal is distributed to the ?rst and second paths 201 and 202 by the distributor 91. In the ?rst path 201, the input signal is ?rst attenuated in am plitude by the ?rst variable attenuator 92, which is con trolled by the ?rst amplitude control means 102, and then delayed by the delay compensator 93 and the delay element 94. Meanwhile, in the second path 202, the input signal is ?rst varied in phase by the in?nite phase shifter 95, which is controlled by the phase control means 101, and then attenuated in amplitude by the second variable attenuator 96, which is controlled by the second amplitude control means 103, whereafter it is delayed by the delay element 97. The composer 98 composes signals from the ?rst and second paths 201 and 202, and the variable attenuator 99 attenuates the amplitude of an output signal of the composer 98 to vary the gain between the input and the output of the fading simulator under the control of the level control means 104.

With the fading simulator of the construction de scribed above, however, when a wide band is used, since an in?nite phase shifter is used as a phase shifter, the second path 202 exhibits such a frequency amplitude characteristic as seen from the waveform of FIG. 16(1)), which is different from such a ?at characteristic as of a frequency amplitude characteristic of the ?rst path 201 shown in FIG. 16(a). Consequently, there is a problem in that the frequency amplitude characteristic of the second path 202 described above varies the amount of attenuation when the notch frequency sweeps. More particularly, where the difference in delay time

between the ?rst and second paths 201 and 202 is repre sented by T1, the amplitude ratio by p1, the phase differ ence by 61 and the amplitude of the ?rst path 201 by A, the output amplitude characteristic A(w) is given by the following equation:

where f is a frequency. Further, the condition for A(w) to be minimized (for

the notch attenuator amount to be maximized) is that 21rf'r1 +61 =17, and in this instance, A(w)=A((1-p) 2)§=A(l — p), and the attenuation ratio is given by A(w)/A=l—-p. Further, if this is converted into dB (decibel), then 20log(A(w)/ A) = 20log(l — p).

If, for example, p=0.97 (-0.26 dB), then as indi cated by k in the waveform diagram of FIG. 16(c), the attenuation amount at a notch point f0 is given by 20log(1—0.97)= —30 dB. Then, if 61 is varied so that the notch point is adjusted

to f =fQ-Af, then the amplitude characteristic of the second path 202 changes, when —1 dB from the point f0 as seen from FIG. 16(b), to —0.26 dB —1 , dB= — 1.26 dB, that is, p=0.86, and the attenuation amount then changes to 20log(l—O.86)=—-l7 dB as seen from j in FIG. 16(c). A similar subject occurs with an alternative case wherein the notch point is varied to f =f0+Af.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a fading simulator method and a fading simulator by which the attenuation ratio is not varied and the fading

5,355,519 3

characteristic of a wide band can be realized stably even when the notch frequency sweeps.

In order to attain the object described above, accord ing to an aspect of the present invention, there is pro vided a fading simulation method which uses a fading simulator interposed between a transmitter and a re ceiver of a radio system and including a distributor for distributing an input signal, a ?rst path arti?cial circuit including a ?rst variable attenuator and a ?rst delay circuit for receiving the input signal distributed by the distributor, a second path arti?cial circuit including a variable phase shifter, a second variable attenuator and a second delay circuit for receiving the input signal distributed by the distributor, and a composer for com posing signals from the ?rst path arti?cial circuit and the second path arti?cial circuit, to conduct a perfor mance test of the radio system for fading by inputting a signal from the transmitter to the fading simulator so as to arti?cially produce fading by the fading simulator and receiving the output of the fading simulator by the receiver, comprising the steps of inputting an input signal from the transmitter to the fading simulator, the input signal being distributed by the distributor so that it is inputted to the ?rst path arti?cial circuit and the second path arti?cial circuit, controlling, in the ?rst path arti?cial circuit, the amount of attenuation of the ?rst variable attenuator to control the amplitude of a signal passing the ?rst path arti?cial circuit and delay ing the passing signal by the ?rst delay circuit, control ling, in the second path arti?cial circuit, the variable phase shifter to control the phase of a signal passing the second path arti?cial circuit, controlling the amount of attenuation at the second variable attenuator in accor dance with a signal obtained by addition to an ampli tude control signal of an amplitude correction value set for leveling the amplitude characteristic of the second path arti?cial circuit in accordance with notch fre quency information to control the amplitude of a signal passing the second path arti?cial circuit, and delaying the passing signal by the second delay circuit, compos ing signals from the ?rst path arti?cial circuit and the second path arti?cial circuit by composer, and inputting the signal obtained by the composition to the receiver. According to another aspect of the present invention,

there is provided a fading simulator, which comprises a distributor for distributing an input signal, a ?rst path arti?cial circuit including a ?rst variable attenuator and a ?rst delay circuit for receiving the input signal distrib uted by the distributor, a second path arti?cial circuit including a variable phase shifter, a second variable attenuator and a second delay circuit for receiving the input signal distributed by the distributor, a composer for composing signals from the ?rst path arti?cial cir cuit and the second path arti?cial circuit, ?rst amplitude control means for controlling the amount of attenuation of the ?rst variable attenuator to control the amplitude of a signal passing the ?rst path arti?cial circuit, second amplitude control means for controlling the amount of attenuation of the second variable attenuator to control the amplitude of a signal passing the second path arti?c ial circuit, phase control means for controlling the vari able phase shifter to control the phase of a signal passing the second path arti?cial circuit, frequency information detection means for detecting notch frequency informa tion from variable phase shifter control information received from the phase control means, amplitude cor rection value setting means for setting an amplitude correction value for leveling the amplitude characteris

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4 tic of the second path arti?cial circuit in accordance with the notch frequency information detected by the frequency information detection means, and addition means for adding the amplitude correction value set by the amplitude correction value setting means to a con trol signal from the second amplitude control meansv Each of the ?rst amplitude control means and the

second amplitude control means may be constructed as storage means in which digital amplitude control data are stored at predetermined addresses while the phase control means is constructed as storage means in which digital phase control data are stored at predetermined addresses and the amplitude correction value setting means is constructed as storage means in which digital amplitude correction value data are stored at predeter mined addresses, and means for indicating address infor mation to the storage means may constitute the fre quency information detection means.

In this instance, the fading simulator may further comprise digital to analog conversion means for con verting digital outputs of the storage means constituting the second amplitude control means and the amplitude correction value setting means into analog data, and the addition means may be constructed as analog addition means for adding analog data after conversion by the digital to analog conversion means. Or alternatively, the addition means may be con

structed as digital addition means for adding digital outputs of the storage means constituting the second amplitude control means and the amplitude correction value setting means, and the fading simulator may fur ther comprise digital to analog conversion means for converting a digital output of the digital addition means into analog data. The ?rst delay circuit and the second delay circuit

may each be constructed as a variable delay circuit. In this instance, each of the variable delay circuits

may include a plurality of delay elements having differ ent delay times and a selector for selecting one of the delay elements, and the amplitude correction value setting means may include a plurality of amplitude cor rection value setting sections for setting amplitude cor rection values for leveling different amplitude charac teristics of the second path arti?cial circuit obtained by selection of different ones of the delay elements, and a selector for selecting one of the amplitude correction value setting sections. According to a further aspect of the present inven

tion, there is provided a fading simulation method which uses a fading simulator interposed between a transmitter and a receiver of a radio system and includ ing a distributor for distributing an input signal, a ?rst path arti?cial circuit including a ?rst variable attenuator and a ?rst delay circuit for receiving the input signal distributed by the distributor, a second path arti?cial circuit including a variable phase shifter, a second vari able attenuator and a second delay circuit for receiving the input signal distributed by the distributor, and a composer for composing signals from the ?rst path arti?cial circuit and the second path arti?cial circuit, to conduct a performance test of the radio system for fading by inputting a signal from the transmitter to the fading simulator so as to arti?cially produce fading by the fading simulator and receiving the output of the fading simulator by the receiver, comprising the steps of inputting an input signal from the transmitter to the fading simulator, the input signal being distributed by the distributor so that it is inputted to the ?rst path

5,355,519 5

arti?cial circuit and the second path arti?cial circuit, controlling, in the ?rst path arti?cial circuit, the amount of attenuation of the ?rst variable attenuator to control the amplitude of a signal passing the ?rst path arti?cial circuit in accordance with a signal obtained by addition to a ?rst amplitude control signal of an amplitude cor rection value set for leveling the amplitude characteris tic of the ?rst path arti?cial circuit in accordance with notch frequency information and delaying the passing signal by the ?rst delay circuit, controlling, in the sec ond path arti?cial circuit, the variable phase shifter to control the phase of a signal passing the second path arti?cial circuit, controlling the amount of attenuation at the second variable attenuator in accordance with a signal obtained by addition to a second amplitude con trol signal of an amplitude correction value set for level ing the amplitude characteristic of the second path arti ?cial circuit in accordance with notch frequency infor mation to control the amplitude of a signal passing the second path arti?cial circuit, and delaying the passing signal by the second delay circuit, composing signals from the ?rst path arti?cial circuit and the second path arti?cial circuit by the composer, and inputting the signal obtained by the composition to the receiver. According to a still further aspect of the present

invention, there is provided a fading simulator, which comprises a distributor for distributing an input signal, a ?rst path arti?cial circuit including a ?rst variable atten uator and a ?rst delay circuit for receiving the input signal distributed by the distributor, a second path arti ?cial circuit including a variable phase shifter, a second variable attenuator and a second delay circuit for re ceiving the input signal distributed by the distributor, a composer for composing signals from the ?rst path arti?cial circuit and the second path arti?cial circuit, ?rst amplitude control means for controlling the amount of attenuation of the ?rst variable attenuator to control the amplitude of a signal passing the ?rst path arti?cial circuit, second amplitude control means for controlling the amount of attenuation of the second variable attenuator to control the amplitude of a signal passing the second path arti?cial circuit, phase control means for controlling the variable phase shifter to con trol the phase of a signal passing the second path arti?c ial circuit, frequency information detection means for detecting notch frequency information from variable phase shifter control information received from the phase control means, ?rst amplitude correction value setting means for setting an amplitude correction value for leveling the amplitude characteristic of the ?rst path arti?cial circuit in accordance with the notch frequency information detected by the frequency information de tection means, ?rst addition means for adding the ampli tude correction value set by the ?rst amplitude correc tion value setting means to a control signal from the ?rst amplitude control means, second amplitude correction value setting means for setting an amplitude correction value for leveling the amplitude characteristic of the second path arti?cial circuit in accordance with the notch frequency information detected by the frequency information detection means, and second addition means for adding the amplitude correction value set by the second amplitude correction value setting means to a control signal from the second amplitude control means.

Each of the ?rst amplitude control means and the second amplitude control means may be constructed as storage means in which digital amplitude control data

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6 are stored at predetermined addresses while the phase control means is constructed as storage means in which digital phase control data are stored at predetermined addresses and the ?rst amplitude correction value set ting means and the second amplitude correction value setting means are each constructed as storage means in which digital amplitude correction value data are stored at predetermined addresses, and means for indicating address information to the storage means may constitute the frequency information detection means.

In this instance, the fading simulator may further comprise ?rst digital to analog conversion means for converting digital outputs of the storage means consti tuting the ?rst amplitude control means and the ?rst amplitude correction value setting means into analog data, the ?rst addition means being constructed as ana log addition means for adding analog data after conver sion by the ?rst digital to analog conversion means, and second digital to analog conversion means for convert ing digital outputs of the storage means constituting the second amplitude control means and the second ampli tude correction value setting means into analog data, the second addition means being constructed as analog addition means for adding analog data after conversion by the second digital to analog conversion means. Or alternatively, the ?rst addition means may be

constructed as digital addition means for adding digital outputs of the storage means constituting the ?rst ampli tude control means and the ?rst amplitude correction value setting means and the fading simulator may fur ther comprise third digital to analog conversion means for converting a digital output of the digital addition means into analog data, and the second addition means may be constructed as digital addition means for adding digital outputs of the storage means constituting the second amplitude control means and the second ampli tude correction value setting means and the fading sim ulator may further comprise fourth digital to analog conversion means for converting a digital output of the digital addition means into analog data. The ?rst delay circuit and the second delay circuit

may each be constructed as a variable delay circuit. In this instance, each of the variable delay circuits

may include a plurality of delay elements having differ ent delay times and a selector for selecting one of the delay elements, and the ?rst amplitude correction value setting means may include a plurality of amplitude cor rection value setting sections for setting amplitude cor rection values for leveling different amplitude charac teristics of the ?rst path arti?cial circuit obtained by selection of different ones of the delay elements, and a selector for selecting one of the amplitude correction value setting sections while the second amplitude cor rection value setting means includes a plurality of am plitude correction value setting sections for setting am plitude correction values for leveling different ampli tude characteristics of the second path arti?cial circuit obtained by selection of different ones of the delay elements, and a selector for selecting one of the ampli tude correction value setting sections. With the fading simulation methods and the fading

simulators, a fading characteristic of a wide band can be realized stably with a simple construction, and accord ingly, fading simulation over a plurality of systems can be achieved by employment of the present invention. Further, since some frequency characteristic of an equipment is permitted by employment of the present