ExamIITake Home EE2403 Fall2013A

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    Last Name: First Name ID:xxxx-xx_________ .

    University of Texas at ArlingtonEE 24!-" Fall 2"!

    E#A$ II Ta%e &ome D'e "2(!(2"!

    )*INT +,U* NA$E in A)ITAL LETTE*. ID / : ####-##-

    Last NA$E: First NA$E:

    INT*UTI,N:

    "0 o1y tis 3o'ment in its entirety an3 a33 1a1er 5ere it is nee3e3.

    20 TA)LE te exam togeter

    !0 Ex1lain 5at yo' are 3oing an3 give 3etail ex1lanation an3 sol'tion. Do nots%i1 ste1s.

    40 o5 yo'r o5n 5or%. +o' an get generi el1 6't not s1eifi to te1ro6lems.

    70 *ea3 1ro6lems aref'lly an3 follo5 instr'tions.

    )ro6. / $ax )oints )oints Earne3

    " 2

    2 "7

    ! "7

    4 2

    7 "7

    8 "7

    9 "7

    Total

    ""7"7 1oints;on's0

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    I certify that the submitted work is entirely my own work. I was allowed to seek help inunderstanding the material useful for this examBut I did not seek help in solving the specific problems in this exam.

    Signed:

    Date:

    NOTE 5 point BonusHappy Thanksgiving

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    Ci

    VCC

    RB

    !B

    Last Name: First Name ID:xxxx-xx_________ .

    )ro6lem ""onsider the following four#resistor bias circuit shown below in a$ and its e%uivalent circuit shown&ive expressions for !Band RBin terms of !""' R(and R)

    We define Sensitivity function (

    (

    , ) to be relative change in (i.e. / )

    /divided by relative change in (i.e. / ). That is , ) .

    /

    This measures what percent cha

    CQ CQ CQ CQ

    CQ CQ CQ

    CQ

    CQ

    S I I I I

    I I IS I

    I

    = =

    (

    (

    1) ssume transistor operate

    nge in occurs given percentage change in .

    !or e"ample if , ) #.$ then a 1% change in causes a #.$% change in .

    !or small relative change in , )

    CQ

    CQ CQ

    CQ

    CQ

    CQ

    I

    S I I

    IS I

    I

    =

    =

    s in forward active region. &ive e"pression for

    in terms of , , ,and . ssume constant voltage drop model for ' diode with #.

    *)Suppose we have want to design our 'ias circ+1* and 1*#. We

    B E B BE

    CQ

    CC

    I

    R R V V V

    V

    =

    = uit so that the following

    conditions are satissfied to achieve a decent amplifier-

    i)

    ii)

    1*# ( a decenly high input resistance)

    The sensitivity ( , ) #.* (a resonably low sensitivity of to )

    B

    CQ CQ

    R

    I I

    k

    S

    =

    =

    1 *

    ma" ma"he ma"imum value of

    , , and

    .

    iii) T $ and / * (right in the middle to avoid saturation and cut

    se the above constraints to find , and finally .

    $)efine Sensitivity function

    E C

    C CQ C

    B

    I I I

    R R V R R

    S

    mA ==

    ( , ) similar to above, and find its valueCQ EI R

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    )ro6lem 2

    "onsider the following circuit and the D DSi vs v

    current#voltage graph shown below it . *hetransistor is a n#type enhancement +,*

    -. Determine the value for and !tn

    B. Suppose 0 /.0 k. "arefully drawthe load line in the graph given below.Determine the position of the 1 point

    on the graph and values for !DS1andID1. 2otice you have to set vin/ for

    this part.

    C. 3hat is the value of !DSand ID1when vinis 4( !5 6ow about whenwhen vinis #( !5 6ow about whenwhen v

    in

    is #) !5

    D. 3hat is the maximum value for RDsothat we avoid triode region when vinis 4( !

    -nswer to -:

    -nswer to B:

    -nswer to ":

    -nswer to D:

    8

    !DS1

    ID1

    vin4( ! : vin#(! : vin#) ! :

    !DS

    !DS

    !DS

    ID ID ID

    ID1

    RDmax

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    )ro6lem 2 sol'tion

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    )ro6lem 2 sol'tion

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    )ro6lem !In the following circuit' the Drain and &ate are shorted together' therefore !DS !&S

    -. Is the transistor operating in saturation or triode region5 7ustify your answer and writethe appropriate transistor e%uation.

    B. 8btain expression relating iDto !DS by eliminating !&S.

    ". 3rite the !9 e%uation for the loop on the right hand side.

    D. 8btain a %uadratic e%uation for !DSby eliminate iDfrom B and " then solve to obtain!DS1and ID1. *he transistor has /.)0 m - !)and !tn ( !.

    !DS1

    ID1

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    1 **# , $ , 1 , * , *

    DD D sV V R M R M R k and R k = = = = =

    Last Name: First Name ID:xxxx-xx_________ .

    )ro6lem 4 1oints0"onsider the ; resistor bias circuit shown below with its e%uivalent circuit on the right. *he +,*

    has*

    * , 1 /tnV V K mA V = = and the following values are given for this circuit

    (. +ind the value for VGand RG.

    2.

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    )ro6lem 7 1oints0Draw the ac small signal analysis circuit for the following common source amplifier using thesimple ac small signal midband model.

    +ind expression for ac small signal voltage gain /out inv v and input impedance /in inv i

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    )ro6lem 8*he circuit below a$ is called ,mitter +ollower. *he circuit below it b$ is the small signal midbande%uivalent circuit.

    , , , , .b L

    L Ein L

    L E

    Give expression for i in terms of R r !ere R R

    and v RR R

    =

    +

    (1 )

    (1 )

    o L

    in L

    vS!o t!at

    v

    R

    r R

    +=

    + +

    1 *

    1 *

    erive e"pression for input resistance .in inin b Bin B

    v vi i

    i

    R R"ote !ere R

    R R R= + =

    +

    E rentice 6all )///' 6ambley F,lectronics' )ndeditionG

    E rentice 6all )///' 6ambley F,lectronics' )ndeditionG

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    )ro6lem 9Repeat ,xample 0.(/ in Sedra and Smith >thedition for RD@ H and R9)/ H.&I!, -99 *6, S*,S -2D D,*-I9S ISSI2& I2 *6, ,J-9,