Es1 Final Copy

8/10/2019 Es1 Final Copy

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EXPERIMENT NO:-1

1.

Program Statement:-

Write a program to find largest number from array having 20 numbers of 8 bit unsignedtype which is stored in external data memory from 1000H onwards. Save the result in 1020H

(external data memory).

2.

Software Used For Simulation: -MCU 8051 IDE v1.4.

3. Program code:-

Line

No

Address Label Program

(Mnemonics)

Program

(Opcodes)

Description of Instruction

1. ORG 0000H START PROGRAM FROM 000

2. 0000H MOV R1,#20 79,14 INITIALISE MEMORYCOUNTER

3. 0002H MOV DPTR,#1000H 90,10,00 INITIALISE MEMORY POINTE

4. 0005H MOVX A,@DPTR E0 MOVE THE CONTENTSPOINTED BY DPTR TO A

5. 0006H MOV B,A F5, F0 MOVE DATA FROM ATO BREGISTER

6. 0008H UP INC DPTR A3 INCREMENT DPTR

7. 0009H MOVX A,@DPTR E0 TAKE NEXT DATA FROM DPTO A

8. 000AH CJNE A,B,DOWN1 B5,F0,02 FIND MAX NO. (IF A/=B THEJUMP TO )

9. 000DH SJMP DOWN 80,04 IF A=B THEN CONTINUE

10. 000FH DOWN

1

JC DOWN 40,02 JUMP IF CARRY (A>B)

11. 0011H MOV B,A F5,F0 MOVE A TO B

12. 0013H DOWN DJNZ R1,UP D9,F3 DECREMENT R1,( IF NOT ZERJUMP TO)

13. 0015H MOV A,B F5,F0 MOVE B TO A

14. 0017H MOV DPTR, #1020H 90,10,20 ALLOTE 1020H LOCATION T

DPTR

15. 001AH MOVX @DPTR,A F0 STORE LARGER NO. TO DPTLOCATION

16. 001BH LOOP SJMP LOOP 80,FE SHORT JUMP WITHIN THELOOP

17. END


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4. Theory:-

Microcontrollers: It is a general purpose device but one that is mean to read data, performs

limited calculations on that data and control its environment based on those calculations. The

prime use of a microcontroller is to control the operation of a machine using a fixed program that

is stored in RAM and that does not change over the lifetime of the system.

External Memory: In this program we are using the external RAM memory to store the data. In

the microcontroller two separate external memory spaces are made available by the 16-bit PC

and DPTR and by different control pins for enabling external RAM and ROM chips. In this

program we are using 1K RAM to store the data.

In this program we are using the logic to find the largest no. from the array of 20

numbers. For that we use two register (A & B) the 1stdata is moved to the reg. A and then to reg

B and second data is moved to the reg. A. Then we compare both the data of registers, and if the

content of A is not equal to the content of B then jump in the loop DOWN1 otherwise jump in

the loop DOWN. This process continues till the counter becomes zero. Then the greatest number

is stored in reg. A and the result is stored in memory location 1020H.


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5. Flowchart:-

Yes

No

Yes

No

Yes

No

START

Initialize memory counter to 20H

Initialize memory pointer to 1000H

Take first data to accumulator

Move the data from reg. A to reg. B

Increment DPTR to next address

Move the data from memory pointed by DPTR to A

IF AB

Short jump to down

If CF=1

Move data from reg. A to reg. B

Decrement R1

IF R10

Move data from reg. B to reg. A

Set data pointer to 1020H location

Move the data from A to 1020H memory location

END


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6. Result:-The program has been executed and the result is stored in memory location 1020H.

MEMORY

ADDRESS

DATA

1000H 10H

1001H 20H

1002H 30H

1003H 40H

1004H 50H

1005H 60H

1006H 70H

1007H 80H

1008H 90H1009H 21H

1010H 22H

1011H 23H

1012H 24H

1013H 26H

1014H 37H

1015H 46H

1016H 30H

1017H 50H

1018H 67H

1019H 78H

1020H 90H


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EXPERIMENT NO: - 2

1. Program statement:

Write a program to generate a square wave of period 10 ms by using timer.

2. Software used for simulation: MCU 8051 IDE version 1.4.7

Keil software

Proteus 7.2

3. Program code: Generate square wave using TIMER 1 IN MODE 1

Line

No.


(Mnemonics)

Program

(Opcodes)

Description of

Instruction1 ORG 0000H

2 0000H MOVTMOD,#10H

75,89,10 TIMER 1,MODE 1

3 0003H AGAIN: MOV

TL1,#00H

75,8B,00 TL=00 LOW BYTE

4 0006H MOVTH1,#0EEH

75,8D,EE TH1=EE HIGHER BYTE

5 0009H SETB TR1 D2,8E START TIMER 1

6 000BH BACK JNB TF1,BACK 30,8F,FD REMAIN UNTIL THE

TIMER ROLLS OVER

7 000EH CLR TR1 C2,8E STOP TIMER 1

8 0010H CPL P0.1 B2,81 COMPLEMENT THEBIT

9 0012H CLR TF1 C2,8F CLEAR TIMER FLAG

11 0014H SJMP AGAIN 80,ED RELOAD COUNETR

12 END


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4. Theory:-Square wave generation using 8051.

Using software delay subroutines square waves over a wide frequency range (limited by

the crystal frequency) can be produced using 8051. The idea is very simple to run a

subroutine with delay equal to half the time period of the square wave, complement any port

pin after the delay routine is finished, repeat the delay subroutine again, complement the

same port pin again and repeat the cycle again and again over time. This will result in a

square wave of the required frequency at the corresponding port pin. Basic register of timer

in 8051 are Timer0 and Timer1 register. Timer 0 and Timer 1 are 16 bit register and they can

be accessed as low byte and high byte. For Timer0, low byte register is TL0 and higher byte

is TH0 and for timer1, low byte is TL1 and TH1.

D15 D14 D1

3

D1

2

D1

1

D1

0

D9 D8 D7 D6 D5 D4 D3 D2 D1 D

0

TH0 TLO

Timer 0 register

TH1 TL1

Timer 1 register

4.1TMOD: As we are generating square wave by using timer. We are using TMOD and

TCON also. We are generating square wave using timer one in mode 1 as well as mode 2. Theexperiment uses Timers in modes 1 and 2. Mode 1 combines the two Timer registers to form a

16 bit register, comprising Timer High byte (TH) and Timer Low byte (TL). Mode 2 sets the

Timer Low byte (TL) as the working 8 bit register and Timer High byte (TH) as the reload

register. In mode 2 the TL register is automatically reloaded from the TH register with present

value, after roll-over. Also the Timer roll-over Flag (TF) is automatically cleared.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D

0


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The Timer modes are set by the Gate, C/T, M1 and M0 Timer MODE register (TMOD).

GATE C/T M1 M0 GATE C/T M1 M0

TIMER 1 TIMER 0

Bit Name Timer Description

7 Gate 1 Gate bit: when set, timer1 only runs while INT1 is high

_

6 C/T 1 Counter Timer select bit: 1 = Counter, 0 = Timer

5 M1 1 Mode bit 1: See table below

4 M0 1 Mode bit 0: See table below

3 Gate 0 Gate bit: when set, timer0 only runs whileINT0 is high

_

2 C/T 0 Counter Timer select bit: 1 = Counter, 0 = Timer

1 M1 0 Mode bits 1: See table below

0 M0 0 Mode bits 0: See table below

M1 M0 Mode Description

0 0 0 13-bit timer mode (compatibility with 8048)

0 1 1 16-bit timer mode

1 0 2 8-bit timer mode Auto-reload Mode

1 1 3 split timer mode

Timer 0: TL0 is an 8-bit timer controlled by timer 0 mode

bits; TH0, the same except controlled by timer 1 mode bits.

Timer1: stopped


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4.2TCON:

The Timer is turned on by setting TR = 1 in the Timer control register TCON, TR = 0 turns

off the Timer.

TCON (Timer Control)

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Bit Symbol Description

TCON.7 TF1 Timer 1 overflow Flag

TCON.6 TR1 Timer 1 run control Flag

TCON.5 TF0 Timer 0 overflow Flag.

TCON.4 TR0 Timer 0 run control Flag.

TCON.3 IE1 External Interrupt 1 edge flag

TCON.2 IT1 External Interrupt 1 Type flag

TCON.1 IE0 External Interrupt 0 edge flag.

TCON.0 IT1 External Interrupt 0 Type flag.

5. Calculation:

FOR MODE 1

Crystal oscillator frequency = 11.0592 MHz

Timer controls with clk frequency of 1/2th of crystal frequency

F=11.0592/12

= 0.921MHz

Time period :T= 1/0.921*10^6

=1.085*10^-6 sec

Duty cycle is 50% .Hence Ton is 5ms and Toff is 5ms.

Required Delay= 5*10^-3

Required Count = 5*10^-3/1.085*10^-6=4608

Maximum possible value that can be stored in Reg. TL1 and TH1= 65536


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Initial value to be loaded in Reg. TL1 and TH1= 65536 - 4608

= 60928 (decimal)

= EE00 (Hex)

6. Flowchart:-

FOR TIMER 1 IN MODE 1

SELECTING TIMER 1

LOAD COUNT VALUE EEH IN TH1

TO RUN THE TIMER 1 SET TR1

LOAD COUNT VALUE 00H IN TL1

MONITOR TF1

CLEAR TIMER

COMPLEMENT P0.1

CLEAR TF1

TF1=0

TF1=1

START

SJMP AGAIN

End


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7. Hardware Description Diagram


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8.Result:

A square wave of time period 10 ms is generated by using mode 1 operation and Timer

register1.Mode of operation and Timer register is selected by loading the value in TCONregister by loading value in EE00H in Timer register 1(i.e. TH1 and TL1).Thus Square

wave of desired time period is obtained.


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EXPERIMENT NO: - 3

1.

Program Statement:-

Write a program to transfer message MTECH VLSI serially at baud rate 9600 baud, 8-

bit data and 1 stop bit.

2. Software used for simulation:-Pinnacle 52

3. Program code:-

Line

No.Address Label

Program

(Mnemonics)

Program

(Opcodes)Description of Instruction

1. ORG 0000H START PROGRAM FROM 0000H

2. 0000H MOV TMOD,#20H 75 89 20 TIMER IN MODE 2(AUTORELOAD MODE)

3. 0003H MOV TH1,#0FDH 75 8D FD BAUD RATE OF 9600 BAND

4. 0006H MOV SCON,#50H 75 98 50 8-BIT DATA, 1 START BIT AND 1STOP BIT

5. 0009H MOV R1,#03H 79 03 SET COUNTER

6. 000BH SETB TR1 D2 8E START TIMER 1

7. 000DH RPT MOV A, #M 74 4D TAKE 1STCHARACTER IN ACC

8. 000FH ACALL TRANS 11 53 CALL SUB ROUTINE TRANS

9. 0011H MOV A, #T 74 49 TAKE 2STCHARACTER IN ACC

10. 0013H ACALL TRANS 11 53 CALL SUB ROUTINE TRANS

11. 0015H MOV A, #E 74 43 TAKE 3STCHARACTER IN ACC


13. 0019H MOV A, #C 74 52 TAKE 4STCHARACTER IN ACC

14. 001BH ACALL TRANS 11 53 CALL SUB ROUTINE TRANS

15. 001DH MOV A, #H 74 4F TAKE 5

ST

CHARACTER IN ACC


17. 0021H MOV A, #V 74 20 TAKE 6ST

CHARACTER IN ACC



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SENDER

19. 0025H MOV A, #L 74 43 TAKE 7STCHARACTER IN ACC


21. 0029H MOV A, #S 74 4F TAKE 8STCHARACTER IN ACC


23. 002DH MOV A, #I 74 4E TAKE 9STCHARACTER IN ACC


25. 004DH MOV A, # 74 20 TAKE 17STCHARACTER IN ACC


27. 0051H DJNZ R1,RPT D9 BA DECREASE COUNTER ANDREPEAT IF COUNTER NOTEQUAL TO ZERO

28. 0053H TRANS MOV SBUF, A F5 99 MOV A DATA TO SBUF

29. 0055H HERE JNB T1, HERE 30 99 FD IF TI NOT 0 THEN HERE

30. 0058H CLR T1 C2 99 CLEAR INTERRUPT REG

31. 005AH RET 22 RETURN

32. 005BH END END OPERATION

4. Theory:-

Data Transfer:

Fig1. SERIAL COMMUNICATION

Fig.2 PARALLEL COMMUNICATION

RECEIVERRECEIVER SENDER


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Serial Communications:

Serial communications send a single bit at a time. This only requires a single

communication channel, as opposed to 8 channels to send a byte. With only one channel the

costs are lower, but the communication rates are slower. The communication channels are often

wire based, but they may also be can be optical and radio. It uses two methods as follows:

1. Synchronous data transfer

Synchronous data transmission is one in which the data is transmitted by synchronizing

the transmission at the receiving and sending ends using a common clock signal. Since start and

stop bits are not present, this allows the use of transmission bandwidth for more message bits and

makes the whole transmission process simpler and easier.

2. Asynchronous data transfer

The term asynchronous is usually used to describe communications in which data can be

transmitted bit vise rather than in a block of data. For example, a telephone conversation is

asynchronous because both parties can talk whenever they like. If the communication were

synchronous, each party would be required to wait a specified interval before speaking.

Asynchronous Serial Communication:

Asynchronous serial communication is widely used for character-oriented (1 byte)

transmissions. In asynchronous method, each character is placed in between start and stop bits.

This is called as Framing.

Start and stop bits

FRAMING

ASCII CHARACTER

STOP BIT D7 D6 D5 D4 D3 D2 D1 D0 START BIT

One or two bits 1 Data bits only one bit 0

Go out last! Go out first!

RS232 Standards:

RS232 is set by Electronics Industries Association (EIA) in 1960. RS232 is a serial I/O

interfacing standard; however, since the standard was set long before the advent of the TTL logic


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(MSB) (LSB)

GATE C/T M1 M0 GATE C/T M1 M0

TIMER 1 TIMER 0

SBUF Register:

SBUF is physically two registers. One is write only and is used to hold data to be

transferred out of the 8051 via TxD line. The other is read only and received the data from

external source via RxD line. Both mutually exclusive registers use address 99H.

SCON Register:

Mode 0, 2, and 3 are ready used today. Mode 1 is compatible with the COM port of IBM

PC. Mode 1 allows the baud rate to be variable and is set by Timer 1 of 8051.

SM0 SM1 SM2 REN TB8 RB8 TI RI

SM0 SM1 MODE

0 0 0

0 1 1 8 bit data, 1 start bit, 1 stop bit

1 0 2

1 1 3


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NO

YES

Before Execution:

A

TI BIT =

1

CLEAR INTEREPUT REGISTER

RETURN

STOP


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After Execution:

6.

Result and Conclusion:-

We have successfully transfer message MTECH VLSI serially at band rate 9600 band

8-bit data and 1 stop bit.


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EXPERIMENT NO:-4

1. Program Statement: -Draw and explain interfacing of 16X2 LCD display with 8051.Write a program for display as given below-

Line 1VLSI DESIGN

2. Software Used For Stimulation: KEIL UVISION4

PROTEUS VERSION 7.2

3. Program code :-

Line

No.


(Mnemonics)

Program

(Opcodes)

Description of

Instruction1.

ORG 0000H ORGANISE WITH0000H ADRESS

2. 0000H MOV A, #38H 74,38 INTIALISE LCD 2LINES, 5*7 MATRIX

3. 0002H ACALL COMMAND 11,75 CALL COMMANDSUBROUTINE

4. 0004H ACALL DELAY 11,8F PROVIDE DELAY

5.

0006H MOV A, #0EH 74, 0E CLEAR LCD

6. 0008H ACALL COMMAND 11, 75 CALL COMMANDSUBROUTINE

7. 000AH ACALL DELAY 11, 8F PROVIDE DELAY

8. 000CH MOV A, #01H 74, 01

9. 000EH ACALL COMMAND 11, 75

10.

0010H ACALL DELAY 11, 8F

0012H MOV A,#18H 74, 18 SHIFT ENTIREDISPLAY TO THELEFT

11.0014H ACALL COMMAND 11,75 CALL COMMANDSUBROUTINE


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12.

0016H

ACALL DELAY 11,8F PROVIDE DELAY

13.0018H MOV A,#81H 74, 81 FORCE CURSOR TOBEGINNING OF 1ST

LINE14.001AH ACALL COMMAND 11,75 CALL COMMAND

SUBROUTINE

15.001CH ACALL DELAY 11, 8F PROVIDE DELAY

16.

001EH MOV A,# V 74, 56 DISPLAY LETTER B

17.0020H ACALL DATA 1 11, 82 CALL COMMAND

SUBROUTINE

18.0022H ACALL DELAY 11, 8F PROVIDE DELAY

19.

0024H MOV A,#L 74,4c DISPLAY LETTER D

20.

0026H ACALL DATA 1 11, 82 CALL COMMANDSUBROUTINE


22.

002AH MOV A,#S 74, 53 DISPLAY LETTER C

23.002CH ACALL DATA 1 11,82 CALL COMMANDSUBROUTINE

24.002EH ACALL DELAY 11, 8F PROVIDE DELAY

25.0030H MOV A,#I 74,49 DISPLAY LETTER O

26.0032H ACALL DATA 1 11, 82 CALL COMMANDSUBROUTINE


28.

0036H MOV A,# 74,20 DISPLAY LETTER E

29.0038H ACALL DATA 1 11,82 CALL COMMAND

SUBROUTINE

30.003AH ACALL DELAY 11,8F PROVIDE DELAY

31.

003CH MOV A,# D 74,44 DISPLAY LETTER

32.003EH ACALL DATA 1 11, 82 CALL COMMAND


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SUBROUTINE


34.0042H MOV A,#E 74,45 DISPLAY LETTER S

35.

0044H ACALL DATA 1 11,82 CALL COMMAND

SUBROUTINE

36.

0046H ACALL DELAY 11,8F PROVIDE DELAY

37.0048H MOV A,#S 74, 53 DISPLAY LETTER E

38.004AH ACALL DATA 1 11,82 CALL COMMANDSUBROUTINE

39.004CH ACALL DELAY 11,8F PROVIDE DELAY

40.004EH MOV A,#I 74, 49 DISPLAY LETTERW

41.0050H ACALL DATA 1 11,82 CALL COMMANDSUBROUTINE

42.

0052H ACALL DELAY 11,8F PROVIDE DELAY

43.

0054H MOV A,#G 74,47 DISPLAY LETTER A

44.

0056H ACALL DATA 1 11,82 CALL COMMANDSUBROUTINE

45.0058H ACALL DELAY 11,8F PROVIDE DELAY

46.

005AH MOV A.#N 74,4E DISPLAY LETTER G

47.005CH ACALL DATA 1 11, 82 CALL COMMAND

SUBROUTINE

48.005EH ACALL DELAY 11,8F PROVIDE DELAY

49.0072H LJUMP AGAIN 02,00,12

50.0075H COMMAND MOV P1,A F5, 90 COPY CONTENT OFA TO PORT 1

51.

0077H CLR P2.0 C2,A0 RS0 = 1 FORCOMMAND

52.

0079H CLR P2.1 C2,A1 R/W = 0 FOR WRITE

53.007BH SETB P2.2 D2,A2 E=1 FOR HIGH

54.007DH ACALL DELAY 11,8F PROVIDE DELAY

55.007FH CLR P2.2 C2,A2 E=0 FOR H-L PULSE

56.0081H RET 22

57.0082H DATA1 MOV P1,A F5,90 COPY CONTENT OFA TO PORT 1

58.

0084H SETB P2.0 D2,A0 RS0 = 1 FOR DATA

59.0086H CLR P2.1 C2,A1 R/W = 0 FOR WRITE

60.0088H SETB P2.2 D2,A2 E=1 FOR HIGH

61.008AH ACALL DELAY 11,8F PROVIDE DELAY

62.008CH CLR P2.2 C2,A2 E=0 FOR H-L PULSE


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63.

008EH RET 22

64.008FH DELAY MOV R3,#50H 7B,50

65.0091H UP MOV R4,#0FH 7C,OF

66.0093H HERE1 DJNZ R3,HERE1 DC,FE DECREASE R3 ANDJUMP TO HERE1WHEN R3 IS NOTZERO

67.0095H DJNZ R3,UP DB,FA DECREASE R3 ANDJUMP TO UP WHEN

R3 IS NOT ZERO

68.0097H RET 22

69. END STOP

4. Theory:

LCD means liquid crystal display. It is very helpful in providing user to interface as well

as for debugging purpose. The most common type of LCD controller is HITACHI 44780 which

provides a simple interface between the controller and LCD. These LCDs arevery simple to

interface with the controller as well as are cost effective.

The LCD requires 3 control lines i.e. RS, R/W, EN and 8 or 4 data lines i.e.

D0 to D7. The number of data lines depends on mode of operation. If LCD operated on 8-bit

mode then 8 data lines pins 3 control lines i.e. total 11 lines are required. And if operated on 4-bit

mode then required 7 lines. Here we have to use 8-bit mode for interfacing a LCD through 8051

Because we have sufficient data lines and we need to display fast for better result.

In these programming, we use 14 pins. The function of each pin is shown inbelow.

While Vcc and Vss provides +5v and ground respectively and Vee is used for controlling LCD

contrast.

Pin Description for LCD:

Pin Symbol Description

1. Vss Ground

2. Vcc +5v power supply

3. Vee Power supply to control contrast4. RS RS=0 to select command register, RS=1 to select data resister

5. R/W R/W=0 for write, R/W=1 for read

6. E Enable

7. DB0 The 8 bit data bus





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WhenRSis low (0), the data is to be treated as a command. When RS is high (1), the data beingsent is considered as text data which should be displayed on the screen.

When R/W is low (0), the information on the data bus is being written to the LCD. When RW is

high (1), the program is effectively reading from the LCD. Most of the times there is no need to

read from the LCD so this line can directly be connected to Gnd thus saving one controller line.

The ENABLEpin is used to latch the data present on the data pins. A HIGH - LOW signal is

required to latch the data. The LCD interprets and executes our command at the instant the EN

line is brought low. If you never bring EN low, your instruction will never be executed. The 8-bit

data pins D0-D7 are used to send information to LCD or read the contents of LCDs internal

register. To display letters and numbers, we send ASCII codes for the letters and numbers to

these pins while making RS=1.

USEFUL COMMANDS:

For shift display to left corner- 00011000 i.e 18H

For display cursor in steady position- 00001110 i.e 0EH

For force cursor to beginning of 1st line-10000000i.e. 81H

For 2line and 5*7 matrix-00111000i.e 38H

For cursor on display on 01H


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5. INTERFACING DIAGRAM


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6. Flowchart:START

SEND 38H TO ACC.

ACALL COMMAD

ACALL DELAY

SEND 01H TO ACC.

ACALL COMMAD

ACALL DELAY

SEND 0EH TO ACC.

ACALL COMMAD

ACALL DELAY

SEND 18H TO ACC.

ACALL COMMAD

ACALL DELAY

SEND 81H TO ACC.

ACALL COMMAD

ACALL DELAY

SEND CHAR V TO ACC.


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A B C D E F G

D

B C E GSEND CHAR L TO ACC.

ACALL DATA1

ACALL DELAY

SEND CHAR S TO ACC.

ACALL DATA1

ACALL DELAY

SEND CHAR I TO ACC.

ACALL DATA1

ACALL DELAY

SEND CHAR D TO ACC.

ACALL DATA1

ACALL DELAY

SEND CHAR E TO ACC.

ACALL DATA1

ACALL DELAY

SEND CHAR G TO ACC.


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B C E G

A D C E G F

SEND ACC.TO P1

CLEAR P2.0

CLEARP2.1

SET P2.2

ACALL DELAY

CLEAR P2.2

RET

SEND ACC.TO P1

SETP2.0

CLEARP2.1

SET P2.2

ACALL DELAY

CLEARP2.2

RET

MOV 50H TO R3

MOV 0FFH TO R4

IF R3=!0

RET

IF R4=!0


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7. Hardware Connection Diagram:

8. Result and Conclusion: Byusing keil uvision4 and proteus 7.2 lcd interfacing

with mcu and show VLSI DESIGN is successful


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16 000DH CLR ADDR_B C2,A1 B=0

17 000FH SETB ADDR_A D2,A0A=1(Select CHANNEL1)

18 0011H ACALL DELAY 11,2Emake sure address arestable

19 0013H SETB ALE D2,A6 Latch Address

20 0015H ACALL DELAY 11,2E

21 0017H SETE SC D2,A6STARTCONVERSION

22 0019H ACALL DELAY 11,2E

23 001BH CLR ALE C2,A4

24 001DH CLR SC C2,A6

25 001FH HERE: JB EOC,HERE 20,A7,FD Wait Until Done

26 0022H HERE1: JNB EOC,HERE1 30,A7,FD Wait Until Done

27 0025H SETB OE D2,A5 Enable READ

28 0027H ACALL DELAY 11,2E Wait

29 0029H MOV A,MYDATA E5,90 Read DATA

30 002BH CLE OE C2,A5 Clear READ for next

31 002DH

ACALL

CONVERSION 11,37 HEX to ASCII

32 002FH SJMP BACK 80,DD

33 0031H DELAY: MOV R2,#100 7A,64MOVE 100 to R2 forDelay

34 0033H H1: MOV R3,#255 7B,FFMOVE 255 to R3 forDelay

35 0035H H2: DJNZ R3,H2 DB,FEJUMP until R3=0 TOH2

36 0037H DJNZ R2,H1 DA,EFJUMP until R2=0 TOH1

37 0039H RET 22,54 RETURN

38 003AH

CONVE

RTION: ANL A,#0FH 54,0F MASKING A with 0fh

39 003CH ORL A,30H 44,30 ORING with 30H

40 003EH RET 22 RETURN

4.

Theory:-

ADC0808The ADC0808, ADC0809 data acquisition component is a monolithic CMOS device with an 8-

bit analog-to-digital converter, 8-channel multiplexer and microprocessor compatible contro

logic. The 8-bit A/D converter uses successive approximation as the conversion technique. The

converter features a high impedance chopper stabilized comparator, a 256R voltage divider with

analog switch tree and a successive approximation register. The 8-channel multiplexer can

directly access any of 8-single-ended analog signals. The device eliminates the need for externa


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zero and full-scale adjustments. Easy interfacing to microprocessors is provided by the latched

and decoded multiplexer address inputs and latched TTL TRI-STATE outputs. The design of

the ADC0808, ADC0809 has been optimized by incorporating the most desirable aspects of

several A/D conversion techniques. The ADC0808, ADC0809 offers high speed, high accuracy

minimal temperature dependence, excellent long-term accuracy and repeatability, and consumes

minimal power. These features make this device ideally suited to applications from process and

machine control to consumer and automotive applications.

4.1 Features:-

1. Easy interface to all microprocessors

2. Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference3. No zero or full-scale adjust required

4. n 8-channel multiplexer with address logic

5.

n 0V to 5V input range with single 5V power supply6.

n Outputs meet TTL voltage level specifications

7. n Standard hermetic or molded 28-pin DIP package

8. n 28-pin molded chip carrier package

9. n ADC0808 equivalent to MM74C949

10.n ADC0809 equivalent to MM74C949-1

4.2 Key Specifications:-

1. Resolution 8 Bits

2. Total Unadjusted Error 12 LSB and 1 LSB

3.

Single Supply 5 VDC4. Low Power 15 Mw

5. Conversion Time 100 s

4.3 Pin Diagram of Adc0808


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4.4 Pin Description:

1. I /O Pins

Address Lines A, B, C.

The device contains 8-channels. A particular channel is selected by using the address decoder

line. The table shows the input states for address lines to select any channel

2. Address Latch Enable (ALE)

SELECTED

ANALOGCHANNEL

ADDRESS C ADDRESS B ADDRESS A

INT0 L L L

INT1 L L H

INT2 L H L

INT3 L H H

INT4 H L L

INT5 H L H

INT6 H H L

INT7 H H H


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The address is latched on the LowHigh transition of ALE

3. Start conversion (SC)The ADCs Successive Approximation Register (SAR) is reset on the positive edge i.e. Low-

High of the Start Conversion pulse. Whereas the conversion is begun on the falling edge i.e. high

low of the pulse.

4. Output Enable (OE)

Whenever data has to be read from the ADC, Output Enable pin has to be pulled high thus

enabling the TRI-STATE outputs, allowing data to be read from the data pins D0-D7.

5.End of Conversion (EOC)

This Pin becomes high when the conversion has ended, so the controller comes to know that the

data can now be read from the data pins.

6. Clock

External clock pulses are to be given to the ADC; this can be given either from LM 555 in astable mode or the controller can also be used to give the pulses.

5. Flowchart:-

DELAY

INITIALIAZING PORT 2 WITH

ADC AND PORT 1 WITH

MAKE P1 AS INPUT

MAKE EOC AS INPUT

CLEAR ALE, CLEAR SC, CLEAR

SELECT CHANNEL 1 THEN

ADDRESS A IS 1, ADDRESS C IS 0

ACALL DELAY

START CONVERSION IN DIGITAL

FORM

START


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True False True False

t

True False

6. Hardware Diagram:-

Before Execution

CLEAR ALE, CLEAR SC

ACALLDELAY

IF EOC

NOT=1

ACALL DELAY

MOVE MYDATA IN

SJMP

MOVE DATA 255 TO

MOVE DATA 100 TO R2

R3 if

not =0

R2 if

not = 0

RETURNCLEAR OE


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After Execution:


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6.1 Connection description:

Select an analog channel by providing bit to A, B and C so we select channel 1 then

A=1, B=0 and C=0.


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Activate the ALE (address latch enable) pin. It needs an low to high pulse to latch in the

address.

Activate SC (start conversion) by an low to high pulse to initiate the conversion.

Monitor the EOC (end of conversion) to see whether the conversion is finished. High to

low output indicated that the data is converted and is ready to be picked up. If we do not

use EOC, we can read the converted digital data after a brief time delay. Delay size is

depends on the speed of the external clock we connect to clock pin. Notice that the EOC

is the same as the INTR pin in other ADC chip.

Activate the output enable to read the data out of the ADC chip. An low to high pulse to

the OE pin will bring the digital data out of the chip. Also notice that the OE is same as

the RD pin in the other ADC chips.

7. Result and Conclusion:-Thus we have studied the interface of ADC 0808which is an 8-

bit 8 channel ADC with 8051and read analog input and convert it into digital form using

channel 1 analog input.

EXPERIMENT NO:-6

1. Program Statement:


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Write a program to multiply two 16 bit numbers.

2. Software used for simulation: MCU 8051 IDE V.1.4.7

3. Program code:

Line

No.

Address Program

(Mnemonics)

Program

(Opcode)


1. ORG 00H

2. 0000H MOV R1,#11H 7911 Move the data 11H to register

R1

3. 0002H MOV R2,#11H 7A11 Move the data 11H to register

R2

4. 0004H MOV R3,#11H 7B11 Move the data 11H to register

R3

5. 0006H MOV R4,#11H 7C11 Move the data 11H to register

R46. 0008H MOV A,R2 EA Move the data 11H from R2 to

accumulator A

7. 0009H MOV B,R4 8CF0 Move the data 11H from R2 toaccumulator A

8. 000BH MUL AB A4 Multiply the register B data with

register A

9. 000CH MOV 13H,A F513 Move the data from register A to

13H address

10. 000EH MOV 6H,B 85F006 Move the data from register B to

6H address

11. 0011H MOV A,R1 E9 Move the data from register R1

to accumulator A12. 0012H MOV B,R4 8CF0 Move the data from register R4

to register B

13. 0014H MUL AB A4 Multiply the register B data withregister A

14. 0015H MOV 7H,A F507 Move the data from register A to7H address

15. 0017H MOV 8H,B 85F008 Move the data from register B to

8H address

16. 001AH MOV A,R2 EA Move the data from register R2

to accumulator A

17. 001BH MOV B,R3 8BF0 Move the data from register R3

to register B18. 001DH MUL AB A4 Multiply the register B data with

register A

19. 001EH MOV 9H,A F509 Move the data from register A to9H address

20. 0020H MOV 0AH,B 85F00A Move the data from register B to0A H address

21. 0023H MOV A,R1 E9 Move the data from register R1


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to accumulator A

22. 0024H MOV B,R3 8BF0 Move the data from register R3to B

23. 0026H MUL AB A4 Multiply the register B data withregister A

24. 0027H MOV 0BH,A F50B Move the data from accumulator

A to 0B H address25. 0029H MOV 0CH,B 85F00C Move the data from register B to

0CH address

26. 002CH MOV A,07H E507 Move the data from address 07Hto accumulator

27. 002EH ADD A,06H 2506 Add the data of 06H addresswith accumulator A

28. 0030H ADDC A,09H 3509 Add the data of 09H addresswith accumulator A with carry

29. 0032H MOV 12H,A F512 Move the data from accumulatorA to 12 H address

30. 0034H MOV A,08H E508 Move the data from 08H addressto accumulator A

31. 0036H ADDC A,0AH 350A Add the data of 0AH addresswith accumulator A with carry

32. 0038H ADDC A,0BH 350B Add the data of 0BH addresswith accumulator A with carry

33. 003AH MOV 11H,A F511 Move the data from accumulatorto 11H address

34. 003CH MOV A,#0CH 740C Move the data 0CH toaccumulator A

35. 003EH MOV 10H,A F510 Move the data from accumulatorto 10H address

36. END Stop or end the program

4. Theory:

For the multiplication of two 16 bits numbers four 8 bits data registers are selected

and these data registers are R1,R2,R3,R4 out of which first data is present in R1 and R2 and

second data in R3 and R4.Each of the second data register will be multiplied with the register of

first data register. Initially the multiplication of data R2 and R4 is done and result of

multiplication will be stored to A. Similarly R1 and R4, R2 and R3, R1 and R3 respectively.

Here we are using three instructions for the execution of program. The MOV

instruction for moving the data contents from one register to another. For multiplication MUL

instruction and for addition ADD instruction is used. After executing all instruction the result is


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stored in accumulator A as well as B. The register A will store the lower byte data and the

register B will store the higher byte data.

Example:Consider the two 16 bit numbers. In which first number has LSB 1 and MSB 1 and second

number has LSB 2 and MSB 2.

Initially the LSB 1 and LSB 2 will be multiplied then LSB 2 and MSB 1, MSB 2 and LSB 1 andfinally MSB 2 and MSB 1.

Consider two number (1212) H*(2323) H

Step 1: R2 * R4

12H

* 23H

02 76H

Where A= (76) H at an address 13H

B= (02) H at an address 06H

Step 2: R1 * R4

12H

* 23H02 76H


B= (02) H at an address 08H

Step 3: R2 * R3

12H

* 23H

02 76H


B= (02) H at an address 0AH

Step 4: R1 * R3

12H


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* 23 H

02 76H

Where A= (76) H at an address 0BH

B= (02) H at an address 0AH

Step 5:

Now A=76H and B =02H

And memory location 13H will store 76H.

Step: 6

From memory location 07H accumulator A will contain 76H i.e. A=76H

Now add the contents from 06H memory location to A.

i.e.

76H

+ 02H

78H

Again add with carry the contents from memory location 09H to A.

i.e.

02 78H

+ 00 76H02 EEH

Where A=EEH and B=02H

And now move the content of A to memory location 12H i.e.12H will store EEH.

Step: 7

Now move the contents from memory location 08H to A i.e. =02H and add the contents from0AH memory location with carry to A. Hence A=02H.

02H+ 02H

04H

Hence now A will contain 04H.Now again add the content from 0BH memory location to A with

carry. And 0BH memory location has 76H data.

i.e.


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04H

+ 76H

7AH

i.e. now A=7AH.

Step: 8

Now move the contents from A to memory location 11H i.e.11H=7AH and move the data of

0CH to A i.e. =02H.And finally then move to memory location 10H i.e. 10H=02H.

5. Flowchart:

Start


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Move the first data 11H to R1 & second data 11H to R2

Move the third data 11H to R3 & fourth data 11H to R4

Move the data 11H from R2 to accumulator A and 11H to register B

Multiply the contents of A and B data

Move the data from A to 13H address and data from register B to 6H

address

Move the data from R1 to A and from R4 to register B

A


Move the data from A to 7H address and data from register B to 08H

address



Move the data from A to 9H address and data from register B to 0AH address


A


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6. RESULT:

The program for the multiplication of two 16 bits number has been performed and result has

been seen on the memory location.

Memory location 10H 11H 12H 13H

Data 02H 7AH EEH 76H


Move the data from A to BH address & from register B to 0CH & 07H to A

Add the contents from 06H memory location to A and from 09H to A with carry

Move the data from A to 12H address and data from 0AH address to A

Add the contents from 0AH memory location to A and from 0BH to A with carry

Move the data from A to memory location 11H and data of 0CH to A and move the

data from A to 10H address

Stop


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EXPERIMENT NO:-7

1. Program Statement:-

Write a program to find Fibonacci series up to 10 numbers and store the result in memory

location starting from the address of 50H.

2.

Software Used For Simulation:-MCU 8051 IDE v1.4.

3.

Program code:-

Line

No.


(Mnemonics)

Program

(Opcodes)


1. ORG 00H START PROGRAM FROM 00H

2. 0000H MOV R0,#50H 78,50 MOVE THE DATA 50H TO R0

3. 0002H MOV R1,#08H 79,08 MOVE THE DATA 08H TO R1

4. 0004H MOV R2,#01H 7A,01 MOVE THE DATA 01H TO R2

5. 0006H MOV @R0,#01H 76,01 MOVE DATA 01H TO THE

LOCATION OF R0

6. 0008H INC R0 08 INCREMENT R0

7. 0009H MOV @R0,#01H 76,01 MOVE DATA 01H TO THE

LOCATION OF R0

8. 000BH INC R0 08 INCREMENT R0

9. 000CH MOV R3,#01H 7B,01 MOVE THE DATA 01H TO R3

10 000EH BACK MOV A,R2 EA MOVE THE CONTENT OF R2 T

ACCUMULATOR

11 000FH ADD A,R3 2B ADD THE CONTENTS OF R3

AND ACC AND STORE RESULIN ACC

12 0010H MOV @R0,A F6 MOVE THE CONTENTS OF AC

TO THE LOCATION OF R0

13 0011H INC R0 08 INCREMENT R0


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14 0012H MOV B,R3 8B,F0 MOVE THE CONTENT OF R3 T

REG. B

15 0014H MOV R2,B AA,F0 MOVE THE CONTENT OF B TO

R2

16 0016H MOV R3,A FB MOVE THE CONTENT OF ACC

TO R3

17 0017H DJNZ R1,BACK D9,F5 DECREMENT R1 AND JUMP T

BACK IF NOT ZERO

18 END END THE PROGRAM

Theory:-

Fibonacci series: It is a sequence of numbers that starts with one or zero in

which 1 appear twice as the first two numbers and every subsequent number is the sum of

two preceding numbers: 1,1,2,3,5,8,13,. And so on.


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The pattern shows that each cohort or generation remains as a part of the next and in addition,

each group-up pair contributes a baby pair. The number of such a baby pairs matches the total

number of pairs in the previous generation.

Symbolically

Fn =Number of pairs

Fn= Fn-1 + Fn-2

So here a recursive formula where each generation is defined in terms of the previous two

generations. Using this approach we can successively calculate Fnfor as many generation.

So this sequence of numbers

1, 1, 2, 3, 5, 8, 13, 21,

In this program we are using the logic to find the Fibonacci series up to 10 numbers. For

that we use two register (A & R3) the 1stdata is moved to the first register i.e. A and second data

is moved to the second register i.e. R3. The result is stored in memory location. So the logic is

that the next number is added to the previous number to form the next new number. In this waythe Fibonacci Series is formed and hence the program gets executed and the final result is saved

in memory location starting from the address of 50H.


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Result:-The program has been simulated and the result is stored from the memory location

50H.

MEMORY

ADDRESS

DATA

(FIBONACCI

SERIES)

50H 01H

51H 01H

52H 02H

53H 03H

54H 05H

55H 08H

56H 0DH

57H 15H

58H 22H

59H 37H


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13 0012H ANL A,#0F0H 54 F0 AND A with #0F0H, keepresult in A

14 0014H SWAP A C4 Swap the content of ACC

15 0015H ORL A,#30H 44 30 OR A with #30H, keep

result in A

16 0017H MOV @R1,A F7MOVE content of A into

RAM whose address is heldby R1

17 0018H INC R0 08Increment pointer, Now

R0=41.

18 0019H INC R0 08 Increment pointer, R0=42.

19 001AH INC R1 09 Increment Pointer, R1=42.

20 001BH INC R1 09 Increment pointer, R1=43.

21 001CH INC DPTR A3 increment DPTR by 1

22 001DH DJNZ R2,LOOP DA LOOP until counter = zero.

23 ORG 300H Initialize external ROM

location

24D1: DB

20H,21H,22H,23

H,24H

Assemble external data inthe program

25 END End of Program

4. Theory:-

4.1 BCD Number System:

The Binary representation of a digit 0 to 9 is called a BCD (Binary Coded Decimal). It is

classified as -

Unpacked BCD:-

In unpacked BCD, the lower 4 bits of the number represents the BCD Number

and the rest of the bits are 0.

Ex. 00001001 and 00000101 are unpacked BCD for 9 and 5.

Packed BCD:-

In packed BCD, a single byte has two BCD number in it, one in the lower 4 bits,

and one in the upper 4 bits.

Ex.0101 1001 is the packed BCD for 59H.


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The acronym ASCII stands for the American Standard Code for Information Interchange. Every

industry attempts to set standard for its product.

4.2 The ASCII Character Code

The original ASCII character standard assigned a 7 bit binary number to 127

characters.

Below table gives the relation between ASCII and BCD number.

Table 1.1 Relations between BCD and ASCII.

Key ASCII (hex) Binary BCD(unpacked)

0 30 0011 0000 0000 0000

1 31 0011 0001 0000 0001

2 32 0011 0010 0000 0010

3 33 0011 0011 0000 0011

4 34 0011 0100 0000 0100

5 35 0011 0101 0000 0101

6 36 0011 0110 0000 0110

7 37 0011 0111 0000 0111

8 38 0011 1000 0000 1000

9 39 0011 1001 0000 1001


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5. Flow Chart:-

NO

Yes

YES

STAR

Initialize counter

Initialize RAM location to 40H

Initialize Data Pointer to internal ROM location 300H

Clear Accumulator

Move the content of ROM

location to Accumulator

Separate lower nibble of packed BCD

Convert into ASCII

Store the ASCII of lower nibble in 1stRAM location 40H

Reload number in Accumulator

A

A

Store the ASCII of higher nibble in next RAlocation

Increment RAM location b 2

Increment Data Pointer for next ROMlocat

Separate higher nibble of packed BCD

Convert into ASCII

Swap the content of Accumulator bynibble wise

Is

Counter=0?

STOP

Decrement counter by 1


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6. Result and conclusion:-Five Packed BCD numbers located in ROM locations starting at

300 H are successfully converted to ASCII and placed in RAM location starting at 40H.

ROM

ADDRESS

(HEX)

DATA

(HEX)

0300H 20

0301H 21

0302H 22

0303H 23

0304H 24

RAM

ADDRESS (HEX) 40 41 42 43 44 45 46 47 48 49

DATA (HEX) 30 32 31 32 32 32 33 32 34 32

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