Enhanced Ethernet Switching TechnologySwitching …
Transcript of Enhanced Ethernet Switching TechnologySwitching …
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Enhanced Ethernet Switching TechnologySwitching Technology for Adaptive Hard Real-o dapt e a d eaTime Applications
Rui Santos ([email protected])( sa os@ua p )
7 / 05 / 2009
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ProblemProblemSwitched Ethernet became common in real-time communications
SSome interesting propertiesLarge bandwidthCheap network controllers
Receiving buffers Output Queues
Sw itch
Cheap network controllers Micro-segmentation
Collisions are eliminatedM lti l ll l f di th
Packethandling
- Address lookup - Traffic classification
Scheduler
Inpu
t por
ts Output ports
SchedulerMultiple parallel forwarding pathsHigh availability
But there are still limitations
Scheduler
But there are still limitationsFIFO queuesLimited number of prioritiesLimited number of prioritiesMemory overflows
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SolutionsSolutionsCommercial Off-The-Shelf Ethernet switches
Limiting the generated traffic by the application designTraffic shapingMaster-Slave protocols (FTT-SE, …)p ( , )
Customized Ethernet Switches TTEthernetTTEthernetProfinet-IRTFTT E bl d S it h (H RTES) l tiFTT-Enabled Switch (HaRTES) - our solution
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TTEthernet & Profinet IRTTTEthernet & Profinet-IRTLimitationsRequire a static pre-defined configuration for the real-time traffic On-line admission control is not generally available Miss on-line adaptation to the communication requirements and quality-of-service policies
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FTT E Switch (HaRTES)B d Fl ibl Ti T i d
FTT-E. Switch (HaRTES)Protocol MechanismBased on Flexible Time-Triggered ParadigmMaster-slave transmission control FTT-SEMaster slave transmission control techniqueCommunication occurs in fixed slots (Elementary Cycles – ECs)
ECs are organized in RT and NRT windows Supports synchronous asynchronous andSupports synchronous, asynchronous and non real-time traffic, with strict temporal isolation
The ECs start with a Trigger Message(TM) sent by the Master (switch)
TM contains the schedule for each EC
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TM
ECtime
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)PropertiesTraffic scheduling and management
Global traffic coordination in a common timelineMaster synchronizes all nodesy
Supports online admission control and dynamic QoS managementAllows arbitrary traffic scheduling policiesReduction in the switching latency jitterReduction in the switching latency jitter
Traffic classification, confinement and policing , p gSeamless integration of standard non-FTT-compliant nodes without jeopardizing the real-time services Asynchronous traffic is autonomously triggered by the nodesAsynchronous traffic is autonomously triggered by the nodes Non-conforming transmissions can be readily identified and blockedat the switch input ports, thus not interfering with the rest of the systemsystem
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Architecture
SRDBQoS Manager
Admission control
Cla
ssifi
er
e Up
ort 1
NRT packet (Queue)
Async.(Queue)
Memorypool
Master messages
InvalidFTT-master
Scheduler
Pac
ket
Val
idat
e Po
Packetforwarding
FTT packet
(Queue)
Sync.(Queue)
NRT
Master messages
MDispatcher
EC Schedule
Async
Inpu
t por
tsValidation data Input sideMemory
Port 1
Packet list
Syn Asyn NRT
Port N
Packet list
Syn Asyn NRT Sync
acke
t Cla
ssifi
er
alid
ate U
p
Port
N
FTT packet
Sync.(Queue)
Portdispatcher
Portdispatcher
PaVa FTT packet
Invalid
Async.(Queue)
Output portsOutput side7
Output portsOutput side
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)ArchitectureC l Al ith
SRDBQoS Manager
Admission control
Cla
ssifi
er
e Up
ort 1
NRT packet (Queue)
Async.(Queue)
Memorypool
Master messages
Invalid
PredictabilityComplex Algorithms
Difficult HW Implementation
Scheduler
Pac
ket
Val
idat
e Po
Packetforwarding
FTT packet
(Queue)
Sync.(Queue)
NRT
Master messages PredictabilityCode Reuse
Dispatcher
EC Schedule
Async
Inpu
t por
tsValidation data
DeterminismReuse
FTT-SE Master
Port 1
Packet list
Syn Asyn NRT
Port N
Packet list
Syn Asyn NRT Sync
acke
t Cla
ssifi
er
alid
ate U
p
Port
N
FTT packet
Sync.(Queue)
S d f tiPortdispatcher
Portdispatcher
PaVa FTT packet
Invalid
Async.(Queue)
Output ports
Speed of execution
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Output ports
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Implementation Top LevelTop Level
Software Master ModuleImplementation
Switching ModuleH dHardware
ImplementationImplementation
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Implementation Master Unit & SwitchingSwitchingMaster Master Unit & Switching module integration
SwitchingModule
MasterUnit
Utilization of an FPGA embedded processor (Synthetizable or Hardwired)( y )
More FPGA resources required Independent CPU – communication with the FPGA is carried out by conventional interface (Ethernet, USB PCI, …)
More expensiveMore expensive More free space in the FPGASharing the FTT-Master between FTT-SE version and FTT-Enabled S it hSwitch
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Implementation Switching moduleSwitching module Complete view
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FTT E Switch (HaRTES)Submitted traffic
FTT-E. Switch (HaRTES)Experimental Results Confinement of NRT Traffic
1kB packets, Tavg = 250μsingress
Confinement of NRT Traffic
Offset at the switch egress (relative to the TM)
TM
timeegressegress (relative to the TM)
RT Window NRT Window
EC (1ms)
RT Window NRT Window
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Experimental Results Regularity of the TMTM
TM
Regularity of the TM`
`
time`
`
Measures:T_TMavg = 1,000ms_ g
T_TMmax = 1,0003msT TMmin = 0,99998ms_ min ,STD_TM = 138ns
13Jitter purely from the switch
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Current StatusH RTES/BHaRTES/B
Basic switching C bilit t tCapability to separate different traffic classesOn-line schedulingOn-line scheduling
HaRTES/SError detectionError detectionTraffic policing
HaRTES/QHaRTES/QDynamic QoS management capabilities
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p
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FTT E Switch (HaRTES)P bl
FTT-E. Switch (HaRTES)Multiple Switches Problem
How to create a network with multiple
`
network with multiple switches, where the communication is based `
`
on the FTT-Enabled Switch (HaRTES)?
Sol tions
` ``
SolutionsNetwork with one FTT-Enabled Switch and multiple COTS switchesCOTS switchesNetwork with multiple FTT-Enabled Switches
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FTT E Switch (HaRTES)N t k ith
FTT-E. Switch (HaRTES)Multiple Switches Network with oneFTT-EnabledSwitch and multiple
`
TM
Switch and multipleCOTS switches
Properties `
`
`
`PropertiesTrigger Messages are generated by FTT-Enabled Switch and disseminated by the others switches
` `
Advantages and Disadvantages Solution compatible with common networksCOTS switches are cheaperCOTS switches are cheaperCOTS switches don’t perform traffic policing The Trigger Message latency can generate problems of
h i tisynchronization
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FTT E Switch (HaRTES)FTT-E. Switch (HaRTES)Multiple Switches TMNetwork with multiple
FTT-Enabled Switches`
`
TM
TM
`
Gateway
PropertiesEach FTT-Enabled Switch creates its own `
`
synchronization domainIt needs a gateway to interconnect different synchronization domains `different synchronization domainsGateway can be avoided if FTT-Enabled Switches are slaves to each other
Advantages and Disadvantages
` ` ` `
Advantages and DisadvantagesWhole network is covered by the traffic policingIt needs a gatewayMore expensive
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Server / FTT E SwitchServer / FTT-E. SwitchAnother protocolMotivation
Synchronous (TT) Real-Time Ethernet protocols have difficulties in efficient handling messages streams that are asynchronouse c e t a d g essages st ea s t at a e asy c o ous
Video streams, Alarms, Sensors, …
SolutionWe propose to integrate CPU based server policy in the FTT-Enabled Switch
Polling Server, Deferrable Server, S di S
ingress
Sporadic Server, …Providing reconfigurabilityand adaptability
Server
xxxOnline creation, deletion and adaptation of servers
Advantages egress
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Full control over streams of messages, no matter the arrival patternsUnnecessary to send trigger message to the slaves.
g
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ConclusionsConclusionsThe growing availability of FPGAs, associated tools and communication IP cores opens the way to build customizable devices with properties that are tuned tocustomizable devices with properties that are tuned to specific application domains We propose an enhanced Ethernet switch that brings substantial improvements in timeliness, integrity and operational flexibility:
Isolation of traffic classesIsolation of traffic classesIntegration of standard Ethernet nodesTransmission of the Trigger Message with high precision
The proposed hardware/software partition allows reusing the FFT-SE Master with minimal adaptations
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Future WorkFuture Work Finish the propose work on the projectIntegrate multiple switchesAdapt the enhanced switch to allow integration in architectures with multiple synchronization domainsReplicate the MasterIntegrate CPU based server policy
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