Energy–Bandwidth Design Exploration of Silicon...
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1 Energy–Bandwidth Design Exploration of Silicon Photonic Interconnects in 65nm CMOS Meisam Bahadori 1 , Robert Polster 1 , S´ ebastien Rumley 1 , Yvain Thonnart 2,3 , Jos´ e-Luis Gonzalez-Jimenez 2,3 , and Keren Bergman 1 1 Department of Electrical Engineering, Columbia University, New York, NY 10027, USA 2 CEA, LETI, MINATEC Campus - 17 rue des Martyrs F-38054 Grenoble, France 3 University Grenoble Alpes F-38000 Grenoble, France Abstract— Exploration of energy-bandwidth tradeoffs is per- formed for a silicon photonic link, showing a maximum capacity of 1.9 Tb/s with an energy cost of 1.54 pJ/bit at 13 Gb/s signaling rate. We conclude that 10 Gb/s yields a good trade-off between throughput and energy efficiency. I. I NTRODUCTION H IGH communication bandwidth and ultra-low energy consumption are the main criteria for future optical interconnects [1]. These criteria require that both the electronic components such as amplifiers as well as the emerging optical devices such as high-speed modulators function as efficiently as possible. In the realm of silicon photonics, microdisks and microrings have been proposed as efficient elements of modulation, mul- tiplexing, and demultiplexing for dense wavelength-division- multiplexing (WDM) signaling [2]–[4]. A critical challenge in optimizing a WDM optical link is the dependence of the optical impairments along the link on the modulation rate and the spacing between wavelengths in use. To achieve a high throughput, more channels at higher bit rates are desirable. However, higher bit rates lead to more spectral distortion due to the narrow passband of ring demultiplexers, and more channels leads to more crosstalk effects due to the required smaller spacing between channels [5]. Because the available laser power for each wavelength of a WDM system is limited (here the initial laser power is assumed to be at a maximum of 5 dBm per wavelength and the overall optical power per waveguide is set to 20 dBm), the optical impairments of the link put an upper bound on the maximum capacity. Our recent study [5] on Carrier Injection Ring Modulators shows that under optimal considerations, a point-to-point silicon photonic link is limited to approximately 2.1 Tb/s of throughput in the form of 47×45Gb/s NRZ-OOK channels. If the laser power is the dominant source of power con- sumption in a link, minimizing the optical impairments yields the energy-optimal solution. This solution, however, does not work for links with many channels or with high data rates. Energy consumption of CMOS circuitry, including modula- tor drivers, serializers, receivers, and deserializers, increases sharply with data rate. Even with an optimal design, the energy cost of a single serializer has been shown to be as high as 88mW in 65 nm CMOS at a modulation rate of 32 Gb/s [6]. Such numbers defy the sub-pJ/bit promises of silicon photonic optical interconnects. More importantly, energy efficiency and optical impairments are dynamically connected via the integrity of the optical signals along the Fig. 1. Schematic of a microring-based link. Modulators are carrier- depletion type. The red plot shows the evolution of the optical power for each wavelength. The table presents key parameters. The model for the sensitivity of the receiver is marked by (7). link (a higher extinction ratio requires higher drive voltage for modulators) and the receiver sensitivity (receiver consumption depends on the needed sensitivity). In this work, we address these issues by optimizing the optical impairments to minimize the optical power penalty and combine the penalty measure with electronic component models based on a 65 nm CMOS technology [7]. Our goal is to find a modulation rate that provides a good trade-off between throughput and energy efficiency. II. COMPONENTS OF THE SILICON PHOTONIC LINK Fig. 1 shows the general description of the link in our model. The input to the transmitter chip is multi-λ light from an off- chip comb laser. In the first step of the data path, the electrical parallel data stream (assumed to be clocked at 2 GHz) needs to be serialized (1) up to the transmission rate. Our model for the energy consumption of the serialization stage in 65nm CMOS is based on [6], but with only one clock phase generation circuitry for all transmitters and receivers on a transceiver chip. This arrangement allows the energy cost of SERDES to go down as more wavelengths are used (Fig. 2(a)). A high- speed driver (2) (as in [7]) is assigned to each carrier-depletion ring modulator. The limited bandwidth of modulators can be modeled as an RC circuit (3). We assume a load capacitance of 50 fF for all modulators and adopt the model in [8] to relate the resonance shift of the modulator to the drive voltage.
Transcript of Energy–Bandwidth Design Exploration of Silicon...
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Energy–Bandwidth Design Exploration of SiliconPhotonic Interconnects in 65nm CMOS
Meisam Bahadori1, Robert Polster1, Sebastien Rumley1, Yvain Thonnart2,3, Jose-Luis Gonzalez-Jimenez2,3, andKeren Bergman1
1Department of Electrical Engineering, Columbia University, New York, NY 10027, USA2CEA, LETI, MINATEC Campus - 17 rue des Martyrs F-38054 Grenoble, France
3University Grenoble Alpes F-38000 Grenoble, France
Abstract— Exploration of energy-bandwidth tradeoffs is per-formed for a silicon photonic link, showing a maximum capacityof 1.9 Tb/s with an energy cost of 1.54 pJ/bit at 13 Gb/s signalingrate. We conclude that 10 Gb/s yields a good trade-off betweenthroughput and energy efficiency.
I. INTRODUCTION
H IGH communication bandwidth and ultra-low energyconsumption are the main criteria for future optical
interconnects [1]. These criteria require that both the electroniccomponents such as amplifiers as well as the emerging opticaldevices such as high-speed modulators function as efficientlyas possible.
In the realm of silicon photonics, microdisks and microringshave been proposed as efficient elements of modulation, mul-tiplexing, and demultiplexing for dense wavelength-division-multiplexing (WDM) signaling [2]–[4]. A critical challengein optimizing a WDM optical link is the dependence of theoptical impairments along the link on the modulation rate andthe spacing between wavelengths in use. To achieve a highthroughput, more channels at higher bit rates are desirable.However, higher bit rates lead to more spectral distortiondue to the narrow passband of ring demultiplexers, and morechannels leads to more crosstalk effects due to the requiredsmaller spacing between channels [5]. Because the availablelaser power for each wavelength of a WDM system is limited(here the initial laser power is assumed to be at a maximumof 5 dBm per wavelength and the overall optical power perwaveguide is set to 20 dBm), the optical impairments of thelink put an upper bound on the maximum capacity. Our recentstudy [5] on Carrier Injection Ring Modulators shows thatunder optimal considerations, a point-to-point silicon photoniclink is limited to approximately 2.1 Tb/s of throughput in theform of 47×45Gb/s NRZ-OOK channels.
If the laser power is the dominant source of power con-sumption in a link, minimizing the optical impairments yieldsthe energy-optimal solution. This solution, however, does notwork for links with many channels or with high data rates.Energy consumption of CMOS circuitry, including modula-tor drivers, serializers, receivers, and deserializers, increasessharply with data rate. Even with an optimal design, theenergy cost of a single serializer has been shown to beas high as 88mW in 65 nm CMOS at a modulation rateof 32 Gb/s [6]. Such numbers defy the sub-pJ/bit promisesof silicon photonic optical interconnects. More importantly,energy efficiency and optical impairments are dynamicallyconnected via the integrity of the optical signals along the
Fig. 1. Schematic of a microring-based link. Modulators are carrier-depletion type. The red plot shows the evolution of the optical power for eachwavelength. The table presents key parameters. The model for the sensitivityof the receiver is marked by (7).
link (a higher extinction ratio requires higher drive voltage formodulators) and the receiver sensitivity (receiver consumptiondepends on the needed sensitivity).
In this work, we address these issues by optimizing theoptical impairments to minimize the optical power penaltyand combine the penalty measure with electronic componentmodels based on a 65 nm CMOS technology [7]. Our goal is tofind a modulation rate that provides a good trade-off betweenthroughput and energy efficiency.
II. COMPONENTS OF THE SILICON PHOTONIC LINK
Fig. 1 shows the general description of the link in our model.The input to the transmitter chip is multi-λ light from an off-chip comb laser. In the first step of the data path, the electricalparallel data stream (assumed to be clocked at 2 GHz) needs tobe serialized (1) up to the transmission rate. Our model for theenergy consumption of the serialization stage in 65nm CMOSis based on [6], but with only one clock phase generationcircuitry for all transmitters and receivers on a transceiverchip. This arrangement allows the energy cost of SERDESto go down as more wavelengths are used (Fig. 2(a)). A high-speed driver (2) (as in [7]) is assigned to each carrier-depletionring modulator. The limited bandwidth of modulators can bemodeled as an RC circuit (3). We assume a load capacitanceof 50 fF for all modulators and adopt the model in [8] torelate the resonance shift of the modulator to the drive voltage.
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Fig. 2. (a) Energy model for the SERDES. (b) Modulator driver energymodel with different drive voltages. (c) Energy consumption of an optimizedreceiver at its sensitivity level. (d) An example of power budget at 10 Gb/s.
To obtain a good extinction ratio for the optical signal, thebandwidth of the modulator should be large enough comparedto the modulation rate, or the output voltage range of thedriver should be increased as compensation. We assume thatthe driver can drive the modulator 4x faster than the rise andfall response time of modulation, resulting in a linear energymodel (Fig. 2(b)).
The red trend line (4) in Fig. 1 shows the evolution ofthe optical power for each wavelength along the link. Thereduction of the power level corresponds to injection of lightinto and extraction of light from the waveguides via gratingsaccompanied by different loss/penalty mechanisms. Insertionloss and crosstalk effects at the modulation site and the demul-tiplexing site scale up with the number of wavelengths. Thenarrow bandwidth of the ring demultiplexers causes spectraldistortion and a reduction in the extinction ratio leading tofurther power penalties. An optimization is used [5] to find thebest Q-factor for the demux rings. The final stage in the datapath is the receiver (8). The receiver sensitivity (6) dependson the data rate (7) and marks the minimum required opticalpower and maximum available optical budget (9) for eachwavelength. Our model for the energy consumption of thereceiver (TIA (10) and decision stage (11)) is based on theamount of optical power that hits the photodiode (Fig. 2(c)for an optical power equal to the sensitivity level (7)) and thetargeted BER (10−12).
Adding the total link penalty to the sensitivity of the receiverreveals the minimum required laser power, which depends onthe number of wavelengths and the data rate. For example,the blue curve in Fig. 2(d) plots the required laser powerper λ as the number of wavelengths increases for 10 Gb/ssignaling rate. The maximum number of wavelengths beforeexceeding the power budget multiplied by the data rate underconsideration gives the maximum possible throughput (1.8Tb/s for 10 Gbps). Table (5) in Fig. 1 summarizes the valuesused for the most important parameters in our calculations.
III. RESULTS AND DISCUSSION
The maximum possible number of channels and maximumaggregation are calculated and plotted based on the available
Fig. 3. (Left) Maximum possible aggregation of the point-to-point link asa function of the data rate (blue) and the corresponding energy/bit values(red). (Right) Breakdown of energy consumption for max aggregation point(13 Gb/s) and min energy point (8 Gb/s).
optical power budget and the optical impairments of thelink (blue curve, Fig. 3). We find that the peak value isapproximately 1.9 Tb/s occurring at 13 Gb/s modulation rate.Minimal energy consumption is approximately 1.46 pJ/bit at 8Gb/s rate. The energy breakdowns of these two cases indicateslaser power and modulator driver dominate over other portions(pie charts, Fig. 3). With 20 dBm total optical power inside theinput waveguide, at low data rates the laser consumption is thedominant contributor while at high data rates the energy cost ofthe driver is dominant. We conclude that 10 Gb/s modulation isa good trade-off between high-throughput and high-efficiency.Additionally, we find that future receivers should aim forbetter sensitivities to cut the energy cost of the laser. Ourwork underscores the crucial need for better designs of opticalmodulators to reduce the energy cost of drivers and to achievethe energy efficiency of high-throughput optical interconnectscloser to sub-pJ/bit values.
ACKNOWLEDGEMENTS
This work is supported by DARPA Microsystems Technology Office(MTO) under the COEDM (Computing with Optically Enabled DataMovement) project and the PERFECT (Power Efficiency Revolutionfor Embedded Computing Technologies) program, and by the U.S.Department of Energy (DoE) National Nuclear Security Administra-tion (NNSA) Advanced Simulation and Computing (ASC) programthrough contract PO1426332 with Sandia National Laboratories. Wealso acknowledge support by Freedom Photonics LLC under DOESBIR/STTR Award DE-SC0013101 “Photonic Integrated Circuits forTbps Optical Packet Switching.”
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