Enabling Power Aware Emulation in Big CPU Project

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Enabling Power Aware Emulation in Big CPU Project Adriana Wolffberg Vinay Vaddepalli , Osama Neiroukh

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Enabling Power Aware Emulation in Big CPU Project . Adriana Wolffberg Vinay Vaddepalli , Osama Neiroukh. Agenda. Introduction Power Aware Emulation Foundations Power Aware Emulation Challenges Pioneering work Summary. Background. - PowerPoint PPT Presentation

Transcript of Enabling Power Aware Emulation in Big CPU Project

Page 1: Enabling Power Aware Emulation in Big CPU Project

Enabling Power Aware Emulation in Big CPU Project

Adriana WolffbergVinay Vaddepalli , Osama Neiroukh

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Agenda

• Introduction • Power Aware Emulation Foundations• Power Aware Emulation Challenges• Pioneering work• Summary

Introduction Foundations Challenges Pioneering Summary

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BackgroundIntroduction Foundation

s Challenges Pioneering Summary

• Number of power planes per chip constantly increasing due to aggressive power goals

• Power-aware simulation is already part of main validation methodology

• Emulation is becoming key technology in Pre-Si verification• Long Tests involving many power on/off states are verified

only in emulation

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Power Aware Emulation BasicsIntroduction Foundation

s Challenges Pioneering Summary

• Emulation tool is extended with Power Aware capabilities• Based on joint specification and

prototyping • Emulator takes as input the power

architecture of the design from UPF (Unified Power Format - IEEE standard)

• No RTL or UPF special changes for Emulation compared with Simulation

UPF

Power Aware

SimulatorPower Aware

Emulator

RTL

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Power Aware SimulationIntroduction Foundation

s Challenges Pioneering Summary

Power aware simulation mimics circuit behavior for power up/down events

• When block is powered off– Internals and outputs

corrupted to “X”• When block powered on

– Start simulation as if @ time zero

All internals and outputs corrupted to

X

Regular Simulation

Corrupt to X

Regular Simulation

VCC2 VCC3 VCC4

VCC1 OFF

ON OFF ON

X XX

XX

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Power Aware Emulation FoundationsIntroduction Foundation

s Challenges Pioneering Summary

• No X’s in emulation, the emulation engine randomizes powered down domains according to: – Internal state elements are randomized

at the time of switching off – Dynamic randomization of outputs of

power domains• Emulator uses additional circuits to

randomize logic

Random outputs and states

Regular Emulation

Random outputs

and states

Regular Emulation

VCC2

VCC3 VCC4

VCC1

OFF

OFFON ON

??

?

?

?

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Power Aware Emulation ChallengesIntroduction Foundation

s Challenges Pioneering Summary

Power Aware Emulati

on

Randomization

Robustness

Constant Propagation

Multiply instantiated

Instance

Cascade Power

Switches

Combinational clouds

Assertions Re-trigger Inits

Multiple driven wires

Continuous Assignment

s

Hierarchical references

Forces

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Power Aware Emulation ChallengesIntroduction Foundation

s Challenges Pioneering Summary

Power Aware Emulati

on

Randomization

Robustness

Constant Propagation

Multiply Instantiated Instances

Cascade Power

Switches

Combinational

Clouds

Assertions Re-trigger Inits

Multiple driven wires

Continuous Assignment

s

Hierarchical references

Forces

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Randomization Robustness - example• Power Domain A is turned on ahead of Power

Domain B and needs to propagate reset on to Domain B

• Clock Clk gets shut off before Domain B is turned on while reset remains asserted

• Receiver flop D is turned on after Clk was shut off so it remains stuck at X– Note that Rst is synchronous

• This bug cannot be found without power supply modeling. In regular emulation, the reset would be observed by D and the flop would reset

Introduction Foundations Challenges Pioneering Summary

Domain A Domain B

DClk

RstDin Dout

Clk

Rst

DomainAVCC

DomainBVCC

Can we “catch” this bug with chosen approach of randomization?

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Randomization Robustness - options• Different approaches, what is the impact on

capacity/performance? – Randomization of state elements

– Currently: first cycle after a domain switches off– Option: Randomization at given intervals during power off

– Randomization of interface of power domains:– Currently: only outputs of power-down domains – Option: also the inputs of power-down domains

• A test can be run multiple times with different seeds : – Invert all values at switch off instead of randomizing them– Force all state elements to 0 or force all of them to 1.

Introduction Foundations Challenges Pioneering Summary

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Constant Propagation• Emulation propagates constant as far as possible for

optimization• Proposal: stop constant propagation across power boundaries• Open question: Is there capacity or performance penalty when

disabling constant propagation?

Introduction Foundations Challenges Pioneering Summary

0Domain A Domain B

RANDOM

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Multiply instantiated hierarchiesIntroduction Foundation

s Challenges Pioneering Summary

• Instances of same module can be in different power domains

• Simple example: SUB1 and SUB2 are instances of same module .

• Emulation must factor this in carefully, especially when some hierarchies are power-managed and others are always-on.

SUB1 – Power OFF

SUB2 - Power ON

RANDOM

TOP - ON

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Mini Testcases FlowIntroduction Foundation

s Challenges Pioneering Summary

UPF

Simulation build and run

Simulation dump

Emulation

model

Emulation vcd dump

Emulation build

RTL

Emulation vcd dump

Emulation dump

MergedEmulation dump

inferXseed

• We developed a test plan covering all known challenges

• For each item in the testplan a simple test case was written

• Work with Emulator developers to build confidence before starting on big CPU model

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Summary

• Power Aware Emulation is highly required in big CPU project

• We took the heavy-lifting of specifying, documenting and productizing power-aware emulation from scratch• Many challenges were found, part are unique to emulation

and can be addressed by multiple approaches • Currently deploying Power Aware Emulation in big CPU

model

Introduction Foundations Challenges Pioneering Summary