Emc Vmax Architecture

download Emc Vmax Architecture

of 13

description

VMAX Architecture stuff

Transcript of Emc Vmax Architecture

  • 7/17/2019 Emc Vmax Architecture

    1/13

    EMC Vmax Architecture : Detailed ExplanationCurrently there are 3 types of EMC Vmax available EMC Vmax 10K,EMC Vmax 20K andEMC Vmax 40K !his arti"le des"ribin# the #eneral ar"hite"ture of Vmax models

    $ymmetrix Vmax is EMC%s presti#ious produ"tCompared to the previous models,

    Vmax has been optimi&ed for in"reased availability,performan"e and "apa"ity utili&ationon all tiers 'ith all ()*+ typesVmax%s enhan"ed devi"e "on#uration and repli"ationoperations results in easier,faster and more e-"ient mana#ement of lar#e virtual andphysi"al environment

    !he main ar"hite"tural di.eren"e bet'een +M/ and Vmax model is that vmaxhas engine"on"ept*n +M/ model,'e have di.erent hard'are for front end)dire"tor,ba" end+) dire"tor and memory modulesut in Vmax all these hard'aresare inte#rated to#ether and is no's as Vmax Engine

    ) EMC Vmax stora#e array support from 1 to maximum of 5 Vmax en#ines

    Ea"h of these en#ines "ontains t'o symmetrix vmax dire"torsEa"h dire"tor in"ludes

    -5 multi6"ore C78s total 19 per en#ine : Ca"he memory#lobal memory : ront end *;< modules

    : a" end *;< modules : $ystem *nterfa"e Module$*

    )part from this,ea"h en#ine has redundant po'er supplies,"oolin# fans,standby po'ersupplies$7$ and environmental modules)ll these en#ines are inter"onne"ted usin#Vmax Matrix Interface BoardEnclosure(MIBE).Ea"h dire"tor has t'o "onne"tion to M*E via system interfa"e

    module$*ports as sho'n belo'

  • 7/17/2019 Emc Vmax Architecture

    2/13

    Multi-core CPUs:

    Multi6Core C78s deliver ne' levels of performan"e and fun"tionality in a smallerfootprint 'ith redu"ed po'er and "oolin# re=uirementsEa"h dire"tor has 5 multi "oreC78s and a total of 19 C78s per en#ine

  • 7/17/2019 Emc Vmax Architecture

    3/13

    Cache memor(glo!al memor):

    Ea"h dire"tor "an be "on#ured 'ith 19, 32 or 94 > of physi"al memory is reserved for lo"al pro"essin#, and the rest "onstitutes >lobalMemory >lobal Memory on any #iven dire"tor is al'ays mirrored to another dire"tor in

    the system$o the minimum usable memory 'ill be 19 >total 32>, on a sin#leen#ine "on#uration and maximum 'ill be ?12> total 1024>,fully loaded ei#htVM)/ En#ines system

    Memory is a""essible by any dire"tor 'ithin the system@

    *f a system has a sin#le VM)/ En#ine, physi"al memory mirrors are internal to theen"losure*f a system has multiple VM)/ En#ines, physi"al memory mirrors areprovided bet'een en"losures

    "ront End I#$ Module :"ront end modules are used for host connecti%it.Aost "onne"tivity via ibreChannel, i$C$* and *C

  • 7/17/2019 Emc Vmax Architecture

    4/13

    elo' is a Vmax en#ine front vie')s des"ribed above,Vmax en#ines are lo"ated inVmax system baye "an see the po'er supplies lo"ated at t'o sides and "oolin# fanmodule lo"ated in middle

    Vmax Engine 2ear Vie :!his example displays the rear vie' of the V6Max En#ine

  • 7/17/2019 Emc Vmax Architecture

    5/13

    )s explained earlier ea"h V6Max En#ine "ontains t'o dire"tor boards named hereas

  • 7/17/2019 Emc Vmax Architecture

    6/13

    )bove dia#ram "ontains port assi#nment of $ystem *nterfa"e oard, the a" End *;