ELEC 3004/7312: Signals Systems & Controls · 2013-05-20 · ELEC 3004/7312: Signals Systems &...
Transcript of ELEC 3004/7312: Signals Systems & Controls · 2013-05-20 · ELEC 3004/7312: Signals Systems &...
The University of Queensland - School of Information Technology and Electrical Engineering Page 1 of 22
ELEC 3004/7312: Signals Systems & Controls Prac/Lab 1: Introduction to the NEXYS 2 + Sampling & Reconstruction on the NEXYS 2 Revised March 17, 2013
Pre-Lab Note: The tutors will not assist you further unless there is real evidence you have attempted questions prior to the tutorial.
This laboratory is the combination of what used to be two sessions. This is now laboratory session with two experiments (i.e., Introduction to the NEXYS 2 and Sampling & Reconstruction on the NEXYS 2). The Pre-laboratory exercise for this laboratory is to : Read through Experiments I and II of the Laboratory 1 Guide
Read through the Experiment I Preparation
Read and Complete Experiment II Preparation (page 14)
Laboratory Completion & Extra Credit Points
Доверяй, но проверяй (doveryai, no proveryai – “Trust, but verify”)
Laboratory Completion: Please work together on the lab in groups of 2-3. Please submit an individual hand-in sheet. Treat the questions at the end of the Experiments as thought questions – questions that you should be able to answer, but not that you have to answer explicitly. Though you could be asked these during a tutor group review. Tutor Group Review: At various stages in the lab (or at the end) the tutors will come around to check progress. The may ask some questions to check your understanding. Each person in the group may get asked different questions at the tutor’s discretion. Based on your answers they will mark (initial) your hand-in sheet. The tutors are just checking that you understand the core ideas of each Experiment and its Parts. Extra Credit Points: This practical laboratory is worth 1-4 Extra Credit Points on the final exam. These will be distributed based on completion (as determined by the head tutor for your practical session) of the following sections at the end of the practical session.
Section Completed Total Points Extra
Credit Earned Pre-Lab (Preparation for Lab 1 – Experiment II – p. 14) + 1 Complete Experiment I + 2 Complete Experiment II – Part 1 & 2 + 3 Complete Experiment II – Part 3 + 4
LAB
Exp Digileinterafrom analoDAC
Equ1. 2. 3. 4. 5. 6.
1
periment
ent’s Nexysactive implethe FPGA,
ogue to digit interfaces,
uipment PC with XNexys 2 +Digilent POscillosc2 x cable1 x E36
The Univer
t I: An In
s 2 is a fieldementation aplus access
tal/digital towhich are a
Xilinx ISE + USB to JTPMOD-DA
cope : RCA maleDAC Filter
sity of Quee
ntroduct
d programmand debuggs to a wide ro analogueavailable in
13.4, DigileTAG interfa
A2 DAC boa
e to BNC mr board (UQ
nsland - SchP
tion to th
mable gate ging of FPGrange of pere convertersn 8-bit as we
ent Adept &ace cable/sard and PMO
male approx Q designed)
hool of InformPage 2 of 2
he NEXY
array (FPGGA designs.
ripherals sus (ADC/DAell as 12-bit
& MATLAB
OD-CON4
0.5 - 1 m
Experimen
mation Techn2
YS 2
GA) developThe Nexysch as LCD,
AC) via IO pt versions.
B;
RCA board
nt I: An Int
ology and El
pment boards2 provides
RAM, seriports. This e
d
troduction
lectrical Eng
rd that allowcommunica
ial flash memexperiment
to the NEX
ineering
ws for rapid ations to andmory, and focuses on
XYS 2
and d
the
LAB
PrepRead websi
Answ1. requir2. is the“sign3. has a 4. What5. of inc6. 7. 12-bi
1
parationand familia
ite: The Nexyhttp://wwDigilent Phttp://wwPMOD Dhttp://wwPMOD Ahttp://ww
wer the folloTabulate
red to do thTabulate
n “shifted” bit” and th
Given the12-bit, unip
The PMOt is the quan
Can you creasing the
For 12-biConvert t
t binary. Wh
Nexys 2 F
The Univer
n arise yourse
ys 2 Referenww.digilentiPMOD inte
ww.digilentiDA2 Dual 12ww.digilentiAD1 Dual 12ww.digilenti
owing questthe two’s co
his? Identifythe unsigne(i.e., AC coe most signe PMOD-Apolar binaryOD-DA2 is ntisation stepexplain how
e number of it unsigned the minimumhat are the v
FPGA Boar
sity of Quee
elf with the
nce Manualnc.com/Pro
erface boardnc.com/Pro2-bit DAC nc.com/Pro2-bit ADC nc.com/Pro
tions: omplement
y the “sign bed binary reoupled) so tnificant bit.
AD1 can hany analogue ta 12-bit unip-size of its
w the code if samples inbinary, wham and maxivalues of I (
rd
nsland - SchP
following d
l Pages 1-5,oducts/Detaids: oducts/Catal
oducts/Detai
oducts/Detai
binary repr
bit” and the epresentationhat 0 repres
ndle a rangeto digital (Aipolar DACs output? in SINEWAthe LUT?
at are the mimum value(index) for t
PMOD-C
hool of InformPage 3 of 2
documents a
, 15, 17; il.cfm?NavP
log.cfm?Na
il.cfm?NavP
il.cfm?NavP
resentation most signifn of the decsents –VDD/
e of input levADC), what C with an ou
AVE.VHD g
maximum anes, as well athese value
CON4, PMO
Experimen
mation Techn2
available fro
Path=2,400
avPath=2,40
Path=2,401
Path=2,401
of the decimficant bit. cimal numb/2 and 15 re
vels from Gis the quan
utput range f
generates a s
nd minimumas 2048, 283s in the Loo
OD-DA2, US
nt I: An Int
ology and El
om the cour
,789&Prod=
01&Cat=9
,487&Prod=
,499&Prod=
mal number
ers 0 to 15. presents +V
GND to VDD
ntisation stepfrom GND
sine wave? C
m decimal va31 and 3495ok-up-table
SB-JTAG
troduction
lectrical Eng
rse (or manu
=NEXYS2
=PMOD-DA
=PMOD-A
rs -8 to 7. H
If this binaVDD/2, again
D (where VD
p-size of theto VDD (w
Can you pr
alues? 5 to hexadecin the appe
DAC
to the NEX
ineering
ufacturer’s)
A2
D1
How many b
ary represenn, identify th
DD = 5v) ande ADC?
where VDD =
edict the eff
cimal, then ndix?
C Filter boa
XYS 2
its are
ntation he
d it
= 5v).
ffect
into
ard
LAB
Proc
Part
1.
Assempage 1
Now cble fro
2.
3.
1
cedure
1: Getting
Start Xilinx
mble the Nexy1.
connect an RCom the lower
Create an
Click on “N
The Univer
familiar w
x ISE using t
ys2 Board wit
CA/BNC cablePMOD-CON
n FPGA Proje
New Project
sity of Quee
with the Nex
the desktop
th a PMOD-C
e between the N4 socket to C
ect
t”.
nsland - SchP
xys 2 by gen
icon or run C
CON4 (RCA)
PMOD-CONCH 2 on the o
hool of InformPage 4 of 2
nerating a
C:\Xilinx\13.4
), DAC Filter
N4 upper sockeoscilloscope.
Experimen
mation Techn2
sine wave
4\ISE_DS\ISE
r Board and P
et and CH 1 o
nt I: An Int
ology and El
E\bin\nt64\ise
PMOD-DA2 a
n the oscillosc
troduction
lectrical Eng
e.exe
attached to J
cope, then co
to the NEX
ineering
JB1, as shown
nnect a secon
XYS 2
n on
nd ca-
LAB
4.
You m
5.
1
Type in thIf you use
may have to u
You will no
The Univer
e Location oa network d
use the Brow
ow see a Pro
sity of Quee
or Working Ddrive, this w
wse Directory
oject Summa
nsland - SchP
irectory, thenwill significan
y button [...]
ary page. Clic
hool of InformPage 5 of 2
n the Name ontly slow th
Enter Sparta
ck “Finish”
Experimen
mation Techn2
of your Projeings down,
the Device Pan 3E, XC3S
The files fo
nt I: An Int
ology and El
ect. so use a loc
Properties asS500E, FG32
or your proje
troduction
lectrical Eng
cal drive or
s shown: Ge20, -4, HDL,
ct can now b
to the NEX
ineering
USB drive!
neral PurposXST, ISIM, V
be added
XYS 2
se, VHDL
LAB
6.
These 7.
1
Downloa
sinewave. clockdiv_1 DAC_CTR DA2RefC squarewa
e may also b
Now use P
The Univer
ad the follow
.vhd
1.vhd
RL.vhd
omp.vhd
ve.vhd
e available in
Project\Add
sity of Quee
wing files fr
n a zip file --
d Source and
nsland - SchP
rom the ELE
triw Pra clo SIN
- http://roboti
d add all the
hool of InformPage 6 of 2
EC3004 we
wave.vhd
ac1_a.sch
ckdiv1.sym
NEWAVE.sym
ics.itee.uq.ed
files.
Experimen
mation Techn2
ebsite and pl
m
du.au/~elec3
nt I: An Int
ology and El
lace them in
3004/labs/La
troduction
lectrical Eng
n your Work
DA2Ref DAC_CT squarew triwave.s ELEC30
ab1Files.zip
to the NEX
ineering
king Directo
fComp.sym
TRL.sym
wave.sym
sym
004top.ucf
XYS 2
ory:
LAB
8. 9.
1
Set the Fu
If you dou
The Univer
ull Paths op
uble-click o
sity of Quee
ption as sho
n Prac1_a.s
You
nsland - SchP
own above
sch, it will op
u will now s
hool of InformPage 7 of 2
pen in a win
see a Projec
Experimen
mation Techn2
ndow in the
ct layout lik
nt I: An Int
ology and El
Project View
e this:
troduction
lectrical Eng
w Window:
to the NEX
ineering
XYS 2
LAB
10. windo
11.
1
10.If you ow
To see the
The Univer
double-clic
e contents of
sity of Quee
k on any of
f ELEC3004t
nsland - SchP
the “.vhd” f
top.ucf, doub
hool of InformPage 8 of 2
files, you wi
ble-click on th
Experimen
mation Techn2
ill see the co
he filename
nt I: An Int
ology and El
ontents of th
troduction
lectrical Eng
hat file in th
to the NEX
ineering
he Project V
XYS 2
iew
LAB
12. click Orepea
Now 13.
After 1
If all hConso
1
Next selecOK. If this isat instruction
w you can gen
Click onc
1 - 2 minutes
has gone welole window a
The Univer
ct Process Ps the first timn 12 to set t
nerate the file
ce on the Pra
If ne
s, a file called
ll, you will seat the bottom
sity of Quee
Properties, tme you havethe FPGA St
e which will b
ac1_a filenam
ecessary, rep
d “prac1_a.b
ee a messagem of the scree
nsland - SchP
then in Startue used this start-Up Cloc
be download
me in Hierarc
peat instruc
bit” will be sav
e, “Processen.
hool of InformPage 9 of 2
up Options, ssoftware, yock.
ded to the Ne
chy, and then
ction 12 to s
ved to your W
"Generate P
Experimen
mation Techn2
set FPGA Stou may have
exys 2 board
n double-clic
set the FPGA
Working Dire
Programmin
nt I: An Int
ology and El
tart-Up Cloce to try instr
using Digile
k Generate
A Start-Up C
ectory
ng File" com
troduction
lectrical Eng
ck to JTAG Cruction 13 b
ent Adept sof
Programmin
Clock.
mpleted suc
to the NEX
ineering
Clock, and thebelow, first, t
ftware.
ng File.
cessfully” in
XYS 2
en then
n the
LAB
1. up the
2.
3.
4. with yclick o
1
To downlo
e Digilent Ade
From the s
Now press
You shouyour oscilloscon the SINE
The Univer
oad the file toept software
startup page
s the Progra
uld now havecope to verifyEWAVE.VH
sity of Quee
o your board.
e, you may ha
am button.
e a sinewave y that it is wo
HD file.
nsland - SchP
Using the
, connect the
ave to select
being sent torking correct
hool of InformPage 10 of 2
e Digilent
e USB to JTA
t Onboard U
to the PMODtly. To see th
Experimen
mation Techn22
Adept so
AG cable tha
SB, then Bro
A gree
D-DA2 on porhe VHDL cod
nt I: An Int
ology and El
ftware
t comes with
owse to your
en progress
rt JB1 of the e used to ge
troduction
lectrical Eng
h the Nexys 2
r file and sele
bar will appe
Nexys 2. Yoenerate the s
to the NEX
ineering
2 board, then
ect Open
ear
u may look asinewave, do
XYS 2
n start
at this ouble-
LAB 1 Experiment I: An Introduction to the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 11 of 22
Thought Questions
If you have the DAC Filter board available, the Raw signal is connected to the upper PMOD-CON4 connector and the Filtered signal is connected to the lower PMOD-CON4 connector.
Plot the output waveform/s on the oscilloscope. What is the amplitude and frequency of the sine wave generated on each available channel?
The Master Clock is 50MHz, which is then divided by 200, in clockdiv1.vhd, to produce Fr.
This frequency, Fr, controls the readout rate of the LUT which is n=16 elements long. If it takes 16 clock cycles of Fr to produce a complete LUT cycle, what is the theoretical audio output frequency? Is it the same as your measured frequency?
Try to confirm that the DAC step size is approximately the same as that calculated in the preparation. If it is not, can you explain why? Hint 1: is the DAC connected directly to the output? Hint 2: can you see a relationship between the steps in the output waveform, and the changes in the values in the LUT?
Suggest how you might modify the VHDL code so that a LUT with only 8 points is required. What are the
advantages and disadvantages of this approach?
LAB 1 Experiment I: An Introduction to the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 12 of 22
Appendix – Part 1: Sinewave.vhd library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; entity SINEWAVE is port ( DATAOUT : out std_logic_vector(11 downto 0); SAMPLECLK : in std_logic ); end SINEWAVE; architecture behavioral of SINEWAVE is signal I : integer range 0 to 15; begin with I select DATAOUT <= "100000000000" when 0, --800 "101100001111" when 1, --B0F "110110100111" when 2, "111101100011" when 3, "111111111111" when 4, "111101100011" when 5, "110110100111" when 6, "101100001111" when 7, "100000000000" when 8, "010011110000" when 9, "001001011000" when 10, "000010011100" when 11, "000000000000" when 12, "000010011100" when 13, "001001011000" when 14, "010011110000" when 15; I <= I + 1 when rising_edge(SAMPLECLK);
end behavioral;
END PART I
LAB
Exp
AimIn thi
IntrThe Din VHschemand m
Figurhas a filters(A2Dquantdiffer
Equ PC1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12.
1
periment
ms s laboratory
Gain famGain praccharacter
roductionDigilent NexHDL, a Hardmatic appromodify as ne
re 1 shows alow pass fi
s can be insD) and digitatiser (Q) andrence equati
uipment C with Xilin
PMOD A2 x PMOADC andNexys 2 +Oscillosc2 x cableMono or Mono or Signal GeExternal 1 BNC T-1 x cable
The Univer
t II: Sam
y section yomiliarity with
ctical experrise the anti-
n xys 2 providdware Desc
oach, so thatecessary, the
a block diaglter with noerted at inpal to analogud D/A blockion for impl
nx ISE , DiAD1 and DAOD CON4 bod DAC Filte+ JTAG int
cope (prefer: mono RCAstereo 3.5mstereo Y-adenerator; speakers +
T-adaptor M BNC Male
sity of Quee
mpling &
ou will: h the workinrience of the-aliasing an
des an FPGcription Lant the experime contents o
Figure 1:
gram of a tyominal cut-out and outpue (D2A) cks in Figurelementing th
gilent AdepA2 boards oards er boards erface cablerably with FA male to m
mm male to daptor, 3.5m
audio jack to 2F ( F-M
e to BNC M
Ex
nsland - SchP
& Recons
ngs of an aue sampling and reconstru
GA-based conguage, rathmenter can of the releva
A block dia
ypical digitaoff frequencut. The Nexonverters, t
e 1 respectivhe desired d
pt & Matlab
e/s; FFT functionmono BNC mmono or ste
mm Male to
cable + powM-F);
Male, 0.5 - 1
xperiment I
hool of InformPage 13 of 2
struction
udio codec and reconst
uction filters
odec and DSher than in csee the stru
ant modules
agram of a p
al signal procy of aroundxys 2 codecthese being vely. Finallydigital filter
b;
n); male, 0.5 -ereo RCA m 2 x 3.5mm
wer pack;
metre long
II: Samplin
mation Techn22
n on the N
on the Nexytruction of as and observ
SP system, wconventionaucture of thes in the syst
practical DS
ocessing (DSd 500 kHz, h is implemerepresented
y, the DSP br is performe
1 metre lonmale m Female
.
ng & Recon
ology and El
NEXYS
ys 2; analogue sigve the effect
where the fual software. e DSP systeem.
SP system.
SP) system.however adented as sepd by the samblock in Figed.
ng
nstruction o
lectrical Eng
2
gnals, in parts of aliasin
functionalityThis implem
em graphica
. On the Nexdditional 10 parate analomple and hogure 1 is wh
on the NEX
ineering
rticular young;
y is implemementation u
ally, then vie
xys 2 the AkHz lowpague to digitld (S/H) plu
here the
XYS 2
u will
ented uses a ew
ADC ass tal us
LAB
Prep
Answ 1.
2. 3.
4.
1
paration
wer the follo
Bearing ihappens tthe A2D, x( x( What is t
If the DSPfollowingof the D2of the rec x( x( x( x( Assume aanti-alias
W W
The Univer
n Note: pr
owing ques
in mind thatto the analo when: (t) is a sinus(t) is a squa
the Fourier s
P block in Fg difference A) what is tonstruction(t) is a sinus(t) is a sinus(t) is a sinus(t) is a squa
a 2nd order Ssing and rec
What is the eWhat is the c
sity of Quee
Figure
eparation w
stions:
t the anti-alogue signal,
soidal signaare wave (50
series repre
Figure 1 is aequation: ythe frequen
n filter, whensoidal signasoidal signasoidal signa
are wave of
Sallen-Key constructionexpected attcutoff slope
Ex
nsland - SchP
2. Nexys2 b
will be chec
iasing filterx(t), after i
al of frequen0% duty cyc
sentation of
assumed to hy[n] = x[n], cy and apprn: al of frequenal of frequenal of frequenfundamenta
lowpass filn filters. tenuation at in dB/octav
xperiment I
hool of InformPage 14 of 2
board with
cked at the
r on the PMit has passed
ncy 10 kHzcle) of fund
f a square w
have a samp(that is, theroximate am
ncy 10 kHzncy 12.5 kHncy 15 kHzal frequency
lter with cor
Fc? ve and dB/d
II: Samplin
mation Techn22
h cable conn
e start of ea
OD-AD1 isd through th
; damental fre
wave and of
pling frequee output of tmplitude of
; Hz; ; y 4 kHz;
rner frequen
decade?
ng & Recon
ology and El
nections
ach laborato
s set to apprhis filter and
equency 4 k
f a triangle w
ency of 25 khe A2D is cthe signal, y
ncy (Fc) of 1
nstruction o
lectrical Eng
tory class.
rox. 500kHzd is presente
kHz.
wave?
kHz and percopied direcy(t), observ
10 kHz is us
on the NEX
ineering
z, explain wed to the inp
rforms the ctly to the inved at the ou
sed for the
XYS 2
what put of
nput utput
LAB
Part
With
St
8.
9.
10
11
12
13
14
15
16
17
18
19
1
1: Samplin
reference to
tart Xilinx I
. Connect PMOD C
. Ensure thcentre pin
0. Using anT-piece, t
1. Connect t
2. Set CH1
3. On the fuand selec
4. Open the
5. Open Pr
6. Ensure t
7. In the Dproduced
8. Downloa
9. You will starting v
The Univer
ng and Reco
o EXPERIM
ISE and Dig
PMOD DACON4 to eac
hat JP2 and n and VSW
n appropriatto PMOD A
the output o
and CH2 of
unction genct SINE wav
FPGA Proj
rac2_Part1
hat slide sw
Design Viewd.
ad it to the N
need to expvalues would
sity of Quee
onstruction
MENT 1: IN
gilent Adept
A2 to JB1, ch, so that y
JP3 (near JWT.
e cable andAD1 and to c
of PMOD D
f oscillosco
nerator, pullve.
ject: Prac2
1_2012.sc
witch 0 (SW
Figur
w select Ge
Nexys2 boar
periment wid be approx
Ex
nsland - SchP
Pn
NTRODUCT
t
and connecyour connec
JB1 and JC1
d T-piece cochannel 1 o
DA2 to chan
pe to DC C
the Offset
2_Part1_20
h and code
W0) is set to
re 3. Sample
enerate Pro
rd using Ad
th offset vox 2.5 volts D
xperiment I
hool of InformPage 15 of 2
Procedur
TION TO T
ct PMOD Action looks l
1) have jum
ombination,of the oscillo
nnel 2 of the
Coupling fro
t button out
012.xise
ec.vhd file b
o 0, i.e. dow
e and Recon
ogramming
dept.
oltage and amDC for Offs
II: Samplin
mation Techn22
re
THE Nexys2
AD1 to JC1like figure 2
mper blocks
connect thoscope.
e oscilloscop
om the CH1
and set the
by double c
wn, or neare
nstruct sche
g File | Re
mplitude (Pset, then Am
ng & Recon
ology and El
2, carry out
1, both on t2 above.
connecting
e output of
pe.
1/CH2 Menu
e Amplitud
clicking on t
est the edge
ematic
eRun All a
Page 3) on tmplitude of
nstruction o
lectrical Eng
t the followi
the top row
the
f the signal
nu buttons
de control c
these file na
e of the boa
and wait u
the signal gf approx. 4.5
on the NEX
ineering
ing:
w, then conn
generator v
counter-cloc
ames.
ard.
ntil the bit
enerator. Su5 Vp-p.
XYS 2
nect a
via the
ckwise
tfile is
uitable
LAB
Part
Pl
Uinputmeasu1. 2. 3.
7.1. 2. 3. 4. 25 kH
8.
1. squar2. 3. what 4. time d5. Part
Fit thits CO
1
2: Tasks an
lease ensur
For the ph
Use the signa, through tourements at
What comIs your mDo your m
. Now slowWhat hapExplain wDo your mWhat hap
Hz? That is,
. Set up thethe time aWhat dist
re wave fromDo your mHow can
effect is aliObserve t
difference cWhat is t
3 :Tasks an
he DAC filteON4 board.
The Univer
nd question
re you adju
hase respon
al generatoro y(t), the out (at least) thmponents of
measured phmeasureme
wly increaseppens to thewhat is happmeasuremeppens to the when x(t) i
e function gand frequentortions do m 100 Hz tomeasuremethese disto
iasing havinthe time dif
change as yothe cause?
nd question
er between t
sity of Quee
ns
ust your inp
nse, just rec
This
r to plot the utput) betwehe followinf the block
hase responsents confirm
e the frequee frequency pening in te
ents confirme frequency is equal to t
generator toncy domain you observ
o 12 kHz? ients confirmrtions be ex
ng? Is your ifference betou vary the
ns
Th
the DA2 bo
Ex
nsland - SchP
put so that
cord the tim
section doe
magnitude een DC andg frequencidiagram in se linear? Sh
m your answ
ency of the iof the outpu
erms of the Nm your answ
of the outputhe sampling
o produce a (using the Fe in the aud.e., as comp
m your answxplained? i.einput signaltween the sqfrequency f
his section
oard and its
xperiment I
hool of InformPage 16 of 2
the output
me differen
es not use t
and phase r
d 12 kHz. Toies: 0.125, 0Figure 1 arhould it be?
wer to prepar
input sine wut sine wavNyquist rate
wer to preparut sine wavg frequency
square wavFFT functiodio output apared to spe
wer to prepare., which col amplitude quare wave from 0 to 4
USES the
CON4 boar
II: Samplin
mation Techn22
signal is si
ce (in uS) b
the filter bo
response, Ho do this it i0.25, 0.5, 1, e contributi
? ration quest
wave, x(t), frve, y(t)? e and the saration quest
ve, y(t), whey.
ve. Observeon from the Ms you vary t
ectrum of thration questomponents otoo high? input and thkHz?
filter board
rd. Fit the A
ng & Recon
ology and El
inusoidal, n
between inp
oards.
H(), of the is suggested2, 4, 6, 8, 1ng to your m
tion 1 (a)? I
from 10 to 1
ampling theotion 2 (a), (ben the input
e the audio oMATH menthe fundamee audio inpution 2 (d)? of Figure 1
he reconstru
ds.
ADC filter b
nstruction o
lectrical Eng
not clipped
put and ou
system (i.ed that you m10, and 12 kmeasured H
f not, why?
15 kHz.
orem; b) and (c)? sine wave,
output on thnu). ental frequeut.
are causing
ucted outpu
between the
on the NEX
ineering
or distorte
tput signal
., from x(t),make kHz; H()?
?
x(t), approa
he CRO both
ency of the
g them? And
ut. How doe
AD1 board
XYS 2
ed.
l.
, the
aches
h in
d
s the
d and
LAB 1 Experiment II: Sampling & Reconstruction on the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 17 of 22
If you look at the schematics in the appendix, you will see that there are connections for Raw Out and Filtered Out. This allows you to experiment with various combinations of input and output signals, being: 1. Raw in, Raw out 2. Raw in, Filtered out 3. Filtered in, Raw out 4. Filtered in, Filtered out. Slide switch 0, SW0, allows you to select raw In (0), or Filtered In (1) for the ADC. The DAC filter board has Raw Out on the top connector and Filtered Out on the bottom connector. Combination a) is the same as not having the filter boards at all. Part 3 continued: If you move SW0, you can select between a) and c) for the top connector (Raw Out), and between b) and d) for the bottom connector (Filtered Out).
Remember to keep the input pk-pk value under 5V. Connect the function generator to CH1 of the oscilloscope and the ADC. Set the function generator to Sinewave, 5 V p-p and DC offset of 2.5 volts.
For the following data, plot this in a spreadsheet and show to a tutor. 1. Connect the Raw Out (top connector) to CH2.
Raw in – Raw out
Move SW0 to 0 (Raw in) then sweep the frequency from about 100Hz to about 25 kHz and observe the output on CH2. Record the input and output amplitudes, plus Frequency Out at 1, 4, 10, 15 and 20 kHz.
Filtered in – Raw out
Now move SW0 to 1 (Filtered In) and repeat. Now connect Filtered out (bottom connector) to CH2.
Raw in – Filtered out Move SW0 to 0 (Raw in) then sweep the frequency from about 100Hz to about 25 kHz and observe the output on CH2. Record the input and output amplitudes, plus Frequency Out at 1, 4, 10, 15 and 20 kHz.
Filtered in – Filtered out
Now move SW0 to 1 (Filtered In) and repeat. Set the function generator to squarewave and repeat 1 to 6. Record the results in the tables below or in a spreadsheet. Either printout your plots, or save the files to your network drive for later review.
LAB 1 Experiment II: Sampling & Reconstruction on the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 18 of 22
Data Entry Table
Sinewave Filtered in – Raw out (SW0 = 1)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1 4
10 15 20
Sinewave Raw in – Filtered out (SW0 = 0)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1 4 10 15 20
Sinewave Filtered in – Filtered out (SW0 = 1)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1 4 10 15
20
Squarewave Raw in – Raw out (SW0 = 0)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1
4
10
15
20
Squarewave Filtered in – Raw out (SW0 = 1)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1
4
10
15
20
Squarewave Raw in – Filtered out (SW0 = 0)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1
4
10
15
20
Squarewave Filtered in – Filtered out (SW0 = 1)
Frequency in (kHz) Vin pk-pk Vout pk-pk Frequency out
1
4
10
15
20
LAB
Schem
1
matic diagra
The Univer
ams for filte
sity of Quee
er boards:
Ex
nsland - SchP
Appe
Figure 5
Figure 4:
xperiment I
hool of InformPage 19 of 2
endix – P
5: DAC lowp
ADC lowpas
II: Samplin
mation Techn22
Part 2:
ass filter
s filter
ng & Recon
ology and El
nstruction o
lectrical Eng
on the NEX
ineering
XYS 2
LAB 1 Experiment II: Sampling & Reconstruction on the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 20 of 22
This page is intentionally blank and be used as scratch paper
LAB 1 Experiment II: Sampling & Reconstruction on the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 21 of 22
Experiment 1: Hand-In Sheet Introduction to the NEXYS 2 + Sampling & Reconstruction on the NEXYS 2
Name: Student ID: Date: Group Name/Members:
As noted, this practical laboratory is worth 1-4 Extra Credit Points on the final exam. These will be distributed based on completion (as determined by the head tutor for your practical session) of the following sections at the end of the practical session.
Section Completed Summary Comments (Student)
✓(Tutor)
Pre-Lab (Preparation Lab 1 – Section II) Complete Experiment I Complete Experiment II – Part 1 & 2 Complete Experiment II – Part 3
Continued on Page 22
LAB 1 Experiment II: Sampling & Reconstruction on the NEXYS 2
The University of Queensland - School of Information Technology and Electrical Engineering Page 22 of 22
Please succinctly answer the following questions for the various lab sections. Section I Q1) Suggest how you might modify the VHDL code so that a LUT with only 8 points is required. What are the advantages and disadvantages of this approach? List two of each. What is one overall benefit and downside to using a LUT? Section II Q2) Use this space to write your answers to the following questions from Part II:
a) Should the phase response be linear? Why or why not?
b) Explain, in terms of the Nyquist rate and sampling theory, what happens to the frequency of the output
wave when the input wave frequency is swept from 10 to 15 kHz.
Section III Q3) Summarise the differences between the four combinations of input and output signals experimented with in Part III. Note any differences between the sine wave and square wave outputs with the different combinations and provide a brief explanation.
Total Extra Credit Awarded: ________________________________________________________
Tutor Sign-Off: _______________________________________________________________________