Solid-State Electronics 133 (2017) 1–5

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Solid-State Electronics

journal homepage: www.elsevier .com/locate /sse

Effects of mechanical stresses on the reliability of low-temperaturepolycrystalline silicon thin film transistors for foldable displays

http://dx.doi.org/10.1016/j.sse.2017.04.0030038-1101/� 2017 Elsevier Ltd. All rights reserved.

⇑ Corresponding author.E-mail address: iyun@yonsei.ac.kr (I. Yun).

1 These authors contributed equally to this work.

Min Soo Bae 1, Chuntaek Park 1, Dongseok Shin, Sang Myung Lee, Ilgu Yun ⇑Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea

a r t i c l e i n f o

Article history:Received 2 November 2016Received in revised form 7 February 2017Accepted 11 April 2017Available online 12 April 2017

The review of this paper was arranged by Dr.Y. Kuk

Keywords:Foldable thin film transistorStatic mechanical stressDynamic mechanical stressLow temperature polycrystalline siliconReliability

a b s t r a c t

This paper investigates the mechanical reliability of low temperature polycrystalline silicon (LTPS) thinfilm transistors (TFTs) for foldable display. Both compressive and tensile directions of mechanical stresseswere applied for different types of mechanical stresses, such as dynamic and static mechanical stresses.The electrical characteristics of tested n-channel TFTs under mechanical stress conditions were analyzedbased on several key parameters, including the threshold voltage (Vth), field effect mobility (lFE), maxi-mum drain current (ID.MAX) and subthreshold swing (Ssub). For both cases of dynamic and static mechan-ical stresses, increase of Vth and decrease of lFE and ID.MAX were observed in the compressive direction.This trend was inversed when tensile stress was applied. The degradation of electrical characteristicsoriginates from the change of lattice constant after mechanical stress. However, Ssub increases underdynamic tensile stress while it remains unchanged within 5% under static tensile stress. Transient anal-ysis while bent condition was conducted to investigate the change of parameters in time.

� 2017 Elsevier Ltd. All rights reserved.

1. Introduction

Beyond flexible display, foldable displays and their applicationsare being actively researched. For example, foldable displays ofwhich bending radius is smaller than 5 mm were presented bymajor display companies, such as LG Display and Samsung Display,at CES 2016. Thin-film transistor (TFT) fabricated on flexiblepolyimide (PI) substrates, which is suitable for foldable and flexibledisplays, are now being researched due to their promising proper-ties [1]. The low temperature polycrystalline silicon (LTPS) TFT, oneof many types of TFTs, has been widely used in recent displays. TheLTPS TFT has the highest performance in terms of mobility (40–100 cm2/Vs), and it can be easily implemented in CMOS architec-tures [2]. To achieve successful advances in foldable displays priorto mass manufacturing, the reliability of the devices and substratesshould be guaranteed when they are stressed mechanically.Dynamic and static mechanical stresses are both important forfoldable display applications such as foldable tablet. There havebeen a few studies published regarding the dynamic and staticmechanical stresses on LTPS TFTs [3–5]. Münzenrieder et al. inves-tigates the effect on indium gallium zinc oxide TFTs for dynamicmechanical stress [6]. Also, Janfaoui et al. [4] showed the effects

of static mechanical stress on the electrical parameters. However,their studies lack of the connection of dynamic and static stresses.Thus, it is necessary to clarify the effect of dynamic and staticmechanical stresses on LTPS TFTs. In this paper, we investigatethe effects of mechanical stress on LTPS TFTs. Within this study,two different types of mechanical stress tests that include bothdynamic and static mechanical stresses were performed onn-type LTPS TFTs. For both types of tests, electrical parameterswere analyzed after compressive and tensile stresses with a bend-ing radius of 2.5 mm.

2. Experiments

2.1. Test structure fabrication

Top gate structure TFTs were fabricated on a polyimide (PI) sub-strate as shown in Fig. 1. Then a polycrystalline silicon channel wasformed on top of the buffer layer. After LTPS channel formation,SiO2 gate insulator layer was deposited before Cu/MoTi was depos-ited by sputtering as the gate metal. After interlayer dielectricdeposition using SiO2, Cu/MoTi was used for source and drain elec-trode deposition. Finally, SiO2 was used as a passivation layer.

The tested TFTs had two different gate sizes. Both types of TFTshad the same gate length but different channel widths. The width/length ratios (W/L) for the TFTs were 1 and 9, respectively.

Fig. 1. Schematic of the structure of an LTPS TFT.

2 M.S. Bae et al. / Solid-State Electronics 133 (2017) 1–5

2.2. Mechanical stress tests

For the reliability tests of LTPS TFT, mechanical stress experi-ments including dynamic and static bending were performed witha bending radius of 2.5 mm which is corresponding to the strain of0.35% [7]. The stress direction was tensile (upward) or compressive(downward), as shown in Fig. 2(a) and (b). For both stress direc-tions, the bending axis was perpendicular to the channel lengthso that any cracks generated by the mechanical stress were per-pendicular to the direction of current flow.

Mechanical stress tester and 2.5 mm radius bending chuckshown in Fig. 3(a) and (b) were used to apply the dynamic and sta-tic mechanical stresses, respectively. 100,000 times of bendingcycles were repeated for the dynamic stress while total 72 h ofmechanical stress was applied for the static stress. In case ofdynamic stress, total duration for those repetitions was about72 h (0.99 s per 1 cycle). Hence, the total duration of mechanicalstress tests for both types was matched so that we can comparethe results. Before and after the mechanical stress experiments,the tested TFTs were measured while flat. In order to investigatethe electrical parameters transition while bent, the tested TFTswere additionally measured during the tensile static mechanicalstress test every 24 h.

Fig. 2. Schematics of the (a) comp

Fig. 3. (a) Mechanical stress tester used in the dynamic mechanical stress

3. Results and discussion

3.1. Electrical parameter extraction

The current-voltage (I-V) characteristics were measured using aKeithley 236 source measure unit (SMU). For evaluation purposes,the electrical parameters were extracted from the I-V characteris-tics at VDS = 2.1 V, and ID.MAX was defined as the drain current atVGS = 20 V. The field effect mobility (lFE) was calculated using Eq.(1) [8]:

lFE ¼L � gm

W � Ci � VDS; ð1Þ

where gm is the transconductance and Ci is the oxide capacitance.The threshold voltage (Vth) was calculated by linear extrapola-

tion in the linear region. In addition, the subthreshold swing (Ssub)was determined using Eq. (2) [9]:

Ssub ¼ @VGS

@ logðIDSÞ� �

ð2Þ

For comparison purposes, the value of each parameter was nor-malized using the initial value measured at zero strain. Since everyexperiment was replicated three times to ensure sufficient statisti-cal variability, the mean value for each parameter is shown. Themaximum standard deviation from our experiments was 0.149.Also, the tested TFTs show good initial electrical characteristicsincluding positive Vth (<3 V) and small Ssub (<0.6 V/dec).

3.2. Experimental results

Fig. 4 illustrates the energy band of electrons at the siliconatoms versus the lattice constant [9]. Based on the energy bandtheory, the energy states of the electrons in silicon atoms are splitinto conduction bands and valance bands when silicon atomsbecome close enough to form a lattice structure. That lattice struc-ture determines the bandgap energy of the material. In the case of

ressive and (b) tensile stress.

tests and (b) bending chuck used in the static mechanical stress tests.

Fig. 4. Energy spacing of electron states in silicon lattice structure.

M.S. Bae et al. / Solid-State Electronics 133 (2017) 1–5 3

the silicon lattice structure, as shown in Fig. 4, a0 is the lattice con-stant of the silicon atoms, and Eg is the energy bandgap of siliconbetween the conduction and valance bands. It has been studiedexperimentally that strain on silicon channel affects the changein lFE and shift of Vth. These studies indicate that negative shiftof Vth at tensile strain is mainly due to the effect of bandgap nar-rowing [10,11]. In our experiment, similar result has beenobserved. Fig. 5 shows that, after compressive stress was applied,Vth increased but lFE and ID.MAX decreased. On the other hand, whentensile stress was applied, Vth decreased but lFE and ID.MAX

increased. Based on these results, different trends were observedin the parameter variations depending on the type of dynamicmechanical stress applied. When there is compressive strainapplied to the silicon lattice structure, the lattice constant for thesilicon becomes shorter. As shown in Fig. 4, a lattice constantshorter than a0 has larger bandgap energy and reduces the concen-tration of free carriers in the channel at the same temperature,which results in an increase in channel resistance. Thus, the lFE

becomes smaller when compressive stress is applied. In addition,because larger bandgap energy needs more energy to generate free

Fig. 5. Parameter variations after 100,000 times o

carriers, the activation energy of the silicon channel increases,which increases the Vth. Thus, after compressive stress is applied,ID.MAX and lFE decrease but Vth increases [12,13].

On the other hand, when tensile stress is applied to the silicon,the lattice constant of the silicon atoms becomes longer. Thislonger lattice constant causes the energy bandgap of the siliconto become smaller than it was before the stress was applied. Thesmaller bandgap energy means that there are more free carriersin the silicon layer when the temperature is fixed, and the activa-tion energy of the channel is reduced. More carriers in the channellayer then lower the resistance at the channel, which enhances thelFE of the silicon. Thus, smaller bandgap energy contributes to adecrease in the Vth when silicon atoms experience tensile stress.In this way, it is possible to explain the reasons for the increasein ID.MAX and lFE, and the decrease in Vth.

Fig. 6 shows parameter variations after static mechanical stresstest. Compared with dynamic mechanical stress shown in Fig. 4,Vth, lFE and ID.MAX show the same tendency with less variation.Dynamic stress applies stress and release to TFTs repeatedly,whereas they are under continuous stress in case of static stress.According to the study of Chen et al. [14], strain of LTPS TFTreaches its peak rapidly in a few seconds and become saturatedafter hundreds of seconds under static mechanical stress. Thismeans that TFT gets the most severe strain at the beginning ofbending and the strain is released to a certain degree as time pro-ceeded. Although there was some time to release in every dynamicbending, the variation of parameters was bigger than that of staticmechanical stress. This result stands for the fact that dynamicstress is more severe than static stress for the same duration ofstress time.

Ssub is used as an important criterion of degradation. Accordingto the previous studies, Ssub parameter is mainly degraded by thetotal trap density [15]. So, if mechanical strain is applied on TFTs,newly generated trap states degrade the Ssub. Change of Ssub aftermechanical stress is shown in Table 1. In case of dynamic mechan-ical stress, Ssub was degraded by mechanical strain. The degrada-tion was severe when the size of TFT was larger since larger TFThas more defect states. This is obvious since larger TFT has moredefects in their channel than smaller one. According to Eq. (3), Ssuband interface trap density (Nit) has a positive correlation [16].

Nit ¼ Ci

q

� �qkT

� � Ssubln 10

� �� 1

� �; ð3Þ

f bending cycles. (a) [W/L] = 1 (b) [W/L] = 9.

Fig. 6. Parameter variations after 72 h static mechanical stress (a) [W/L] = 1 (b) [W/L] = 9.

Table 1Normalized Ssub variations after dynamic and static mechanical stress.

Dynamic stress Static stress

[W/L] = 1 [W/L] = 9 [W/L] = 1 [W/L] = 9

Initial 1 1 1 1Compressive 0.99 1.08 0.96 1.02Tensile 1.18 1.44 0.94 0.95

Table 2Parameter values for fitting exponential decaying function.

DX A B s

DID.MAX 0.107 �0.02 49.82DSsub �0.203 0.12 42.97

4 M.S. Bae et al. / Solid-State Electronics 133 (2017) 1–5

where q is elementary charge, k is Boltzmann constant, and T istemperature (K).

In case of static stress, however, Ssub was not degraded. To ana-lyze this phenomenon, time evolution of electrical parameters wasobserved for the static mechanical stress with tensile direction asshown in Fig. 7. Initial and final electrical characteristics were mea-sured before and after bending while flat, and the tested TFTs wereadditionally measured every 24 h while bent. Three phases of timeevolution were introduced for analysis; from initial to 0 h, from 0 hto 72 h, and from 72 h to after stress. 1st phase shows the mostabrupt change of electrical parameters. This is compatible withthe previous study of [13]. In this phase, lFE and ID.MAX increase

Fig. 7. Time evolution of electrical parameters of s

due to the increased atomic distance. With these parameterenhancements, Ssub decreases temporarily. However, Ssub starts todegrade with continuous strain in the 2nd phase. Also, note thatSsub degradation is prominent in the larger TFT than the smallerone, as it is in case of dynamic stress. The other parameters suchas Vth, lFE and ID.MAX begin to degrade as well in this phase. Inthe 3rd phase, by releasing mechanical stress, Ssub decreases withdefect relaxation. To clearly see the time dependency of parameterchanges, we propose an empirical model of DID.MAX and DSsub forTFTs with [W/L] = 9 given by:

DX ¼ A� expð�t=sÞ þ B; ð4Þwhere A and B are fitting parameters, s is time constant and DX isthe amount of changes of normalized parameters. Using the param-eters listed in Table 2, readers can predict the evolution of ID.MAX and

tatic tensile stress (a) [W/L] = 1 (b) [W/L] = 9.

M.S. Bae et al. / Solid-State Electronics 133 (2017) 1–5 5

Ssub on time axis. For those two parameters, the exponential decay-ing functions have different signs of A and similar values of s, mean-ing that ID.MAX decreases and Ssub increases with similar timeconstants.

4. Conclusion

In this paper, the reliability of LTPS TFTs under both dynamicand static mechanical stresses was investigated. For both compres-sive and tensile stresses, the distinct differences of the electricalparameters were observed. Specifically, it was observed that Vth

was decreased but ID.MAX and lFE were increased after the tensilestress. On the other hand, Vth was increased but ID.MAX and lFE weredecreased after the compressive stress. These phenomena can beexplained by the corresponding increase or decrease in the latticeconstant, which causes differences in the energy level as a result ofatomic interference. For the same duration of stress time, the effectof dynamic stress was more severe than that of static stress. Bytransient analysis of the static tensile stress, the time dependencyof parameter behavior was explained using empirical model. Thispaper allows us to provide comprehensive understanding of thedegradation mechanisms of mechanical stresses in LTPS TFTs andto formulate guidelines that are suitable for practical foldable dis-play applications. Further studies regarding fatigue analysis wouldbe very important for the application of TFTs in foldable display.

Acknowledgements

This research was supported by the LG Display in Republic ofKorea. This work was supported by the Institute of BioMed-IT,Energy-IT, and Smart-IT Technology (BEST), a Brain Korea 21 plusprogram, Yonsei University in Republic of Korea.

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