EE610: CMOS AnalogEE610: CMOS Analog...

EE610: CMOS AnalogEE610: CMOS Analog Circuits

L5: Fabrication and Layout -2 (12.8.2013)

B Mazhari

G-NumberB. Mazhari, IITK44

B. MazhariDept. of EE, IIT Kanpur

Passive Components: Resistor

Besides MOS transistors, sometimes one requires to implement passivecomponents such as resistor, capacitor and inductor also.

Passive components are in general much more difficult to implement ascompared to the transistor. Let us consider some of the different ways ofi l ti i timplementing a resistor.

One can use different layers for fabricating a resistor. Consider the N+/P+

source/drain diffused region as illustrated below:

FOXSiO2

Among the importantcharacteristics of a resistive layeris its sheet resistance ( )FOX

N-wellP+

is its sheet resistance ( sh)defined as :

LLR


P-Silicon WAR sh

A large value of sheet resistance means that a smaller L/W ratio and thus asmaller Silicon area (~WxL) would be required to implement the resistor

The sheet resistance of a N+ region for 0 5m technologyThe sheet resistance of a N+ region for 0.5m technologyis ~2.3Ω/

To understand the full implications of this number, consider theimplementation of a 100kΩ resistor For W=1μm L ~ 104 μm would beimplementation of a 100kΩ resistor. For W=1μm, L 10 μm would berequired. The area of ~104 μm2 is orders of magnitude larger than a typicalarea of a MOS transistor (W/L = 2/1)

Thi h h l l f i diffi l i l SiliThis shows that large values of resistors are difficult to implement on Siliconand that resistors are much more expensive than resistors in terms of chiparea. This is one reason why MOS transistors are used as resistors wherever


possible

Besides sheet resistance, there are other parameters of importance such astemperature coefficient:

dTdR

RTCR

1))(1( ORO TTTCRR

..

Temperature coefficient is often specified in units of PPM/oC.

F th N+/P+ i t th l ld b 1500PPM/ oC Thi th t thFor the N+/P+ resistor, the value could be ~1500PPM/ oC. This means that the resistor value may change by ~27% for a change in temperature of -55 to 125oC.

The resistor value is in general a function of average voltage applied acrossThe resistor value is in general a function of average voltage applied acrossit. This is described by voltage coefficient

dR1dVdR

RVCR

1 ))(1( ORO VVVCRR

V lt ffi i t i ft ifi d i it f PPM/V F th N+/P+ i t


Voltage coefficient is often specified in units of PPM/V. For the N+/P+ resistor, the value could be ~200PPM/ V

The reason for voltage dependence is the presence of PN junctionbetween diffused region and bulk as illustrated below:between diffused region and bulk as illustrated below:

FOXP+

Depletion regionP Silicon

N-Well

P-Silicon

As the voltage across the PN junction changes the extension of depletionAs the voltage across the PN junction changes, the extension of depletionwidth into N+ region also changes. This changes the effective thickness of theN+ region and thus its sheet resistance.

Because N+ is heavily doped, the extension of depletion width into this regionis small. As a result voltage coefficient has a smaller value.


The resistor fabricated using the source diffused layer is not a pure resistor buthas a capacitance associated with it as illustrated below:

FOXP+

Depletion region

P

Depletion regionP-Silicon

N-well

2~ 0.93 /C fF m

The capacitance is due to reverse biased PN junction capacitance. Theresistor is thus in fact an RC transmission line whose effects can only beneglected if frequency is below a certain value


neglected if frequency is below a certain value

Instead of N+/P+ layer, a resistor can be implemented usingPoly as the resistive layer:

SiO2

2 4 /

Poly 1500 /oTC PPM C

2.4 /sh

P-Silicon

Poly 1500 /oRTC PPM C

100 /RVC PPM VP Silicon R

2~ 0.086 /C fF mf

High resistivity Poly layer (without silicidation) can be used to


obtain an order of magnitude higher values of resistances

A third way of making a resistor is to use N-well as illustrated below:

FOX726 /sh

FOXN+N+ 8000 /oRTC PPM C

410 /VC PPM VP-Silicon

410 /RVC PPM V

2~ 0.095 /C fF mN-Well

f

This resistor offers high sheet resistance but at the expense of poor TCR andVC The voltage coefficient is larger because of smaller doping in the N wellVCR. The voltage coefficient is larger because of smaller doping in the N-well.This makes the extension of depletion width into N-region larger and thus theimpact of change in voltage is also larger. A larger well thickness to some extent

iti t thi ff t


mitigates this effect.

Pinched-well resistor

FOXN+ N+

P+P+

P-Silicon

N-Well

Higher values of sheet resistance can be obtained in this manner


Like a resistor a capacitor takes up fairly large area Capacitors with values in

Passive Components: CapacitorLike a resistor, a capacitor takes up fairly large area. Capacitors with values innF are virtually impossible to make. Typical capacitors have their values in ~pF.

Capacitor/Area temperature and voltage coefficients parasitic capacitanceCapacitor/Area, temperature and voltage coefficients, parasitic capacitanceand resistance are the parameters against which different ways of fabricatingcapacitor needs to be evaluated.

A simple way of making a capacitor is to use N+ layer as shown below:

M-1

SiO2

N+ P+


N P+

P

P+-n well as a capacitor

P+


Gate-channel Capacitor

The difficulty with thisapproach is that voltageacross the capacitor has to be

iti d l thpositive and larger thanthreshold voltage. Otherwisethis technique offers large

FOX

this technique offers largecapacitance/area andreasonably small parasitic

N+N+

FOXcapacitance as compared tosome of the other approaches

N

Poly

N

P-Silicon


y

If the region under the Poly can also be doped N+ as shown below, then onecan obtain a much better capacitance. The capacitance is determinedprimarily determined by the gate-oxide capacitance which is constant There isprimarily determined by the gate oxide capacitance which is constant. There isno need for an n-well in this case.

SiO

N+FOX

SiO2

N+ N+N+N+ N

2~ 3.6 /C fF mP-Silicon Poly

f


One might think of implementing a capacitor using the gate oxideas a dielectric in the following manner:

C

FOX

COX

CFOXN+ CDepletion

RseriesCParasitic

N-Well

P-Silicon PolyseriesParasitic

The problem with this capacitor is that it has large parasiticsThe problem with this capacitor is that it has large parasiticsand may have high voltage coefficient if the transistor operatesin depletion region as a result of negative gate-source voltage.


The presence of a voltage dependent depletion capacitancecauses the variation in capacitance value.

Different metal layers such as M-1 , M-2 etc can be used also formaking capacitors. Typically these offer much smaller per unit

icapacitance.


2~ 0.041 /C fF m

In some specialized processes there are two Poly layersavailable These layers are separated by a thin dielectric whichavailable. These layers are separated by a thin dielectric whichallows easy implementation of a capacitor:


Layout of poly-poly2 capacitor


Inductor

M-1


On-chip Transformers IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 12,DECEMBER 1998


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