EE314

Intel Pentium 4

Field EffectField Effect Transistors Transistors

Equivalent Equivalent CircuitsCircuits

Chapter 12: Field Effect Transistors

1.Small-Signal Equivalent Circuits

1.Examples2.Technology3.Future Devices

0

02

0

02

0

02

0

0

tGSDStGS

tGSDSDStGS

tGS

D

VvvwhenVvK

VvwhenvvVvK

Vvwhen

i

MOSFET Transistor

Current-Voltage RelationsMOSFET Transistor

NMOS transistor, 0.25m, Ld = 10m, W/L = 1.5, VDD = 2.5V, VT = 0.4V

QuadraticRelationship

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Triode Saturation

VDS = VGS - VT

VDS = VGS - VT

cut-off

Load-Line Analysis of NMOS AmplifierIt is a graphical analysis similar to load-line analysis of pn diode.

Schematic

Circuit Analysis:

GGinGS Vtvtv )()(

4)200sin()( ttvGS

)()( tvtiRV DSDDDD

)()(20 tvtiR DSDD

Input loop

Output loop

Load line

vGS vDS

We look for the operating point

Load-Line Analysis of NMOS Amplifier

Exercise:

Draw the Load line )()(20 tvtiR DSDD

4GSv

3GSv

2GSv

RD= 1 k

Load-Line Analysis of NMOS AmplifierLoad line SDDS vvv Taking iD=0 or vDS=0 we find

out the load lane and the quiescent operating point Q for

VGS=4V

GGinGS Vtvtv )()(

The quiescent values

vin(t)=0 then iDQ=9 mA

vGSQ=4V and vDSQ=11VPoints A & B

intersection of curve and the

load-line for the maximum and the minimum gate voltage

Input signal )200sin(1)( ttvin Load-Line Analysis of NMOS Amplifier

(peak-to-peak amplitude is 2V)

12V peak-to-peak

Inverse operation

The positive peak of the input occurs at the same time as the min. value of vDS. The output is not a symmetrical sinusoid! (nonlinear distortion)

vDS(t)

vin(t)2V peak-to-peak

Self Bias CircuitsAnalysis of amplifier circuits is often undertaken in two steps:(1) The dc circuit analysis to determine the Q point. It involves the nonlinear equation or the load-line method. This is called bias analysis

The fixed-plus self-bias circuit

Exercise: Find VG voltage as a function of VDD, R1 and R2

Input Output

+

vG

_

Self Bias CircuitsAnalysis of amplifier circuits is often undertaken in two steps:(1) The dc circuit analysis to determine the Q point. It involves the nonlinear equation or the load-line method. This is called bias analysis

The fixed-plus self-bias circuit

21

2

RR

RVV DDG

Input Output

+

vG

_

Self Bias CircuitsAnalysis of amplifier circuits is often undertaken in two steps:(1) The dc circuit analysis to determine the Q point. It involves the nonlinear equation or the load-line method. This is called bias analysis(2) Use a linear small-signal equivalent circuit to determine circuit parameters

Equivalent circuit

Analysis…

vGS

vDS

DSGSG iRvV 20tGSD VvKi

find vGS

Self Bias CircuitsPlot of

DSGSG iRvV 20tGSD VvKi and

Disregarded

root for vGS<Vt0

Use only larger root for vGS and smaller for iD

Example 12.2

Self Bias CircuitsAnalysis of amplifier circuits is often undertaken in two steps:(1) The dc circuit analysis to determine the Q point. It involves the nonlinear equation or the load-line method. This is called bias analysis(2) Use a linear small-signal equivalent circuit to determine circuit parameters

Equivalent circuit

Analysis…

vGS

vDS 20tGSD VvKi

For saturation region

DSDDDDS iRRVv

find iD

Self Bias Circuits

Analyze the self-bias circuit shown. The transistor has KP=50A/V2, Vto=2V, L=10m, and W=400m

DSGSG iRvV

20tGSD VvKi

DSDDDDS iRRVv

find vGS

find iD

Exercise 12.5

2

KP

L

WK

21

2

RR

RVV DDG

find vDS

20tGSD VvKi

FlexibleFlexibleField EffectField Effect Transistors Transistors

EE314

Q: How we can do this?A: A new generation of MOSFETs

for plastic electronics

Play video about plastic electronicshttp://www.plasticlogic.com

http://www.hkn.org/imgs/bridge_sp06_figure2.gif

Transistor Feature Sizes