EE105 Fall 2007Lecture 20, Slide 1Prof. Liu, UC Berkeley Lecture 20 OUTLINE Review of MOSFET...

EE105 Fall 2007 Lecture 20, Slide 1 Prof. Liu, UC Berkeley

Lecture 20

OUTLINE• Review of MOSFET Amplifiers• MOSFET Cascode Stage• MOSFET Current Mirror

Reading: Chapter 9

ANNOUNCEMENTS• HW#11 is due in 2 weeks, on 11/20.• Review session: Fri. 11/9, 3-5PM in 306 Soda (HP Auditorium)• Midterm #2 (Thursday 11/15 in Sibley Auditorium):

• Material of Lectures 11-18 (HW# 7-10; Chapters 6,9,11)• 4 pgs of notes (double-sided, 8.5”×11”), calculator allowed


Review: MOSFET Amplifier Design• A MOSFET amplifier circuit should be designed to

1. ensure that the MOSFET operates in the saturation region, 2. allow the desired level of DC current to flow, and3. couple to a small-signal input source and to an output “load”.

Proper “DC biasing” is required!(DC analysis using large-signal MOSFET model)

• Key amplifier parameters: (AC analysis using small-signal MOSFET model)– Voltage gain Av vout/vin

– Input resistance Rin resistance seen between the input node and ground (with output terminal floating)

– Output resistance Rout resistance seen between the output node and ground (with input terminal grounded)


MOSFET Models• The large-signal model is used to determine the DC

operating point (VGS, VDS, ID) of the MOSFET.

• The small-signal model is used to determine how the output responds to an input signal.


Comparison of Amplifier TopologiesCommon Source

• Large Av < 0- degraded by RS

• Large Rin

– determined by biasing circuitry

• Rout RD

• ro decreases Av & Rout

but impedance seenlooking into the draincan be “boosted” by source degeneration

Common Gate

• Large Av > 0-degraded by RS

• Small Rin

- decreased by RS

• Rout RD


but impedance seenlooking into the drain can be “boosted” by source degeneration

Source Follower

• 0 < Av ≤ 1

• Large Rin– determined by

biasing circuitry

• Small Rout

- decreased by RS



Common Source Stage

Dout

in

Sm

D

Gv

RR

RRR

Rg

R

RRR

RRA

21

21

21

||

1||

||

0

0

SOmODout RrgrRR


Common Gate Stage

Dm

GmS

mSv Rg

RgR

gRA

/1||

/1||

Sm

in Rg

R1

Dout RR SOmODout RrgrRR

0

0


Source Follower

Sm

Sv

Rg

RA

1

Gin RR

Som

out

Gin

SOm

SOv

Rrg

R

RR

Rrg

RrA

||||1

||1

||

0 0

Sm

out Rg

R ||1


CS Stage Example 1• M1 is the amplifying device; M2 and M3 serve as the load.

1233

1233

1

||||||1

||||||1

OOOm

out

OOOm

mv

rrrg

R

rrrg

gA

Equivalent circuit for small-signal analysis, showing resistances connected to the drain


CS Stage Example 2• M1 is the amplifying device; M3 serves as a source (degeneration)

resistance; M2 serves as the load.

3

31

2

||11

O

mm

Ov

rgg

rA

Equivalent circuit for small-signal analysis

01


CS Stage vs. CG Stage• With the input signal applied at different locations, these circuits

behave differently, although they are identical in other aspects.

Sm

Ov

Rg

rA

2

1

1 12221 ||)1( OOSOmmv rrRrggA

Common source amplifier Common gate amplifier

02

01


Composite Stage Example 1• By replacing M1 and the current source with a Thevenin

equivalent circuit, and recognizing the right side as a CG stage, the voltage gain can be easily obtained.

12

11

mm

Dv

gg

RA

01 02


Composite Stage Example 2• This example shows that by probing different nodes in a circuit,

different output signals can be obtained.• Vout1 is a result of M1 acting as a source follower, whereas Vout2 is a

result of M1 acting as a CS stage with degeneration.

221

4332

||11

||||1

Omm

OOm

in

out

rgg

rrg

v

v

01

221

221

||11

||1

Omm

Om

in

out

rgg

rg

v

v


NMOS Cascode Stage

211

12111

OOmout

OOOmout

rrgR

rrrgR

• Unlike a BJT cascode, the output impedance is not limited by .


PMOS Cascode Stage

211

12111

OOmout

OOOmout

rrgR

rrrgR


Short-Circuit Transconductance• The short-circuit transconductance is a measure of the

strength of a circuit in converting an input voltage signal into an output current signal:

• The voltage gain of a linear circuit is(Rout is the output resistance of the circuit)

0

outvin

outm v

iG

outmv RGA


Transconductance Example

1mm gG


MOS Cascode Amplifier

2211

21221 )1(

OmOmv

OOOmmv

outmv

rgrgA

rrrggA

RGA


PMOS Cascode Current Source as Load• A large load impedance can be achieved by using a PMOS

cascode current source.

oPoNout

OOmoP

OOmoN

RRR

rrgR

rrgR

||433

122


MOS Current Mirror• The motivation behind a current mirror is to duplicate a

(scaled version of the) “golden current” to other locations.

Current mirror concept Generation of required VGS Current Mirror Circuitry

REF

REFcopy I

LW

LWI

/

/ 11 1

1/

2TH

oxn

REFX V

LWC

IV

2

2

1THX

REFoxnREF VV

L

WCI

2

11 2

1THXoxncopy VV

L

WCI


MOS Current Mirror – NOT!• This is not a current mirror, because the relationship between

VX and IREF is not clearly defined.

• The only way to clearly define VX with IREF is to use a diode-connected MOS since it provides square-law I-V relationship.


Example: Current Scaling • MOS current mirrors can be used to scale IREF up or down

– I1 = 0.2mA; I2 = 0.5mA

:0


Impact of Channel-Length Modulation

0

THTHXREF

oxn

satDGSTHXREF

oxnREF

VVVL

WC

VVVVL

WCI

12

1

12

1

2

,2

THGSDSTHXoxn

satDDSTHXoxncopy

VVVVVL

WC

VVVVL

WCI

12

1

,12

11

12

1

12

1

TH

GSDSREF

REFTH

THGSDSREF

REFcopy V

VVI

LW

LW

V

VVVI

LW

LWI

11

/

/

1

1

/

/ 11111


CMOS Current Mirror

EE105 Fall 2007Lecture 20, Slide 1Prof. Liu, UC Berkeley Lecture 20 OUTLINE Review of MOSFET...

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