EDA Playground Documentation

Doulos

Jan 12, 2022

Contents

1 Table of Contents: 1

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CHAPTER 1

Table of Contents:

1.1 FAQ

1.1.1 Account Validation and Logging In

How do I validate my account?

You can reach the validation page by clicking run whilst having selected either Synopsys VCS or Cadence Incisivefrom the Tools & Simulators menu or by visiting: https://www.edaplayground.com/login and clicking on ‘Registerfor a full account’. You will need to supply some additional identification information, including a company, organi-sational or institutional email address.

Enter your details in the form; read the terms and conditions carefully and, if you agree, click I Agree. An email willthen be sent to the email address you entered. Open that email and click on the link it contains and your account willbe validated.

I don’t have a company or institutional email address. How can I validate my account?

Are you sure? Are you perhaps a member of a professional institution that gives you an email address?

Are you sure you need to? Using Aldec Riviera Pro does not require account validation: this is a commercial simulator,which supports VHDL, Verilog, System-Verilog and UVM.

Which simulators require account validation?

• Synopsys VCS

• Cadence Incisive

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EDA Playground Documentation

What can I do without account validation?

Pretty much everything. Using Aldec Riviera Pro does not require account validation: this is a commercial simula-tor, which supports VHDL, Verilog, System-Verilog and UVM. Using Cadence Specman does not require accountvalidation, either.

I didn’t receive your email, what can I do?

So, first check you spam folder to make sure our email is not stuck there. If not, check the email address you enteredwas correct (for example, people often seem to add ‘.com’ instead of ‘.edu’; people often seem to be combining gmailaddresses with work, for example people often seem to type something like ‘myname1982@somerealcompany.com’).

If all that fails, get in touch with me (Matthew) at getedaplayground@gmail.com.

Why is account validation necessary?

Unfortunately, following some abuse of this privilige on EDA Playground, we have had to restrict access to some ofthe simulators. EDA Playground enables you to use some commercial, professional simulators, completely free ofcharge. In order to use some simulators, asking for some identification information and the agreement not to abusethis privilige doesn’t seem much to ask.

How do I log in if I don’t have a Google or Facebook account?

If you have an organisational/company/institutional email address then you can register from the login page. Click onRegister for a full account or No Google or Facebook account?.

1.1.2 Running Tools

How can I change the language used by my playground?

You can select the testbench and design languages in the ‘Testbench + Design’ drop-down menu.

Can I simulate VHDL and Verilog together?

Unfortunately not. It’s on the ToDo list.

How can I select OVM or UVM?

You can choose OVM (2.1.2) or UVM (1.1d or 1.2) from the ‘UVM/OVM’ drop-down menu (in the left pane).

How can I select other libraries?

You can do select other libraries by highlighting the library in the ‘Other Libraries’ drop-down menu (in the left pane).You can highlight more than one library - they are all compatible with each other.

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I forgot to highlight my library but it made no difference?

Yes. Some libraries are available with some tools whether you highlight them or not. It is still a good idea to highlightany library you use though, because then you playground can be more easily found by the search. (Basically, if it isnot necessary to highlight a library, highlighting it is acting like a ‘tag’ to help the search.)

How do I use TL-Verilog?

You use TL-Verilog by checking the ‘Enable TL-Verilog’ checkbox. This switches the file extension to .tlv and revealsan extra option: ‘Show HTML after run’. Checking that opens the HTML output from TV-Verilog in a new browsertab.

How do I use EasierUVM?

You use EasierUVM by checking the ‘Enable EasierUVM’ checkbox. This switches the testbench file extension to.txt.

What are the resource limits for running my code?

Each run is limited to 60 seconds runtime and 100MB of memory. Each playground can have a maximum of 1 000000 characters.

1.1.3 Managing Files

How can I add more files?

You can add more files by clicking on the + symbol next to the rightmost tab in either the testbench or design panes.You can

• create a new blank file by typing its name in the ‘Filename’ field and clicking on ‘Create file’

• upload files by clicking on ‘Upload files. . . ’

• drag files from a desktop environment onto either the testbench or design panes

How can I remove files?

You can remove files by clicking on the X symbol on each tab.

How can I rename files?

You can rename files by double clicking

Can I read a file from my code?

Yes. All the tabs appear to the tool as files (with the same name as each tab) in a single directory. So, if you have a tabcalled (say) example.txt a file called example.txt is available to be read.

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Can I download output files?

Yes. Check the ‘Download files after run’ checkbox and a zipped copy of all the files and directories will appear.

Can I upload files from multiple directories?

It would be nice, wouldn’t it? But unfortunately not. It’s on the ToDO list.

1.1.4 Managing Playgrounds

How do I start a blank playground design?

When working on code at https://www.edaplayground.com, you can start a blank design by clicking the EDA Play-ground logo in the top left. (Before doing that, please ensure that your existing code edits are saved.)

How can I save a playground?

Click on one of the Save buttons - there’s one top left and another in the Share tab of the bottom pane.

How do I modify one of the examples? How do I modify someone else’s playground?

After making code edits, you can save your own version by clicking Copy.

How Can I search for a Playground?

Select either ‘Your Playgrounds’ or ‘Published Playgrounds’ from the ‘Playgrounds’ drop-down menu (top-right). Youcan see your playgrounds listed and can change the listing order by clicking on one of the headings.

You can also search for one of your playgrounds by entering search terms in the search box and clicking “Search yourplaygrounds”. The search terms search the Name and Descriptions of each playground. You can narrow down yoursearch by selecting the various menus underneath the search box.

How can I publish one of my Playgrounds?

Select “Published (will appear in search results)” from the drop-down menu bottom-right of the share tab and thensave your playground.

What if I accidentally delete a playground? Can I get it back?

Playgrounds are never actually deleted from the database. So, if you have linked to one of your playgrounds from someother page you don’t need to worry about accidentally deleting it - the URL will be preserved. (Deleting a playgroundsimply removes it from your list.)

You can find your deleted playgrounds by adding the search term ‘deleted:true’ to the search box. Your deletedplaygrounds will then be listed and you can undelete any one of them by clicking on the arrow to the right of each one.

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1.1.5 Viewing Waveforms

What is EPWave?

EPWave (EDA Playground Wave) is the first web browser-based wave viewer. It is part of EDA Playground.

Can I view the waves from my EDA Playground sim using EPWaves?

Yes, waves are supported for all languages, frameworks, and libraries. See Loading Waves from EDA Playground

1.1.6 EDA Playground Community

How do I get updates about new EDA Playground features?

New features are frequently being added to EDA Playground. Follow the updates on your favourite social media site:

• EDA Playground Forum

• @EDAPlayground on Twitter

• EDA Playground on Facebook

Which web browsers are supported?

To be honest, I wish I could say I support any browser. To me it goes against the fundamental brilliance of Sir Tim’smarvellous invention, to then make a website that is only compatible with such-and-such a version of such-and-sucha browser. Unfortunately, it’s quite a complicated site and testing resources are limited. So, as far as I know these aresupported:

• Firefox

• Chrome

• Safari

• Internet Explorer 9 or higher

I’d certainly be interested in hearing about any browser-compatibility issues you come across.

I have more questions. How do I get support?

EDA Playground is actively being improved. If you need help or have suggestions, support is available on EDAPlayground forum

If you see a bug, however minor, please post on the forum or file a new issue at https://github.com/edaplayground/eda-playground/issues (requires GitHub account)

For simulator support, please contact the appropriate simulator vendor.

1.2 EDA Playground Help

1.2.1 Quick Start

1. Log in. Click the Log in button (top right) Then either

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• click on Google or Facebook or

• register by clicking on ‘Register for a full account’ (which enables all the simulators on EDA Playground)

1. Select your language from the Testbench + Design menu.

2. Select your simulator from the Tools & Simulators menu. Using certain simulators will require you to supplyadditional identifcation information.

3. Type in your code in the testbench and design windows.

4. Click Run.

Tutorial <http://eda-playground.readthedocs.io/en/latest/tutorial.html>_

1.2.2 What is EDA Playground?

EDA Playground gives engineers immediate hands-on exposure to simulating and synthesizing SystemVerilog, Ver-ilog, VHDL, C++/SystemC, and other HDLs. All you need is a web browser.

• With a simple click, run your code and see console output in real time.

• View waves for your simulation using EPWave browser-based wave viewer.

• Save your code snippets (“Playgrounds”).

• Share your code and simulation results with a web link. Perfect for web forum discussions or emails. Great forasking questions or sharing your knowledge.

• Quickly try something out

– Try out a language feature with a small example.

– Try out a library that you’re thinking of using.

1.2.3 You can use EDA Playground

• for Quick prototyping – try out syntax or a library/language feature.

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• when asking questions on Stack Overflow or other online forums, attach a link to the code and simulationresults.

• during technical interviews to test candidates’ SystemVerilog/Verilog coding and debug skills.

• trying out different verification frameworks: UVM, SVUnit, plain Verilog, or Python.

1.2.4 Support, Feature Requests and Bug Fixes

Support available on EDA Playground forumOr open a bug here: https://github.com/edaplayground/eda-playground/issues (requires GitHub account).

1.2.5 News and Site Updates

New features are frequently being added to EDA Playground. Follow the updates on your favorite social media site:

• @EDAPlayground on Twitter

• EDA Playground on Facebook

1.2.6 Credits

EDA Playground is maintained by Doulos.

1.3 Logging in

1.3.1 Logging in with either Google or Facebook

You can log in very simply using either your Google or your Facebook account. Simply click on either the Googlebutton or the Facebook button on the log in page.

1.3.2 Validating your Account

In order to use certain simulators on EDA Playground (currently Synopsys VCS and Cadence Incisive), you willneed to supply some additional indentification information, including a company, organisational or institutional emailaddress.

You can reach the validation page by clicking run whilst having selected either Synopsys VCS or Cadence Incisivefrom the Tools & Simulators menu or by visiting: http://www.edaplayground.com/validate directly.

Enter your details in the form; read the terms and conditions carefully and, if you agree, click I Agree. An email willthen be sent to the email address you entered. Open that email and click on the link it contains and your account willbe validated.

1.3.3 Doulos Online Training Customers

If you have purchased a place on a Doulos online training course and have been sent a username and password, youcan enter them in the Username and Password boxes and then can log in by clicking on Login. You will then bedirected to the main EDA Playground page and you will see your training course listed on the left hand side. If youclick on that, you will see links to some further instructions and to all the exercises for your training course.

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1.3.4 FAQ

How do I validate my account?

You can reach the validation page by clicking run whilst having selected either Synopsys VCS or Cadence Incisivefrom the Tools & Simulators menu or by visiting: https://www.edaplayground.com/login and clicking on ‘Registerfor a full account’. You will need to supply some additional identification information, including a company, organi-sational or institutional email address.

Enter your details in the form; read the terms and conditions carefully and, if you agree, click I Agree. An email willthen be sent to the email address you entered. Open that email and click on the link it contains and your account willbe validated.

I don’t have a company or institutional email address. How can I validate my account?

Are you sure? Are you perhaps a member of a professional institution that gives you an email address?

Are you sure you need to? Using Aldec Riviera Pro does not require account validation: this is a commercial simulator,which supports VHDL, Verilog, System-Verilog and UVM.

Which simulators require account validation?

• Synopsys VCS

• Cadence Incisive

What can I do without account validation?

Pretty much everything. Using Aldec Riviera Pro does not require account validation: this is a commercial simula-tor, which supports VHDL, Verilog, System-Verilog and UVM. Using Cadence Specman does not require accountvalidation, either.

I didn’t receive your email, what can I do?

So, first check you spam folder to make sure our email is not stuck there. If not, check the email address you enteredwas correct (for example, people often seem to add ‘.com’ instead of ‘.edu’; people often seem to be combining gmailaddresses with work, for example people often seem to type something like ‘myname1982@somerealcompany.com’).

If all that fails, get in touch with me (Matthew) at getedaplayground@gmail.com.

Why is account validation necessary?

Unfortunately, following some abuse of this privilige on EDA Playground, we have had to restrict access to some ofthe simulators. EDA Playground enables you to use some commercial, professional simulators, completely free ofcharge. In order to use some simulators, asking for some identification information and the agreement not to abusethis privilige doesn’t seem much to ask.

How do I log in if I don’t have a Google or Facebook account?

If you have an organisational/company/institutional email address then you can register from the login page. Click onRegister for a full account or No Google or Facebook account?.

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1.4 Tutorial

1. In a separate web browser window, log in to EDA Playground at: http://www.edaplayground.com

2. Log in. Click the Log in button (top right) Then either

• click on Google or Facebook or

• register by clicking on ‘Register for a full account’ (which enables all the simulators on EDA Playground)

1. Select ‘Aldec Riviera Pro’ from the Tools & Simulators menu. This selects the Aldec Riviera Pro simulator,which can be used however you logged in. Using certain other simulators will require you to have registered fora full account.

2. In either the Design or Testbench window pane, type in the following code:

module test;initial

$display("Hello World!");endmodule

(Note: The code in the right Design pane is compiled first, followed by code in the left Testbench pane.)

3. Click Run (top left)

Yes, running a simulation is as simple as that!

4. In the bottom pane, you should see real-time results as your code is being compiled and then run. A run typicallytakes 1-5 seconds, depending on network traffic and simulator. Near the bottom of result output, you should see:

Hello World!

5. Now, let’s save our good work. Click the Share tab near in the bottom pane and then type in a name anddescription. Then click Save.

6. The browser page will reload and the browser address bar will change. This is a persistent link to your savedcode. You can send the link by email, post it on a web page, post it on Stack Overflow forums, etc. Here is whatthe link looks like for one user’s Hello World! playground: http://www.edaplayground.com/s/3/12

7. Now, let’s try modifying existing code. Load the following example: RAM

8. On the left editor pane, before the end of initial block, add the following:

write_enable = 1;data_write = 8'h2C;toggle_clk_write;toggle_clk_read;$display("data[%0h]: %0h",address_read, data_read);

The above code will write new data and read it out again. ( address_read and address_write should be the same).

9. Run the sim. In the results you should see this new message:

data[1b]: 2c

10. Optional. Click Copy to save a personal version of the modified RAM code, including the simulation results.

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1.4.1 Loading Waves from EDA Playground

You can run a simulation on EDA Playground and load the resulting waves in EPWave.

Loading Waves for SystemVerilog and Verilog Simulations

• Go to your code on EDA Playground. For example: RAM Design and Test

• Make sure your code contains appropriate function calls to create a *.vcd file. For example:

initial begin$dumpfile("dump.vcd");$dumpvars(1);

end

• Select a simulator and check the Open EPWave after run checkbox. (Not all simulators may have this runoption.)

• Click Run. After the run completes, the resulting waves will load in a new EPWave window. (Pop-ups must beenabled.)

Loading Waves for VHDL Simulations

• Check the Open EPWave after run checkbox.

• Specify the Top entity to simulate.

• Click Run. After the run completes, the resulting waves will load in a new EPWave window. (Pop-ups must beenabled.)

– The waves for all signals in the specified Top entity and any of its components will be dumped.

– In EPWave window, click Get Signals to select the signals to view.

1.4.2 Verilog Synthesis on EDA Playground

1.5 Settings & Buttons

1.5.1 Adding Files

EDA Playground supports multiple files, up to a total character limit of 1,000,000. The files may be HDL source files,or text files to be used as inputs to the testbench.

To add a file, click the + sign in the testbench or design pane. Then create a new file or upload an existing file. Thefilename may not contain special characters.

Simulating code with multiple files

• For SystemVerilog, use include statements such as the following to include the added source files in the compile:

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`include "adpcm_seq_item.svh"

• For VHDL, all files with the .vhd and .vhdl extensions are automatically included in the compile.

• For Python, use import statements:

from design import *

To rename a file, double click the tab name. (The initial testbench and design files cannot be renamed.)

1.5.2 Sidebar Options

EDA Playground provides many options that can be configured for running your code.

Languages & Libraries

This section allows selection of coding languages and the available libraries for those languages.

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Testbench + Design

The testbench (left editor pane) and design (right editor pane) may be written using one of these languages:

• Verilog/SystemVerilog for both

• VHDL for both

• e for testbench, and SystemVerilog/Verilog for design

• Python for testbench, and SystemVerilog/Verilog for design

• Python for both

UVM / OVM (SystemVerilog)

When language is Verilog/SystemVerilog, a UVM or OVM library can be used for both the design and testbench. Thefollowing libraries are available:

• UVM 1.2

• UVM 1.1d

• OVM 2.1.2

Other Libraries (SystemVerilog/Verilog)

When language is Verilog/SystemVerilog, other Verilog libraries can be used for both the design and testbench. Theselibraries may be used along with UVM/OVM. Multiple libraries may be selected at the same time. Ctrl+Click to selectmultiple libraries. Available libraries:

• OVL

• SVUnit

• ClueLib

• svlib

• SVAUnit

Libraries (VHDL)

When language is VHDL, the following VHDL libraries can be used for both design and testbench.

• OVL

• OSVVM

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• UVVM

Top entity (VHDL)

When language is VHDL, the top entity of the design must be specified before running a simulation.

Libraries (C++)

When language is C++/SystemC, the following libraries can be used for both design and testbench.

• SystemC 2.3.1

• SystemC 2.3.0

Methodology (Python + Verilog or Python only)

When testbench language is Python and design language is Verilog/SystemVerilog, the following verification environ-ments are available:

• cocotb 0.4

• cocotb 0.3

• cocotb 0.2

When testbench and design language is Python, the following methodologies are available:

• MyHDL 0.8

• Migen X

Migen

Before running synthesis on a Migen design, the Top class corresponding to the top module must be specified. TheTop class is the class instantiation to use when converting the Migen design to Verilog. Some examples:

• MyModule()

• Divisor(4)

• MyMemory(16, 2**12, init=list(range(20)))

Tools & Simulators

For running the code, several tools/simulators may be selected. Many simulators have additional options that may bespecified. Any options needed for languages and libraries will automatically be included.

Open EPWave after run

Checking this option will open EPWave wave viewer in a new window after the simulation run completes (pop-upsmust be enabled). It is available for all simulators that have a run step.

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Download files after run

Checking this option will download the run directory as a ZIP file after the simulation run (pop-ups must be enabled).The simulation run does not have to be successful for the download to occur. The ZIP file will include all the codefiles as well as any generated files such as wave dumps, log files, etc.

YouTube video: How to download code and results from EDA Playground

Simulators

Additional command-line compile options and run options may be specified in the bottom textboxes.

(If available), the Run Time option can be used to specify the number of timesteps for the simulation to run. Bydefault, the simulation runs forever until it hits a breakpoint or $finish.

The Use run.do Tcl file option is for using a custom run.do DO file for specifying simulation commands. To use arun.do Tcl file, check the option and add a new file called ‘run.do’.

Yosys

Yosis is a synthesis tool for performing logical synthesis and creating a netlist. It supports using ABC to synthesizefor a sample cell library.

Yosys will only process code in the right Design pane. The code in the left Testbench pane will be ignored.UVM/OVM/Methodology/Libraries selections are also ignored.

The following synthesis options are available:

• use ABC with cell library - synthesize for a demo cell library using ABC

• memory -nomap - skip memory_map step

• fsm -nomap - skip fsm_map step

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• skip FSM step

• Show diagram after run - open the generated circuit diagram after synthesis flow completes (pop-ups must beenabled).

When using Yosys with Migen, the Top class must be specified, which is used to convert Migen design to Verilog.

When using Yosys with MyHDL, the Testbench pane must contain code to convert MyHDL design to a Verilog file.The Verilog file must have suffix .v, and can be named anything EXCEPT tb_* or a Verilog reserved keyword. Thus,when running Yosys on MyHDL code, the Testbench code will be run first before synthesis.

VTR

Verilog-to-Routing is a complete physical design flow that includes elaboration, logical sysnthesis, FPGA technologymapping, packing, placement, and routing. The recommended architecture file k6_frac_N10_mem32K_40nm.xml isused for the flow. In addition, route channel width is set at a high 100 to ensure no routing issues with dense designs.

VTR will only process code in the right Design pane. The code in the left Testbench pane will be ignored.UVM/OVM/Methodology/Libraries selections are also ignored. Currently, no additional options are available forVTR.

Currently, VTR cannot be used with MyHDL or Migen.

1.5.3 Share Tab

You can add a name and description for your playground using the share tab (which can be found in the bottom pane).

A brief name/title of the playground. Visible by others when they open a saved playground.

A longer description of the playground. Visible by others when they open a saved playground. You can format yourtext using Markdown.

You can control the visibility of your playground by selecting one of three options:

• Private (only your can view)

• Public (anyone with the link can view)

• Published (will appear in search results)

Examples

Links to code examples created on EDA Playground. These generate a search of the EDA Playground database.

1.5.4 Editor Modes and Shortcuts

The editor supports the following modes:

• Default

• Vim

• Emacs

The user may select the mode in the User Options on the user page:

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Note that Vim and Emacs modes are only loose approximations of the actual bindings.

Default Mode

The default mode comes with search/replace functionality. The keybindings are:

• Ctrl-F / Cmd-F - Start searching

• Ctrl-G / Cmd-G - Find next

• Shift-Ctrl-G / Shift-Cmd-G - Find previous

• Shift-Ctrl-F / Cmd-Option-F - Replace

• Shift-Ctrl-R / Shift-Cmd-Option-F - Replace all

The default mode uses the following shortcuts. Note that the shortcuts are different for PC and MAC users.

// For AllkeyMap.basic = {

"Left": "goCharLeft", "Right": "goCharRight", "Up": "goLineUp", "Down": "goLineDown→˓","End": "goLineEnd", "Home": "goLineStartSmart", "PageUp": "goPageUp", "PageDown":

→˓"goPageDown","Delete": "delCharAfter", "Backspace": "delCharBefore", "Tab": "defaultTab", "Shift-

→˓Tab": "indentAuto","Enter": "newlineAndIndent", "Insert": "toggleOverwrite"

};

// For PCkeyMap.pcDefault = {

"Ctrl-A": "selectAll", "Ctrl-D": "deleteLine", "Ctrl-Z": "undo", "Shift-Ctrl-Z":→˓"redo", "Ctrl-Y": "redo","Ctrl-Home": "goDocStart", "Alt-Up": "goDocStart", "Ctrl-End": "goDocEnd", "Ctrl-

→˓Down": "goDocEnd","Ctrl-Left": "goGroupLeft", "Ctrl-Right": "goGroupRight", "Alt-Left": "goLineStart",

→˓ "Alt-Right": "goLineEnd","Ctrl-Backspace": "delGroupBefore", "Ctrl-Delete": "delGroupAfter", "Ctrl-F": "find

→˓","Ctrl-G": "findNext", "Shift-Ctrl-G": "findPrev","Ctrl-[": "indentLess", "Ctrl-]": "indentMore",fallthrough: "basic"

};

// For MACkeyMap.macDefault = {

"Cmd-A": "selectAll", "Cmd-D": "deleteLine", "Cmd-Z": "undo", "Shift-Cmd-Z": "redo",→˓ "Cmd-Y": "redo","Cmd-Up": "goDocStart", "Cmd-End": "goDocEnd", "Cmd-Down": "goDocEnd", "Alt-Left":

→˓"goGroupLeft","Alt-Right": "goGroupRight", "Cmd-Left": "goLineStart", "Cmd-Right": "goLineEnd",

→˓"Alt-Backspace": "delGroupBefore","Ctrl-Alt-Backspace": "delGroupAfter", "Alt-Delete": "delGroupAfter", "Cmd-F": "find

→˓","Cmd-G": "findNext", "Shift-Cmd-G": "findPrev","Cmd-[": "indentLess", "Cmd-]": "indentMore",fallthrough: ["basic", "emacsy"]

};keyMap.emacsy = {

(continues on next page)

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(continued from previous page)

"Ctrl-F": "goCharRight", "Ctrl-B": "goCharLeft", "Ctrl-P": "goLineUp", "Ctrl-N":→˓"goLineDown","Alt-F": "goWordRight", "Alt-B": "goWordLeft", "Ctrl-A": "goLineStart", "Ctrl-E":

→˓"goLineEnd","Ctrl-V": "goPageDown", "Shift-Ctrl-V": "goPageUp", "Ctrl-D": "delCharAfter", "Ctrl-

→˓H": "delCharBefore","Alt-D": "delWordAfter", "Alt-Backspace": "delWordBefore", "Ctrl-K": "killLine",

→˓"Ctrl-T": "transposeChars"};

1.5.5 Buttons

EDA Playground Logo

Click on the EDA Playground logo to launch a new playground.

Run

Shortcut: Ctrl+Enter

Run the current code using the selected tool/simulator and options. The code runs on the EDA Playground server andthe results are printed in the bottom Results pane.

Save

Shortcut: Ctrl+S

Save the current playground, including code, bottom 200 lines of results, and options. Once the playground is saved,the page reloads. The location specified in the address bar is a static link to this playground – this link can be sharedwith others.

If the playground has been saved previously, clicking on Save updates the currently saved playground. The static linkdoes not change.

If you modified a code example but did not save, you’ll see an asterisk in the Save button.

Copy

This button shows up for everyone when viewing a saved playground. Clicking on it creates a new copy of the currentplayground. The copy will be complitely separate from the original, and it will have its own link that can be sharedwith others.

If you modified a code example but did not save, you’ll see an asterisk in the Copy button.

?

Links to EDA Playground documentation (these pages).

Flask

Shows links to other apps available on EDA Playground, such as EPWave.

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Playgrounds

Gives access to your and others’ playgrounds. You can either browse or search.

Log In / Profile

The user must be logged in to save or run playground code. Playground code and results may be viewed withoutlogging in. If this button says “Log in” then click it to log in.

If this button says “Profile”, then you can click it to access your profile and your settings or to log out.

Log In

The user must be logged in to save or run playground code. Playground code and results may be viewed withoutlogging in.

Collaborate

Allows real-time collaborations where multiple users can edit code simultaneously.

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1.6 Yosys Circuit Diagrams

NOTE: Multiple top-level design modules are not supported by Yosys Cicruit Diagrams.

The Yosys synthesis flow can create circuit diagrams.

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• Square boxes are cells. Outputs on the right, inputs and unrecognized ports on the left. The first line of text inthe box in the cell name, or _<number>_ for internal cells. The 2nd line is the cell type. Internal cell types startwith a dollar sign. (There is a chapter in the manual about the internal cell library used in yosys.)

• Diamond-shaped nodes are wires that are not ports. Octagon-shaped nodes are ports.

• Elliptical nodes are constant drivers. The label has the format <width>’<bits> or simply <number> for 32 bitintegers.

• Boxes with round corners with lines such as 0:0 - 42:42 are used to break out and re-combine nets from busses.So for example

wire [3:0] a, b;wire [7:0] y = {a,b};

will create the following box:

The numbers tell you which bits on which side are connected. for example ‘3:0 - 7:4’ means that the bits 3:0from the left net are connected to bits 7:4 from the right net. Usually the box has a single connection on oneside and individual connections on the other side. When such boxes are connected to each other or to a cell port,the connections have little diamonds on the ends instead of arrows. That’s because its not an actual connectionin the sense of the internal RTLIL netlist format.

• For a detailed explanation, see Yosys Application Note 011: Interactive Design Investigation

1.7 Tutorials and Code Examples

1.7.1 Verilog Tutorials and Examples

Doulos Verilog Knowhow - Free Verilog Technical Resources

http://www.doulos.com/knowhow/verilog_designers_guide/

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D Flip-Flop (DFF)

Code located at: Verilog D Flip-Flop

This example demonstrates the design and verification of a simple D flip-flop (Wikipedia link).

Design

The DFF module has the following pins:

Name Type Descriptionclk input the clock; rising edge of the clock captures the valuereset input asynchronous reset; when reset is high, the DFF output q is 0d input the main inputq output the d value captured at the last rising clock edgeqb output inverted version of q

Testbench

The testbench is a simple directed test which toggles the DFF inputs and displays the outputs to the console.

The reg signals are used to drive inputs, and wire signals are used to observe outputs:

reg clk;reg reset;reg d;wire q;wire qb;

The DFF design is instantiated:

dff DFF(.clk(clk), .reset(reset),.d(d), .q(q), .qb(qb));

The initial block contains the actual test. First, reset is driven to 1 to reset the flop, while d is driven with an X:

clk = 0;reset = 1;d = 1'bx;

From the console display, we see that the flop has been properly reset with q == 0

Reset flop.d:x, q:0, qb:1

Next, reset is released, while input d is driven to 1:

d = 1;reset = 0;

The output q remains at 0 because the design did not see a rising edge of clk and did not capture the d input:

Release reset.d:1, q:0, qb:1

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Finally, we drive clk to 1 to create a rising edge:

clk = 1;

Now we see q output change to match the d input:

Toggle clk.d:1, q:1, qb:0

Note: Before calling the $display task, we always tell simulation to proceed for 1 time unit #1 to allow the outputsignals to propagate.

Ripple Carry Counter

Code located at: Verilog Ripple Carry Counter

$display System Task

Code located at: Verilog $display System Task

‘define Text Macros

Code located at: Verilog ‘define Text Macros

Port Declaration & Connection

Code located at: Verilog Module Ports for Ripple Carry Counter

Ripple Carry Full Adder

Code located at: Verilog Ripple Carry Full Adder

Blocking and Nonblocking Assignments

Code located at: Verilog Blocking and Nonblocking Assignments

always @ event wait

Code located at: Verilog always @ event wait

if-else conditional and case statements

Code located at: Verilog if-else and case statements

Parameters

Code located at: Verilog Parameter

1.7. Tutorials and Code Examples 21

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Generate Blocks

• The StackOverflow question mentioned in this Verilog tutorial: http://stackoverflow.com/questions/18153405/parameterized-number-of-cycle-delays-in-verilog

• The generate example from the StackOverflow question: Delay with Verilog generate

• The generate conditional example from this Verilog tutorial: Verilog generate conditional

Verilog Tutorials on YouTube

1.7.2 SystemVerilog Tutorials and Examples

Doulos SystemVerilog Knowhow - Free SystemVerilog Technical Resources

Doulos UVM Knowhow - Free UVM Technical Resources including Doulos *Easier UVM*

SystemVerilog Interview Questions on YouTube

1.7.3 UVM (Universal Verification Methodology) Tutorials and Examples

Doulos UVM Knowhow - Free UVM Technical Resources

UVM Hello World Tutorial on YouTube

What’s New in UVM 1.2 on YouTube

1.7.4 Specman e Tutorials and Examples

Hello e World Video Tutorial

1.7.5 SystemVerilog Unit Testing (SVUnit) Tutorials and Examples

Hands-on SVUnit Tutorial

Time to learn the basics of unit testing with SVUnit!

Edit the code and run it here: Hands-on SVUnit Tutorial on EDA Playground

Here’s a simple set of unit tests for an interface called svunitOnSwitch. The purpose of the design is to offer afew utility functions as well as to operate an on/off output.

The API of the svunitOnSwitch is as follows:

output logic on;function logic true();function logic false();function int return43();turn_on();turn_off();

The svunitOnSwitch is defined as:

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interface svunitOnSwitch (output logic on

);initial on = 'hx;

function logic true();// no implementation yet

endfunction

function logic false();// no implementation yet

endfunction

function int return43();// no implementation yet

endfunction

function void turn_on();// no implementation yet

endfunction

function void turn_off();// no implementation yet

endfunctionendinterface

The SVTESTs below are the acceptance unit tests that verify the functionality of the svunitOnSwitch. If yourun the tests on EDA Playground you’ll see all the tests fail because none of the svunitOnSwitch functionality isimplemented. Your job is to build a complete svunitOnSwitch, one requirement at a time, by:

• examining the requirement defined in the unit test(HINT: a unit test is marked by the `SVTEST macro)

• implementng the corresponding code in the svunitOnSwitch(HINT: watch for the “no implementation yet” comment)

• running the test suite to make sure your implementation satisfies the unit test

When you’ve gone through all the tests and your entire test suite passes, you’re done! You’ve verified thesvunitOnSwitch and learned the basics of SVUnit!

Ready. . . set. . . go!

Edit the code and run it here: Hands-on SVUnit Tutorial on EDA Playground

`include "svunit_defines.svh"import svunit_pkg::*;

module svunitDemo_unit_test;`SVUNIT_TESTS_BEGIN

//------------------------------// test: true_test// the true() function should// return 1//------------------------------`SVTEST(true_returns_1)`FAIL_UNLESS(uut.true() === 1);

`SVTEST_END(continues on next page)

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(continued from previous page)

//------------------------------// test: false_test// the false() function should// return 0//------------------------------`SVTEST(false_returns_0)`FAIL_UNLESS(uut.false() === 0);

`SVTEST_END

//-----------------------------------// test: return43// The function return43() returns// a value. this test should fail// if that doesn't happen.//-----------------------------------`SVTEST(return43)`FAIL_UNLESS(uut.return43() === 43);

`SVTEST_END

//---------------------------------// test: turn_on// our uut has an output pin// called 'on' that we can// assert via turn_on()//---------------------------------`SVTEST(turn_on)uut.turn_on();`FAIL_UNLESS(uut.on === 1);

`SVTEST_END

//---------------------------------// test: turn_off// we can turn 'on' off using// turn_off() method//---------------------------------`SVTEST(turn_off)uut.turn_off();`FAIL_UNLESS(uut.on === 0);

`SVTEST_END

/*--------------------------------------------------------------------------------

For more SVUnit, Remember to visit:

www.AgileSoC.com/svunit

And try the other SVUnit examples at:

www.edaplayground.com(continues on next page)

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(continued from previous page)

--------------------------------------------------------------------------------

*/

`SVUNIT_TESTS_END

string name = "svunitDemo_ut";svunit_testcase svunit_ut;

//===================================// This is the UUT that we're// running the Unit Tests on//===================================svunitOnSwitch uut();

//===================================// Build. Runs once//===================================function void build();svunit_ut = new(name);

endfunction

//===================================// Setup for running the Unit Tests// Runs before every SVTEST.//===================================task setup();svunit_ut.setup();/* Place Setup Code Here */

endtask

//===================================// Here we deconstruct anything we// need after running the Unit Tests// Runs after every SVTEST.//===================================task teardown();svunit_ut.teardown();/* Place Teardown Code Here */

endtask

endmodule

You can do a lot more than test a simple svunitOnSwith with SVUnit. When you’re ready to test your own designand testbench IP visit: http://www.AgileSoC.com/svunit

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SVUnit Examples on YouTube

1.7.6 VHDL Tutorials and Examples

Doulos VHDL Knowhow - Free VHDL Technical Resources

VHDL Basic Tutorials on YouTube

1.7.7 cocotb Tutorials and Examples

Endian Swapper Design and Testbench Tutorial

1.8 Privacy Policy

1.8.1 Introduction

This document refers to personal data, which is defined as information concerning any living person (a natural person)that is not already in the public domain.

This Privacy Policy governs the way Doulos, Ltd (Doulos). collects, uses, maintains and discloses information col-lected from users (each, a “User” or “Users”, or Data Subject) of the http://www.edaplayground.com website (“Site”).

Doulos is pleased to provide the following Privacy Notice:

1.8.2 Personal Data and how we use it

We may collect personal identification information from Users in a variety of ways, including, but not limited to, whenUsers visit our Site, register on the Site, and in connection with other activities, services, features or resources wemake available on our Site. Users may be asked for, as appropriate, email address. Users may, however, visit ourSite anonymously. We will collect personal identification information from Users only if they voluntarily submit suchinformation to us. Users can always refuse to supply personally identification information, except that it may preventthem from engaging in certain Site related activities.

We may collect non-personal identification information about Users whenever they interact with our Site. Non-personal identification information may include the browser name, the type of computer and technical informationabout Users means of connection to our Site, such as the operating system and the Internet service providers utilizedand other similar information.

Web browser cookies

Our Site may use “cookies” to enhance User experience. User’s web browser places cookies on their hard drive forrecord-keeping purposes and sometimes to track information about them. User may choose to set their web browserto refuse cookies, or to alert you when cookies are being sent. If they do so, note that some parts of the Site may notfunction properly.

How we use collected information

Doulos, may collect and use Users personal information for the following purposes:

• To improve customer service: Information you provide helps us respond to your customer service requests andsupport needs more efficiently.

• To personalize user experience: We may use information in the aggregate to understand how our Users as agroup use the services and resources provided on our Site.

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• To improve our Site: We may use feedback you provide to improve our products and services.

• To run a promotion, contest, survey or other Site feature: To send Users information they agreed to receive abouttopics we think will be of interest to them.

• To send periodic emails: Users may receive emails that may include company news, updates, related productor service information, etc. If at any time the User would like to unsubscribe from receiving future emails, weinclude detailed unsubscribe instructions at the bottom of each email.

1.8.3 How we protect your information

We adopt appropriate data collection, storage and processing practices and security measures to protect against unau-thorized access, alteration, disclosure or destruction of your personal information, username, password, transactioninformation and data stored on our Site.

1.8.4 Sharing your personal information

We do not sell or rent Users personal identification information to others. We may share Users personal informationwith our business partners if User uses the business partner’s product through our Site. We may share generic ag-gregated demographic information not linked to any personal identification information regarding visitors and userswith our business partners, trusted affiliates and advertisers for the purposes outlined above. We may use third partyservice providers to help us operate our business and the Site or administer activities on our behalf, such as sendingout newsletters or surveys. We may share your information with these third parties for those limited purposes.

Third party websites

Users may find advertising or other content on our Site that link to the sites and services of our partners, suppliers,advertisers, sponsors, licensors and other third parties. We do not control the content or links that appear on these sitesand are not responsible for the practices employed by websites linked to or from our Site. In addition, these sites orservices, including their content and links, may be constantly changing. These sites and services may have their ownprivacy policies and customer service policies. Browsing and interaction on any other website, including websiteswhich have a link to our Site, is subject to that website’s own terms and policies.

Advertising

Ads appearing on our Site may be delivered to Users by advertising partners, who may set cookies. These cookiesallow the ad server to recognize your computer each time they send you an online advertisement to compile nonpersonal identification information about you or others who use your computer. This information allows ad networksto, among other things, deliver targeted advertisements that they believe will be of most interest to you. This privacypolicy does not cover the use of cookies by any advertisers.

Web hosting providers

Cloudflare manage and secure the traffic to some of the Doulos websites. They will log access in accordance withtheir security policy ( https://www.cloudflare.com/security-policy/ ) and share aggregated data with us.

Links

This site contains links to other websites. We are not responsible for the privacy practices of these and you should readtheir own privacy policies. The policy described here, applies only to personal data collected by Doulos.

1.8.5 Legal basis for processing any personal data

To meet Doulos’ contractual obligations to clients and to also respond to marketing enquiries.

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1.8.6 Legitimate interests pursued by Doulos and/or its clients

To promote the marketing and consulting and training services offered by Doulos and/or to market the services and/orproducts offered by Doulos’ clients.

1.8.7 Consent

Through agreeing to this privacy notice and by using the Site, you are consenting to Doulos processing your personaldata for the purposes outlined. You can withdraw consent at any time by emailing DPO@doulos.com or writing to us,see last section for full contact details.

1.8.8 Disclosure

Doulos may on occasions pass your Personal Information to third parties exclusively to process work on its behalf.Doulos requires these parties to agree to process this information based on our instructions and requirements consistentwith this Privacy Notice and GDPR. Some data is passed to parties situated outside the EEA. In this case Doulos willensure they are part of the EU-US Privacy Shield (if a USA entity) or adhere fully to the requirements of GDPR.

Doulos do not broker or pass on information gained from your engagement without your consent. However, Doulosmay disclose your Personal Information to meet legal obligations, regulations or valid governmental request. Doulosmay also enforce its Terms and Conditions, including investigating potential violations of its Terms and Conditionsto detect, prevent or mitigate fraud or security or technical issues; or to protect against imminent harm to the rights,property or safety of Doulos, its clients and/or the wider community.

1.8.9 Retention Policy

Doulos stores Personal Data only for as long as necessary for the purposes for which it was collected, to provide youwith products or services, for legitimate business interests including audit and forensics purposes, and where requiredor permitted by law.

1.8.10 Data storage

Data is held in the UK and in the USA using different servers. The data held in the USA conforms to the fullrequirements of GDPR. Data stored in the cloud will be with GDPR compliant suppliers.

1.8.11 Backup Policy

Backups of the EDA Playground database are kept for up to 15 calendar months. Therefore, anything deleted from thedatabase will remain in backed up data for this period. Anonymised records are kept of any deletions so that they canbe re-deleted in the event of a restoration from backed up data.

1.8.12 Your rights as a data subject

At any point whilst Doulos is in possession of or processing your personal data, all data subjects have the followingrights:

• Right of access – you have the right to request a copy of the information that we hold about you.

• Right of rectification – you have a right to correct data that we hold about you that is inaccurate or incomplete.

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• Right to be forgotten – in certain circumstances you can ask for the data we hold about you to be erased fromour records.

• Right to restriction of processing – where certain conditions apply you have a right to restrict the processing.See The Doulos Opt-Out Policy

• Right of portability – you have the right to have the data we hold about you transferred to another organisation.

• Right to object – you have the right to object to certain types of processing such as direct marketing.

• Right to object to automated processing, including profiling – you also have the right not to be subject to thelegal effects of automated processing or profiling.

In the event that Doulos refuses your request under rights of access, we will provide you with a reason as to why,which you have the right to legally challenge.

Doulos at your request can confirm what information it holds about you and how it is processed

1.8.13 You can request the following information:

• Identity and the contact details of the person or organisation (Doulos) that has determined how and why toprocess your data.

• Contact details of the data protection officer, where applicable.

• The purpose of the processing as well as the legal basis for processing.

• If the processing is based on the legitimate interests of Doulos or a third party such as one of its clients, infor-mation about those interests.

• The categories of personal data collected, stored and processed.

• Recipient(s) or categories of recipients that the data is/will be disclosed to.

• How long the data will be stored.

• Details of your rights to correct, erase, restrict or object to such processing.

• Information about your right to withdraw consent at any time.

• How to lodge a complaint with the supervisory authority (Data Protection Regulator).

• Whether the provision of personal data is a statutory or contractual requirement, or a requirement necessary toenter into a contract, as well as whether you are obliged to provide the personal data and the possible conse-quences of failing to provide such data.

• The source of personal data if it wasn’t collected directly from you.

• Any details and information of automated decision making, such as profiling, and any meaningful informationabout the logic involved, as well as the significance and expected consequences of such processing.

1.8.14 To access what personal data is held, identification will be required

Doulos will accept the following forms of ID when information on your personal data is requested: a photocopy orscanned image of your national ID card, driving license, passport, birth certificate and a utility bill not older than threemonths. A minimum of one piece of photographic ID listed above and a supporting document is required. If Doulosis dissatisfied with the quality, further information may be sought before personal data can be released.

All requests should be made to dpo@doulos.com or by writing to us at the address further below.

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1.8.15 Changes to this policy

Doulos has the discretion to update this privacy policy at any time. When we do, we will revise the updated date at thebottom of this page. We encourage Users to frequently check this page for any changes to stay informed about howwe are helping to protect the personal information we collect. You acknowledge and agree that it is your responsibilityto review this privacy policy periodically and become aware of modifications.

1.8.16 Complaints

In the event that you wish to make a compliant about how your personal data is being processed by Doulos or itspartners, you have the right to complain to Doulos’ CEO. If you do not get a response within 30 days you can complainto the Data Protection Regulator.

The details for each of these contacts are:

Doulos, attention of the CEO 22 Market Place, Ringwood, Hampshire, BH24 1AW Telephone +44 1425 471223 oremail dpo@doulos.com

Data Protection Regulator (ICO) Information Commissioner’s Office, Wycliffe House, Water Lane, Wilmslow,Cheshire, SK9 5AF Telephone: +44 303 123 1113 or online messaging: https://ico.org.uk/global/contact-us/emailOr email: registration@ico.org.uk

This document was last updated on 11 May 2020

EDA Playground on YouTube - Tutorials for Verilog, SystemVerilog, UVM, and VHDL, interview questions, newsand features, etc.

EDA Playground web application located at http://www.edaplayground.com/EPWave documentation located at http://epwave.readthedocs.org

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