ECE645 lecture0 organization · Wiley-IEEE Press, 2006 (ECE 545 textbook) 2. Hubert Kaeslin,...
Transcript of ECE645 lecture0 organization · Wiley-IEEE Press, 2006 (ECE 545 textbook) 2. Hubert Kaeslin,...
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Kris Gaj
Office hours: Monday, 3:00-4:00 PM, Monday, 6:30-7:30 PM, Wednesday, 3:00-4:00 PM, and by appointment
Research and teaching interests: • cryptography • computer arithmetic • FPGA design and verification
Contact: Engineering Bldg., room 3225
[email protected] (703) 993-1575
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ECE 645
Part of:
MS in EE
MS in CpE Digital Systems Design – pre-approved course Other concentration areas – elective course
Certificate in VLSI Design/Manufacturing
PhD in IT
PhD in ECE
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DIGITAL SYSTEMS DESIGN 1. ECE 545 Digital System Design with VHDL
– K. Gaj, project, FPGA design with VHDL, Xilinx & Altera FPGAs
2. ECE 645 Computer Arithmetic – K. Gaj, project, FPGA design with VHDL, Xilinx & Altera FPGAs
3. ECE 586 Digital Integrated Circuits
– D. Ioannou, homework/small projects 4. ECE 681 VLSI Design for ASICs
– H. Homayoun, project/lab, front-end and back-end ASIC design with Synopsys tools
5. ECE 682 VLSI Test Concepts – T. Storey, homework
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Prerequisites
Permission of the instructor, granted assuming that you know
RTL design with VHDL
High level programming language (preferably C)
ECE 545 Digital System Design with VHDL or
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Prerequisite knowledge • This class assumes proficiency with
FPGA CAD tools from ECE 545 • You are expected to be proficient with:
– Synthesizable VHDL coding – Advanced VHDL testbenches, including file input/
output – FPGA synthesis and post-synthesis simulation – FPGA implementation and timing simulation – Reading and interpreting all synthesis and
implementation reports
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Course web page
ECE web page → Courses → Course web pages → ECE 645
http://ece.gmu.edu/coursewebpages/ECE/ECE645/S13
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Computer Arithmetic
Lecture Project
Project 35%
Homework 15 % Midterm exam (in class) 20 % Final Exam (in class) 30 %
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Advanced digital circuit design course covering
• addition and subtraction • multiplication • division and modular reduction • exponentiation
Efficient
Integers unsigned and signed
Real numbers
• fixed point • single and double precision floating point
Elements of the Galois field GF(2n) • polynomial base
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1. Applications of computer arithmetic algorithms.
INTRODUCTION
Lecture topics
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1. Basic addition, subtraction, and counting
2. Addition in Xilinx and Altera FPGAs 3. Carry-lookahead, carry-select, and hybrid adders 4. Adders based on Parallel Prefix Networks 5. Pipelined Adders
6. Adders in Modular Arithmetic
ADDITION AND SUBTRACTION
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MULTIOPERAND ADDITION
1. Sequential multi-operand adders
2. Carry Save Adders 3. Wallace and Dadda Trees
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• Unsigned Integers • Signed Integers • Fixed-point real numbers • Floating-point real numbers • Elements of the Galois Field GF(2n)
NUMBER REPRESENTATIONS
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MULTIPLICATION
1. Tree and array multipliers
2. Unsigned vs. signed multipliers
3. Optimizations for squaring 4. Sequential multipliers
- radix-2 multiplier - multipliers based on carry-save adders - radix-4 & radix-8 multipliers - Booth multipliers - serial multipliers
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TECHNOLOGY
1. Embedded resources of Xilinx and Altera FPGAs - block memories - multipliers - DSP units
2. Multiplication in Xilinx and Altera FPGAs - using distributed logic - using embedded multipliers - using DSP blocks 3. Pipelined multipliers
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DIVISION
1. Basic restoring and non-restoring sequential dividers 2. SRT and high-radix dividers 3. Array dividers
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LONG INTEGER ARITHMETIC
1. Modular Multiplication
2. Modular Exponentiation
3. Montgomery Multipliers and Exponentiation Units
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FLOATING POINT AND
GALOIS FIELD ARITHMETIC
1. Floating-point units 2. Galois Field GF(2n) units
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Literature (1)
Required textbook: Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design, 2nd edition, Oxford University Press, 2010.
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Literature (2)
Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Wiley-Interscience, 2006. Milos D. Ercegovac and Tomas Lang Digital Arithmetic, Morgan Kaufmann Publishers, 2004. Isreal Koren, Computer Arithmetic Algorithms, 2nd edition, A. K. Peters, Natick, MA, 2002.
Supplemantory books:
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Literature (3)
1. Pong P. Chu, RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability, Wiley-IEEE Press, 2006 (ECE 545 textbook) 2. Hubert Kaeslin, Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication, Cambridge University Press; 1st Edition, 2008. (ECE 681 textbook) 3. Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 3rd Edition, McGraw-Hill, 2008. (ECE 331 textbook)
Digital System Design textbooks:
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Literature (4)
Supplementary books:
1. E. E. Swartzlander, Jr., Computer Arithmetic, vols. I and II, IEEE Computer Society Press, 1990. 2. Alfred J. Menezes, Paul C. van Oorschot, and Scott A. Vanstone, Handbook of Applied Cryptology, Chapter 14, Efficient Implementation, CRC Press, Inc., 1998.
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Literature (3)
Proceedings of conferences ARITH - International Symposium on Computer Arithmetic ASIL - Asilomar Conference on Signals, Systems, and Computers ICCD - International Conference on Computer Design CHES - Workshop on Cryptographic Hardware and Embedded Systems
Journals and periodicals IEEE Transactions on Computers, in particular special issues on computer arithmetic. IEEE Transactions on Circuits and Systems IEEE Transactions on Very Large Scale Integration IEE Proceedings: Computer and Digital Techniques Journal of Signal Processing Systems
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Homework
• reading assignments
• analysis of computer arithmetic algorithms and implementations
• design of small arithmetic units using VHDL
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Midterm exams
Midterm Exam - 2 hrs 30 minutes, in class multiple choice + short problems Final Exam – 2 hrs 45 minutes comprehensive conceptual questions analysis and design of arithmetic units
Practice exams on the web
Midterm Exam - March 27 or April 3 Final Exam - Monday, May 8, 4:30-7:15 PM
Tentative days of exams:
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Project (1)
• Can be done individually or in groups of two students
• Suggested project topics posted early in the semester
• You can propose your own project topic • Regular meetings with the instructor • Presentations at the end of the semester
• Contest for the best project
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Project (2) • Real-life circuit requiring extensive use of arithmetic operations • FPGA implementation using embedded resources, such as DSP units and Block Memories • Options of FPGA tools, initial placement point, and optimum target clock frequency selected using ATHENa • Possible experimental testing using PLDA boards with PCI Express interface based on Virtex 6, Virtex 7, and Stratix V FPGAs
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Primary applications (1)
Execution units of general purpose microprocessors
Integer units Floating point units
Integers (8, 16, 32, 64 bits)
Real numbers (32, 64 bits)
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Primary applications (2)
Digital signal and digital image processing
Real or complex numbers (fixed-point or floating point)
e.g., digital filters Discrete Fourier Transform Discrete Hilbert Transform
General purpose DSP processors Specialized circuits
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Primary applications (3)
Coding
Elements of the Galois fields GF(2n) (4-64 bits)
Error detection codes Error correcting codes
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Secret-key (Symmetric) Cryptosystems
key of Alice and Bob - KAB key of Alice and Bob - KAB
Alice Bob
Network
Encryption Decryption
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Hash Function
arbitrary length
message
hash function
hash value h(m)
h
m
fixed length
It is computationally infeasible to find such
m and m’ that h(m)=h(m’)
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Primary applications (4)
Cryptography
Integers (16, 32, 64 bits)
IDEA, RC6, Mars, SHA-3 candidates: SIMD, Shabal, Skein, BLAKE
Twofish, Rijndael, SHA-3 candidates
Elements of the Galois field GF(2n) (4, 8 bits)
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RC6
MARS
Twofish
MUL32, 2 x ROL32, S-box 9x32
Main operations
Auxiliary operations
XOR, ADD/SUB32
2 x SQR32, 2 x ROL32
XOR, ADD/SUB32
96 S-box 4x4, 24 MUL GF(28)
XOR ADD32
Rijndael
Serpent 8 x 32 S-box 4x4
XOR
16 S-box 8x8 24 MUL GF(28)
XOR
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34
Basic Operations of 14 SHA-3 Candidates
34 NTT – Number Theoretic Transform, GF MUL – Galois Field multiplication,
MUL – integer multiplication, mADDn – multioperand addition with n operands
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Public Key (Asymmetric) Cryptosystems
Public key of Bob - KB Private key of Bob - kB
Alice Bob
Network
Encryption Decryption
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RSA as a trap-door one-way function
M C = f(M) = Me mod N C
M = f-1(C) = Cd mod N
PUBLIC KEY
PRIVATE KEY
N = P ⋅ Q P, Q - large prime numbers
e ⋅ d ≡ 1 mod ((P-1)(Q-1))
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RSA keys
PUBLIC KEY PRIVATE KEY
{ e, N } { d, P, Q }
N = P ⋅ Q
e ⋅ d ≡ 1 mod ((P-1)(Q-1))
P, Q - large prime numbers
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Primary applications (5)
Cryptography
Long integers (1k-16k bits)
Public key cryptography
RSA, DSA, Diffie-Hellman
Elliptic Curve Cryptosystems, Pairing Based Cryptosystems
Elements of the Galois field GF(2n) (160-512 bits)
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Primary applications (5)
Cipher Breaking
Public key cryptography
RSA PUBLIC KEY RSA PRIVATE KEY
{ e, N } { d, P, Q }
N = P ⋅ Q P, Q
e ⋅ d ≡ 1 mod ((P-1)(Q-1))