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CONFIDENTIAL EE/OCT 2010/ECE351

UNIVERSITI TEKNOLOGI MARAFINAL EXAMINATION

COURSECOURSE CODEDATETIME

DIGITAL SYSTEMS IECE351OCTOBER 20103 HOURS

INSTRUCTIONS TO CANDIDATES1 . This question paper consists of five (5) questions.

Answer ALL questions in the Answer Booklet. Start each answer on a new page..3. Do not bring any material into the examination room unless permission is given by theinvigilator.

Please check to make sure that this examination pack consists of:i) the Question Paperii) anAnswer Booklet-provided by the Faculty

DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SOThis examination paper consists of 9 printed pages

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CONFIDENTIAL 2 EE/OCT 2010/ECE351

QUESTION 1a) Answer the following question:

i) Conv ert FED.C A1 6 into equivalent octal. (2 marks)ii) Convert 0101 0111 0011 01 00BCD into equivalent hexadec imal.

(2 marks)iii) Perform the arithmetic operation of 405 .2 8 - 378 in octal number system

(2 marks)iv) Perform the multiplication of 1 011 02 an d 1 1 . 0 1 2 in binary num ber system.(2 marks)

b) Identify the equiva lent octal num ber of each of the following sign ed binary number ifthe numbers are stored using 2's com pliment sys tem.i ) 11100101002i i ) 011001012 (4 marks)

c) Answer the following question:i) Perform the operations of 8-bit 2's complement num ber of A + B and A - Bfor two binary numbers A= 01111000 2 and B=00010111 2 . State the answersin decimal. (4 marks)ii) Produce the equivalent hexadecimal number of the gray-coded number10101101 gray. (4 marks)

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CONFIDENTIAL 3 EE/OCT2010/ECE351

QUESTION 2a) Answer the following question:

i) State TW O (2) methods that can be used to simplify Boolean expressions.(2 marks)

ii) Produce the truth table for the expression F(A,B,C) = AC + AB + B.(3 marks)

b) Given F(A, B,C) = AB + C. Draw a minimal circuit using NAND gates ONLY.(4 marks)

c) For the circuit show n in Figure Q2ci) Determine the output expression F(A,B,C).ii) Simp lify the output expression F(A,B,C) using K-Map method.iii)

B

r>>-T3>

^o-J 5>F(A,B,C)

Figure Q2c (6 marks)d) For ADC clock frequency of 500 Hz, find the full scale conversion time tc fo r :

i) 5-bit Successive-Approximation ADC.ii) 5-bit digital ramp AD C. (5 marks)

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QUESTION 3a) List TW O(2) type s of adder and tabulate their truthtable respectively. W rite theminterm function for each of truthtable output.

(3 marks)b) Draw an 8-bit parallel adder by using 4-bit parallel adder as shown in Figure Q 3b.

'

1

B 3

c0

BA

B2 B1

A\ ( ^

Bo A3 A 2 A1 Ao

4 b i t p a r a l l e l A d d e r ln

3 2 1 ^0

' ' ' 1 ' "~Y~I

Figure Q3b(2 marks)

c) The inputs of the multiplier are two 2-bit numbers A1A0 and B1B0 and the productoutput are:

Po = A0B0Pi = AiBo+Ao BiP2 = Carry out of Pi + A1B1P3 = C arry out of P2

i) Prod uce the truth table for a 2-bit mu ltiplier and find the minterm function ofeach product output. (5 marks)ii) Sho w the construction of a 2-bit multiplier using full-adders and AN D gates.

(3 marks)iii) Verify the circuit in part c(ii) by determining the logic states of each input andoutput terminals if A=3i 0 and B=2i0 . (2 marks)

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CONFIDENTIAL 5 EE/OCT2010/ECE351

d) Based on Figure Q3d, find the values for l0, li , I2 ,U and the SOP expression ofF(W,X,Y,Z).+5V

X - [ >

QUESTION 4

F (W,X,Y,Z)

(5 marks)

a) Define an encode r and state an example of its application. Draw a typical blockdiagram for a decimal-to-BCD encoder. (4 marks)b) Answer the following question:

i) Produce the truth table for an octal-to-binary encoder. Hence , draw the logiccircuit to represent the encoder. (4 marks)ii) Implement the following function using ONE (1) 8-input MULT IPLEXER .

F(A, B,C) = A B + ABC + ABC (2 marks)

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c) Figure Q4c shows the JK flip-flop with asynchronous inputs preset and clear,i) Complete the truth table given in Table Q4c. Assume Q is initially ' 1 '

CLK"

APREJ Q>

K C L R Q

Figure Q4c

Table Q4c

CLK

1234

PRE

0111

CLR

1101

J

0111

K

1110

Q1

Qn+i

(4 marks)ii) Produce the truth table for the active high JK flip-flop and draw to show how

this JK flip-flop can be converted into a T flip-flop.(2 marks)

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d) Figure Q4d shows a T flip flop with active low Preset and Clear function. Completethe Table Q4d for the output Q of this flip-flop. Assu me the output Q is initially zero.

PRE

C L K - C >

Figure Q4d

Table Q4d

CLK1234

PR E0111

CLR1100

T0011

Present stateQn0

QnNext state

Q n +1 Qn+i

(4 marks)

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QUESTION 5a) What is the difference between Ring counter and Johnson counter. Draw a logiccircuit of MOD 3 synchronous Ring counter using D-flip flop with positive edgetriggered clock that has the counting sequence as shown in Figure Q5a.c 00> 001 >010

Figure Q5a (4 marks)b) For the sequential circuit in Figure Q5b(i), complete the timing diagram for the

sequential circuit based on timing diagram in Figure Q5b (ii).PRE

CLKCLR

Figure Q5b(i)

C L K

P R E

C L R

Q o

Figure Q 5b(ii) Hak Cipta Universiti Teknologi M ARA

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c) Ta ble Q5c shows the state table of a synchronous counter which is designed usingactive high JK-Flip flops with negative triggered clock. Draw the transition statediagram from the data shown in the table and determine the counting sequence ofthe counter. Produce the excitation table for active high JK-flip flops. Hencecomplete the state table shown in Table Q5c. Simplify the output equations anddraw the coun ter circuit.

Table Q5cPRESENTSTATE

C B A0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

NEXTSTATEC B'A '1 0 01 0 01 0 01 0 01 1 01 1 00 1 01 1 0

Jc "Kc JB KB JA KA

(10 m arks)

END OF QUESTION PAPER

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