ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.
-
Upload
thomas-doyle -
Category
Documents
-
view
222 -
download
0
description
Transcript of ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.
![Page 1: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/1.jpg)
ECE 353Introduction to Microprocessor Systems
Michael J. Schulte
Week 9
![Page 2: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/2.jpg)
TopicsI/O port basicsI/O ports with MSI devicesP compatible devicesAddress decoding for isolated and memory-mapped I/OConditional I/O80C188EB integrated I/O unit82C55A PPI
![Page 3: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/3.jpg)
I/O Port BasicsI/O subsystems allow CPU to interact with the outside worldInput, output, and combined I/O blocksInput ports Byte WordOutput ports Byte WordUnconditional I/O
![Page 4: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/4.jpg)
MSI I/O PortsMedium Scale Integration (MSI) circuits are available to construct portsSimple byte input ports can be constructed from… Octal buffers Octal registersSimple byte output ports can be constructed from octal latches
![Page 5: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/5.jpg)
P Compatible I/O DevicesComplex I/O devices typically require complex interface and control logicP compatible I/O devices have the necessary logic built in to the device itself Interface designed to be reasonably
compatible with many microprocessor buses Need to add decoding/selection logic Examples
Device controllers Used to control complex I/O devices (LCD,
disk drives, etc.) Generic model
![Page 6: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/6.jpg)
I/O Address DecodingI/O address decoding determines the logical location of the I/O device Isolated I/O Memory-mapped I/OInput vs. output ports Same address does not guarantee
same function!Device select pulsesWait statesUsing the CSU with I/O devices
![Page 7: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/7.jpg)
I/O Address Decoding (cont.)PAL/PLA DecodersNonspecific I/O strobes /IOW /IORLinear selectionConventional decoders Device select strobes Cascading
![Page 8: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/8.jpg)
Conditional I/OConditional vs. unconditional transfersHardware examplePolling Overhead Flags / semaphores Wait loops TimeoutsSoftware exercisePossible race condition
![Page 9: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/9.jpg)
80C188EB Integrated I/O Unit
Port 1 FunctionsPort 2 FunctionsBidirectional pin structure SynchronizerProgramming Port Control Register Port Direction Register Port Data Latch Register Port Pin State Register
![Page 10: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/10.jpg)
82C55A Programmable Peripheral Interface (PPI)
LSI device providing 24 bits of I/O Logical organization Block diagramSoftware configurable ports Three modes of operation
Mode 0 Basic Input/Output ports
Mode 1 Strobed Input/Output
Mode 2 Bidirectional data bus
Bit set/reset capability
![Page 11: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/11.jpg)
Real-World ExampleInterface the MAX154 8-bit, 4-channel ADC to the 80C188EB Hardware interface
Use /GCS0 at I/O address 1000h (CSU) Poll conversion status using Port 2.
P2CON / P2DIR / P2LTCH / P2PIN Software interfacing
Write a procedure that does an ADC conversion and then reads the ADC value using mode 1
Input: AL = ADC input channel to use (0-3) Output: ADC value returned in AL
What about mode 0? Timing?
![Page 12: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/12.jpg)
Byte Input Port Example
![Page 13: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/13.jpg)
Byte Output Port Example
![Page 14: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/14.jpg)
74HC540/541
![Page 15: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/15.jpg)
74HC573
![Page 16: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/16.jpg)
74HC574
![Page 17: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/17.jpg)
MAX1200
![Page 18: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/18.jpg)
AD7865
![Page 19: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/19.jpg)
Generic Device Controller(Fig 12.3-2)
control registers
TIMING ANDCONTROL
I/ODEVICE
A(n-1):0
D7:0
/CS/WE/OE
data registers
status registersCPU
CLOCK
address
data
/RD/WR
chip select
![Page 20: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/20.jpg)
HitachiHD44780ULCDController
![Page 21: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/21.jpg)
Port 1 Functions
![Page 22: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/22.jpg)
Port 2 Functions
![Page 23: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/23.jpg)
BidirectionalPort Pin
![Page 24: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/24.jpg)
Port Control Register
![Page 25: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/25.jpg)
Port Direction Register
![Page 26: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/26.jpg)
Port Data Latch Register
![Page 27: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/27.jpg)
Port Pin State Register
![Page 28: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/28.jpg)
Conditional I/O ExerciseWrite a procedure to read data from an input device like the hardware example. Assume that the flag is a READY signal (active high). If the device does not become ready after 1 million polling attempts, return with the carry flag set, otherwise, return with the data in AL and the carry flag cleared.
![Page 29: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/29.jpg)
82C55A Block Diagram
![Page 30: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/30.jpg)
82C55A Modes of Operation
![Page 31: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/31.jpg)
82C55A Mode 1 Input
![Page 32: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/32.jpg)
82C55A Mode 1 Output
![Page 33: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/33.jpg)
Chip-Select Start Reg
![Page 34: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/34.jpg)
Chip-Select Stop Register-Part 1
![Page 35: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/35.jpg)
Chip-Select Stop Register -Part 2
![Page 36: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/36.jpg)
Conditional I/O ExampleD7:0
INPUTDEVICE
Q1
Q2
Q3
Q4
D1
D2
D3
D4
74HC574
CLK <
OC
Q5
Q6
Q7
Q8
D5
D6
D7
D8
A13A14A15
/S2
V CC
A0A1A2
Y0Y1Y2Y3
74HC138
E1E2E3
Y4Y5Y6Y7
/RD
D7Q D
CLK <
PR
CL
74HC7474HC125
vcc
![Page 37: ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9.](https://reader036.fdocuments.net/reader036/viewer/2022062413/5a4d1b4d7f8b9ab0599a6580/html5/thumbnails/37.jpg)
Synchronization