Ec2155 Lab Manual

EC2155 CIRCUITS AND DEVICES LABORATORY 0 0 3

100

1. Verification of KVL and KCL

2. Verification of Thevenin and Norton Theorems.

3. Verification of superposition Theorem.

4. Verification of Maximum power transfer and reciprocity theorems.

5. Frequency response of series and parallel resonance circuits.

6. Characteristics of PN and Zener diode

7. Characteristics of CE configuration

8. Characteristics of CB configuration

9. Characteristics of UJT and SCR

10. Characteristics of JFET and MOSFET

11. Characteristics of Diac and Triac.

12. Characteristics of Photodiode and Phototransistor.

VERIFICATION OF KCL & KVL (KIRCHHOFF’S LAWS)

AIM:

To verify (i) Kirchhoff’s current law (KCL) (ii) Kirchhoff’s voltage law (KCL)

EQUIPMENTS & COMPONENTS REQUIRED:

Sl. No.

Equipments & Components

Range Quantity

1 RPS (0-30) V 12 Ammeter (0-5) mA, (0-10) mA, (0-30)

mA2, 2, 1 respectively

3 Voltmeter (0-10) V 34 Resistor 1 KΩ 55 Bread Board 16 Connecting wires As required

THEORY:

KIRCHHOFF’S CURRENT LAW (KCL):

KCL states that “the algebraic sum of all the currents at any node in a circuit equals zero”.

i.e., Sum of all currents entering a node = Sum of all currents leaving a node

KIRCHHOFF’S VOLTAGE LAW (KVL):

KVL states that “the algebraic sum of all the voltages around any closed loop in a circuit equals zero”.

i.e., Sum of voltage drops = Sum of voltage rises

PROCERURE:


(1) Connect the components as shown in the circuit diagram.

(2) Switch on the DC power supply and note down the corresponding ammeter readings.

(3) Repeat the step 2 for different values in the voltage source.

(4) Finally verify KCL.



(2) Switch on the DC power supply and note down the corresponding voltmeter readings.

(3) Repeat the step 2 for different values in the voltage source.

(4) Finally verify KVL.

CALCULATION:

RESULT:

Thus (i) Kirchhoff’s Current Law & (ii) Kirchhoff’s Voltage Law are verified.

CIRCUIT DIAGRAM:


TABULAR COLUMN:

VS

(volts)I (mA) I1 (mA) I2 (mA)

I = I1 + I2

(mA)

TABULAR COLUMN:

VS I (mA) I1 (mA) I2 (mA) I3 (mA) I4 (mA) I = I1 + I2 I2 = I3 + I4

(volts) (mA) (mA)

CIRCUIT DIAGRAM:


TABULAR COLUMN:

VS1

(volts)

VS2

(volts)

VS1 – VS2

(volts)

V1

(volts)V2

(volts)V3

(volts)V = V1 + V2 + V3

(volts)

VERIFICATION OF SUPERPOSITION THEOREM

AIM:

To verify Superposition theorem for (i) Symmetrical T- Network (ii) Asymmetrical T- Network (iii) Symmetrical π Network


Sl. No.


Range Quantity

1 RPS (0-30) V 12 Ammeter (0-1) mA, (0-10) mA 1 each3 Resistor 10 KΩ, 22 KΩ, 5.8 KΩ, 1

Ω3, 1, 1, 1 respectively

4 Bread Board 15 Connecting wires As required

THEORY:

SUPERPOSITION THEOREM:

Superposition theorem states that “in any linear network containing two or more sources, the response in any element is equal to the algebraic sum of the responses caused by the individual sources acting alone, while the other sources are non-operative”.

While considering the effect of individual sources, other ideal voltage and current sources in the network are replaced by short circuit and open circuit across the terminal respectively.

PROCEDURE:


(2) Switch on the DC power supplies VS1 & VS2 (e.g.: to 10 V & 5 V) and note down the corresponding ammeter reading. Let this current be I.

(3) Replace the power supply VS2 (5 V) by its internal resistance and then switch on the supply VS1 (10 V) and note down the corresponding ammeter reading. Let this current be I1.

(4) Now connect back the power supply VS2 (5 V) and replace the supply VS1

(10 V) by its internal resistance.

(5) Switch on the supply VS2 (5 V) and note down the corresponding ammeter reading. Let this current be I2.

(6) Repeat the steps 2 to 5 for different values of VS1 & VS2.

(7) Verify the theorem using the relation I = I1 + I2 (for T- Network) & I = I1 ~ I2 (for Symmetrical π- Network)

CALCULATION:

RESULT:

Thus Superposition theorem is verified for the following (i) Symmetrical T- Network (ii) Asymmetrical T- Network (iii) Symmetrical π- Network.

CIRCUIT DIAGRAM:

SYMMETRICAL T- NETWORK:

(a) When both VS1 & VS2 are active

(b) When VS1 acts alone

(c) When VS2 acts alone

TABULAR COLUMN:

VS1

(volts)VS2


I = I1 + I2

(mA)

CIRCUIT DIAGRAM:

ASYMMETRICAL T- NETWORK:




TABULAR COLUMN:

VS1

(volts)VS2


I = I1 + I2

(mA)

CIRCUIT DIAGRAM:

SYMMETRICAL π- NETWORK:




TABULAR COLUMN:

VS1

(volts)VS2


I = I1 ~ I2

(mA)

VERIFICATION OF THEVENIN’S & NORTON’S THEOREM

AIM:

To verify Thevenin’s & Norton’s theorem using experimental set up.


Sl. No.


Range Quantity

1 RPS (0-30) V 12 Voltmeter (0-10) V 13 Ammeter (0-1) mA 14 Resistor 1 KΩ, 560 Ω, 470 Ω, 1 Ω,

829.10 Ω, 10 KΩ, 5.6 KΩ, 5.1 KΩ

2, 1, 1, 1, 1, 3, 2, 1 respectively


THEORY:

THEVENIN’S THEOREM:

Thevenin’s theorem states that “any two terminal linear network having a number of voltage, current sources and resistances can be replaced by a simple equivalent circuit consisting of a single voltage source in series with a resistance”, where the value of the voltage source is equal to the open circuit voltage across the two terminals of the network, and resistance is equal to the equivalent resistance measured between the terminals with all the energy sources replaced by their internal resistances.

NORTON’S THEOREM:

Norton’s theorem states that “any two terminal linear network having a number of voltage, current sources and resistances can be replaced by an equivalent circuit consisting of a single current source in parallel with a resistance”. The value of the current source is the short circuit current between the two terminals of the network, and resistance is the equivalent resistance measured between the terminals of the network with all the energy sources replaced by their internal resistances.

PROCEDURE:


General Circuit:

(1) Connect the components as shown in the circuit diagram 1.

(2) Measure the voltage across the load using a voltmeter or multimeter after switching on the power supply. Let it be VL.

To find Thevenin’s Voltage: (VTH)


(2) Remove the load resistance and measure the open circuited voltage VTH

across the output terminal.

To find Thevenin’s Resistance: (RTH)


(2) Remove the voltage source and replace it with an internal resistance as shown.

(3) Using multimeter in resistance mode, measure the resistance across the output terminal.

Thevenin’s Circuit:

(1) Connect the power supply of VTH and resistance of RTH in series as shown in the circuit diagram 4.

(2) Connect the load resistance RL and measure VL’ across the load resistance using a voltmeter after switching on the power supply.

(3) Voltage measured with figure 1 should be equal to the voltage measured with this circuit. (i.e., VL = VL’)

NORTON’S THEOREM:

General Circuit:


(2) Measure the current through the load using an ammeter or multimeter after switching on the power supply. Let it be IL.

To find Norton’s Current: (IN)


(2) Remove the load resistance and short circuit the output terminal. Then measure the current through the short circuited terminals.

To find Norton’s Resistance: (RN)


(2) Remove the voltage source and replace it with an internal resistance as shown.

(3) Using multimeter in resistance mode, measure the resistance across the output terminal.

Norton’s Circuit:

(1) Draw the short circuit current source IN in parallel with RN as shown in the circuit diagram 8.

(2) Draw the equivalent circuit by replacing the current source IN in parallel with RN by a voltage source such that Veq = IN . RN volts.

(3) Then connect the circuit as shown in figure 9 and measure the load current IL’ through the load resistor RL. This must be equal to IL.

CALCULATION:

RESULT:

Thus Thevenin’s theorem & Norton’s theorem are verified.

CIRCUIT DIAGRAM:


(a) FIGURE 1

(b) FIGURE 2

(c) FIGURE 3

(d) FIGURE 4

TABULAR COLUMN:

VS (volts) VL (volts)VTH

(volts)RTH

(ohms)VL’

(volts)

CIRCUIT DIAGRAM:

NORTON’S THEOREM:

(e) FIGURE 5

(f) FIGURE 6

(g) FIGURE 7

(h) FIGURE 8

(i) FIGURE 9

TABULAR COLUMN:

VS (volts) IL (mA) IN (mA) RN (KΩ)Veq = IN . RN

(volts)IL’ (mA)

VERIFICATION OF MAXIMUM POWER TRANSFER & RECIPROCITY THEOREM

AIM:

To verify Maximum Power Transfer & Reciprocity Theorem for the given circuit.


Sl. Equipments & Range Quantity

No. Components1 RPS (0-30) V 12 Voltmeter (0-10) V 13 Ammeter (0-10) mA 14 Resistor 10 KΩ, 1 KΩ 1, 3 respectively5 Capacitor 0.1 μF 16 Decade Resistance Box 17 Decade Inductance Box 18 Function Generator (0-3) MHz 19 CRO with probes 20 MHz 1


THEORY:

MAXIMUM POWER TRANSFER THEOREM:

Maximum Power Transfer Theorem states that “maximum power is delivered from a source to a load when the load resistance is small compare to the source resistance”. (ie, RL = RS)

In terms of Thevenin equivalent resistance of a network, it is stated as “a network delivers the maximum power to a load resistance RL where RL is equal to the Thevenin equivalent resistance of the network”.

RECIPROCITY THEOREM:

Reciprocity Theorem states that “in any passive linear bilateral network, if the single voltage source Vx in branch x produces the current response Iy in branch y, then the removal of the voltage source from branch x and its insertion in branch y will produce the current Iy in branch x.”

In simple terms, “interchange of an ideal voltage source and an ideal ammeter in any passive, linear, bilateral circuit will not change the ammeter reading”.

PROCEDURE:


For DC Circuit:

(1) Connect the circuit as shown in figure 1.

(2) Set the power supply to say, 10 V.

(3) Vary the values of the load resistance and note the corresponding voltage reading using a voltmeter.

(4) Tabulate the readings and calculate power using the relation V2/R.

(5) Plot the graph between power and load resistance.

For AC Circuit:


(2) Set the amplitude of the sinusoidal signal to, say 5 V.

(3) Vary the frequency of the input signal from 1 KHz to 3 KHz in steps of 100 and note down the corresponding voltage readings using a CRO.

(4) Tabulate the readings and calculate power.

(5) Plot the graph between power and frequency.

RECIPROCITY THEOREM:


(2) Switch on the power supply VS and set it to some value, say 5 V.

(3) Note down the corresponding ammeter reading.

(4) Repeat steps 2 & 3 for different values of VS.

(5) Now interchange the position of the power supply & ammeter as shown in figure 4.

(6) Repeat steps 2 to 5. (Different values of VS to be maintained same for setup 3 & 4)

(7) Compare the ratios VS/I1 and VS/I2. Both the ratios must be same.

CALCULATION:

RESULT:

Thus the maximum power transfer theorem and reciprocity theorem are verified.

CIRCUIT DIAGRAM:


For DC Circuit: (FIGURE 1)

MODEL GRAPH:

TABULAR COLUMN:

Sl. No.

Load Resistance, RL (KΩ)

Output Voltage, V0 (volts)

Power, P (mW)

For AC Circuit: (FIGURE 2)

Design:

The maximum power is transferred if the following is satisfied. i.e., XC = XL.

where

From these we have,

Considering F0 = 3 KHz & C = 0.1 μF i.e., 0.1 x 10-6 F

= 28.1 mH

MODEL GRAPH:

TABULAR COLUMN:

Sl. No.Frequency, F

(Hz)Output Voltage, V0

(volts)Power, P

(mW)

CIRCUIT DIAGRAM:

RECIPROCITY THEOREM: (FIGURE 3)

FIGURE 4

TABULAR COLUMN:

VS (volts) I1 (mA) VS/I1 (Ω) I2 (mA) VS/I1 (Ω)

FREQUENCY RESPONSE OF SERIES AND PARALLEL RESONANCE CIRCUITS

AIM:

To plot the resonance curve and to determine the bandwidth & Q-factor of series and parallel resonance circuit.


Sl. No.


Range Quantity

1 Function Generator (0-3) MHz 12 CRO with probes 20 MHz 13 Resistor 1 KΩ 14 Capacitor 0.1 μF 15 Decade Inductance Box 1


DESIGN:

PARALLEL RESONANT CIRCUIT:

For a parallel resonant circuit, at resonance, XC = XL.

Resonant frequency is

Considering fr = 3 KHz & C = 0.1 μF i.e., 0.1 x 10-6 F

= 28.1 mH

Quality factor is obtained by, where BW is bandwidth, which

is the difference between the upper cutoff, (f2) and lower cutoff frequencies (f1) i.e., f2 - f1

SERIES RESONANT CIRCUIT:

For a series resonant circuit, resonant frequency is obtained as follows,

At resonance, XC = XL

where

Therefore,

Considering fr = 3 KHz & C = 0.1 μF i.e., 0.1 x 10-6 F

= 28.1 mH

Quality factor is obtained by, where BW is bandwidth, which

is the difference between the upper cutoff, (f2) and lower cutoff frequencies (f1) i.e., f2 - f1

PROCEDURE:

(1) Connect the circuit as shown in figure.

(2) Set to amplitude of the sinusoidal signal to 5 V, say.

(3) Frequency of the input signal is varied from 100 Hz to 2 KHz. Note down the corresponding voltages on CRO for different frequencies.

(4) Tabulate the readings and calculate the current using the formula I = V0/R (mA).

(5) Plot the graph between voltage measured and frequency.

(6) Draw a horizontal line exactly at √2 times the peak value, which intersects the curve at two points. Draw a line from intersecting points to x-axis which meets at f1 and f2.

(7) The bandwidth and Q-factor is obtained from the formula given above.

CALCULATION:

RESULT:

Thus the resonance curve is plotted and bandwidth & Q-factor is determined for the parallel and series resonance circuits.

Parallel Resonance Circuit

Series Resonance Circuit

Bandwidth (BW in Hz)

Q-factor

CIRCUIT DIAGRAM:

PARALLEL RESONANCE CIRCUIT: (FIGURE 1)

MODEL GRAPH:

TABULAR COLUMN:

Sl. No.

Frequency, F (Hz)

Output Voltage, V0

(volts)Current, I (mA)

CIRCUIT DIAGRAM:

SERIES RESONANCE CIRCUIT: (FIGURE 2)

MODEL GRAPH:

TABULAR COLUMN:

Sl. No.

Frequency, F (Hz)

Output Voltage, V0

(volts)Current, I (mA)

CHARACTERISTICS OF PN JUNCTION DIODE AND ZENER DIODE

(a) CHARACTERISTICS OF PN JUNCTION DIODE

AIM:

To study the characteristics of PN junction diode and to plot the volt – ampere characteristics.


Sl. No. Equipments/ Components

Range/ Specification

Quantity

1 RPS (0-30) V 1

2 Diode 1N4001 1

3 Ammeter (0-30) mA, (0-500) μA

1 each

4 Voltmeter (0-1) V, (0-15) V

1 each

5 Resistor 1 KΩ 1

6 Bread Board 1

7 Connecting wires As required

THEORY:

A Semiconductor PN junction diode is an electronic device that is fabricated by sandwiching a P – type material with an N – type material. The diode is basically referred to as rectifier diode, as it is used in converting an AC signal to DC signal. The material used determines the cut-in voltage of diode, for Germanium it is 0.3 V and for silicon it is 0.7 V. The diode is a resistive element, which conducts only when the voltage is above rated voltage it is referred to as barrier voltage. The diode conducts in both forward and reverse mode. In the forward mode the resistance offered by the diode is small. Diode is connected in forward direction with P – type connected to the positive node in the supply and N – type connected to the negative node of the supply, once the applied voltage exceeds the barrier voltage the diode starts conducting which leads to saturation.

PROCEDURE:

FORWARD BIASING:

(1) Connect the circuit as per the circuit diagram 1.

(2) Vary the power supply voltage in such a way that readings should be taken in steps of 0.05 V in the voltmeter till the power supply shows 1 V.

(3) Note down the corresponding ammeter readings.

(4) Plot the graph: VF Vs IF.

(5) Find the dynamic resistance

REVERSE BIASING:


(2) Vary the power supply voltage in such a way that readings should be taken in steps

of 1 V in the voltmeter till the power supply shows 15 V.


(4) Plot the graph: VR Vs IR


CIRCUIT DIAGRAM:

Figure 1. Forward Biasing

Figure 2. Reverse Biasing

MODEL GRAPH:

TABULAR COLUMN:

CALCULATION:

RESULT:

Thus the V-I characteristics of a PN junction diode is studied and the graph is plotted.

From graph, Forward Resistance = ______________

Reverse Resistance = ______________

Cut-in voltage = ______________

(b) CHARACTERISTICS OF ZENER DIODE

AIM:

To study the characteristics of Zener diode and to plot the volt – ampere characteristics.


THEORY:

A semiconductor Zener Diode is an electronic device that is fabricated by sandwiching a P – type material with an N – type material. The diode is basically referred to as Reference /Regulator diode, as it is used to regulate DC signal. The diode works in the reverse break down region in a different way that is based on the geometry of doping. The diode conducts in both forward and reverse mode. The diode is primarily used in the reverse direction only. The voltage at which the diode breaks is known as Zener break down. It is due to the applied voltage reverse potential, an electric field exists near the junction, this field exist a strong field on the covalent bond and this breaks the band, leading to Zener breakdown.

PROCEDURE:

FORWARD BIASING:


(2) Vary the power supply voltage in such a way that readings should be taken in steps of 0.05 V in the voltmeter till the power supply shows 1 V.


(4) Plot the graph: VF Vs IF.


REVERSE BIASING:


(2) Vary the power supply voltage in such a way that readings should be taken in steps of 1 V in the voltmeter till the power supply shows 15 V.


(4) Plot the graph: VR Vs IR


CIRCUIT DIAGRAM:

Figure 1. Forward Biasing

Figure 2. Reverse Biasing

MODEL GRAPH:

TABULAR COLUMN:

CALCULATION:

RESULT:

Thus the V-I characteristics of a Zener diode is studied and the graph is plotted.

From graph, Forward Resistance = ______________

Reverse Resistance = ______________

Cut-in voltage = ______________

Breakdown voltage = ______________

CHARACTERISTICS OF BJT – CE CONFIGURATION

AIM:

Bottom View BC107 Specification: BC107/50V/0.1A,0.3W,300MHz

To plot the input and output characteristics of a Bipolar Junction Transistor in Common Emitter Configuration.


THEORY:

The transistor is a semiconductor device having three layers called emitter, base and collector. It consists of two diodes namely emitter – base diode and collector – base diode connected back to back. Bipolar Junction Transistor is classified into NPN and PNP transistor. The doping varies between the three layers. Always the emitter – base junction is forward biased and collector – base is reverse biased. The DC characteristics are divided into INPUT and OUTPUT characteristics.

PIN DIAGRAM:

B

E C

PROCEDURE:

INPUT CHARACTERISTICS:

(1)Connect the circuit as per the circuit diagram.

(2) Set VCE = 0V, vary VBB in steps of 1V to 15V and note down the corresponding IB and VBE. Repeat the above procedure for VCE = 5V, 10V, 15V, etc.

(3) Plot the graph: VBE Vs IB for a constant VCE.

(4) Find the h- parameters.

OUTPUT CHARACTERISTICS:

(1) Connect the circuit as per the circuit diagram.

(2) Set IB = 10μA, vary VCC in steps of 1V to 15V and note down the corresponding IC and VCE. Repeat the above procedure for IB = 20 μA, 30μA, 40μA etc.

(3) Plot the graph: VCE Vs IC for a constant IB.

(4) Find the h- parameters.

CIRCUIT DIAGRAM:

MODEL GRAPH:

Input Characteristics

Output Characteristics

TABULAR COLUMN:



CALCULATIONS:

RESULT:

Thus the input and output characteristics of the given transistor are plotted and the

parameters are calculated as

hie = _______ (ohms) hre = _______ (no unit)

hfe = _______ (no unit) hoe = _______ (mhos)

CHARACTERISTICS OF BJT – CB CONFIGURATION

AIM:

To study the input and output characteristics of a Bipolar Junction Transistor in Common Base configuration and to calculate its hybrid parameters.


THEORY:

The transistor is a semiconductor device having three layers called emitter, base and collector. It consists of two diodes namely emitter – base diode and collector – base diode connected back to back. Bipolar Junction Transistor is classified into NPN and PNP transistor. The doping varies between the three layers. Always the emitter – base junction is forward biased and collector – base is reverse biased. The DC characteristics are divided into INPUT and OUTPUT characteristics.

PROCEDURE:

(1) The connections are made as shown in the circuit diagram.

(2) The input voltage VBE is varied in small steps and the input current IE is noted by keeping the output voltage VCB as constant. The readings are tabulated.

(3) The same procedure is repeated for different values of VCB. A set of input characteristics is drawn between IE and VBE.

(4) For output characteristics, the input current IE is set to a constant value. The output voltage VCB is varied in small steps and output current IC is noted. The readings are tabulated.

(5) The experiment is repeated for different constant values of input current IE. A set of output characteristics is drawn between VCB and IC.

(6) The h-parameters are calculated using the following formulas.

Input Impedance,

Reverse Voltage Gain,

Forward Current Gain,

Output Admittance,

CIRCUIT DIAGRAM:

MODEL GRAPH:

Input Characteristics

Output Characteristics

TABULAR COLUMN:



CALCULATIONS:

RESULT:

Thus the input and output characteristics of the given transistor in common base mode are plotted and the parameters are calculated as

hib = _______ (ohms) hrb = _______ (no unit)

hfb = _______ (no unit) hob = _______ (mhos)

CHARACTERISTICS OF JUNCTION FIELD EFFECT TRANSISTOR

AIM:

To plot the drain and transfer characteristics of a given JFET and to calculate its parameters.


THEORY:

The Field Effect Transistor is a semiconductor device which depends for its operation on the control of current by an electric field. In a conventional transistor the operation depends on both types of carries, but in FET it primarily depends on majority carriers, hence FET is called unipolar device. Here FET has a channel type construction – fabrication with the channel paving the way for the current to move through it. There is a gate provision to control the flow with the help of gate current and voltage. There are two types of FET, N-channel and P-channel.

PIN DIAGRAM:

BOTTOM VIEW OF BFW10:

SPECIFICATION:

Voltage : 30V, IDSS > 8mA.

PROCEDURE:

DRAIN CHARACTERISTICS:


(2) Set gate voltage VGS = 0V, vary VDS in steps of 1V and note down the corresponding ID and VDS.

(3) Repeat the above procedure for VGS = -5V, -10V, -15V, etc.

(4) Plot the graph: VDS Vs ID for a constant VGS.

(5) Calculate the drain resistance,

TRANSFER CHARACTERISTICS:


(2) Set drain voltage VDS = 5V, vary gate to source voltage VGS in steps of 0.5 V and note down the corresponding ID and VGS.

(3) Repeat the above procedure for VDS = 10V, 15V, etc.

(4) Plot the graph: VGS Vs ID for a constant VDS.

(5) Find the Transconductance,

The amplification factor is calculated from the formula, μ = g m . r D

CIRCUIT DIAGRAM:

TABULAR COLUMN:

DRAIN CHARACTERISTICS:

TRANSFER CHARACTERISTICS:

MODEL GRAPH:

Drain Characteristics Transfer Characteristics

CALCULATIONS:

RESULT:

The drain and transfer characteristics of the Junction Field Effect Transistor are plotted and the parameters are calculated.

(i) Drain Resistance = _________

(ii) Transconductance = _________

(iii) Amplification factor = _________

CHARACTERISTICS OF UNIJUNCTION TRANSISTOR

AIM:

To plot the characteristics of a given Unijunction Transistor (UJT) and to determine its intrinsic stand-off ratio.


THEORY:

The Unijunction Transistor consists of a bar of lightly doped n-type silicon with a small piece of heavily doped p – type material joined to one side. The end terminal of the bar is designated base1 (B1) and base2 (B2) and the p – type region is termed the emitter (E). The silicon bar is lightly doped as it has high resistance and can be represented as high resistors shown in equivalent circuit. The p – type emitter forms a PN – junction with the n – type silicon bar and this junction is represented by a diode in the equivalent circuit. When a voltage is applied between two bases it divides between two resistances in the ratio of their values. Let V1 be the voltage across resistor RB1. Now when emitter is forward biased and if the forward bias voltage is less than V1, then the diode is actually reverse biased and the device will be in cut – off.

If the emitter voltage is increased above V1, the emitter current flows. The voltage at which the device starts conduction is called peak voltage VP. When the emitter voltage is increased beyond VP, the charge carriers are injected into the n – region and the resistance starts decreasing since the resistance depends on doping. Now the device enters negative resistance region. As voltage increased, the current decreases. If IE increases, the resistance decreases and when the current reaches a certain limit the resistance RS is saturated. The voltage falls to a low value called valley voltage VV. After this valley point if forward voltage is increased further the emitter current increases rapidly with slight increase in emitter voltage similar to forward biased diode.

PIN DIAGRAM:

BOTTOM VIEW OF 2N2646:

SPECIFICATION FOR 2N2646:

* Inter base resistance RBB = 4.7 to 9.1 K

* Minimum Valley current = 4 mA

* Maximun Peak point emitter current 5 A

*Maximum emitter reverse current 12 A.

PROCEDURE:


(2) Set base voltage VB1B2 = 5V, vary VEE in steps of 1V up to 15V and note down the corresponding IE and VEB1.

(3) Repeat the above procedure for VB1B2 = 10V, 15V, etc.

(4) Plot the graph: IE Vs VEB1 for a constant VB2B1.

(5) Find the intrinsic stand-off ratio

CIRCUIT DIAGRAM:

MODEL GRAPH:

TABULAR COLUMN:

CALCULATION:

RESULT:

The characteristics of a given Unijunction transistor is studied and the graph is been plotted. The intrinsic stand-off ratio is determined as

= _____ (no unit)

CHARACTERISTICS OF PHOTO-DIODE AND PHOTOTRANSISTOR

AIM:

1. To study the characteristics of a photo-diode.

2. To study the characteristics of phototransistor.

APPARATUS & COMPONENTS REQUIRED:

S.No. Name Range Type Qty

1 R.P.S (0-30)V 1

2 Ammeter (0–30)mA 1

3 Voltmeter (0–30)V 1

4Photo

diode1

5 Resistor 1K 2

6Bread

Board1

7Photo

transistor1

THEORY:

PHOTODIODE:

A photo diode is a two terminal pn junction device, which operates on reverse bias. On reverse biasing a pn junction diode, there results a constant current due to minority charge carriers known as reverse saturation current. Increasing the thermally generated minority carriers by applying external energy, i.e., either heat or light energy at the junction can increase this current. When we apply light energy as an external source, it results in a photo diode that is usually placed in a glass package so that light can reach the junction. Initially when no light is incident, the current is only the reverse saturation current that flows through the reverse biased diode. This current is termed as the dark current of the photo diode. Now when light is incident on the photo diode then the thermally generated carriers increase resulting in an increased reverse current which is proportional to the intensity of incident

(0-30)mA

(0-30)V(0-30)V

light. A photo diode can turn on and off at a faster rate and so it is used as a fast acting switch.

CIRCUIT DIAGRAM:

TABULAR COLUMN:

MODEL GRAPH:

S.No.

VOLTAGE

(In Volts)

CURRENT

(In mA)

1KaaaaaAAA

THEORY:

PHOTOTRANSISTOR:

It is a transistor with an open base; there exists a small collector current consisting of thermally produced minority carriers and surface leakage. By exposing the collector junction to light, a manufacturer can produce a phototransistor, a transistor that has more sensitivity to light than a photo diode. Because the base lead is open, all the reverse current is forced into the base of the transistor. The resulting collector current is ICeo = dcIr. The main difference between a phototransistor and a photodiode is the current gain, dc. The same amount of light striking both devices produces dc times more current in a phototransistor than in a photodiode.

CIRCUIT DIAGRAM:

TABULAR COLUMN: SYMBOL:

R

(K)

Illumination lm/m2

N P N

1K

(0-30V)

IC

400 Lux

200 Lux

0 Lux

VCE(V)

E

MODEL GRAPH:

PROCEDURE:

PHOTO DIODE:

1. Rig up the circuit as per the circuit diagram.

2. Maintain a known distance (say 5 cm) between the DC bulb and the photo diode.

3. Set the voltage of the bulb (say, 2V), vary the voltage of the diode insteps of 1V and note down the corresponding diode current, Ir.

4. Repeat the above procedure for the various voltages of DC bulb.

5. Plot the graph: VD vs. Ir for a constant DC bulb voltage.

PHOTOTRANSISTOR:

1. Rig up the circuit as per the circuit diagram.

S. No.

VCE

(in Volts)

IC

(in mA)

C

(mA)

2. Maintain a known distance (say 5 cm) between the DC bulb and the phototransistor.

3. Set the voltage of the bulb (say, 2V), vary the voltage of the diode in steps of 1V and note down the corresponding diode current, Ir.

4. Repeat the above procedure for the various values of DC bulb.

5. Plot the graph: VD vs. Ir for a constant bulb voltage.

RESULT:

Thus the characteristics of photo diode and phototransistor are studied.

SILICON-CONTROLLED RECTIFIER(SCR) CHARACTERISTICS

AIM: To draw the V-I Charateristics of SCR

APPARATUS:

S.No. Name Range Type Qty

CIRCUIT DIAGRAM:

THEORY:

It is a four layer semiconductor device being alternate of P-type and N-type silicon. It consists os 3 junctions J1, J2, J3 the J1 and J3 operate in forward direction and J2 operates in reverse direction and three terminals called anode A, cathode K , and a gate G. The operation of SCR can be studied when the gate is open and when the gate is positive with respect to cathode.

When gate is open, no voltage is applied at the gate due to reverse bias of the junction J2 no current flows through R2 and hence SCR is at cutt off. When anode voltage is increased J2 tends to breakdown. When the gate positive,with respect to cathode J3 junction is forward biased and J2 is reverse biased .Electrons from N-type material move across junction J3 towards gate while holes from P-type material moves across junction J3 towards cathode. So gate current starts flowing ,anode current increaase is in extremely small current junction J2 break down and SCR conducts heavily.

When gate is open thee breakover voltage is determined on the minimum forward voltage at which SCR conducts heavily.Now most of the supply voltage appears across the load resistance.The holfing current is the maximum anode current gate being open , when break over occurs.

PROCEDURE:

1. Connections are made as per circuit diagram.

2. Keep the gate supply voltage at some constant value

3. Vary the anode to cathode supply voltage and note down the readings of voltmeter and ammeter.Keep the gate voltage at standard value.

4. A graph is drawn between VAK and IAK .

OBSERVATION

S. No. VAK(V) IAK ( μA)

MODEL WAVEFORM:

RESULT: SCR Characteristics are observed.

DIAC & TRIAC CHARACTERISTICS

Aim:

To draw the V-I characteristics of DIAC & TRIAC and obtain the break over voltage (VBO).

Apparatus required:

Theory:

A DIAC is a two terminal three layer bidirectional device which can be switched from its off state to on state for either polarity of applied voltage. The operation of DIAC is identical both in forward and reverse conduction. The DIAC does not conduct until the applied voltage of either polarity reaches the break over voltage VBO.

A TRIAC is a three terminal semiconductor switching device which can control alternating current in a load. A TRIAC can control conduction of both positive and negative half cycles of A.C supply. It is sometimes called a bidirectional semiconductor triode switch.

Procedure:

Diac Characteristics:

o The connections are made as shown in the circuit diagram.o First DIAC is connected in forward directiono The input supply is increased in step by step by varying the RPSo The corresponding ammeter and voltmeter readings are noted and tabulated.o Then the DIAC is connected in reverse condition.o The above process is repeated.Triac Characteristics:

· The connections are made as shown in the circuit diagram.· The TRIAC is connected in forward direction and supply is switched ‘ON’.· VMT1MT2 is constant by varying RPS2 and then varying IG by varying RPS1.· The corresponding ammeter and voltmeter readings are noted and tabulated.· Next the TRIAC is connected in reverse direction.· The above process is repeated.

Graph:

Voltage is taken along x-axis and current is taken along y-axis.

Result:

Thus the V-I characteristics of DIAC & TRIAC was obtained and graph was drawn.

Break over voltage in forward direction of DIAC (VBO) = ……….…

Break over voltage in reverse direction of DIAC (VBO) = …….……

Break over voltage in forward direction of TRIAC (VBO) = …….……

Break over voltage in reverse direction of TRIAC (VBO) = …….……

Ec2155 Lab Manual

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