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SERVICE MANUAL 101037 IMPORTANT NOTICE This manual has been provided for the use of authorized YAMAHA Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are already known and understood by the users, and have therefore not been restated. WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury, destruction of expensive components, and failure of the product to perform as specified. For these reasons, we advise all YAMAHA product owners that any service required should be performed by an authorized YAMAHA Retailer or the appointed service representative. IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification or recognition of any applicable technical capabilities, or establish a principle-agent relationship of any form. The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, and service departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitable and specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributor's Service Division. WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss). IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit. DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 P.O.Box 1, Hamamatsu, Japan DVD-S1700 2006 All rights reserved. This manual is copyrighted by YAMAHA and may not be copied or redistributed either in print or electronically without permission. '06.12 CONTENTS TO SERVICE PERSONNEL ...................................... 2–4 PREVENTION OF ELECTROSTATIC DISCHARGE .... 4 LOCALE MANAGEMENT INFORMATION ................... 4 FRONT PANEL .............................................................. 5 REAR PANELS .......................................................... 5–6 REMOTE CONTROL PANEL ........................................ 7 SPECIFICATIONS / 参考仕様 ........................................ 7 INTERNAL VIEW ........................................................... 8 TRADE MODE / トレードモード ................................... 8 ERROR MESSAGE / エラーメッセージ ........................ 8 TROUBLESHOOTING / トラブルシュート ................... 8 DISASSEMBLY PROCEDURES / 分解手順.................. 9 DISPLAY DATA ........................................................... 10 IC DATA ................................................................. 12–30 BLOCK DIAGRAM ....................................................... 31 WIRING DIAGRAM ...................................................... 32 PRINTED CIRCUIT BOARDS ................................ 33–36 SCHEMATIC DIAGRAMS ...................................... 37–42 REPLACEMENT PARTS LIST .............................. 43–45 REMOTE CONTROL .................................................... 46

Transcript of DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting...

Page 1: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

SERVICE MANUAL

1 0 1 0 3 7

IMPORTANT NOTICEThis manual has been provided for the use of authorized YAMAHA Retailers and their service personnel.It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are alreadyknown and understood by the users, and have therefore not been restated.

WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personalinjury, destruction of expensive components, and failure of the product to perform as specified. For these reasons,we advise all YAMAHA product owners that any service required should be performed by an authorizedYAMAHA Retailer or the appointed service representative.

IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification orrecognition of any applicable technical capabilities, or establish a principle-agent relationship of any form.

The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, andservice departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitableand specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, pleasecontact the distributor's Service Division.

WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may haveaccumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss).

IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit.

DVD AUDIO/VIDEO SA-CD PLAYER

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2006 All rights reserved.This manual is copyrighted by YAMAHA and may not be copied or

redistributed either in print or electronically without permission.

'06.12

� CONTENTSTO SERVICE PERSONNEL ...................................... 2–4PREVENTION OF ELECTROSTATIC DISCHARGE .... 4LOCALE MANAGEMENT INFORMATION ................... 4FRONT PANEL .............................................................. 5REAR PANELS .......................................................... 5–6REMOTE CONTROL PANEL ........................................ 7SPECIFICATIONS / 参考仕様 ........................................ 7INTERNAL VIEW ........................................................... 8TRADE MODE / トレードモード ................................... 8ERROR MESSAGE / エラーメッセージ........................ 8

TROUBLESHOOTING / トラブルシュート ................... 8DISASSEMBLY PROCEDURES / 分解手順 .................. 9DISPLAY DATA ........................................................... 10IC DATA ................................................................. 12–30BLOCK DIAGRAM ....................................................... 31WIRING DIAGRAM ...................................................... 32PRINTED CIRCUIT BOARDS................................ 33–36SCHEMATIC DIAGRAMS...................................... 37–42REPLACEMENT PARTS LIST .............................. 43–45REMOTE CONTROL.................................................... 46

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WALLOUTLET

EQUIPMENTUNDER TEST

AC LEAKAGETESTER OR

EQUIVALENT

INSULATINGTABLE

WARNING: CHEMICAL CONTENT NOTICE!The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (whereapplicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (andpossibly other entities) to cause cancer and/or birth defects or other reproductive harm.

DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REA-SON WHATSOEVER!

Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or exposeeyes to solder/flux vapor!

If you come in contact with solder or components located inside the enclosure of this product, wash your hands beforehandling food.

1. Critical Components InformationComponents having special characteristics aremarked s and must be replaced with parts havingspecifications equal to those originally installed.

2. Leakage Current Measurement (For 120V ModelsOnly)When service has been completed, it is imperative toverify that all exposed conductive surfaces are prop-erly insulated from supply circuits.

� Meter impedance should be equivalent to 1500 ohmsshunted by 0.15µF.

� Leakage current must not exceed 0.5mA.� Be sure to test for leakage with the AC plug in both

polarities.

� TO SERVICE PERSONNEL

本機に搭載されているすべての基板およびハンダ付けによる接合部は無鉛ハンダでハンダ付けされています。

無鉛ハンダにはいくつかの種類がありますが、修理時には下記のような無鉛ハンダの使用を推奨します。

・Sn+Ag+Cu(錫+銀+銅)・Sn+Cu(錫+銅)・Sn+Zn+Bi(錫+亜鉛+ビスマス)

注意:無鉛ハンダの融点温度は通常の鉛入りハンダに比べ30~40℃程度高くなっていますので、それぞれのハンダに合ったハンダごてをご使用ください。

All of the P.C.B.s installed in this unit and solder joints aresoldered using the lead free solder.

Among some types of lead free solder currently available,it is recommended to use one of the following types for therepair work.

• Sn + Ag + Cu (tin + silver + copper)• Sn + Cu (tin + copper)• Sn + Zn + Bi (tin + zinc + bismuth)

Caution:As the melting point temperature of the lead free solderis about 30°C to 40°C (50°F to 70°F) higher than that ofthe lead solder, be sure to use a soldering iron suitableto each solder.

About lead free solder / 無鉛ハンダについて

WARNING: Laser SafetyThis product contains a laser beam component. This component may emit invisible, as well as visible radiation,which may cause eye damage. To protect your eyes and skin from laser radiation, the following precautions must beused during servicing of the unit.

1) When testing and/or repairing any component within the product, keep your eyes and skin more than 30 cm away fromthe laser pick-up unit at all times. Do not stare at the laser beam at any time.

2) Do not attempt to readjust, disassemble or repair the laser pick-up, unless noted elsewhere in this manual.

3) CAUTION : Use of controls, adjustments or performance of procedures other than those specified herein may result inhazardous radiation exposure.

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Laser Emitting conditions:1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the "ON" position, the laser component will emit

a beam for several seconds to detect if a disc is present. During this time (5-10 sec.) the laser may radiate through thelens of the laser pick-up unit. Do not attempt any servicing during this period!If no disc is detected, the laser will stop emitting the beam. When a disc is loaded, you will not be exposed to any laseremissions.

2) The laser power level can be adjusted with the VR on the pick-up PWB, however, this level has been set by the factoryprior to shipping from the factory. Do not adjust this laser level control unless instruction is provided elsewhere in thismanual. Adjustment of this control can increase the laser emission level from the device.

Laser Diode PropertiesType: Semiconductor laser GaAlAsWave length: 650 nm (DVD)

790 nm (VCD/CD)Output Power: 1.45 mW (DVD)

1.13 mW (VCD/CD)Beam divergence: 60 degrees

VARO! : AVATTAESSA JA SUOJALUKITUSOHITETTAESSA OLET ALTTIINANÄKYMÄTTÖMÄLLE LASER-S Ä T E I L Y L L E . Ä L Ä K A T S OSÄTEESEEN.

VARNING! : OSYNLIG LASERSTRÅLNING NÄRDENNA DEL ÄR ÖPPNAD OCHSPÄRREN ÄR URKOPPLAD.BETRAKTA EJ STRÅLEN.

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� PREVENTION OF ELECTROSTATIC DISCHARGE

This product incorporates copyright pro-tection technology that is protected bymethod claims of certain U.S. patents andother intellectual property rights owned byMacrovision Corporation and other rightsowners. Use of this copyright protectiontechno logy must be author ized byMacrovision Corporation, and is intendedfor home and other limited viewing usesonly unless otherwise authorized byMacrovision Corporation. Reverse engineer-ing or disassembly is prohibited.

The laser diode in the DVD mechanism may be damaged due to static electricity from clothes or the human body. Use cautionto prevent electrostatic damage when servicing or handling the DVD-mechanism.

1. Grounding for electrostatic damage preventionSome devices, such as the DVD player, use an optical pickup (laser diode) that will be damaged by static electricity in theworking environment. Only attempt service after ensuring that all grounding procedures have been completed.

1. Worktable groundingPut a grounded conductive material (sheet) or iron sheet on the area where the optical pickup is placed.

2. Human body groundingUse an anti-static wrist strap to discharge the static electricity from your body.

2. Handling Precautions for DVD mechanism1. Handle the DVD mechanism gently, as it is an extremely high-precision assembly.

2. The flexible cable lines may break if an excessive force is applied to it. Use caution when handling the cable.

3. The semi-fixed resistor for laser power adjustment should not be adjusted. Do not turn the resistor.

� LOCALE MANAGEMENT INFORMATIONLocale Management Information : This DVD player is designed and manufactured to respond to the LocaleManagement Information that is recorded on a DVD disc. If the Locale number described on the DVD disc does notcorrespond to the Locale number of this DVD player, this DVD player cannot play this disc.

Warning for power supplyThe primary side of the power supply carries live mains voltage when the player is connected to the mains even whenthe player is switched off !This primary area is not shielded so it is possible to touch copper tracks and/or components when servicing the player.Service personnel have to take precautions to prevent touching this area or components in this area.

Note:The screws on the DVD mechanism may never be touched, removed or re-adjusted.Handle the DVD mechanism with care when the unit has to be exchanged!The DVD mechanism is very sensitive for dropping or giving shocks.

1M-ohmsConductive material(sheet) or steel sheet

Anti-static wrist strap

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� FRONT PANEL

U, T, K, A, G, L, J models

� REAR PANELS

U model

T model

K model

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A model

G model

J model

L model

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“HDMI”, the “HDMI” logo and “High DefinitionMultimedia Interface” are trademarks or regis-tered trademark of HDMI Licensing LLC.

HDM I、HDM IロゴおよびH i g h - D e f i n i t i o nMultimedia Interfaceは、HDMI Licensing LLCの商標または、登録商標です。

“DCDi” is a trademark of Faroudja, a division ofGenesis Microchip, Inc.

DCDiは、Genesis Microchip Inc.の事業部門であるFaroudjaの商標です。

DivX, DivX Certified, and associated logos aretrademarks of DivX, Inc. and are used underlicense.

DivX、DivX Certified、および関連するロゴは、DivX, Inc.の商標です。これらの商標は、DivX, Inc.の使用許諾を得て使用しています。

“DTS” and “DTS Digital Surround” are regis-tered trademarks of Digital Theater Systems,Inc.

DTSおよびDTS Digital Surroundはデジタルシアターシステムズの登録商標です。

� REMOTE CONTROL PANEL

� SPECIFICATIONS / 参考仕様

GENERAL / 一般Dimensions (W x H x D) / 435 x 87 x 284.5 mm寸法(幅 x 高さ x 奥行き) (17-1/8" x 3-7/16" x 11-3/16")Weight / 質量 3.3 Kg (7 lbs. 4 oz)Finish / 仕上げ Gold color (K, J models)

Black color (U, A, G models)Titanium color (T, G, L models)

Power supply / 電源電圧 AC 120 V, 60 Hz (U model)AC 100-240 V, 50 Hz (T model)AC 100-240 V, 50/60 Hz

(K, A, L models)AC 230 V, 50 Hz (G model)AC 100 V, 50/60 Hz (J model)

Power consumption / 消費電力 Approx. 21 WStandby power consumption / < 0.5 W待機時消費電力

ACCESSORIES / 付属品Remote control x 1

Battery (AAA, R03, UM-4) x 2Power cable (2 m) x 1 (U, T, A, G, L, J models)

Power cable (2 m) x 2 (K model)Video pin cable (1 m) x 1Audio pin cable (1 m) x 1

* Specifications are subject to change without prior notice.※ 参考仕様および外観は予告なく変更されることがあります。

U ........ U.S.A. model T ........ Chinese modelK ........ Korean model A ........ Australian modelG ........ European model L ........ Singapore modelJ ......... Japanese model

Manufactured under license from Dolby Labora-tories. “Dolby” and the double-D symbol aretrademarks of Dolby Laboratories.

ドルビーラボラトリーズからの実施権により製造されています。「ドルビー」およびダブルD記号は、ドルビーラボラトリーズの商標です。

• DIMENSIONS

Unit: mm (inch)単位:mm(インチ)

PLAYBACK SYSTEM / 対応ディスクDVD-videoDVD-audioDVD-R, DVD-RWDVD+R, DVD+RW, DVD+R DLVideo CD, SVCDSA-CD multi-channel and SA-CD stereoCDPicture CDCD-R, CD-RW

VIDEO PERFORMANCE / ビデオ部Video (CVBS) output 1 Vpp into 75 ohmsS-video output Y: 1 Vpp into 75 ohms

C: 0.3 Vpp into 75 ohmsD1/D2 output (J model) Y: 1 Vpp into 75 ohms

PB/CB, PR/CR: 0.7 Vpp into 75 ohmsComponent video output (U, T, K, A, G, L models)

Y: 1 Vpp into 75 ohmsPB/CB, PR/CR: 0.7 Vpp into 75 ohms

RGB (SCART) output (G model)0.7 Vpp into 75 ohms

Black level shift (U model)On/Off

AUDIO FORMAT / オーディオフォーマットDigital Dolby Digital/DTS/MPEG

Compressed DigitalPCM 16, 20, 24 bits

fs 44.1, 48, 88.2, 96 kHzMP3 (ISO 9660) 32 kbps to 320 kbps

fs 16, 22.05, 24, 32, 44.1, 48 kHzWMA 64 kbps to 320 kbps

mono, stereo

Full decoding of Dolby Digital and DTS multi-channel sound

Analog stereo sound

Dolby surround compatible downmix from Dolby Digital multi-channel sound

AUDIO PERFORMANCE / オーディオ特性DA converter 24 bits, 192 kHzSignal to noise (1 kHz) 115 dBDynamic range (1 kHz) 105 dBDVD fs 96 kHz 2 Hz to 44 kHz

fs 48 kHz 2 Hz to 22 kHzSVCD fs 48 kHz 2 Hz to 22 kHz

fs 44.1 kHz 2 Hz to 20 kHzCD/VCD fs 44.1 kHz 2 Hz to 20 kHzDistortion and noise (1 kHz) 0.002 %

TV STANDARD (PAL: 50 Hz) (NTSC: 60 Hz)Number of lines 625 525Playback Multistandard (PAL/NTSC)

CONNECTIONS / 接続端子Video output Cinch (yellow) x 1S-video output Mini DIN, 4 pins x 1D1/D2 output (J model) 1Component video output

Y output Cinch (green) x 1PB/CB output Cinch (blue) x 1PR/CR output Cinch (red) x 1

SCART (G model) Euroconnector x 1Digital output Coaxial x 1

Optical x 1IEC60958 for CDDA/LPCM,IEC61937 for MPEG 1/2,Dolby Digital and DTS

HDMI Type A x 1Audio output

2 channel analog outputMIXED 2CH L/R Cinch (white/red) x 1 pair

Multi channel analog outputFRONT L/R Cinch (white/red) x 1 pairSURROUND L/R Cinch (white/red) x 1 pairCENTER Cinch (black) x 1SUBWOOFER Cinch (black) x 1

This product incorporates copyright protection technology thatis protected by method claims of certain U.S. patents andother intellectual property rights owned by Macrovision Corpo-ration and other rights owners. Use of this copyright protectiontechnology must be authorized by Macrovision Corporation,and is intended for home and other limited viewing uses onlyunless otherwise authorized by Macrovision Corporation. Re-verse engineering or disassembly is prohibited.

本製品は、著作権保護技術を採用しており、マクロビジョン社及びその他の著作権利者が保有する米国特許及びその他の知的財産権によって保護されています。この著作権保護技術の使用は、マクロビジョン社の許可が必要で、またマクロビジョン社の特別な許可がない限り家庭用及びその他の一部の視聴用の使用に制限されています。分解したり、改造することも禁じられています。

435 (17-1/8")

87(3-7/16")

70(2-3/4")

273.5

(10-3/4")

17

(11/16")

4

(3/16")

284.5

(11-3/16")

7

(1/4")

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NO DISC

UNKNOWN DISCWhen no disc is loaded in the tray. / ディスクがトレイにセットされていない場合。When a disc which cannot be played or recognized is loaded in the tray. /

再生できない、または認識できないディスクがトレイにセットされている場合。

� INTERNAL VIEW

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POWER SUPPLY UNITDVD MECHANISM UNITMAIN (1) P.C.B.MAIN (4) P.C.B. (G model)MAIN (2) P.C.B.MAIN (3) P.C.B.

� ERROR MESSAGE / エラーメッセージ

� TRADE MODE / トレードモードIn the TRADE mode, the tray open/close function is stoppedtemporarily.

• Setting TRADE mode1. Connect the power cable of the main unit to the AC

outlet.2. Press the “STANDBY/ON” key of the main unit or re-

mote controller to turn on the power.3. Press the “OPEN/CLOSE” key of the main unit to open

the tray.4. Place a disc in the tray and open the “OPEN/CLOSE”

key of the main unit to close the tray.5. While pressing the “SKIP+/SEARCH+” key of the

main unit and press the “STOP” key for 3 secondsor longer.

6. When the TRADE mode is set, [TRADE ON] is dis-played which then returns to the normal display.Note: Even after the TRADE mode is set, all func-

tions remain the same as normal except the“OPEN/ CLOSE” key.Press the “OPEN/CLOSE” key, and [TRAYLOCKED] is displayed.

• Canceling TRADE mode1. With a disc set in the tray, while pressing the “SKIP+/

SEARCH+” key of the main unit and press the “STOP”key for 3 seconds or longer.

2. When the TRADE mode is cancelled, [TRADE OFF]is displayed which then returns to the normal dis-play.

トレードモードは、トレイのOPEN/CLOSE機能を一時的に停止する機能です。

・トレードモードの起動1. 本機の電源コードをACコンセントに接続します。2. 本機またはリモコンの“STANDBY/ON”キーを押し、電源を入れます。

3. 本機の“OPEN/CLOSE”キーを押し、トレイを開きます。4. トレイにディスクをセットし、本機の“OPEN/CLOSE”キーを押しトレイを閉じます。

5. 本機の“SK IP+/SEARCH+”キーを押しながら次に“STOP”キーを3秒間以上押し続けます。6. トレードモードが起動し「TRADE ON」と表示した後、通常の表示に戻ります。注: トレードモード起動後、“OPEN/CLOSE”キー以

外の操作は通常通り行うことができます。“OPEN/CLOSE”キーを押すと「TRAY LOCKED」と表示されます。

・トレードモードの解除1. トレイにディスクがセットされている状態で、本機の“SKIP+/SEARCH+”キーを押しながら次に“STOP”キーを3秒間以上押し続けます。

2. トレードモードが解除され「TRADE OFF」と表示した後、通常の表示に戻ります。

Display / 表示 Cause / 原因

� TROUBLESHOOTING / トラブルシュート・HDMIリセット本機とTVモニターをHDMIケーブルで接続しても映像が表示されない場合1. 本機の“STOP”キーまたは、リモコンの“STOP”キーを2回押します。

2. 本機の“STOP”キーを押しながら“PLAY/PAUSE”キーを3秒間以上押し続けます。

3. 本機のディスプレイに「HDMI RESET」と表示した後、通常の表示に戻ります。

・ビデオリセット本機とTVモニターを映像ピンケーブルなどで接続しても映像が表示されない、または映像が正しく表示されない場合1. 本機の“EJECT”キーを押してトレイを開きます。2. リモコンの“CLEAR”キーを押します。3. リモコンの“2”、“5”、“8”、“0”キーを押します。4. リモコンの“AUDIO”キーを押します。

• HDMI ResetWhen no picture is displayed even though the main unitand TV monitor are connected with the HDMI cable1. Press the “STOP” key of the main unit or on the re-

mote control twice.2. While pressing the “STOP” key of the main unit, press

the “PLAY/PAUSE” key for 3 seconds or longer.3. [HDMI RESE] is displayed of the main unit which then

returns to the normal display.

• VIDEO ResetWhen no picture is displayed or picture is displayed butnot properly even though the main unit and TV monitorare connected with the video pin cable or the like1. Press the “EJECT” key to open the tray.2. Press the “CLEAR” key on the remote control.3. Press the “2”, “5”, “8” and “0” keys on the remote con-

trol.4. Press the “AUDIO” key on the remote control.

"STOP" key"EJECT" keyTray

"PLAY/PAUSE" key

Main unit / 本機

Remote control / リモコン

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� DISASSEMBLY PROCEDURES / 分解手順(番号順に部品を取り外してください。)AC電源コンセントから、電源コードを抜いてください。

1. トップカバーの外し方a. 1のネジ6本を外します。(Fig. 1)b. トップカバーの後ろを持ち上げ、後方へ取り外します。(Fig. 1)

(Remove parts in disassembly order as numbered.)

Disconnect the power cable from the AC outlet.

1. Removal of Top Cabineta. Remove 6 screws (1). (Fig. 1)

b. Lift up the rear side of the top cover, then remove rear-

ward. (Fig. 1)

1

Top coverトップカバー�

Front panel ass'yフロントパネルASS'Y

Front panel ass'yフロントパネルASS'Y

Front panel ass'yフロントパネルASS'Y

Tray lidトレイリッド�

Hookフック�

Hookフック�

Hookフック�

Hookフック�

DVD mechanism unitDVDメカユニット�

1

1

1

2

3

4

5

5

Front Front

DVD mechanism unitDVDメカユニット�

2. Removal of DVD Mechanism Unita. Eject the tray. (See “How to manually eject the tray”.)

b. Remove the tray lid and close the tray. (Fig. 1)

c. Remove 2 screws (2). (Fig. 1)

d. Solder the lands in the P.C.B. of the DVD mechanism

unit with the anti-static soldering iron. (Fig. 2)

2. DVDメカユニットの外し方a. トレイを開きます。(“手動でトレイを開く方法”を参照)b. トレイリッドを外し、トレイを閉じます。(Fig. 1)c. 2のネジ2本を外します。(Fig. 1)d. DVDメカユニットの基板上の端子間を静電気対策はんだこてを使用してショートします。(Fig. 2)

注意・ 修理終了時は、先にカード電線をCN11に接続し、次に静電気対策はんだこてを使用してショート箇所からはんだを除去します。

Note

• After you have finished repairing , connect the

flexible flat cable to CN11 in advance and then re-

move the solder from the short-circuit location

with the anti-static soldering iron.

Solder

CN11

CN12

CN13

CX41

MAIN (1) P.C.B.DVD mechanism unitDVDメカユニット�

3. Removal of Front Panel Ass’ya. Remove 3 screws (3) and 4 screws (4). (Fig. 1)

b. Remove 2 screws (5). (Fig. 1)

c. Remove CX41. (Fig. 2)

d. Remove 2 hooks and then remove the front panel ass’y

forward. (Fig. 1)

3. フロントパネルASS’Yの外し方a. 3のネジ3本、4のネジ4本を外します。(Fig. 1)b. 5のネジ2本を外します。(Fig. 1)c. CX41を外します。(Fig. 2)d. フック2箇所を外し、フロントパネルASS’Yを前方へ取り外します。(Fig. 1)

Fig. 2

• How to manually eject the tray / 手動でトレイを開く方法a. Turn the unit bottom up.b. Turn the loading gear in the direction indicated with a

flatblade screwdriver until the tray is ejected.c. Gently pull the tray out.

a. 本機を上下反転します。b. トレイが出てくるまで、マイナスドライバーでローディングギアを図に示す矢印の方向に回転します。

c. トレイをそっと引き出します。

e. CN11、CN12、CN13を外します。(Fig. 2)f. DVDメカユニットの後ろを持ち上げ、フック2箇所を外し、後方へ取り外します。(Fig. 1)

e. Remove CN11, CN12 and CN13. (Fig. 2)

f. Lift up the rear side of the DVD mechanism unit, then

remove 2 hooks and remove rearward. (Fig. 1)

Trayトレイ�

Loading gearローディングギア�

Trayトレイ�

Flatblade screwdriverマイナスドライバー�

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DVD-S1700

10

SG1

SG2

SG3

SG4

SG5

SG6

SG7

SG8

SG9

SG10

SG11

SG12

SG13

SG14

SG15

SG16

SG17

SG18

SG19

SG20

SG21

SG22

SG23

SG24

SG25

SG26

SG27

SG28

SG29

SG30

SG31

SG32

SG33

SG34

SG35

GR14

14G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR13

13G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR12

12G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR11

11G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR10

10G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR9

9G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR8

8G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR7

7G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR6

6G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR5

5G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR4

4G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR3

3G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR2

2G

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GR1

1G

� ANODE CONNECTION

� DISPLAY DATA

� F401 : HCA14SM16 (AAX80850)

� PIN CONNECTION

� GRID ASSIGNMENT

Pin No.

Connection

25

NX

Note : 1) F1, F2 ..... Filament pin 2) NP ..... No pin 3) NC ..... No connection 4) NX ..... No extended pin

3G 2G4G5G6G7G8G9G

1G

(2G-14G)

10G11G

1 2 3 4 5

6 7 8 9 10

11 12 13 14 15

16 17 18 19 20

21 22 23 24 25

26 27 28 29 30

31 32 33 34 35

12G13G14G

j 1

PATTERN AREA

24

NX

23

NX

22

NX

21

NX

20

NX

19

NX

18

NX

17

NX

16

1G

15

NC

14

GR1

13

VDD

12

DIN

11

CLKB

10

CSB

9

RSTB

8

OSCO

7

OSCI

6

VEE

5

GND

4

NP

3

NP

2

F1

1

F1

Pin No.

Connection

50

F2

49

F2

48

NP

47

NP

46

NX

45

NX

44

NX

43

NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

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11

DV

D-S

1700

MEMO

MEMO

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12

DV

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1700

� IC DATA

TRAY

IR-RCReceiver

Front Panel

Concentrator SPI/I2C/GPIO/DDC

MICROPROCESSOR

SERVO

vv

vv

v

vv

v

AFE

ADP DSP

MCU

VPU

PLL27 MHz

8/16 MbitsNORFlash

RESET

32/64/128Mbits

SDRAM

Vaddis778

SPINDLE

SLED

OPU

Disc loader

RF amp

Servo amp

S/PDIF

Audio

ADC

StereoMics

2 to 8Speakers

TVMonitor

DAC

IC11: ZR36778 (MAIN P.C.B.)MPEG decoder

Page 13: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

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13

DV

D-S

1700

1

2

34,5

6

7

8

9

10

11

1213

14

15

16

17

18-19

20

2122

23

24

2526

27

28

2930

313233

3435

36

37

38

SSCRXDGPCI/O[17]

PM[15]MEMCS[1]#GPCI/O[18]

VDDPMEMAD[15,16]

SYSIND[1,0]MEMAD[14]GCLKSEL

MEMAD[13]FCUIF[29]

MEMAD[12]PLLCFGA

MEMDA[15]FCUIF[28]

MEMAD[11]PLLCFGPMEMDA[7]FCUIF[9]

GNDPMEMAD[10]FCUIF[20]

MEMDA[14]FCUIF[27]MEMAD[9]FCUIF[19]MEMDA[6]FCUIF[8]

MEMAD[8]FCUIF[18]

MEMDA[13,5]FCUIF[26,7]MEMAD[20]MEMCS[2]#GPCI/O[19]

VDDPMEMDA[12]FCUIF[25]MEMWR#FCUIF[0]

MEMDA[4]FCUIF[6]

VDDCMEMDA[11]FCUIF[24]MEMDA[3]FCUIF[5]

MEMAD[19]PLLSELGNDC

MEMDA[10]FCUIF[23]

MEMAD[18]GNDP

MEMDA[2]FCUIF[4]

MEMAD[17]MEMDA[9]FCUIF[22]MEMAD[7]FCUIF[17]MEMDA[1]FCUIF[3]

MEMAD[6]

II/OOO

I/OSO

IOIOOOI

I/OI/OOI

I/OI/OSOO

I/OI/OOO

I/OI/OOO

I/OI/OOO

I/OS

I/OI/OOO

I/OOS

I/OI/OI/OI/OOIS

I/OI/OOS

I/OI/OO

I/OI/OOO

I/OI/OO

SSC data inputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWProbe mux data outputPNVM/SRAM chip select (active low) outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SW3.3 V digital periphery power supplyPNVM/SRAM address bus outputs

General purpose system configuration indication input / Level sampled during RESETPNVM/SRAM address bus outputGCLKPOUT or GCLKA function selection / Level sampled during RESETPNVM/SRAM address bus outputFlash card interface unit output signalPNVM/SRAM address bus outputAudio PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESETPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM address bus outputProcess PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESETPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsDigital periphery ground of 3.3 V supplyPNVM/SRAM address bus outputFlash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM address bus outputsFlash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsPNVM/SRAM address bus outputsFlash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsPNVM/SRAM address bus outputsPNVM/SRAM chip select (active low) outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SW3.3 V digital periphery power supplyPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM write enable (active low) outputFlash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit output signal1.8 V digital core power supplyPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsPNVM/SRAM address bus outputsPLL frequency selection -108 MHz (low) or 135 MHz (high) / Level sampled during RESETDigital core ground of 1.8 V supplyPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM address bus outputDigital periphery ground of 3.3 V supplyPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsPNVM/SRAM address bus outputPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM address bus outputsFlash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalsPNVM/SRAM address bus outputs

Pin Functions Direction DescriptionNo.

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14

DV

D-S

1700

39

40

4142

43

44

45-46

4748

49

505152

53-57

5859-61

626364656667686970

71727374757677787980818283

84-86

8788-90

91

FCUIF[16]MEMDA[8]FCUIF[21]MEMAD[5]FCUIF[15]

VDDPMEMDA[0]FCUIF[2]

MEMAD[4]FCUIF[14]MEMRD#FCUIF[1]

MEMAD[3, 2]FCUIF[13, 12]MEMCS[0]#MEMAD[1]FCUIF[11]

BOOTSEL[2]

MEMAD[0]FCUIF[10]

BOOTSEL[1]

GNDPVDD-IPVDDP

RAMADD[4, 3, 5, 2, 6]

VDDPRAMADD[1, 7, 0]GNDP

RAMADD[8]VDDC

RAMADD[10]GNDC

RAMADD[9]VDDP

RAMADD[11]RAMCS[0]#RAMBA[1]RAMBA[0]

GNDPRAMCS[1]#RAMRAS#RAMCAS#

VDDPRAMWE#RAMDQMGNDPCLK

PCLKVDDPCLK

RAMDAT[8]GNDP

RAMDAT[7, 9, 6]VDDP

RAMDAT[10, 5, 11]

GNDP

OI/OI/OOOS

I/OO

I/OOO

I/OOOOOOI

OOI

SSSO

SO

SOSOSOSOOOOSOOOSOOSOS

I/OS

I/O

SI/O

S

Flash card interface unit output signalPNVM/SRAM bi-directional data busFlash card interface unit I/O signalPNVM/SRAM address bus outputsFlash card interface unit output signal3.3 V digital periphery power supplyPNVM/SRAM bi-directional data busFlash card interface unit output signalPNVM/SRAM address bus outputsFlash card interface unit output signalPNVM/SRAM read enable (active low) outputFlash card interface unit I/O signalPNVM/SRAM address bus outputsFlash card interface unit output signalPNVM/SRAM chip select (active low) outputPNVM/SRAM address bus outputsFlash card interface unit output signalsMicroprocessor SW boot (and execute) source selection:(high, high) - For production testing;(high, low) - Flash+SRAM (for debug monitor);(low, high) - First debug UART(low, low) - Flash (low) or Level sampled during RESETPNVM/SRAM address bus outputsFlash card interface unit output signalsMicroprocessor SW boot (and execute) source selection:(high, high) - For production testing;(high, low) - Flash+SRAM (for debug monitor);(low, high) - First debug UART(low, low) - Flash (low) or Level sampled during RESETDigital periphery ground of 3.3 V supply3.3 V periphery reference voltage3.3 V digital periphery power supplySDRAM address bus output

3.3 V digital periphery power supplySDRAM address bus output

Digital periphery ground of 3.3 V supplySDRAM address bus output1.8 V digital core power supplySDRAM address bus outputDigital core ground of 1.8 V supplySDRAM address bus output3.3 V digital periphery power supplySDRAM address bus outputSDRAM chip select (active low)SDRAM bank select outputSDRAM bank select outputDigital periphery ground of 3.3 V supplySDRAM chip select (active low) outputSDRAM row select (active low) outputSDRAM column select (active low) output3.3 V digital periphery power supplySDRAM write enable (active low) outputSDRAM data masking (active high) outputDigital ground of filtered 3.3 V supply for PCLKSDRAM clock output (same as internal processing clock)3.3 V filtered digital power supply for PCLKSDRAM bi-directional data busDigital periphery ground of 3.3 V supplySDRAM bi-directional data bus

3.3 V digital periphery power supplySDRAM bi-directional data bus

Digital periphery ground of 3.3 V supply

Pin Functions Direction DescriptionNo.

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DV

D-S

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929394959697

98-100

101102-104

105106

107108

109

110

111

112

113

114

115116

117118119120

121122

123124

125126

RAMDAT[4]VDDC

RAMDAT[12]GNDC

RAMDAT[3]VDDP

RAMDAT[13, 2, 14]

GNDPRAMDAT[1, 15, 0]

VDDPGPCI/O[20]

CPUNMISDATA[0]

PM[0]GNDP

ICGPCI/O[0]

AOUT[3]SDATA[1]

PM[1]IDGPCI/O[0]

RAMCKESDATA[2]

PM[2]S/PDIFOUTSDATA[3]

PM[3]AOUT[2]

GPCI/O[21]SDATA[4]

PM[4]AOUT[1]

GPCI/O[22]PM[5]

AOUT[0]SDATA[6]

PM[6]GPAI/OAOUT[3]

IDGPCI/O[0]

PM[7]ALRCLKABCLK

GNDP-A2AMCLK

VDDP-A2AIN

GPCI/O[23]PM[8]GNDC

VSYNC#HDFI

GPI/O[24]DACTEST[9]

PM[9]VDDC

HSYNC#HDHS

GPCI/O[25]GNDP

VCLKx2

I/OS

I/OS

I/OS

I/O

SI/O

SI/OIIOS

I/O

OIO

I/O

OIOOIOO

I/OIOO

I/OOOIO

I/OO

I/O

OOO

SI/OSI

I/OOSOI

I/OIOSOI

I/OSO

SDRAM bi-directional data bus1.8 V digital core power supplySDRAM bi-directional data busDigital core ground of 1.8 V supplySDRAM bi-directional data bus3.3 V digital periphery power supplySDRAM bi-directional data bus

Digital periphery ground of 3.3 V supplySDRAM bi-directional data bus

3.3 V digital periphery power supplyGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWMicroprocessor non-maskable interrupt inputSERVO channel sample data input for AFE by-passProbe mux data outputDigital periphery ground of 3.3 V supplyGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorSerial output of digital stereo audioSERVO channel sample data input for AFE by-passProbe mux data outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPClock enable signal to the SDRAM (for power down)SERVO channel sample data input for AFE by-passProbe mux data outputS/PDIF transmitter output for digital coded or reconstructed audio dataSERVO channel sample data input for AFE by-passProbe mux data outputSerial outputs of digital stereo audioGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWSERVO channel sample data inputs for AFE by-passProbe mux data outputsSerial output of digital stereo audioGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWProbe mux data outputsSerial output of digital stereo audioSERVO channel sample data input for AFE by-passProbe mux data outputsGeneral purpose I/O, monitored/controlled by the ADP SWSerial output of digital stereo audioGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPProbe mux data outputDigital audio left/right select output for the audio port / Square wave, at the sampling frequency / Programmable polarityDigital audio bit-clock output / Data on AOUT and AIN is output or latched, respectively, with the rising orfalling (programmable) edge of this clockDigital ground filtered 3.3 V supply for AMCLKAudio master clock I/O / 128, 192, 256 or 384 times the sampling frequency (programmable)3.3 V filtered digital power supply for AMCLKSerial input of digital stereo audioGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWProbe mux data outputDigital core ground of 1.8 V supplySD digital video vertical sync output signalHD digital video field index input signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWDACs test inputProbe mux data output1.8 V digital core power supplySD digital video horizontal sync output signalHD digital video horizontal sync input signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWDigital periphery ground of 3.3 V supplyDigital video clock output / 27,000 (for SD interlaced), 54,000 (SD progressive) or 135,000 (for HD) MHz

Pin Functions Direction DescriptionNo.

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127128

129

130

131132

133

134

135136

137

138139140141142

143144

145146

147

148

149

150

151152

153

154155

156

157158

159

COSYNCICGPCI/O[1]

VDDPVID[7]

GPCI/O[26]VID[6]

ICGPCI/O[2]

VID[5]IDGPCI[1]

GNDPVID[4]

GPCI/O[27]VID[3]

GPCI/O[28]SERVOCLK

VID[2]GPCI/O[29]

SSEL[0]VDDPVID[1]

GPCI/O[30]SSEL[1]VID[0]

ICGPCI/O[3]

GNDPGNDA

RESET#VDDA

XO

GCLKPGCLKA

GPCI/O[31]GCLKPOUT

VDDPICGPCI/O[4]

S/PDIFIN[0]GPCI/O[33]ICGPCI/O[5]

S/PDIFIN[1]GPCI/O[34]IDGPCI/O[3]

FCUIF[33]GNDP

DUPRD0GPCI/O[35]

DUPTD0GPCI/O[36]

VDD-IPDUPRD1

GPCI/O[37]DUPTD1

GPCI/O[38]GNDDACDCVBS/G/Y(DAC A)

CVBS/C(DAC D)

OI/O

SO

I/OO

I/O

OI/O

SO

I/OO

I/OOO

I/OOSO

I/OOO

I/O

SSIDS

AO

IDIDI/OOS

I/O

II/OI/O

II/OI/O

ISI

I/OO

I/OSI

I/OO

I/OS

AO

AO

Composite sync output / Active only when component analog output is selectedGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessor3.3 V digital periphery power supplyDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPDigital periphery ground of 3.3 V supplyDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWSERVO channel clock output for AFE by-passDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWSERVO channel select output for AFE by-pass3.3 V digital periphery power supplyDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWSERVO channel output for AFE by-passDigital 4: 2: 2 video luma/chroma output, interleaved U, Y V YGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorDigital periphery ground of 3.3 V supplyGround plane of internal PLL circuitReset input (active low)1.8 V power supply for internal PLL circuitOutput to a crystal that is connected to GCLKPIf a crystal is not used at GCLKP, XO must be left not connected.27.000MHz clock or crystal input for main processing clock generation.27.000MHz clock input for audio master clock generation.General purpose I/O, monitored/controlled by the microprocessor or DSP SWGCLKP output3.3 V digital periphery power supplyGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorS/PDIF receiver input for digital coded or reconstructed audio dataGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorS/PDIF receiver input for digital coded or reconstructed audio dataGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPFlash card interface unit input signalDigital periphery ground of 3.3 V supplyFirst debug UART data inputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWFirst debug UART data outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SW3.3 V periphery reference voltageSecond debug UART data outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWSecond debug UART data outputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWGround for the video DACs 3.3 V analog power supplyWhen the Vaddis 778 outputs composite (SCART or non-SCART) video, this line is CVBS outputWhen the Vaddis 778 outputs RGB, this line is the Green outputWhen the Vaddis 778 outputs YUV, this line is the Y outputWhen the other Vaddis 778 output are not SCART video, the output on this line can be either CVBS or C / theselection is independent of the specific selection of the other three DACs

Pin Functions Direction DescriptionNo.

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Pin Functions Direction DescriptionNo.

160161

162

163164165166167168169170171172

173

174175176177

178-183184,185

186187

188

189

190191

192193

194

195196

197198

VDDDACY/R/V

(DAC B)

C/B/U(DAC C)

RSETGNDDACPGNDDABS2GNDDACPS

DACDRIVE[0]VDDDACS

DACDRIVE[1]GNDDACDSVDDAFERF

RFINP

RFINN

GNDAFERFVDDAFESADCIN[7]ADCIN[6]

ADCIN[5-0]VBIASS[0, 1]GNDAFES

PWMACT[0]GPCI/O[39]DVDDAT[0]NRZDATA

PWMACT[1]GPCI/O[40]DVDDAT[1]

NRZCLKPWMCO[0]GPCI/O[41]DVDDAT[2]NRZLOCK

GNDCPWMCO[1]GPCI/O[42]DVDDAT[3]NRZDFCT

VDDCPWMCO[2]GPCI/O[43]FCUIF[34]

DVDDAT[4]PWMCO[3]GPCI[44]FCUIF[35]

IDGPCI/O[2]

DVDDAT[5]GNDPWMSPWMCO[4]GPCI/O[45]DVDDAT[6] VDDPWMSPWMCO[5]GPCI/O[46]FCUIF[36]

DVDDAT[7]

SAO

AO

AISSS

AOS

AOSSAI

AI

SSAIAIAIAISO

I/OIIO

I/OIIO

I/OIISO

I/OIISO

I/OOIO

I/OI/OI/O

ISO

I/OISO

I/OI/OI

When the Vaddis 778 outputs composite SCART video, this line is the Y output3.3 V analog power supply for the video DACsWhen the Vaddis 778 outputs composite non-SCART video, this line is Y outputWhen the Vaddis 778 output RGB, this line is the Red outputWhen the Vaddis 778 outputs YUV, this line is the V outputWhen the Vaddis 778 outputs composite SCART video, this line is the C outputWhen the Vaddis 778 outputs composite (SCART or non-SCART) video, this line is C outputWhen the Vaddis 778 outputs RGB, this line is the Blue outputWhen the Vaddis 778 outputs YUV, this line is the U outputResistive load for gain adjustment of the DACsGround for the video DACs 3.3 V analog power supplyCommon ground for the video and SERVO DACsGround for the SERVO DAC 3.3 V analog powerDrive DACs output signal3.3 V SERVO DACs power supplyDrive DACs output signalGround for the SERVO DAC 3.3 V analog power supply3.3 V analog RF (AFE) power supplyRF positive input signal (differential input) //RF input signal (single ended)RF negative input signal (differential input) //RF reference input signalAnalog RF (AFE) ground of 3.3 V supply3.3 V analog SERVO (AFE) power supplySERVO ADC input signal (e.g. from RF amplifier)SERVO ADC input signal from RF amplifierSERVO ADC input signal (e.g. from RF amplifier)Servo analog signal reference voltage inputsAnalog SERVO (AFE) ground of 3.3 V supplyPWM0 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWAV data input for FE by-passNRZ data input for AFE and DRC by-passPWM1 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWAV data input for FE by-passNRZ clock input for AFE and DRC by-passPWM2 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWAV data input for FE by-passNRZ lock input for AFE and DRC by-passDigital core ground of 1.8 V supplyPWM3 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWAV data input for FE by-passNRZ defect input for AFE and DRC by-pass1.8 V digital core power supplyPWM4 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWFlash card interface unit input signalAV data input for FE by-passPWM5 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWFlash card interface unit I/O signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPAV data input for FE by-passSERVO PWMs ground of 3.3 V supplyPWM6 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWAV data input for FE by-pass3.3 V SERVO PWM power supplyPWM7 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWFlash card interface unit I/O signalAV data input for FE by-pass

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Pin Functions Direction DescriptionNo.

199

200

201

202203

204205

206

207

208

PWMCO[6]IDGPCI/O[4]

FCUIF[32]DVDSTRBRFDAT[4]DEFFCT

IDGPCI/O[5]

FCUIF[37]DVDREQ

ICGPI/O[6]

DVDVALIDGNDP

ICGPI/O[7]

DVDERRVDDP

SLEDPULSEIDGPCI/O[6]

FCUIF[30]DVDSOS

SPIND LEPULSEIDGPCI/O[7]

FCUIF[31]SSCCLK

GPCI/O[47]SSCTXD

GPCI/O[16]

OI/O

I/OII

I/OI/O

I/OO

I/O

IS

I/O

ISI

I/O

III

I/O

I/OI/OI/OO

I/O

PMW8 output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPFlash card interface unit I/O signalAV data input for FE by-passRF channel sample data inputs for AFE by-passDisc defect input or output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPFlash card interface unit I/O signalAV data request output for FE by-pass / Programmable polarityGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorAV data valid input for FE by-pass / Programmable polarityDigital periphery ground of 3.3 V supplyGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWWhen input, the pin can be used as general purpose external interrupt to the microprocessorAV error input for FE by-pass / Programmable polarity3.3 V digital periphery power supplySled optical encoder inputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPFlash card interface unit output signalAV start of sector indication input for FE by-pass / Programmable polaritySpindle optical encoder inputGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SWWhen input, the pin can be used as general purpose external interrupt to the DSPFlash card interface unit I/O signalSSC clock input signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SWSSC data output signalGeneral purpose I/O, monitored/controlled by the microprocessor or DSP SW

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IC20: SAA7893HLC2 (MAIN P.C.B.)DSD decoder

SAA7893HL

HOSTINTERFACE

SDRAMINTERFACE

SAA7893HL

to 64 MbitSDRAM

to host

host_sel

sys_clk27-35 MHz

external PCM

MBL615

toDSD/PCMDAC

aud_clk256/384/512/768*fs

MEMORYMANAGER

PI-buscontrolkey

HF

data-bus

REGISTERHOST

INTERFACE

DEMUX

DECRYPTION/SECTOR

PROCESSOR

PSP-KEYDECODER

ADCAGC

SACDAUDIO

INTERFACE

PI-BUSCONTROL

2, 5 or 6-channelLOSSLESSDECODER

SPEAKER SETUPVOLUME CONTROL

DELAY

8-CHANNELDSD2PCM

CONVERSION

SWITCHMATRIX

FRONT-END

INTERFACE

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

102

101

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

H_A[1]

H_DQ[15]

H_DQ[14]

GND_IO1

H_DQ[13]

H_DQ[12]

H_DQ[11]

H_DQ[10]

H_DQ[9]

VCC_IO1

H_DQ[8]

H_DQ[7]

H_DQ[6]

H_DQ[5]

H_DQ[4]

H_DQ[3]

GND_IO2

H_procclock

VCC_Core1

GND_Core1

sys_clk

H_DQ[2]

H_DQ[1]

H_CSn

H_DQ[0]

H_RWn

H_WAIT

H_IRQn

aud_clk

PCM_dclk_in

PCM_wclk_in

VDDA

VSSA

biasin

Agcinp

Adcrefl

VCC_IO7

GND_IO7

PC

M_C

eLf_

in

PC

M_L

eRi_

in

PC

M_L

sRs_

in

B_F

LAG

/SE

RR

B_S

YN

C/S

ync

B_W

CLK

/SE

NB

B_D

ATA

/Be_

dat(

0)

B_B

CLK

/SD

CLK

UD

E_r

eq

Dat

a_re

q

Be_

dat(

1)

Be_

dat(

2)

Be_

dat(

3)

Be_

dat(

4)

Be_

dat(

5)

Be_

dat(

6)

Be_

dat(

7)

TR

ST

TM

S

VC

C_I

O2

TD

O

TD

I

TC

K

H_s

el[0

]

H_s

el[1

]

D_A

DD

R[3

]

D_DQ[13]

D_DQ[2]

D_DQ[12]

GND_IO5

D_DQ[3]

D_DQ[11]

D_DQ[4]

D_DQ[10]

D_DQ[9]

D_DQ[6]

VCC_IO4

D_DQ[8]

D_DQ[7]

D_LDQM

D_UDQM

D_DQ[5]

D_clk

VCC_Core2

GND_Core2

GND_IO4

D_CASn

D_RASn

D_Wen

D_ADDR[11]

D_ADDR[12]

D_ADDR[9]

VCC_IO3

D_ADDR[13]

D_ADDR[8]

D_ADDR[10]

D_ADDR[7]

D_ADDR[0]

D_ADDR[6]

GND_IO3

D_ADDR[1]

D_ADDR[5]

D_ADDR[2]

D_ADDR[4]

H_A

[2]

H_A

[3]

H_A

[4]

H_A

[5]

H_A

[6]

H_A

_sel

RE

SE

Tn

DS

D_P

CM

_11

DS

D_P

CM

_9

DS

D_P

CM

_10

VC

C_I

O6

DS

D_P

CM

_8

DS

D_P

CM

_7

DS

D_P

CM

_6

DS

D_P

CM

_5

DS

D_P

CM

_4

GN

D_I

O6

DS

D_P

CM

_3

DS

D_P

CM

_2

DS

D_P

CM

_1

DS

D_P

CM

_0

D_D

Q[1

5]

VC

C_I

O5

D_D

Q[0

]

D_D

Q[1

4]

D_D

Q[1

]

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123456789

101112131415161718192021222324252627282930313233

3435363738394041424344

454647

484950515253545556575859606162

63

H_A[1]H_DQ[15]H_DQ[14]GND_IO1H_DQ[13]H_DQ[12]H_DQ[11]H_DQ[10]H_DQ[9]VCC_IO1H_DQ[8]H_DQ[7]H_DQ[6]H_DQ[5]H_DQ[4]H_DQ[3]GND_IO2

H_procclockVCC_Core1GND_Core1

sys_clkH_DQ[2]H_DQ[1]H_CSn

H_DQ[0]H_RWnH_WAITH_IRQnaud_clk

PCM_dclk_inPCM_wclk_in

VDDA

VSSA

biasinAgcinpAdcrefl

VCC_IO7GND_IO7

PCM_CeLf_inPCM_LeRi_inPCM_LsRs_inB_FLAG/SERRB_SYNC/Sync

B_WCLK/SENB

B_DATA/Be_dat(0)B_BCLK/SDCLK

UDE_req

Data_reqBe_dat(1)Be_dat(2)Be_dat(3)Be_dat(4)Be_dat(5)Be_dat(6)Be_dat(7)

TRSTTMS

VCC_IO2TDOTDITCK

H_sel[0]

H_sel[1]

Address busData busData busGND I/O padsData busData busData busData busData busVcc_I/O padsData busData busData busData busData busData busGND I/O padsHost processor EMI interface clockCore supply voltageCore groundSystem clockData busData busHost chip select; active LOWData busRead = 1; Write = 0Wait signalInterrupt request; active LOWDSD audio clockPCM data clockPCM word clockVDD of ADCVSS of AGC and ADC;Connected to substrateBias current inputAGC positive input signal; HF inADC decouplingVCC I/O padsGND I/O padsPCM data center or LFEPCM data left or rightPCM data left or right surroundI2S-bus flag (EDC flag)Sector sync or absolute time syncI2S-bus word clock or UDE datasense from hostI2S-bus data or LSB data of parallel interfaceI2S-bus bit clockHost request data from front-end;routed via the SAA7893HLData request for UDEFront-end parallel data interfaceFront-end parallel data interfaceFront-end parallel data interfaceFront-end parallel data interfaceFront-end parallel data interfaceFront-end parallel data interfaceFront-end parallel data interfaceBoundary scan resetBoundary scan mode selectVCC I/O padsOutputBoundary scan data inputBoundary scan clockHost select signals: SAD16,MAD16 and SAD08Host select signals: SAD16,MAD16 and SAD08

INI/O10I/O10

GND_IOI/O10I/O10I/O10I/O10I/O10

VCC_IO1I/O10I/O10I/O10I/O10I/O10I/O10

GND_IOIN

VCC_coreGND_core

INI/O10I/O10

INI/O10

INO10O10INININ

VDDCOVSSCO

APIOAPIOAPIO

VCC_IOGND_IO

ININININININ

INININ

O10INININININININ

IN1IN1

VCC_IOO10IN1ININ

IN

Pin Symbol DescriptionType[1]Pin. Symbol Type[1] Description

646566676869707172737475767778798081828384858687888990919293949596979899

100101102103104105106107108109110111112113114115116117118119120121122123124125126127128

D_ADDR[3]D_ADDR[4]D_ADDR[2]D_ADDR[5]D_ADDR[1]GND_IO3

D_ADDR[6]D_ADDR[0]D_ADDR[7]

D_ADDR[10]D_ADDR[8]

D_ADDR[13]VCC_IO3

D_ADDR[9]D_ADDR[12]D_ADDR[11]

D_WenD_RASnD_CASnGND_IO4

GND_Core2VCC_Core2

D_clkD_DQ[5]D_UDQMD_LDQMD_DQ[7]D_DQ[8]VCC_IO4D_DQ[6]D_DQ[9]

D_DQ[10]D_DQ[4]

D_DQ[11]D_DQ[3]GND_IO5D_DQ[12]D_DQ[2]

D_DQ[13]D_DQ[1]

D_DQ[14]D_DQ[0]VCC_IO5D_DQ[15]

DSD_PCM_0DSD_PCM_1DSD_PCM_2DSD_PCM_3

GND_IO6DSD_PCM_4DSD_PCM_5DSD_PCM_6DSD_PCM_7DSD_PCM_8

VCC_IO6DSD_PCM_10DSD_PCM_9

DSD_PCM_11RESETnH_A_selH_A[6]H_A[5]H_A[4]H_A[3]H_A[2]

O10O10O10O10O10

GND_IOO10O10O10O10O10O10

VCC_IOO10O10O10O10O10O10

GND_IOGND_coreVCC_core

O10I/O10O10O10

I/O10I/O10

VCC_IOI/O10I/O10I/O10I/O10I/O10I/O10

GND_IOI/O10I/O10I/O10I/O10I/O10I/O10

VCC_IOI/O10O10O10O10O10

GND_IOO10O10O10O10O10

VCC_IOO10O10O10INININININININ

SDRAM address busSDRAM address busSDRAM address busSDRAM address busSDRAM address busGND I/O padsSDRAM address busSDRAM address busSDRAM address busSDRAM address busSDRAM address busSDRAM address busVcc I/O padsSDRAM address busSDRAM address busSDRAM address busRead or writeRow address select; active LOWColumn address select; active LOWGND I/O padsCore groundCore supply voltageClock signal needed for SDRAMData busDQ mask enable (upper)DQ mask enable (lower)Data busData busVcc I/O padsData busData busData busData busData busData busGND I/O padsData busData busData busData busData busData busVcc_IO padsData bus6-channel data output6-channel data output6-channel data output6-channel data outputGND I/O pads6-channel data output6-channel data output6-channel data output6-channel data output2-channel data outputVCC I/O pads2-channel data output2-channel clock or control2-channel data outputAsynchronous reset; active LOWAddress selectAddress busAddress busAddress busAddress busAddress bus

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ST72F321RTOP VIEW

Device Block Diagram

8-BIT COREALU

AD

DR

ES

S A

ND

DA

TA

BU

S

OSC1

VPPCONTROL

PROGRAM

(16K - 60K Bytes)

VDD

RESET

PORT FPF7:0

(8-bits)TIMER A

BEEP

PORT A

RAM(512 - 2048 Bytes)

PORT C

10-BIT ADC

VAREFVSSA

PORT BPB7:0(8-bits)

PWM ART

PORT EPE7:0(8-bits)

SCI

TIMER B

PA7:0(8-bits)

PORT DPD7:0(8-bits)

SPI

PC7:0(8-bits)

VSS

WATCHDOG

TLI

OSC

LVD

OSC2

MEMORY

MCC/RTC/BEEP

EVD AVD

I2CA

IN4

/ PD

4

AIN

5 / P

D5

AIN

6 / P

D6

AIN

7 / P

D7

VA

RE

F

VS

SA

VD

D_3

VS

S_3

MC

O /

AIN

8 / P

F0

BE

EP

/ (H

S)

PF

1

(HS

) P

F2

OC

MP

2_A

/ A

IN9

/ PF

3

OC

MP

1_A

/ A

IN10

/ P

F4

ICA

P2_

A /

AIN

11 /

PF

5

ICA

P1_

A /

(HS

) P

F6

EX

TC

LK_A

/ (H

S)

PF

7

(HS) PE4

(HS) PE5

(HS) PE6

(HS) PE7

PWM3 / PB0

PWM2 / PB1

PWM1 / PB2

PWM0 /PB3

ARTCLK /(HS) PB4

ARTIC1 / PB5

ARTIC2 / PB6

PB7

AIN0 / PD0

AIN1 / PD1

AIN2 / PD2

AIN3 / PD3

VSS_1

VDD_1

PA3 (HS)

PA2

PA1

PA0

PC7 / SS / AIN15

PC6 / SCK / ICCCLK

PC5 / MOSI / AIN14

PC4 / MISO / ICCDATA

PC3 (HS) / ICAP1_B

PC2 (HS) / ICAP2_B

PC1 / OCMP1_B / AIN13

PC0 / OCMP2_B / AIN12

VSS_0

VDD_0

PE

3

PE

2

PE

1 / R

DI

PE

0 / T

DO

VD

D_2

OS

C1

OS

C2

VS

S_2

TLI

EV

D

RE

SE

T

VP

P /

ICC

SE

L

PA

7 (H

S)

/ SC

LI

PA

6 (H

S)

/ SD

AI

PA

5 (H

S)

PA

4 (H

S)

ei2

ei0

ei3

ei1

IC41: ST72F321R (MAIN P.C.B.)Microprocessor

* No replacement part available.サービス部品供給なし

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Pin no.

TQ

FP

64

TQ

FP

44

Pin Name

Ty

pe

Level

Inp

ut

Ou

tpu

t

PortMain

function(afterreset) Alternate function

123456789

1011121314151617181920212223242526272829303132333435363738394041

424344454647484950515253

5455565758596061626364

----23456---789

101112--

1314--

151617-

18-

192021222324252627282930---

313233343536373839

--

40414243441---

/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O

ISSS

I/OI/OI/OI/OI/OI/OI/OI/OSS

I/OI/OI/OI/OI/OI/OI/O

I/OI/OI/OI/OI/OSS

I/OI/OI/OI/O

I

I/O

IS

I/OIS

I/OI/OI/OI/O

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

CT

HSHSHSHS

HS

HSHS

HSHS

HSHS

HS

HSHSHSHS

Input Output

flo

at

wp

u

int

ana

OD

PP

XXXXXXXXXXXXXXXXXXXX

XXXXXXXX

XXXXXXX

XXXXX

XXXX

XX

X

XXXX

XXXXXXXX

XXXXX

XXXXXXX

X

XX

XXXX

ei2

ei3

ei1

ei0

X

XXXXXXXX

X

XXX

XX

X

X

XXXXXXXXXXXXXXXXXXXX

XXXXXXXX

XXXXXXX

XXXXX

XXTT

XX

X

XXXXXXXXXXXXXXXXXXXX

XXXXXXXX

XXXXXXX

XXXXX

XX

XX

X

ei2ei2ei2

ei3ei3ei3

ei1ei1

ei0ei0ei0

RS-232C_RTSRS-232C_CTSVFD_RESETN.C.REMOTE_IN/OUTN.C.N.C.GNDGNDHDMI_DET.HDMI_INT.N.C.KEY#1KEY#2N.C.N.C.PWR_CTLA_MUTEAVMUTEINT/EXT_SELVAREF

VSSA

VDD_3

VSS_3

REMOTE/BUS_INREMOTE_OUTN.C.HDMI_RESETFL_OFF_LEDHDMI_ON_LEDHDMI_LINK_LEDN.C.VDD_0

VSS_0

N.C.N.C.N.C.N.C.DSP&DAC_INDSP&DAC_OUTICCCLK

DSP_FINTREQ.PMCLK&DMCLK_SELMREQKEY W/UMRESETVDD_1VSS_1F_REQGNDI2C_DATAI2C_CLKRS232(+12V)

RESETN.C.N.C.VSS_2

OSC2OSC1VDD_2

RS-232C_TXRS-232C_RXGNDN.C.

Port E4Port E5Port E6Port E7Port B0Port B1Port B2Port B3Port B4Port B5Port B6Port B7Port D0Port D1Port D2Port D3Port D4Port D5Port D6Port D7

Port F0Port F1Port F2Port F3Port F4Port F5Port F6Port F7

Port C0Port C1Port C2Port C3Port C4Port C5Port C6

Port C7Port A0Port A1Port A2Port A3

Port A4Port A5Port A6Port A7

Port E0Port E1Port E2Port E3

Analog reference voltage for ADCAnalog ground voltageDigital main supply voltageDigital ground voltage

Digital main supply voltageDigital ground voltage

Digital main supply voltageDigital ground voltage

Must be tied low. In flash programming mode, this pin acts asthe programming voltage input VPP. See section 12.9.2 formore details. High voltage must not be applied to ROM devices.Top priority non maskable interruptExternal voltage detectorTop level interrupt input pinDigital ground voltageResonator oscillator inverter outputExternal clock input or resonator oscillator inverter inputDigital main supply voltage

PWM output 3PWM output 2PWM output 1PWM output 0PWM-ART external clockPWM-ART input capture 1PWM-ART input capture 2

ADC analog input 0ADC analog input 1ADC analog input 2ADC analog input 3ADC analog input 4ADC analog input 5ADC analog input 6ADC analog input 7

Main clock out (fOSC/2)Beep signal output

Timer A output compare 2Timer A output compare 1Timer A input capture 2Timer A input capture 1Timer A external clock source

Timer B output compare 2Timer B output compare 1Timer B input capture 2Timer B input capture 1SPI master in/slave out dataSPI master out/slave in dataSPI serial clock

SPI slave select (active low)

I2C data1)

I2C clock1)

SCI transmit data outSCI receive data in

ADC analog input 8

ADC analog input 9ADC analog input 10ADC analog input 11

ADC analog input 12ADC analog input 13

ICC data inputADC analog input 14ICC clock output

ADC analog input 15

Page 23: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

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IC51: ADV7320KSTZ (MAIN P.C.B.)Video encoder

CLKIN_ACLKIN_B

HSYNCVSYNCBLANK

Y9–Y0C9–C0S9–S0

TIMINGGENERATOR

PLL

OVERSAMPLING

I2CINTERFACE

DEMUX

STANDARD DEFINITIONCONTROL BLOCK

COLOR CONTROLBRIGHTNESS

DNRGAMMA

PROGRAMMABLEFILTERS

SD TEST PATTERN

HIGH DEFINITIONCONTROL BLOCK

HD TEST PATTERN

COLOR CONTROLADAPTIVE FILTER CTRL

SHARPNESS FILTER

PROGRAMMABLERGB MATRIX

12-BITDAC

12-BITDAC

12-BITDAC

12-BITDAC

12-BITDAC

12-BITDAC

ADV7320/ADV7321

0506

7-00

1

Simplified Functional Block Diagram

CLKIN_A

P_HSYNCP_VSYNCP_BLANK

S_HSYNCS_VSYNCS_BLANK

CLKIN_B

HD PIXELINPUT

SD PIXELINPUT

LUMAAND

CHROMAFILTERSY

CB

CR TESTPATTERN

DNRGAMMA

SYNCINSERTION

PS 8 uHDTV 2u

RGBMATRIX

SD 16 u

2 uOVER-SAMPLING

DAC

DAC

DAC

DAC

DAC

DACFSC

MODU-LATION

CGMSWSS

COLORCONTROL

DE-INTER-LEAVE

Y

CB

CRDE-

INTER-LEAVE

TESTPATTERN

Y COLORCR COLORCB COLOR

TIMINGGENERATOR

TIMINGGENERATOR

CLOCKCONTROLAND PLL

4:2:2TO

4:4:4

SHARPNESSAND

ADAPTIVEFILTER

CONTROL

0506

7-00

2

UV SSAFV

U

Detailed Functional Block Diagram

VDD_IO

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

VDD

DGND

Y8

Y9

C0

C1

C2

C3

C4

I2 C

ALS

B

SD

A

SC

LK

P_H

SY

NC

P_V

SY

NC

P_B

LAN

K

C5

C6

C7

C8

C9

RT

C_S

CR

_TR

CLK

IN_A

S_BLANK

RSET1

VREF

COMP1

DAC A

DAC B

DAC C

VAA

AGND

DAC D

DAC E

DAC F

COMP2

RSET2

EXT_LF

RESET

GN

D_I

O

CLK

IN_B

S9

S8

S7

S6

S5

DG

ND

VD

D

S4

S3

S2

S1

S0

S_H

SY

NC

S_V

SY

NC

ADV7320/ADV7321TOP VIEW

(Not to Scale)

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1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

VDD_IO

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

VDD

DGND

Y8

Y9

C0

C1

C2

C3

C4

XSPI/I2C

ALSB_SO

SDA_CLKSP

SCLK_SI

XP_HSYNC

XP_VSYNC

P_BLANK

C5

C6

C7

C8

C9

RTC_SCR_TR

CLKIN_A

RESET

EXT_LF

Power supply for digital inputs and outputs.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

Digital power supply.

Digital ground.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on Pin C0. For 8-bit data input, LSB is set up on C2.

Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

This input pin must be tied high (VDD_IO) for the ADV7320/ADV7321 to interface over the I2C port.

TTL Address Input. This signal sets up the LSB of the I2C address. When this pin is tied low, the

I2C filter is activated, which reduces noise on the I2C interface.

I2C port serial data input/output.

I2C port serial interface clock input.

Video horizontal SYNC control signal for HD in simultaneous SD/HD mode and HD only mode.

Video vertical SYNC control signal for HD in simultaneous SD/HD mode and HD only mode.

Video blanking control signal for HD in simultaneous SD/HD mode and HD only mode.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Progressive scan/HDTV input port 4:4:4 input mode. This port is used for the Cb [Blue/U] data.

The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.

Multifunctional input. Real-time control (RTC) input, timing reset input, subcarrier reset input.

Pixel clock input for HD (74. 25 MHz only, PS only (27 MHz), SD only (27 MHz)).

This input resets the on-chip timing generator and sets the ADV7320/ADV7321 into default

register setting. RESET is an active low signal.

External loop filter for the internal PLL.

P

I

I

I

I

I

I

I

I

P

G

I

I

I

I

I

I

I

I

I

I/O

I

I

I

I

I

I

I

I

I

I

I

I

I

Pin No Mnemonic Input/Output Description

Page 25: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

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Pin No Mnemonic Input/Output Description

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

RSET2

COMP2

DAC_F

DAC_E

DAC_D

AGND

VAA

DAC_C

DAC_B

DAC_A

COMP1

VREF

RSET1

XS_BLANK

XS_VSYNC

XS_HSYNC

S0

S1

S2

S3

S4

VDD

DGND

S5

S6

S7

S8

S9

CLKIN_B

GND_IO

I

O

O

O

O

G

P

O

O

O

O

I/O

I

I/O

I/O

I/O

I

I

I

I

I

P

G

I

I

I

I

I

I

A 3040 ohm resistor must be connected from this pin to AGND and is used to control the

amplitudes of the DAC outputs.

Compensation pin for DACs. Connect 0. 1 uF capacitor from COMP pin to VAA.

In SD only mode: Chroma/Red/V analog output; in HD only mode and simultaneous HD/SD.

Mode: Pb/Blue [HD] analog output.

In SD only mode: Luma/Blue/U analog output; in HD only mode and simultaneous HD/SD.

Mode: Pr/Red analog output

In SD only mode: CVBS/Green/Y analog output; in HD only mode and simultaneous HD/SD.

Mode: Y/Green [HD] analog output.

Analog ground.

Analog power supply.

Luma/Red/V/Pr analog output.

Chroma/Blue/U/Pb analog output.

CVBS/Green/Y/Y analog output.

Compensation pin for DACs. Connect 0. 1 uF capacitor from COMP pin to VAA.

Optional external voltage reference input for DACs or voltage reference output (1.235 V).

A 3040 ohm resistor must be connected from this pin to AGND and is used to control the

amplitudes of the DAC outputs.

Video blanking control signal for SD only.

Video vertical SYNC control signal for SD only.

Video horizontal SYNC control signal for SD only.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

Digital power supply.

Digital ground.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

SD or progressive scan/HDTV input port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on

pin S0. For 8-bit data input, LSB is set up on S2.

Pixel clock input. Requires a 27 MHz reference clock for progressive scan mode or a 74.25 MHz

(74.1758 MHz) reference clock in HDTV mode. This clock is only used in dual modes.

Digital input/output ground.

Page 26: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

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1

208

156

157

105

104

52

53

NOTES:

2) For 16/20 bit Y and muxed C output modes see Appendix 2 for pin configuration1) *-The connection of these pins depends on the type of external SDRAM used. See Appendix 3

HSYNC1_PORT1VSYNC1_PORT1

FIELD ID1_PORT1IN_CLK1_PORT1HSYNC2_PORT1VSYNC2_PORT1

FIELD ID2_PORT1VDD1

VSSIN_CLK2_PORT1

B/Cb/D1_0

B/Cb/D1_1B/Cb/D1_2

B/Cb/D1_3B/Cb/D1_4VDDcore1

VSScoreB/Cb/D1_5

B/Cb/D1_6B/Cb/D1_7

R/Cr/Cb Cr_0R/Cr/Cb Cr_1

R/Cr/Cb Cr_2R/Cr/Cb Cr_3R/Cr/Cb Cr_4R/Cr/Cb Cr_5R/Cr/Cb Cr_6

R/Cr/Cb Cr_7G/Y/Y_0

VDD2VSS

G/Y/Y_1G/Y/Y_2G/Y/Y_3

G/Y/Y_4

VDDcore2VSScoreG/Y/Y_5G/Y/Y_6

G/Y/Y_7IN_SEL

TESTDEV_ADDR1DEV_ADDR0

SCLK

SDATARESET_N

VDD3VSS

SDRAM DATA(0)SDRAM DATA(1)SDRAM DATA(2)

SD

RA

M D

ATA

(3)

SD

RA

M D

ATA

(4)

SD

RA

M D

ATA

(5)

SD

RA

M D

ATA

(6)

SD

RA

M D

ATA

(7)

SD

RA

M D

ATA

(8)

SD

RA

M D

ATA

(9)

SD

RA

M D

ATA

(10)

SD

RA

M D

ATA

(11)

VD

D4

VS

SS

DR

AM

DAT

A(1

2)S

DR

AM

DAT

A(1

3)S

DR

AM

DAT

A(1

4)S

DR

AM

DAT

A(1

5)V

DD

core

3V

SS

core

SD

RA

M D

ATA

(16)

SD

RA

M D

ATA

(17)

SD

RA

M D

ATA

(18)

SD

RA

M D

ATA

(19)

SD

RA

M D

ATA

(20)

SD

RA

M D

ATA

(21)

SD

RA

M D

ATA

(22)

SD

RA

M D

ATA

(23)

SD

RA

M D

ATA

(24)

SD

RA

M D

ATA

(25)

VD

Dco

re4

VS

Sco

reS

DR

AM

DAT

A(2

6)S

DR

AM

DAT

A(2

7)S

DR

AM

DAT

A(2

8)S

DR

AM

DAT

A(2

9)S

DR

AM

DAT

A(3

0)S

DR

AM

DAT

A(3

1)V

DD

5V

SS

TE

ST

INS

DR

AM

AD

DR

(10)

SD

RA

M A

DD

R(9

)S

DR

AM

AD

DR

(8)

SD

RA

M A

DD

R(7

)S

DR

AM

AD

DR

(6)

VD

Dco

re5

VS

Sco

rS

DR

AM

AD

DR

(5)

SD

RA

M A

DD

R(4

)S

DR

AM

AD

DR

(3)

SD

RA

M A

DD

R(2

)S

DR

AM

AD

DR

(1)

SD

RA

M A

DD

R(0

)S

DR

AM

WE

N

SDRAM RASN

SDRAM CASNSDRAM BA1SDRAM BA0SDRAM CSNSDRAM DQMSDRAM CLKOUTVDD6VSSSDRAM CLKINTEST3TEST OUT0TEST OUT1CTLOUT0CTLOUT1CTLOUT2CTLOUT3CTLOUT4

VDDcore6VSScoreCLKOUT

B/U/Pb_OUT_0B/U/Pb_OUT_1VDD7VSSB/U/Pb_OUT_2B/U/Pb_OUT_3

B/U/Pb_OUT_4B/U/Pb_OUT_5B/U/Pb_OUT_6

B/U/Pb_OUT_7B/U/Pr_OUT_0B/U/Pr_OUT_1

VDDcore7VSScoreR/V/Pr_OUT_2

R/V/Pr_OUT_3R/V/Pr_OUT_4R/V/Pr_OUT_5R/V/Pr_OUT_6

R/V/Pr_OUT_7

VDD8VSSG/Y/Y_OUT_0G/Y/Y_OUT_1G/Y/Y_OUT_2G/Y/Y_OUT_3

G/Y/Y_OUT_4G/Y/Y_OUT_5G/Y/Y_OUT_6G/Y/Y_OUT_7OE

PLL

_PV

DD

PLL

_PV

SS

AV

SS

_PLL

_BE

1A

DD

_PLL

_BE

1A

VD

D_P

LL_B

E2

AV

SS

_PLL

_BE

2A

VS

S_P

LL_S

DI

AV

DD

_PLL

_SD

IA

VD

D_P

LL_F

EA

VS

S_P

LL_F

E

R_V

SS

R_V

DD

1.8

R_V

SS

Res

erve

dR

_VD

DR

_VS

SR

eser

ved

R_V

DD

R_V

SS

Res

erve

d

Res

erve

dR

eser

ved

Res

erve

d

R_V

DD

R_V

DD

R_V

DD

TE

ST

0T

ES

T1

TE

ST

2

XTA

L IN

XTA

L O

UT

VD

D9

VS

SIN

_CLK

_PO

RT

2

D1_

IN_0

VD

Dco

re8

VS

Sco

re

D1_

IN_1

D1_

IN_2

D1_

IN_3

D1_

IN_4

D1_

IN_5

D1_

IN_6

D1_

IN_7

FIE

LD ID

_PO

RT

2V

SY

NC

_PO

RT

2H

SY

NC

_PO

RT

2

R_V

DD

R_V

SS

R_V

SS

R_V

SS

R_V

SS

IC61: FLI2310LFCF (MAIN P.C.B.)Digital video converter

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2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

HSYNC1_PORT1

VSYNC1_PORT1

FIELD ID1_PORT1

IN_CLK1_PORT1

HSYNC2_PORT1

VSYNC2_PORT1

FIELD ID2_PORT1

VDD1

VSS

IN_CLK2_PORT1

B/Cb/D1_0

B/Cb/D1_1

B/Cb/D1_2

B/Cb/D1_3

B/Cb/D1_4

VDDcore1

VSScore

B/Cb/D1_5

B/Cb/D1_6

B/Cb/D1_7

R/Cr/Cb Cr_0

R/Cr/Cb Cr_1

R/Cr/Cb Cr_2

R/Cr/Cb Cr_3

R/Cr/Cb Cr_4

R/Cr/Cb Cr_5

R/Cr/Cb Cr_6

R/Cr/Cb Cr_7

G/Y/Y_0

VDD2

VSS

G/Y/Y_1

G/Y/Y_2

G/Y/Y_3

G/Y/Y_4

VDDcore2

VSScore

G/Y/Y_5

G/Y/Y_6

G/Y/Y_7

IN_SEL

TEST

DEV_ADDR1

DEV_ADDR0

SCLK

SDATA

RESET_N

VDD3

VSS

SDRAM DATA(0)

SDRAM DATA(1)

SDRAM DATA(2)

SDRAM DATA(3)

SDRAM DATA(4)

SDRAM DATA(5)

SDRAM DATA(6)

SDRAM DATA(7)

SDRAM DATA(8)

SDRAM DATA(9)

SDRAM DATA(10)

Input

Input

Input

Input

Input

Input

Input

Power

Ground

Input

Input

Input

Input

Input

Input

Power

Ground

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Power

Ground

Input

Input

Input

Input

Power

Ground

Input

Input

Input

Output

Input

Input

Input

I/O

I/O

Input

Power

Ground

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Horizontal sync or reference - CTl1 of Port 1

Vertical sync or reference - CTL1 of Port 1

Odd/Even field identification - CTL1 of Port 1

Data clock input - CTL1 of Port 1

Horizontal sync or reference - CTl2 of Port 1

Vertical sync or reference - CTL2 of Port 1

Odd/Even field identification - CTL2 of Port 1

3.3 V - Power pin for IO

Ground

Data clock input - CTL2 of Port 1

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

1.8 V - Power pin for core

Ground

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Blue/Cb/D1)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Red/Cr/CrCb)

Port 1 - Digital video input (Green/Y)

3.3 V - Power pin for IO

Ground

Port 1 - Digital video input (Green/Y)

Port 1 - Digital video input (Green/Y)

Port 1 - Digital video input (Green/Y)

Port 1 - Digital video input (Green/Y)

1.8 V - Power pin for core

Ground

Port 1 - Digital video input (Green/Y)

Port 1 - Digital video input (Green/Y)

Port 1 - Digital video input (Green/Y)

Output to select external video mux

Connect to ground

Device address setting 1

Device address setting 0

2-wire serial control bus clock

2-wire serial control bus data

Reset

3.3 V - Power pin for IO

Ground

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

Pin Name DescriptionNo.InternalPull-up/

Pull-down

Voltage

ToleranceDriveI/O Type

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

8mA

8mA

8mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

PU

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

Page 28: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

DVD-S1700

28

DV

D-S

1700

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

SDRAM DATA(11)

VDD4

VSS

SDRAM DATA(12)

SDRAM DATA(13)

SDRAM DATA(14)

SDRAM DATA(15)

VDDcore3

VSScore

SDRAM DATA(16)

SDRAM DATA(17)

SDRAM DATA(18)

SDRAM DATA(19)

SDRAM DATA(20)

SDRAM DATA(21)

SDRAM DATA(22)

SDRAM DATA(23)

SDRAM DATA(24)

SDRAM DATA(25)

VDDcore4

VSScore

SDRAM DATA(26)

SDRAM DATA(27)

SDRAM DATA(28)

SDRAM DATA(29)

SDRAM DATA(30)

SDRAM DATA(31)

VDD5

VSS

TEST IN

SDRAM ADDR(10)

SDRAM ADDR(9)

SDRAM ADDR(8)

SDRAM ADDR(7)

SDRAM ADDR(6)

VDDcore5

VSScor

SDRAM ADDR(5)

SDRAM ADDR(4)

SDRAM ADDR(3)

SDRAM ADDR(2)

SDRAM ADDR(1)

SDRAM ADDR(0)

SDRAM WEN

SDRAM RASN

SDRAM CASN

SDRAM BA1

SDRAM BA0

SDRAM CSN

SDRAM DQM

SDRAM CLKOUT

VDD6

VSS

SDRAM CLKIN

TEST3

TEST OUT0

TEST OUT1

CTLOUT0

CTLOUT1

Tristate I/O

Power

Ground

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Power

Ground

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Power

Ground

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Tristate I/O

Power

Ground

Input

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Power

Ground

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Output

Power

Ground

Input

Input

Output

Output

Tristate O/P

Tristate O/P

SDRAM data bus *

3.3 V - Power pin for IO

Ground

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

1.8 V - Power pin for core

Ground

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

1.8 V - Power pin for core

Ground

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

SDRAM data bus *

3.3 V - Power pin for IO

Ground

Test input - Connect to ground

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

1.8 V - Power pin for core

Ground

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM address bus *

SDRAM write enable *

SDRAM row address select *

SDRAM column address select *

SDRAM bank select 1 *

SDRAM bank select 0 *

SDRAM CS *

SDRAM DQM *

Clock out to SDRAM *

3.3 V - Power pin for IO

Ground

Trace delayed SDRAM clock in

Test input -Connect to ground

Test output - Leave open

Test output - Leave open

Control signal output selectable as HSync1/

CSync/HRef/Monitor coast

Control signal output selectable as

DescriptionPin NameNo.InternalPull-up/

Pull-down

Voltage

ToleranceDriveI/O Type

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

4mA

8mA

12mA

12mA

8mA

8mA

8mA

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

Page 29: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

DVD-S1700

29

DV

D-S

1700

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

CTLOUT2

CTLOUT3

CTLOUT4

VDDcore6

VSScore

CLKOUT

B/U/Pb_OUT_0

B/U/Pb_OUT_1

VDD7

VSS

B/U/Pb_OUT_2

B/U/Pb_OUT_3

B/U/Pb_OUT_4

B/U/Pb_OUT_5

B/U/Pb_OUT_6

B/U/Pb_OUT_7

B/U/Pr_OUT_0

B/U/Pr_OUT_1

VDDcore7

VSScore

R/V/Pr_OUT_2

R/V/Pr_OUT_3

R/V/Pr_OUT_4

R/V/Pr_OUT_5

R/V/Pr_OUT_6

R/V/Pr_OUT_7

VDD8

VSS

G/Y/Y_OUT_0

G/Y/Y_OUT_1

G/Y/Y_OUT_2

G/Y/Y_OUT_3

G/Y/Y_OUT_4

G/Y/Y_OUT_5

G/Y/Y_OUT_6

G/Y/Y_OUT_7

OE

PLL_PVDD

PLL_PVSS

AVSS_PLL_BE1

AVDD_PLL_BE1

AVDD_PLL_BE2

AVSS_PLL_BE2

AVSS_PLL_SDI

AVDD_PLL_SDI

AVDD_PLL_FE

AVSS_PLL_FE

R_VSS

R_VDD1.8

R_VSS

Reserved

R_VDD

R_VSS

Reserved

R_VDD

R_VSS

Tristate O/P

Tristate O/P

Tristate O/P

Power

Ground

Tristate O/P

Tristate O/P

Tristate O/P

Power

Ground

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Power

Ground

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Power

Ground

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Tristate O/P

Input

Power

Ground

Ground

Power

Power

Ground

Ground

Power

Power

Ground

Ground

Power

Ground

-

Power

Ground

-

Power

Ground

VSync1/CRef/VRef/Film indicator

Control signal output selectable as monitor

Coast/HRef/VDD_en/HSync2

Control signal output selectable as film

Indicator/VRef/Backlight_en/VSync2

Control signal output selectable as CRef/Field

ID/CSync/Monitor coast

1.8 V - Power pin for core

Ground

Output data rate clock

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

3.3 V - Power pin for IO

Ground

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

Digital video output - Blue/U/Pb

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

1.8 V - Power pin for core

Ground

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

Digital video output - Red/V/Pr

3.3 V - Power pin for IO

Ground

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Digital video output - Green/Y

Output data enable for digital video output

1.8 V - Power pin for PLL pads

Ground for PLL pads

PLL ground

1.8 V - Power pin for PLL

1.9 V - Power pin for PLL

PLL ground

PLL ground

1.8 V - Power pin for PLL

1.9 V - Power pin for PLL

PLL ground

Ground

1.8 V

Ground

Leave open

3.3 V

Ground

Leave open

3.3 V

Ground

Pin Name DescriptionNo.InternalPull-up/

Pull-down

Voltage

ToleranceDriveI/O Type

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

8mA

8mA

8mA

12mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

8mA

Page 30: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

DVD-S1700

30

DV

D-S

1700

Reserved

R_VDD

R_VSS

Reserved

Reserved

Reserved

R_VSS

R_VDD

R_VSS

R_VSS

R_VDD

R_VDD

TEST0

TEST1

TEST2

XTAL IN

XTAL OUT

VDD9

VSS

IN_CLK_PORT2

D1_IN_0

VDDcore8

VSScore

D1_IN_1

D1_IN_2

D1_IN_3

D1_IN_4

D1_IN_5

D1_IN_6

D1_IN_7

FIELD ID_PORT2

VSYNC_PORT2

HSYNC_PORT2

-

Power

Ground

-

-

-

Ground

Power

Ground

Ground

Power

Power

Input

Input

Input

Input

Output

Power

Ground

Input

Input

Power

Ground

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

205

206

207

208

Leave open

3.3 V

Ground

Leave open

Leave open

Leave open

Ground

3.3 V

Ground

Ground

3.3 V

3.3 V

Test pin - Connect to ground

Test pin - Connect to ground

Test pin - Connect to ground

External parallel crystal oscillator

External parallel crystal oscillator

3.3 V - Power pin for IO

Ground

Port2 - Data clock input

Port2 - ITU-R BT656 digital data input

1.8 V - Power pin for core

Ground

Port2 - ITU-R BT656 digital data input

Port2 - ITU-R BT657 digital data input

Port2 - ITU-R BT658 digital data input

Port2 - ITU-R BT659 digital data input

Port2 - ITU-R BT660 digital data input

Port2 - ITU-R BT661 digital data input

Port2 - ITU-R BT662 digital data input

Port2 - Odd/Even field identification

Port2 - Vertical sync or reference

Port2 - Horizontal sync or reference

DescriptionPin NameNo.InternalPull-up/

Pull-down

Voltage

ToleranceDriveI/O Type

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

5v

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

4mA

Page 31: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

A B C D E F G H I J

1

2

3

4

5

6

7

DVD-S1700

31

• See page 37-41 → SCHEMATIC DIAGRAM

• See page 42 → SCHEMATIC DIAGRAM

• See page 40 →

SCHEMATIC DIAGRAM

• See page 40 → SCHEMATIC DIAGRAM

DVD MECHANISM UNIT

MICROPROCESSOR

POWER SUPPLY UNIT

MAIN (1)

AC IN

CN95

11

3,4 1,2

U, A, G models

U, T, K, A, G, L models

J model

G model

JK51

JK91

IC82

IC83

IC81

IC78

IC86

SN74LVC157

IC21

1,2 4 1 2

IC27

IC16

IC20

1,2

110118

4

29

115

3

5

IC84

IC85

JK83

COAXIAL

CENTERSUBWOOFER

FRONT L/R

MIXED 2CHL/R

OPTICAL

VIDEO

S-VIDEO

HDMI

IC31

IC18X101 IC14

IC11

IC62

IC61

IC91

IC96

IC87SWITCH

191,192

X601

IC51

IC52

IC53

U model

IC54

I2C Controller

SCALER

IC12

IC13

X401 IC43

IC41

IC44S401-405,408

F401

IC55

IC17

IC57 JK55

• ±12V• D+8V• M+5.6V• M+5V• D+5V

• U+5V• VF±• VP (-28V)

RE

MO

TE

CO

NT

RO

LV

IDE

O O

UT

AU

DIO

OU

T

AV(SCART)

SURROUND L/R

MAIN (4)

MAIN (2) and MAIN (3)

� BLOCK DIAGRAM

Page 32: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

2

A B C D E F G H I J

1

3

4

5

7

DVD-S1700

6

32

POWER SUPPLYUNIT

DVD MECHANISM UNIT

MAIN (3) MAIN (2)

MAIN (1)MAIN (4)G model

G model

U model

� WIRING DIAGRAM

Page 33: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

A B C D E F G H I J

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2

3

4

5

6

7

DVD-S1700

33

MAIN (1) P.C.B.(Top view)

MAIN (4)(CY91)

G model

J model

U model

U, T, K, A, G, L modelsVIDEO OUT

D1/D2 HDMIVIDEO / S VIDEOCOMPONENT

POWER SUPPLY UNIT

DVD MECHANISM UNIT

DVD MECHANISM UNIT

MAIN (2)(CY41)

U, A, G modelsREMOTE CONTROL AUDIO OUTDIGITAL

RS-232CIN / OUT

COAXIAL /OPTICAL

COAXIAL /OPTICAL

MIXEDL / R

SURROUNDL / R

FRONTL / R

CENTER /SUBWOOFER

MIXEDL / R

SURROUNDL / R

FRONTL / R

CENTER /SUBWOOFER

ON/OFF

� PRINTED CIRCUIT BOARDS When any part not included in the replacement parts list has failed, replace the P.C.B..パーツリストに記載されている部品以外は供給できません。部品交換が必要な場合はP.C.B.を交換してください。

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A B C D E F G H I J

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3

4

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MAIN (1) P.C.B.(Bottom view)

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A B C D E F G H I J

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35

MAIN (2) P.C.B. (Bottom view)

MAIN (3) P.C.B. (Top view) MAIN (3) P.C.B. (Bottom view) MAIN (4) P.C.B. (Top view)G model G model

MAIN (4) P.C.B. (Bottom view)

MAIN (2) P.C.B. (Top view)

MAIN (1)(CX41)

AV (SCART)

STANDBY/ON

MAIN (1)(CX91)

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2

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6

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MAIN (1)(BN42)

AC IN

POWER SUPPLY UNIT (Top view)

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A B C D E F G H I J

1

2

3

4

5

6

7

DVD-S1700

37

To D

VD

Mec

hani

sm U

nit

MAIN (1)

� SCHEMATIC DIAGRAMSMAIN 1/5

When any part not included in the replacement parts list has failed, replace the P.C.B..パーツリストに記載されている部品以外は供給できません。部品交換が必要な場合はP.C.B.を交換してください。

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4

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DVD-S1700

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38

MAIN (1)MAIN 2/5

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A B C D E F G H I J

1

2

3

4

5

6

7

DVD-S1700

39

U, A, G models

OPTICAL

SURROUND L/R

CENTER

SUBWOOFER

FRONT L/R

ON/OFF

RS-232C

MIXED 2CH L/R

COAXIAL

RE

MO

TE

CO

NT

RO

LD

IGIT

AL

AU

DIO

OU

T

MAIN (1)MAIN 3/5

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2

A B C D E F G H I J

1

3

4

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7

DVD-S1700

6

40

U, T, K, A, G, L models

U model

J model

G model

RE

MO

TE

CO

NT

RO

LV

IDE

O O

UT

COMPONENT

D1/D2

VIDEO

S-VIDEO

AV (SCART)

OUTIN

to P

OW

ER

SU

PP

LY U

NIT

_CN

95

Pag

e 42

STANDBY/ON

MICROPROCESSOR

I3

MAIN (2)

MAIN (3)

MAIN (1)

MAIN (4)

U modelT, K, A,

G, L, J models

U modelT, K, A, G,L, J models

U modelT, K, A, G,L, J models

U modelT, K, A, G,L, J models

MAIN 4/5

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A B C D E F G H I J

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41

HDMI

MICROPROCESSOR

MAIN (1)MAIN 5/5

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AC IN

to M

AIN

(1)

_BN

42

Pag

e 40

B5

POWER SUPPLY UNIT

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43

DVD-S1700

� REPLACEMENT PARTS LIST

ABBREVIATIONS IN THIS LIST ARE AS FOLLOWS:

C.A.EL.CHP : CHIP ALUMI.ELECTROLYTIC CAPC.CE : CERAMIC CAPC.CE.ARRAY : CERAMIC CAP ARRAYC.CE.CHP : CHIP CERAMIC CAPC.CE.ML : MULTILAYER CERAMIC CAPC.CE.M.CHP : CHIP MULTILAYER CERAMIC CAPC.CE.SAFTY : RECOGNIZED CERAMIC CAPC.CE.TUBLR : CERAMIC TUBULAR CAPC.CE.SMI : SEMI CONDUCTIVE CERAMIC CAPC.EL : ELECTROLYTIC CAPC.MICA : MICA CAPC.ML.FLM : MULTILAYER FILM CAPC.MP : METALLIZED PAPER CAPC.MYLAR : MYLAR FILM CAPC.MYLAR.ML : MULTILAYER MYLAR FILM CAPC.PAPER : PAPER CAPACITORC.PLS : POLYSTYRENE FILM CAPC.POL : POLYESTER FILM CAPC.POLY : POLYETHYLENE FILM CAPC.PP : POLYPROPYLENE FILM CAPC.TNTL : TANTALUM CAPC.TNTL.CHP : CHIP TANTALUM CAPC.TRIM : TRIMMER CAPCN : CONNECTORCN.BS.PIN : CONNECTOR,BASE PINCN.CANNON : CONNECTOR,CANNONCN.DIN : CONNECTOR,DINCN.FLAT : CONNECTOR,FLAT CABLECN.POST : CONNECTOR,BASE POSTCOIL.MX.AM : COIL,AM MIXCOIL.AT.FM : COIL,FM ANTENNACOIL.DT.FM : COIL,FM DETECTCOIL.MX.FM : COIL,FM MIXCOIL,OUTPT : OUTPUT COILDIOD.ARRAY : DIODE ARRAYDIODE.BRG : DIODE BRIDGEDIODE.CHP : CHIP DIODEDIODE.VAR : VARACTOR DIODEDIOD.Z.CHP : CHIP ZENER DIODEDIODE.ZENR : ZENER DIODEDSCR.CE : CERAMIC DISCRIMINATORFER.BEAD : FERRITE BEADSFER.CORE : FERRITE COREFET.CHP : CHIP FETFL.DSPLY : FLUORESCENT DISPLAYFLTR.CE : CERAMIC FILTERFLTR.COMB : COMB FILTER MODULEFLTR.LC.RF : LC FILTER,EMIGND.MTL : GROUND PLATEGND.TERM : GROUND TERMINALHOLDER.FUS : FUSE HOLDERIC.PRTCT : IC PROTECTORJUMPER.CN : JUMPER CONNECTORJUMPER.TST : JUMPER,TEST POINTL.DTCT : LIGHT DETECTING MODULE

L.EMIT : LIGHT EMITTING MODULELED.DSPLY : LED DISPLAYLED.INFRD : LED,INFRAREDMODUL.RF : MODULATOR,RFPHOT.CPL : PHOTO COUPLERPHOT.INTR : PHOTO INTERRUPTERPHOT.RFLCT : PHOTO REFLECTORPIN.TEST : PIN,TEST POINTPLST.RIVET : PLASTIC RIVETR.ARRAY : RESISTOR ARRAYR.CAR. : CARBON RESISTORR.CAR.CHP : CHIP RESISTORR.CAR.FP : FLAME PROOF CARBON RESISTORR.FUS : FUSABLE RESISTORR.MTL.CHP : CHIP METAL FILM RESISTORR.MTL.FLM : METAL FILM RESISTORR.MTL.OXD : METAL OXIDE FILM RESISTORR.MTL.PLAT : METAL PLATE RESISTORRSNR.CE : CERAMIC RESONATORRSNR.CRYS : CRYSTAL RESONATORR.TW.CEM : TWIN CEMENT FIXED RESISTORR.CEMENT : CEMENT RESISTORSCR.BND.HD : BIND HEAD B-TIGHT SCREWSCR.BW.HD : BW HEAD TAPPING SCREWSCR.CUP : CUP TIGHT SCREWSCR.TERM : SCREW TERMINALSCR.TR : SCREW,TRANSISTORSUPRT.PCB : SUPPORT,P.C.B.SURG.PRTCT : SURGE PROTECTORSW.TACT : TACT SWITCHSW.LEAF : LEAF SWITCHSW.LEVER : LEVER SWITCHSW.MICRO : MICRO SWITCHSW.PUSH : PUSH SWITCHSW.RT.ENC : ROTARY ENCODERSW.RT.MTR : ROTARY SWITCH WITH MOTORSW.RT : ROTARY SWITCHSW.SLIDE : SLIDE SWITCHTERM.SP : SPEAKER TERMINALTERM.WRAP : WRAPPING TERMINALTHRMST.CHP : CHIP THERMISTORTR.CHP : CHIP TRANSISTORTR.DGT : DIGITAL TRANSISTORTR.DGT.CHP : CHIP DIGITAL TRANSISTORTRANS : TRANSFORMERTRANS.PULS : PULSE TRANSFORMERTRANS.PWR : POWER TRANSFORMER ASS’YTUNER.AM : TUNER PACK,AMTUNER.FM : TUNER PACK,FMTUNER.PK : FRONT-ENDTUNER PACKVR : ROTARY POTENTIOMETERVR.MTR : POTENTIOMETER WITH MOTORVR.SW : POTENTIOMETER WITH ROTARY SWVR.SLIDE : SLIDE POTENTIOMETERVR.TRIM : TRIMMER POTENTIOMETER

• ELECTRICAL COMPONENT PARTSWARNING� Components having special characteristics are marked s and must be replaced with parts having specifications

equal to those originally installed.

● s印のある部分は、安全確保部品を示しています。部品の交換が必要な場合、パーツリストに記載されている部品を使用してください。● 部品価格ランクは、予告なく変更することがあります。

Ref No. Part No. Description Remarks Markets 部 品 名 ランク

P.C.B. MAIN

✻ New Parts * 新規部品

* AAX80130 P.C.B. MAIN COP11898E J PCB メイン* AAX80110 P.C.B. MAIN COP11898C UA PCB メイン* AAX80120 P.C.B. MAIN COP11898D TKL PCB メイン* AAX80100 P.C.B. MAIN COP11898B G PCB メイン* F401 AAX80850 FIP DSPLY HCA14SM16 CFLHCA14SM16 FIP表示器* IC11 AAX80840 IC ZR36778 HVIZR36778 IC* IC13 AAX80810 IC M12L64164A7T HVIM12L64164A7T IC* IC17 AAX80830 IC ZR36707 HVIZR36707 IC* IC18 AAX80780 IC AM5888SLF HVIAM5888SLF IC* IC20 AAX80820 IC SAA7893HLC2 HVISAA7893HLC2 IC* IC21 AAX80810 IC M12L64164A7T HVIM12L64164A7T IC* IC51 AAX80760 IC ADV7320KSTZ CVIADV7320KSTZ IC* IC52 AAX80740 IC BH7862FS BVIBH7862FS IC* IC53 AAX80790 IC BA7660FS HVIBA7660FS G IC* IC61 AAX80770 IC FLI2310LFCF CVIFLI2310LFCF IC* IC62 AAX80750 IC 57V643220TP6 CVI57V643220TP6 IC* IC81 AAX80800 IC CS4382-KQ HVICS4382-KQ IC* JK31 AAX80150 CN.RS232C D-SUB 9P CJJ9V001Z UAG RS232Cコネクター* JK45 AAX80350 CN.SCART SCART CJJ6K003Z G SCARTコネクター* JK51 AAX80370 PIN JACK S-VIDEO/VIDEO CJJ9N006Z ピンジャック* JK52 AAX80440 PIN JACK 3P COMPONENT CJJ4S014Z UTKAGL ピンジャック* JK53 AAX80050 CN.D2 D2 CJJ9U001ZJ J D2コネクター* JK55 AAX80330 JACK 2P REMOTE IN/OUT HJJ1D002Z ジャック* JK81 AAX80320 PIN JACK 4P L/R CJJ4P019Y ピンジャック* JK82 AAX80450 PIN JACK 4P C/SW/SUR. CJJ4P061Z ピンジャック* JK83 AAX80360 JACK OPTICAL/COAXIAL CJS9U011Z ジャック* JK91 AAX80340 CN.HDMI HDMI HJJ9H003Z HDMIコネクター

S401-405 AAX74630 SW. TACT SKHV10910G CST1A012ZT タクトスイッチ 01S408 AAX74630 SW. TACT SKHV10910G CST1A012ZT タクトスイッチ 01

* SW31 AAX80380 SW. SLIDE REMOTE ON/OFF KSS2B016Z UAG スライドスイッチ

Note) When any part not included in the replacement parts list has failed, replace the P.C.B..注) パーツリストに記載されている部品以外は供給できません。部品交換が必要な場合はP.C.B.を交換してください。

Page 44: DVD AUDIO/VIDEO SA-CD PLAYER DVD-S1700 · 2009-10-18 · DVD-S1700 3 DVD-S1700 Laser Emitting conditions: 1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the

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17

17-1

G model J model42 43

8 (4)22

19

40

41

19

8 (1)

U, A, G models

K model

* K model

1

20

2

3 4

6

5 (1)

5 (2)

31

32

33

33

21

7

8 (3)

8 (2)

35

3610

9

10

9

12

34

34

34

3439

18

19

23

13

14

3737 38

38

8 (1)

40

41 U, A, G models

40

24

200

202

203

203202

204

205

32

* Note) The replacement battery cover is not available. 注) リモコンの電池蓋はサービス部品として供給できません。��

• OVERALL ASS’Y

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45

DVD-S1700

ACCESSORIES 付属品* 200 AAX80570 REMOTE CONTROL DVD-14 CARTDVDS1700 リモコン* s 202 AAX80650 POWER CABLE 2m 1pc CJA2J091Z J 電源コード* s 202 AAX80620 POWER CABLE 2m 1pc CJA2A085Z U 電源コード* s 202 AAX80670 POWER CABLE 2m 1pc CJA2N078Z T 電源コード* s 202 AAX80640 POWER CABLE 2m 1pc CJA2D089Z K 電源コード* s 202 AAX80680 POWER CABLE 2m 1pc CJA2S088Z A 電源コード* s 202 AAX80630 POWER CABLE 2m 1pc CJA2B020Z GL 電源コード* s 203 AAX80660 POWER CABLE 2m 1pc CJA2L090Z K 電源コード* 204 AAX80580 VIDEO PIN CABLE 1P 1m 1pc CJS4M033Z 映像ピンケーブル* 205 AAX80590 AUDIO PIN CABLE 2P 1m 1pc CJS4N016Z 音声ピンケーブル

BATTERY R03 2pcs 単4乾電池

* 1 AAX80400 TRAY LID GD CGR1A401M9YH54 トレイリッド* 1 AAX80410 TRAY LID BL CGR1A401ZH53 トレイリッド* 1 AAX80390 TRAY LID TI CGR1A401M7XH55 トレイリッド* 2 AAX80470 FRONT PANEL GD CKM1A177YC55 フロントパネル* 2 AAX80480 FRONT PANEL BL CKM1A177ZC59 フロントパネル* 2 AAX80460 FRONT PANEL TI CKM1A177XC60 フロントパネル* 3 AAX80070 WINDOW CGU1A395Z FLウィンドウ* 4 AAX80080 FILTER FIP CMZ1A116Z FLシート* 5 AAX80200 ORNAMENT KNOB GD CGR1A402M9D6 エスカッション* 5 AAX80180 ORNAMENT KNOB BL CGR1A402K128 エスカッション* 5 AAX80190 ORNAMENT KNOB TI CGR1A402M7G41 エスカッション* 6 AAX80090 INDICATOR LED LENS CGL1A253Z LED レンズ* 7 AAX80290 SUB PANEL GD CGW1A423M9YD6 サブパネル* 7 AAX80300 SUB PANEL BL CGW1A423ZK128 サブパネル* 7 AAX80280 SUB PANEL TI CGW1A423M7XG41 サブパネル* 8 AAX80130 P.C.B. ASS'Y MAIN COP11898E J PCB メイン* 8 AAX80110 P.C.B. ASS'Y MAIN COP11898C UA PCB メイン* 8 AAX80120 P.C.B. ASS'Y MAIN COP11898D TKL PCB メイン* 8 AAX80100 P.C.B. ASS'Y MAIN COP11898B G PCB メイン

9 AAX78660 FOOT GD CKL1A192H57 脚* 9 AAX78650 FOOT BL, TI CKL1A192H56 脚

10 AAX76760 CUSHION FOOT CHG1A329 クッション 脚 01* 12 AAX80040 TOP CABINET GD CKC1A173D8 トップカバー

12 AAX78320 TOP CABINET BL CKC1A173B11 トップカバー* 12 AAX78330 TOP CABINET TI CKC1A173G40 トップカバー* 13 AAX80310 SUPPORT DVD MECHANISM CMH1A258 サポート DVDメカ* s 14 AAX80690 POWER SUPPLY UNIT COP11897B 電源ユニット* 17 AAX80060 DVD MECHANISM UNIT CJDDVD27YA DVDメカユニット

17-1 AAX74670 BELT CHG1A330 ベルト 01* 18 AAX80270 GUIDE CABLE CMH1A250 ケーブルガイド* 19 AAX80530 PANEL REAR CKF3A314Z J リアパネル* 19 AAX80520 PANEL REAR CKF2A314Z U リアパネル* 19 AAX80550 PANEL REAR CKF4A314Y T リアパネル* 19 AAX80540 PANEL REAR CKF4A314X K リアパネル* 19 AAX80510 PANEL REAR CKF2A314Y A リアパネル* 19 AAX80500 PANEL REAR CKF1A314Z G リアパネル* 19 AAX80560 PANEL REAR CKF4A314Z L リアパネル* 20 AAX80210 BADGE GD CGB1A167Y エンブレム* 20 AAX80220 BADGE BL, TI CGB1A167Z エンブレム* 21 AAX80240 FLEXIBLE FLAT CABLE 17P 80mm P=1 A-A CWC1B4A17A080A カード電線* 22 AAX80250 FLEXIBLE FLAT CABLE 17P 80mm P=1 A-B CWC1B4A17A080B G カード電線* 23 AAX80260 FLEXIBLE FLAT CABLE 24P 250mm P=0.5 CWC1G2A24G250B カード電線* 24 AAX80160 INLET ASS'Y 2P 100mm CWZDVD37BN91A JUTKAL インレットASSY* 24 AAX80170 INLET ASS'Y 2P 100mm CWZDVD37EUBN91A G インレットASSY

31 AAX74180 BIND HEAD BONDING B-T. SCREW GD,TI 3x8 MFZN2W3 CTBD3+8JFC ボンディングBタイトネジ 01* 31 AAX80490 BIND HEAD BONDING B-T. SCREW BL 3x8 MFZN2B3 CTBD3+8JFZR ボンディングBタイトネジ

32 AAX78420 BIND HEAD SCREW 3x6 MFZN2Y CTB3+6JR バインド小ネジ* 33 AAX80600 FLAT HEAD B-TIGHT SCREW 3x8 MFZN2Y CTS3+8JR 皿Bタイトネジ

34 AAX73500 BIND HEAD B-TIGHT SCREW GD,TI 3x8 MFZN2W3 CTB3+8JFC バインドBタイトネジ 01* 34 AAX78380 BIND HEAD B-TIGHT SCREW BL 3x8 MFZN2B3 CTB3+8JFZR バインドBタイトネジ* 35 AAX80420 BIND HEAD B-TIGHT SCREW 3x6 MFZN2B3 CTB3+6JR バインドBタイトネジ

36 AAX78410 BIND HEAD P-TIGHT SCREW 3x10 MFZN2Y CTB3+10GR バインドPタイトネジ* 37 AAX80140 PW HEAD B-TIGHT SCREW 3x8 MFZN2Y CTW3+8JR PWヘッドBタイトネジ* 38 AAX80140 PW HEAD B-TIGHT SCREW 3x8 MFZN2Y CTW3+8JR PWヘッドBタイトネジ

39 AAX78410 BIND HEAD P-TIGHT SCREW 3x10 MFZN2Y CTB3+10GR バインドPタイトネジ40 AAX78400 BIND HEAD P-TIGHT SCREW 3x10 MFZN2B3 CTB3+10GFZR バインドPタイトネジ

* 41 AAX80430 BIND HEAD SCREW 3x6 MFZN2B3 CTB3+6FFZR バインド小ネジ* 42 AAX80700 SPECIAL SCREW 3x6 CHD1A055R G 特殊ネジ

43 AAX78370 BIND HEAD B-TIGHT SCREW 3x6 MFZN2B3 CTB3+6JFZR バインドBタイトネジ

✻ New Parts * 新規部品

Ref No. Part No. Description Remarks Markets 部 品 名 ランク Ref No. Part No. Description Remarks Markets 部 品 名 ランク

✻ New Parts * 新規部品

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K1

K2

K3

K4

K5

K6

K7

K8

K9

K10

K11

K12

K13

K14

K15

K16

K17

K18

K19

K20

K21

K22

K23

K24

K25

K26

K27

K28

K29

K30

K31

K32

K33

K34

K35

K36

K37

K38

K39

K40

K41

K42

K43

K44

K45

K46

K47

Key no.

POWER

DIMMER

HDMI

AUDIO DIRECT

STANDBY

GROUP

PAGE-

PAGE+

MULTI/2CH

1

2

3

PROG

4

5

6

RANDOM

7

8

9

REPEAT

CLEAR

0

ENTER

A-B

SETUP

SLOW/SEARCH EEEEE

SLOW/SEARCH RRRRR

STOP AAAAA

PAUSE DDDDD

PLAY WWWWW

SKIP TTTTT

SKIP YYYYY

TOP MENU

HHHHH

ON SCREEN

QQQQQ

ENTER

WWWWW

MENU

GGGGG

RETURN

SUBTITLE

AUDIO

ANGLE

ZOOM

Function

• SCHEMATIC DIAGRAM • KEY NO. LAYOUT

K2

K3 K4 K5 K6

K7

K30

K35 K37

K41 K43

K36

K42

K39K38 K40

K31 K32

K33 K34

K8 K9

K27

K44 K45 K46 K47

K28 K29

K10

K11 K12 K13 K14

K15 K16 K17 K18

K19 K20 K21 K22

K23 K24 K25 K26

• PANEL • KEY CODE

7C-F6

7C-A9

7C-E5

7C-D9

7C-F7

7C-DD

7C-DE

7C-DF

7C-E1

7C-94

7C-95

7C-96

7C-A0

7C-97

7C-98

7C-99

7C-A1

7C-9A

7C-9B

7C-9C

7C-A3

7C-9F

7C-93

7C-B8

7C-A4

7C-AC

7C-86

7C-87

7C-85

7C-83

7C-82

7C-B9

7C-BA

7C-B1

7C-B4

7C-A6

7C-B5

7C-B8

7C-B6

7C-B2

7C-B3

7C-B7

7C-AA

7C-AD

7C-AE

7C-D7

Custom code

� REMOTE CONTROL

23

21

24

1

2

22

455kHz

OSC1

K0

K08 K16 K24 K32 K40 K48

K07 K15 K23 K31 K39 K47

K06 K14 K22 K30 K38 K46

K05 K13 K21 K29 K37 K45

K04 K12 K20 K28 K36 K44

K03 K11 K19 K27 K35 K43

K02 K10 K18 K26 K34 K42

K01 K09 K17 K25 K33 K417

8

9

10

3

4

5

6

11

14

16

17

18

19

20

15

K1

K2

K3

R0

R1

R2

R3

D0

D1

D2

D3

D4

D5

D6

D7

OSC2

VDD

VDD

100ohmsR1

R21ohm

C20.1uF

STD123SFQ1

3V

C1

47uF/10V

+

+

SI5314-H/HI-I530AIR1

GM

S34

140-

MR

S18

9

REMOUT

VDD

GND

RESET

X1