DSI Division of Integrated Systems Design Proven experience in: Applications: Integrated Systems for...

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DSI Division of Integrated Systems Design Proven experience in: Applications: Integrated Systems for Multimedia Processing Goals Our group of engineers has gained years of experience in mapping these solutions into successful low power VLSI products, with special emphasis on very low bit rate speech and video coding applications. The goal of this research and development area is to investigate a wide range of possibilities in the implementation of powerful IP modules for the next generation of mobile multimedia terminals, in order to combine them into jointly optimized wireless multimedia systems. The research encompasses the development of novel and outstanding algorithms which permit maximizing the performance of commercial multimedia systems in terms of quality, bit-rate reduction and error protection. Robust Video Compression Motion estimation algorithms and architectures Flexible multi-standard architecture up to H.264 Novel low-cost image adaptive algorithms with unsurpassed levels of quality Rate-distortion optimization strategies Low power/area reduced pipelined systolic array architecture There are two main constraints found in video communications, specially in the case of wireless applications: reduced bandwith and high bit error rates. This research program is devoted to overcome both drawbacks by developing: Error protection strategies Motion compensated error-concealment techniques at the decoder Motion vectors recovery algorithms Channel coding by using turbo codes Image, video and speech coding standards: • JPEG • JPEG2000 • MPEG-2 • MPEG-4 • H.263, H. 263+, H. 263++ • H.264 • G.726 • G.729 Transform coding: • ZTE • FFT/IFFT • DCT/IDCT • DWT/IDWT Motion estimation Error protection: • Turbo codes • Error resilience & concealment Mathematical morphology Mobile multimedia HDTV Video-conferencing Medical imaging Tele-working Virtual reality Biometric ID CORDIC processor for FFT New trends in personal computing are mainly focused on multimedia access and communication. Moreover, there is a great interest for portability in applications such as CMOS cameras, 3G mobile phones (UMTS) and personal digital assistants where the low- cost and low-power constraints are mandatory. For the particular case of mobile multimedia communications, it is expected to achieve an unprecedented growth and worldwide success in the next couple of years, with a potential market composed by millions of users around the world. Due to its mobile nature, good visual and hearing quality as well as reduced area/power dissipation are key factors for commercial products.
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Transcript of DSI Division of Integrated Systems Design Proven experience in: Applications: Integrated Systems for...

DSIDivision of Integrated Systems Design

Proven experience in:

Applications:

Integrated Systems for Multimedia Processing

Goals

Our group of engineers has gained years of experience in mapping these solutions into successful low power VLSI products, with special emphasis on very low bit rate speech and video coding applications.

The goal of this research and development area is to investigate a wide range of possibilities in the implementation of powerful IP modules for the next generation of mobile multimedia terminals, in order to combine them into jointly optimized wireless multimedia systems. The research encompasses the development of novel and outstanding algorithms which permit maximizing the performance of commercial multimedia systems in terms of quality, bit-rate reduction and error protection.

Robust Video Compression

Motion estimation algorithms and architectures Flexible multi-standard architecture up to H.264 Novel low-cost image adaptive algorithms with unsurpassed levels of quality Rate-distortion optimization strategies Low power/area reduced pipelined systolic array architecture

There are two main constraints found in video communications, specially in the case of wireless applications: reduced bandwith and high bit error rates. This research program is devoted to overcome both drawbacks by developing:

Error protection strategies Motion compensated error-concealment techniques at the decoder Motion vectors recovery algorithms Channel coding by using turbo codes

Image, video and speech coding standards:• JPEG• JPEG2000• MPEG-2• MPEG-4• H.263, H. 263+, H. 263++ • H.264• G.726• G.729

Transform coding:• ZTE• FFT/IFFT• DCT/IDCT• DWT/IDWT

Motion estimation

Error protection:• Turbo codes• Error resilience &

concealment

Mathematical morphology

Mobile multimediaHDTVVideo-conferencingMedical imagingTele-workingVirtual realityBiometric ID

CORDIC processor for FFT

New trends in personal computing are mainly focused on multimedia access and communication. Moreover, there is a great interest for portability in applications such as CMOS cameras, 3G mobile phones (UMTS) and personal digital assistants where the low-cost and low-power constraints are mandatory. For the particular case of mobile multimedia communications, it is expected to achieve an unprecedented growth and worldwide success in the next couple of years, with a potential market composed by millions of users around the world. Due to its mobile nature, good visual and hearing quality as well as reduced area/power dissipation are key factors for commercial products.

DSIDivision of Integrated Systems Design

Integrated Systems for Multimedia Processing

Low Power Circuits for Mobile Multimedia

Low Power ADPCM Encoder/Decoder IP 0.25 m CMOS technology 40 kbps based on ITU G.726 recommendation 225 W @ 128 kHz and 1.7x1.7 mm2 Excellent levels of quality

FFT CORDIC Processor 1024-points FFT of 16-bits complex data

DCT Processor Embedded distributed arithmetic

2D-DWT Processor Up to CCIR format at 25 fps

Morphological Processor Real time 512x512 pixels video image processing

About DSIThe Division of Integrated Systems Design is composed of experienced researchers who are developing commercial products and doing outstanding private and public research in the field of microelectronics since late 80s. The strength of the team is based on its know-how, cutting-edge resources and a set of services which permit to fulfill your company requirements, increasing its competitiveness and international position in new challenging markets.

High Performance IP Modules

Arithmetic CoDec for Data Compression 0.25 m CMOS technology Optimized for encoding/decoding ZTE and DWT symbols and coefficients 2.5 M transistors within 25 mm2

300 mW @ 10 MHz

Image Processing Array Smart pixels technology SQCIF (128x96) array Three video coding operations in parallel 1.16 W @ 128 kHz (processing) and 7 MHz (load/unload image)

For more information on DSI’s Integrated Systems for Multimedia Processing, please contact:

[email protected]

© 2004 Division of Integrated Systems Design

IUMAUniversidad de Las Palmas de Gran CanariaCampus Universitario de TafiraLas Palmas de Gran Canaria, SPAINTel: +34 928451232 (direct) +34 928451250 (reception desk)Fax: +34 928451243URL: www.iuma.ulpgc.es