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Doc.: IEEE 802.15- Submission September 2007 Y. Katayama et at IBM Slide 1 Project: IEEE P802.15...
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Transcript of Doc.: IEEE 802.15- Submission September 2007 Y. Katayama et at IBM Slide 1 Project: IEEE P802.15...
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 1
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)
Submission Title: [2Gbps Transmission Demonstration using /2 DBPSK Alternative]Date Submitted: [17 September, 2007]Source: [Y. Katayama, A. V-.Garcia, D. Nakano, T. Beukema] Company [IBM]Address [1623-14 Shimotsuruma Yamato Kanagawa 242-8502 Japan]Voice:[+81.46.215.4879], E-Mail: [[email protected] ]
Re: []
Abstract: [Present an alternative way of generating /2 DBPSK common waveform with its 2Gbps data rate demonstration]
Purpose: [Discussion purpose only ]
Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein.Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15.
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 2
2Gbps Transmission Demonstration using /2 (D)BPSK Alternative
Y. Katayama, A. V.-Garcia*, D. Nakano, and T. Beukema*IBM Research, Tokyo Research Laboratory
*IBM T. J. Watson Research Center
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 3
Modulation Formats Discussed in IEEE 802.15.3c
I
Q
QFSK
Q
MSK/GMSK
I
Q
QPSK
I
Q
p/2-shift (D)BPSK /4
rotate
Filter
Filter
I
Q
BPSK(Bipolar ASK)
/2 shift
8PSK16QAM
OOK Common Waveform
OFDM
OQPSKHW demonstrated by IBM
FM discriminator
Differential detectionCoherent detection …
With or w/o (1+x2) precoding
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 4
Summary of Link Experiments
ModulationRate &
DistanceReal Time?
ADC Requirement
Demodulation
QPSK-OFDM630 Mb/s @ 10 m
(ADC limited)No, data
6-b700 MS/s
Software
DQPSK2 Gb/s
@ 1-6 mYes, Video
6-b2 GS/s
FPGA+Quadrature
QFSK(/2 (D)BPSK alternative)
2 Gb/s @ 3 m
Yes, Video NoneFPGA+
FM limiter-discriminator
MSK2 Gb/s
@ 3.5 mYes, Video None
FPGA+FM limiter-
discriminator All used +7 dBi gain planar folded dipole antenna on PCBs.
All used ≈ +10 dBm transmit power.
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 5
QFSK/MSK Demo System
TX Baseband(FPGA board)
RX baseband(FPGA board)
Pac
keti
zer
EC
C e
nco
de
mo
du
lati
on
EC
C d
eco
de
Vid
eo
ou
tpu
t
Dep
ack
etiz
er
60GHz TX RF module
60GHz RX RF module
I
Q
DVI
2Gbps
Dem
od
ula
tio
n
DVIPC
Clock inputs for MSK. No clock inputs for QFSK
HD-SDI1.485Gbps
Camera
FM discriminator
1080i HDTV
monitor
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 6
QFSKModulator
FEC EncoderRocket I/O
InterfaceCDR
Scrambler
Rocket I/OInterface
Differential 1.485Gbps
HD-SDIFramer
20bit
Clock buffer
AsyncFIFO
Packetizer
Recovered Clock
10bit x2 10bit x2 10bit x2 10bit x2 20bit
Rocket I/OInterface
To RF module
75MHz
100MHz
Differential 1Gbps x2
I
Q
TX Baseband Block Diagram FPGA board
VideoSource
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 7
FEC Decoder
DescramblerAsync FIFO
DCM
Rocket I/OInterface
CDRDifferential
2Gbps
Framer
20bit From RF module10bit x2
Clock bufferRecovered Clock
10bit x2 20bit
HD-SDIInterface
10bit x210bit x2
Videoconverter
75MHz
100MHz
125MHz*
75MHz
RX Baseband Block Diagram FPGA board
VideoMonitor
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 8
Error Pattern Measurements (w/o FEC)
Random error dominant (Phase II)
• Under multi-path environment (ordinary lab)
– Packet loss is dominant (white horizontal lines)
• Burst errors
• Header detection failure – Packet recovery is effective
• Under multi-path suppressed environment (radio anechoic room)
– Random error is dominant (white dots)
– Random error correction is effective
• RS(255,239) is not effective unless appropriately interleaved
– But difficult with FPGA implementation then
Demo/Test setup in radio anechoic room
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 9
FPGA Board Functional Diagram
Motion Co-Processor
De-interlacer
Re-Configurable System Logic
with 2x powerPCI/O I/O
I/O Controllers224MB
SDRAM total
IEE
E 139
4a
Keyb
oard
Mo
use(P
S2)
Trac
kba
ll
US
B
RS
232(C
amera)
Au
x. RS
232
Co
mp
actF
lash
HD-SDI
DVI
CameraLink
Data Input
HD-SDI
DVI
Aurora/Infiniband
Data Output
4
Aux. Aurora/Infiniband for
Scalability
4
Xilinx Vertex-II Pro XC2VP50
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 10
Baseband input format (1.485 Gbps, HD-SDI 1080i)
Baseband output format (2 Gbps, parity/other overheads added)
Serial
I
Q
BC
H(3
50,3
00)
44000 b / line
POB(150,149;3)
EAV Line No. CRCC AUX (Audio, etc.)SAV Effective Line (YCbCr 4:2:2)
40 b 5360 b38400 b 80 b 40 b80 b
BCH Parity
POB Parity
10 b @ 75 MHz
10 b @ 75 MHz
10 b @ 100 MHz
10 b @ 100 MHz
Serial
Subframe(25+25 packets)
H0 H1 H2
…
…
…
…
…
…
Proprietary Wireless Frame Format
300-b Packet
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 11
FEC Encoder/Decoder Design• Encoder
– One clock latency
• Decoder– Inner: BCH(350,300) on GF(210)
• Stateless (oneshot) coef. gen.
– Outer: POB(150,149;3) on GF(210)• Stateless and shared coef. gen.• Syndrome recalc.• Buffer size remains comparable to original block code.
20b 20b 20b 20b
20b@100MHz = 2Gbps
FPGA (Xilinx Vertex II Pro) implementation result
doc.: IEEE 802.15-<15-07-0835-00-003c>
Submission
September 2007
Y. Katayama et at IBMSlide 12
Conclusion• Demonstrated 2Gbps transmission
– SiGe radio with FM discriminator
– QFSK modulation
– Proprietary frame/FEC (for FPGA implementation)
• Pointed out that QFSK is an alternative way of generating /2 (D)BPSK waveform – Verified with HW @ 2Gbps
– Radio supports the necessary BW
• Demo running at both IBM T. J. Watson Research Center and Tokyo Research Laboratory