Direct Bond Interconnect (DBI) Technology as an Alternative to Thermal Compression Bonding
25
Direct Bond Interconnect (DBI®) Technology as an Alternative to Thermal Compression Bonding Guilian Gao Gill Fountain, Paul Enquist, Cyprian Uzoh, Liang Frank Wang, Scott McGrath, Bongsub Lee, Willmar Subido, Sitaram Arkalgud, Laura Mirkarimi 408-324-5125, [email protected]
-
Upload
invensas -
Category
Devices & Hardware
-
view
70 -
download
3
Transcript of Direct Bond Interconnect (DBI) Technology as an Alternative to Thermal Compression Bonding
Direct Bond Interconnect (DBI®) Technology as an Alternative to Thermal Compression Bonding
Guilian GaoGill Fountain, Paul Enquist, Cyprian Uzoh, Liang Frank Wang, Scott McGrath,
Bongsub Lee, Willmar Subido, Sitaram Arkalgud, Laura Mirkarimi
408-324-5125, [email protected]
Introduction Test Vehicle Design & Fabrication Bonding Process Development and Qualification D2W Hybrid Bonding Results Summary Acknowledgements
Solution: Hybrid bonding
• Simpler process (no solder or underfill)
• Room temp bond (throughput)• Die stack has properties of a
single die• Improved thermal performance• Architectural flexibility “If you can
print it; you can connect it….“
TCB Challenges:• Process control and low yield in
bonding and assembly• Thermal performance in multi-die
memory stacks• Stress over large die/packages
(CTE) and warpage• Low Throughput • Scaling limitations (40 µm today)
HBM 4-high stack with TCB With hybrid bonding
Thermal compression bonding (TCB) at reflow (240°C)
High warpage, leads to yield loss
Underfill challenges (flow, standoff, pitch)
Solder interconnect, pitch limitations (40µm)
Low temp bonding (25°C) Batch anneal temp. (~150-
300°C) Low warpage in final product
improves yield Scalable to ultra-fine pitch
(down to 1 µm)
µbump Hybrid bonding pad
Introduction Test Vehicle Design & Fabrication Bonding Process Development and Qualification D2W DBI® Results Summary Acknowledgements
Single side die (phase 1) 4 die stack without TSVs
(phase 2) 4 die stack with TSVs
(phase 3) Grid bond pads to tolerate
10µm misalignment (patent pending*)
Uniform grid array on bonding surface
Daisy chains throughout stack (for phase 3)
* US patent application number: 62/269,412
Developed multiple partners for with critical capabilities ◦ CMP ◦ TSVs
Developed in-house AFM capability and expertise for bonding surface characterization
Designed and fabricated Daisy chain wafers for D2W stacking
Host wafer and single sided daisy chain die wafer
Double sided daisy chain die wafer
DBI® contact layer
Routing layerVia layer
In house AFM capability for 300mm wafer
Color enhanced AFM image of a bonding surface with Cu recessed from oxide
Introduction Test Vehicle Design & Fabrication Bonding Process Development and Qualification D2W DBI® Results Summary Acknowledgements
Thin wafer handling and dicing protocols Using oxide bonding to establish process protocols
◦ Cleaning, activation, bonding Metrology: bond energy, CSAM,
Die front side particle contamination
From saw dicing
Die back side tape residue
Die surface afterWet clean
BE (mJ/m2) = (3 x h2 x E x t3)/[32 x (L + R) 4]
Bond Energy Bond Energy MeasurementMeasurement
BE: Bond Energyh: Razor blade thickness, in mm E: Young’s Modulus of silicon, in Pa t: Wafer thickness, in mm L: Observed crack length, in mmR: Correction for the razor blade bevel length, in mm
Parameter 1 Parameter 2 Parameter 3Bond Energy (mJ/m2)
Low Low Low 1747Low Low High 2032Low Middle Low 1883Low Middle High 2032Low High Low 1883Low High High 1747High Low Low 1883High Low High 2032High Middle Low 2032High Middle High 1747High High Low 1883High High High 2032
Bond Energy after 150oC, 15 min anneal◦ >2000mJ/m2 after
short anneal◦ Wide process
window for 1500 mJ/m2 target
Progression of bonding void reduction
Large voidSmall voids
No voids
Early stage, largeParticles on surface
Small particles on surface Clean surface
Bonding using in-house TCB bonder and P&P Tool Compatible with high throughput P&P tool Ambient condition, very low force No underfill, no adhesive <1s bonding time (vs 8-30s for TCB) Batch Anneal after bonding, no fixture needed
Introduction Test Vehicle Design & Fabrication Bonding Process Development and Qualification D2W Hybrid Bonding Results Summary Acknowledgements
Measurement after 300oC anneal 8” host wafer 73% yield on 1st wafer 96% yield on most recent build
1st wafer 1st wafer E-test result Latest E-test result
281.7 277.8 277.8 277.8
274 2E+11 272.1 268.5 270.3 268.5 268.5 268.5 267 272.1
275.9 285.7 287.8 281.7 279.7 277.8 275.9 270.3 272.1 3E+11
274 274 277.8 277.8 275.9 274 272.1 272.1
270.3 272.1 274 277.8 277.8 277.8 277.8 274 272.9 272.1275.9 275.9 275.9 283.7 285.7 275.9 272.1 275.9
272.1 271 272.1 275.9 274 275.9 274 273 272.1 275.9
272.1 272.1 272.1 273
Good bonding interface Very solid Cu-Cu joints No void No intermetallic layer
Introduction Test Vehicle Design & Fabrication Bonding Process Development and Qualification D2W DBI® Results Summary Acknowledgements
D2W hybrid bonding has been demonstrated using daisy chain test vehicles that mimic HBM die size and interconnect pitch
E-test yield of 96% has been achieved Compared to µbump TCB , D2W hybrid bonding
process is much simpler: very low force, ambient bonding and as fast as flip chip bonding
A wet cleaning process leads to virtually void free bonding.
Plasma activation process window is very wide and well suited for HVM
Novati Technologies◦ Daisy chain wafer fabrication
Fraunhofer IZM ASSID◦ Plasma activation DOE
![ALTERNATIVES TO SOLDER IN INTERCONNECT, PACKAGING, …€¦ · pitch application during thermo-compression bonding as shown in Figure 1 [2]. Figure 1. COF bonding process using triple-layered](https://static.fdocuments.net/doc/165x107/5ed16097d2fe6b0b7b19e97f/alternatives-to-solder-in-interconnect-packaging-pitch-application-during-thermo-compression.jpg)
