DIGITAL TECHNIQUE HANDOUT#2

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Digital Technique Mrs. Sunita M Dol, CSE Dept Walchand Institute of Technology, Solapur Page 1 HANDOUT#2 AIM: To study the realization of basic gates using universal gates. LEARNING OBJECTIVES: - Realize the basic gates AND, OR and NOT gate using universal gates NAND and NOR gate. COMPONENT REQUIRED: - Logic gates (IC) trainer kit. - Connecting patch chords. - IC 7400, IC 7402 Sr. No. Component Specification 1 NAND gate IC 7400 2 NOR gate IC7402 THEORY: The logic gates are the digital circuits with one output and one or more inputs. They are the basic building blocks of any logic circuit. Different logic gates are: - Basic gates: AND, OR, NOT - Universal gates: NAND, NOR, - Derived gates: EX-OR. Basic Gates: a. NOT gate: Figure shows a NOT gate which is also known as an Inverter. It has one input and one output. Its logical equation is written as Y= NOT A Y= Ā And it is read as ‘Y equals complement of A’ or Y equals not A

Transcript of DIGITAL TECHNIQUE HANDOUT#2

Page 1: DIGITAL TECHNIQUE HANDOUT#2

Digital Technique Mrs. Sunita M Dol, CSE Dept

Walchand Institute of Technology, Solapur Page 1

HANDOUT#2

AIM:

To study the realization of basic gates using universal gates.

LEARNING OBJECTIVES:

- Realize the basic gates AND, OR and NOT gate using universal gates

NAND and NOR gate.

COMPONENT REQUIRED:

- Logic gates (IC) trainer kit.

- Connecting patch chords.

- IC 7400, IC 7402

Sr. No. Component Specification

1 NAND gate IC 7400

2 NOR gate IC7402

THEORY:

The logic gates are the digital circuits with one output and one or more inputs.

They are the basic building blocks of any logic circuit.

Different logic gates are:

- Basic gates: AND, OR, NOT

- Universal gates: NAND, NOR,

- Derived gates: EX-OR.

Basic Gates:

a. NOT gate: Figure shows a NOT gate which is also known as an Inverter. It

has one input and one output. Its logical equation is written as

Y= NOT A

Y= Ā

And it is read as ‘Y equals complement of A’ or Y equals not A

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Digital Technique Mrs. Sunita M Dol, CSE Dept

Walchand Institute of Technology, Solapur Page 2

b. AND gate: A circuit which perform an AND operation is shown in the

figure. It has two inputs and one output. The input terminals are marked as

A, B and the output terminal is marked as Y.

The AND gate is defined as the output of AND gate is 1 iff all inputs are ‘1’.

Mathematically it is written as

Y= A AND B

Y=A.B

Y=AB

c. OR gate: Figure shows the OR gate with two inputs and one output. The

input terminals are marked as A, B and the output terminal is marked as Y.

The OR gate is defined as the output of OR gate is 1 when any one of the

input is ‘1’.

Mathematically it is written as

Y= A OR B

Y=A + B

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Digital Technique Mrs. Sunita M Dol, CSE Dept

Walchand Institute of Technology, Solapur Page 3

Universal Gates: Either NAND or NOR are sufficient for the realization of any

logical expression. Because of this reason, NAND and NOR gates are known as

universal gates

a. ‘NOT-AND’ operator is known as NAND operator. Figure shows the two

inputs and one output NAND gate. The input terminals are marked as A, B

and the output terminal is marked as Y. Its logical equation is given as

Y=

and it is read as ‘Y equals NOT (A AND B)’

b. ‘NOT-OR’ operator is known as NOR operator. Figure shows the two inputs

and one output NOR gate. The input terminals are marked as A, B and the

output terminal is marked as Y. Its logical equation is given as

Y=

and it is read as ‘Y equals NOT (A OR B)’

The three basic operation using NAND and NOR is shown in the following figure.

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Digital Technique Mrs. Sunita M Dol, CSE Dept

Walchand Institute of Technology, Solapur Page 4

Using NAND gate Using NOR gate

PROCEDURE:

1. Check the components for their working.

2. Insert the appropriate IC into the IC base.

3. Make connections as shown in the circuit diagram.

4. Provide the input data via the input switches and observe the output on

output LEDs

5. Give various combinations of inputs and note down the output with help of

LED for all gate ICs one by one.

RESULT:

The realization of basic gates AND, OR and NOT using universal gates NAND

and NOR gate is verified.